diff --git a/llvm/test/CodeGen/X86/early-ifcvt-remarks.ll b/llvm/test/CodeGen/X86/early-ifcvt-remarks.ll index 4e07070fba0d1e..85c9aadbf70481 100644 --- a/llvm/test/CodeGen/X86/early-ifcvt-remarks.ll +++ b/llvm/test/CodeGen/X86/early-ifcvt-remarks.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc %s -x86-early-ifcvt -pass-remarks='early-ifcvt' -pass-remarks-missed='early-ifcvt' -mcpu=k8 -o - 2>&1 | FileCheck %s target triple = "x86_64-none-none" @@ -6,7 +7,26 @@ target triple = "x86_64-none-none" ; CHECK-SAME: and the short leg adds another {{[0-9]+}} cycles{{s?}}, ; CHECK-SAME: and the long leg adds another {{[0-9]+}} cycles{{s?}}, ; CHECK-SAME: each staying under the threshold of {{[0-9]+}} cycles{{s?}}. + +; CHECK: remark: :0:0: did not if-convert branch: +; CHECK-SAME: the condition would add {{[0-9]+}} cycles{{s?}} to the critical path, +; CHECK-SAME: and the short leg would add another {{[0-9]+}} cycles{{s?}}, +; CHECK-SAME: and the long leg would add another {{[0-9]+}} cycles{{s?}} exceeding the limit of {{[0-9]+}} cycles{{s?}}. + +; CHECK: remark: :0:0: did not if-convert branch: +; CHECK-SAME: the resulting critical path ({{[0-9]+}} cycles{{s?}}) +; CHECK-SAME: would extend the shorter leg's critical path ({{[0-9]+}} cycle{{s?}}) +; CHECK-SAME: by more than the threshold of {{[0-9]+}} cycles{{s?}}, +; CHECK-SAME: which cannot be hidden by available ILP. + define i32 @mm1(i1 %pred, i32 %val) { +; CHECK-LABEL: mm1: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: # kill: def $esi killed $esi def $rsi +; CHECK-NEXT: leal 1(%rsi), %eax +; CHECK-NEXT: testb $1, %dil +; CHECK-NEXT: cmovel %esi, %eax +; CHECK-NEXT: retq entry: br i1 %pred, label %if.true, label %if.else @@ -19,11 +39,20 @@ if.else: ret i32 %res } -; CHECK: remark: :0:0: did not if-convert branch: -; CHECK-SAME: the condition would add {{[0-9]+}} cycles{{s?}} to the critical path, -; CHECK-SAME: and the short leg would add another {{[0-9]+}} cycles{{s?}}, -; CHECK-SAME: and the long leg would add another {{[0-9]+}} cycles{{s?}} exceeding the limit of {{[0-9]+}} cycles{{s?}}. define i32 @mm2(i1 %pred, i32 %val, i32 %e1, i32 %e2, i32 %e3, i32 %e4, i32 %e5) { +; CHECK-LABEL: mm2: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movl %esi, %eax +; CHECK-NEXT: testb $1, %dil +; CHECK-NEXT: je .LBB1_2 +; CHECK-NEXT: # %bb.1: # %if.true +; CHECK-NEXT: addl %eax, %edx +; CHECK-NEXT: addl %ecx, %r8d +; CHECK-NEXT: addl %edx, %r8d +; CHECK-NEXT: addl %r8d, %r9d +; CHECK-NEXT: movl %r9d, %eax +; CHECK-NEXT: .LBB1_2: # %if.else +; CHECK-NEXT: retq entry: br i1 %pred, label %if.true, label %if.else @@ -39,12 +68,48 @@ if.else: ret i32 %res } -; CHECK: did not if-convert branch: -; CHECK-SAME: the resulting critical path ({{[0-9]+}} cycles{{s?}}) -; CHECK-SAME: would extend the shorter leg's critical path ({{[0-9]+}} cycle{{s?}}) -; CHECK-SAME: by more than the threshold of {{[0-9]+}} cycles{{s?}}, -; CHECK-SAME: which cannot be hidden by available ILP. define i32 @mm3(i1 %pred, i32 %val, i32 %e1, i128 %e2, i128 %e3, i128 %e4, i128 %e5) { +; CHECK-LABEL: mm3: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movl %esi, %eax +; CHECK-NEXT: testb $1, %dil +; CHECK-NEXT: movl %esi, %r10d +; CHECK-NEXT: jne .LBB2_2 +; CHECK-NEXT: # %bb.1: # %if.false +; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rsi +; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rdi +; CHECK-NEXT: imull %edx, %edx +; CHECK-NEXT: movslq %edx, %r10 +; CHECK-NEXT: movq %rcx, %rax +; CHECK-NEXT: movl %edx, %r9d +; CHECK-NEXT: mulq %r10 +; CHECK-NEXT: imulq %r10, %r8 +; CHECK-NEXT: sarq $63, %r10 +; CHECK-NEXT: imulq %rcx, %r10 +; CHECK-NEXT: addq %rdx, %r8 +; CHECK-NEXT: addq %r10, %r8 +; CHECK-NEXT: addq {{[0-9]+}}(%rsp), %rax +; CHECK-NEXT: adcq {{[0-9]+}}(%rsp), %r8 +; CHECK-NEXT: xorq {{[0-9]+}}(%rsp), %rdi +; CHECK-NEXT: xorq %r8, %rdi +; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %r10 +; CHECK-NEXT: xorq %rsi, %r10 +; CHECK-NEXT: xorq %rax, %r10 +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: movl %esi, %ecx +; CHECK-NEXT: sarq %cl, %rax +; CHECK-NEXT: addq %rdi, %rdi +; CHECK-NEXT: notb %cl +; CHECK-NEXT: shlq %cl, %rdi +; CHECK-NEXT: movl %esi, %ecx +; CHECK-NEXT: shrq %cl, %r10 +; CHECK-NEXT: orq %rdi, %r10 +; CHECK-NEXT: testb $64, %sil +; CHECK-NEXT: cmovneq %rax, %r10 +; CHECK-NEXT: movl %r9d, %eax +; CHECK-NEXT: .LBB2_2: # %if.endif +; CHECK-NEXT: addl %r10d, %eax +; CHECK-NEXT: retq entry: br i1 %pred, label %if.true, label %if.false