@@ -2226,12 +2226,19 @@ static mlir::Value vecReduceIntValue(CIRGenFunction &cgf, mlir::Value val,
2226
2226
loc, val, builder.getConstInt (loc, cgf.SizeTy , 0 ));
2227
2227
}
2228
2228
2229
- static void prepareNeonCallArgs (CIRGenBuilderTy &builder,
2230
- llvm::SmallVector<mlir::Type> argTypes,
2231
- llvm::SmallVectorImpl<mlir::Value> &args,
2232
- mlir::Location loc,
2233
- bool isConstrainedFPIntrinsic, unsigned shift,
2234
- bool rightshift) {
2229
+ template <typename Operation>
2230
+ static mlir::Value emitNeonCallToOp (
2231
+ CIRGenBuilderTy &builder, llvm::SmallVector<mlir::Type> argTypes,
2232
+ llvm::SmallVectorImpl<mlir::Value> &args,
2233
+ std::optional<llvm::StringRef> intrinsicName, mlir::Type funcResTy,
2234
+ mlir::Location loc, bool isConstrainedFPIntrinsic = false ,
2235
+ unsigned shift = 0 , bool rightshift = false ) {
2236
+ // TODO: Consider removing the following unreachable when we have
2237
+ // emitConstrainedFPCall feature implemented
2238
+ assert (!cir::MissingFeatures::emitConstrainedFPCall ());
2239
+ if (isConstrainedFPIntrinsic)
2240
+ llvm_unreachable (" isConstrainedFPIntrinsic NYI" );
2241
+
2235
2242
for (unsigned j = 0 ; j < argTypes.size (); ++j) {
2236
2243
if (isConstrainedFPIntrinsic) {
2237
2244
assert (!cir::MissingFeatures::emitConstrainedFPCall ());
@@ -2244,56 +2251,19 @@ static void prepareNeonCallArgs(CIRGenBuilderTy &builder,
2244
2251
args[j] = builder.createBitcast (args[j], argTypes[j]);
2245
2252
}
2246
2253
}
2247
- }
2248
-
2249
- static mlir::Value emitNeonCall (CIRGenBuilderTy &builder,
2250
- llvm::SmallVector<mlir::Type> argTypes,
2251
- llvm::SmallVectorImpl<mlir::Value> &args,
2252
- llvm::StringRef intrinsicName,
2253
- mlir::Type funcResTy, mlir::Location loc,
2254
- bool isConstrainedFPIntrinsic = false ,
2255
- unsigned shift = 0 , bool rightshift = false ) {
2256
- // TODO: Consider removing the following unreachable when we have
2257
- // emitConstrainedFPCall feature implemented
2258
- assert (!cir::MissingFeatures::emitConstrainedFPCall ());
2259
- if (isConstrainedFPIntrinsic)
2260
- llvm_unreachable (" isConstrainedFPIntrinsic NYI" );
2261
-
2262
- prepareNeonCallArgs (builder, std::move (argTypes), args, loc,
2263
- isConstrainedFPIntrinsic, shift, rightshift);
2264
2254
2265
2255
if (isConstrainedFPIntrinsic) {
2266
2256
assert (!cir::MissingFeatures::emitConstrainedFPCall ());
2267
2257
return nullptr ;
2268
2258
}
2269
- return builder
2270
- .create <cir::LLVMIntrinsicCallOp>(
2271
- loc, builder.getStringAttr (intrinsicName), funcResTy, args)
2272
- .getResult ();
2273
- }
2274
-
2275
- // This one is similar to the function above, except for creating an operation
2276
- // from template instead of creating a LLVMIntrinsicCallOp
2277
- template <typename Operation>
2278
- static mlir::Value
2279
- emitNeonCall (CIRGenBuilderTy &builder, llvm::SmallVector<mlir::Type> argTypes,
2280
- llvm::SmallVectorImpl<mlir::Value> &args, mlir::Type funcResTy,
2281
- mlir::Location loc, bool isConstrainedFPIntrinsic = false ,
2282
- unsigned shift = 0 , bool rightshift = false ) {
2283
- // TODO: Consider removing the following unreachable when we have
2284
- // emitConstrainedFPCall feature implemented
2285
- assert (!cir::MissingFeatures::emitConstrainedFPCall ());
2286
- if (isConstrainedFPIntrinsic)
2287
- llvm_unreachable (" isConstrainedFPIntrinsic NYI" );
2288
-
2289
- prepareNeonCallArgs (builder, std::move (argTypes), args, loc,
2290
- isConstrainedFPIntrinsic, shift, rightshift);
2291
-
2292
- if (isConstrainedFPIntrinsic) {
2293
- assert (!cir::MissingFeatures::emitConstrainedFPCall ());
2294
- return nullptr ;
2259
+ if constexpr (std::is_same_v<Operation, cir::LLVMIntrinsicCallOp>) {
2260
+ return builder
2261
+ .create <Operation>(loc, builder.getStringAttr (intrinsicName.value ()),
2262
+ funcResTy, args)
2263
+ .getResult ();
2264
+ } else {
2265
+ return builder.create <Operation>(loc, funcResTy, args).getResult ();
2295
2266
}
2296
- return builder.create <Operation>(loc, funcResTy, args).getResult ();
2297
2267
}
2298
2268
2299
2269
// / This function `emitCommonNeonCallPattern0` implements a common way
@@ -2315,7 +2285,7 @@ emitCommonNeonCallPattern0(CIRGenFunction &cgf, llvm::StringRef intrincsName,
2315
2285
argTypes = {funcResTy, funcResTy};
2316
2286
}
2317
2287
mlir::Value res =
2318
- emitNeonCall (builder, std::move (argTypes), ops, intrincsName, funcResTy,
2288
+ emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, std::move (argTypes), ops, intrincsName, funcResTy,
2319
2289
cgf.getLoc (e->getExprLoc ()));
2320
2290
mlir::Type resultType = cgf.convertType (e->getType ());
2321
2291
return builder.createBitcast (res, resultType);
@@ -2337,7 +2307,7 @@ static mlir::Value emitCommonNeonVecAcrossCall(CIRGenFunction &cgf,
2337
2307
cir::VectorType vTy =
2338
2308
cir::VectorType::get (&cgf.getMLIRContext (), eltTy, vecLen);
2339
2309
llvm::SmallVector<mlir::Value, 1 > args{op};
2340
- return emitNeonCall (builder, {vTy}, args, intrincsName, eltTy,
2310
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {vTy}, args, intrincsName, eltTy,
2341
2311
cgf.getLoc (e->getExprLoc ()));
2342
2312
}
2343
2313
@@ -2420,7 +2390,7 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
2420
2390
case NEON::BI__builtin_neon_vpaddlq_v: {
2421
2391
// The source operand type has twice as many elements of half the size.
2422
2392
cir::VectorType narrowTy = getHalfEltSizeTwiceNumElemsVecType (builder, vTy);
2423
- return emitNeonCall (builder, {narrowTy}, ops,
2393
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {narrowTy}, ops,
2424
2394
isUnsigned ? " aarch64.neon.uaddlp"
2425
2395
: " aarch64.neon.saddlp" ,
2426
2396
vTy, getLoc (e->getExprLoc ()));
@@ -2431,10 +2401,10 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
2431
2401
cir::VectorType srcVty = builder.getExtendedOrTruncatedElementVectorType (
2432
2402
vTy, false , /* truncate */
2433
2403
mlir::cast<cir::IntType>(vTy.getEltType ()).isSigned ());
2434
- ops[1 ] = emitNeonCall (builder, {srcVty, srcVty}, mulOps,
2404
+ ops[1 ] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {srcVty, srcVty}, mulOps,
2435
2405
" aarch64.neon.sqdmull" , vTy, getLoc (e->getExprLoc ()));
2436
2406
ops.resize (2 );
2437
- return emitNeonCall (builder, {vTy, vTy}, ops,
2407
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {vTy, vTy}, ops,
2438
2408
builtinID == NEON::BI__builtin_neon_vqdmlal_v
2439
2409
? " aarch64.neon.sqadd"
2440
2410
: " aarch64.neon.sqsub" ,
@@ -2472,7 +2442,7 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
2472
2442
cir::VectorType mulVecT =
2473
2443
GetNeonType (this , NeonTypeFlags (neonType.getEltType (), false ,
2474
2444
/* isQuad*/ false ));
2475
- return emitNeonCall (builder, {resTy, mulVecT, SInt32Ty}, ops,
2445
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {resTy, mulVecT, SInt32Ty}, ops,
2476
2446
(builtinID == NEON::BI__builtin_neon_vqdmulhq_lane_v ||
2477
2447
builtinID == NEON::BI__builtin_neon_vqdmulh_lane_v)
2478
2448
? " aarch64.neon.sqdmulh.lane"
@@ -2484,15 +2454,15 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
2484
2454
// These intrinsics expect signed vector type as input, but
2485
2455
// return unsigned vector type.
2486
2456
cir::VectorType srcTy = getSignChangedVectorType (builder, vTy);
2487
- return emitNeonCall (builder, {srcTy, srcTy}, ops, " aarch64.neon.sqshlu" ,
2457
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {srcTy, srcTy}, ops, " aarch64.neon.sqshlu" ,
2488
2458
vTy, getLoc (e->getExprLoc ()),
2489
2459
false , /* not fp constrained op */
2490
2460
1 , /* second arg is shift amount */
2491
2461
false /* leftshift */ );
2492
2462
}
2493
2463
case NEON::BI__builtin_neon_vrshr_n_v:
2494
2464
case NEON::BI__builtin_neon_vrshrq_n_v: {
2495
- return emitNeonCall (
2465
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (
2496
2466
builder,
2497
2467
{vTy, isUnsigned ? getSignChangedVectorType (builder, vTy) : vTy}, ops,
2498
2468
isUnsigned ? " aarch64.neon.urshl" : " aarch64.neon.srshl" , vTy,
@@ -2698,25 +2668,25 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr(
2698
2668
case NEON::BI__builtin_neon_vaddlvq_s32:
2699
2669
llvm_unreachable (" neon_vaddlvq_s32 NYI " );
2700
2670
case NEON::BI__builtin_neon_vaddlvq_u32:
2701
- return emitNeonCall (builder, {argTy}, ops, " aarch64.neon.uaddlv" , resultTy,
2671
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {argTy}, ops, " aarch64.neon.uaddlv" , resultTy,
2702
2672
loc);
2703
2673
case NEON::BI__builtin_neon_vaddv_f32:
2704
2674
case NEON::BI__builtin_neon_vaddvq_f32:
2705
2675
case NEON::BI__builtin_neon_vaddvq_f64:
2706
- return emitNeonCall (builder, {argTy}, ops, " aarch64.neon.faddv" , resultTy,
2676
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {argTy}, ops, " aarch64.neon.faddv" , resultTy,
2707
2677
loc);
2708
2678
case NEON::BI__builtin_neon_vaddv_s32:
2709
2679
case NEON::BI__builtin_neon_vaddvq_s32:
2710
2680
case NEON::BI__builtin_neon_vaddvq_s64:
2711
- return emitNeonCall (builder, {argTy}, ops, " aarch64.neon.saddv" , resultTy,
2681
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {argTy}, ops, " aarch64.neon.saddv" , resultTy,
2712
2682
loc);
2713
2683
case NEON::BI__builtin_neon_vaddv_u32:
2714
2684
case NEON::BI__builtin_neon_vaddvq_u32:
2715
2685
case NEON::BI__builtin_neon_vaddvq_u64:
2716
- return emitNeonCall (builder, {argTy}, ops, " aarch64.neon.uaddv" , resultTy,
2686
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {argTy}, ops, " aarch64.neon.uaddv" , resultTy,
2717
2687
loc);
2718
2688
case NEON::BI__builtin_neon_vcaged_f64: {
2719
- return emitNeonCall (builder, {argTy}, ops, " aarch64.neon.facge" , resultTy,
2689
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {argTy}, ops, " aarch64.neon.facge" , resultTy,
2720
2690
loc);
2721
2691
}
2722
2692
case NEON::BI__builtin_neon_vcages_f32:
@@ -2906,7 +2876,7 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr(
2906
2876
cir::VectorType resVecTy =
2907
2877
cir::VectorType::get (&(cgf.getMLIRContext ()), cgf.SInt16Ty , 4 );
2908
2878
vecExtendIntValue (cgf, argVecTy, ops[0 ], loc);
2909
- mlir::Value result = emitNeonCall (builder, {argVecTy}, ops,
2879
+ mlir::Value result = emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {argVecTy}, ops,
2910
2880
" aarch64.neon.sqxtn" , resVecTy, loc);
2911
2881
return vecReduceIntValue (cgf, result, loc);
2912
2882
}
@@ -2937,7 +2907,7 @@ static mlir::Value emitCommonNeonSISDBuiltinExpr(
2937
2907
case NEON::BI__builtin_neon_vqrdmulhh_s16:
2938
2908
llvm_unreachable (" neon_vqrdmulhh_s16 NYI " );
2939
2909
case NEON::BI__builtin_neon_vqrdmulhs_s32:
2940
- return emitNeonCall (builder, {resultTy, resultTy}, ops,
2910
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {resultTy, resultTy}, ops,
2941
2911
" aarch64.neon.sqrdmulh" , resultTy, loc);
2942
2912
case NEON::BI__builtin_neon_vqrshlb_s8:
2943
2913
llvm_unreachable (" neon_vqrshlb_s8 NYI " );
@@ -3843,7 +3813,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
3843
3813
assert (APSInt && " Expected argument to be a constant" );
3844
3814
Ops[1 ] = builder.getSInt64 (APSInt->getZExtValue (), getLoc (E->getExprLoc ()));
3845
3815
const StringRef Intrinsic = " aarch64.neon.sqshlu" ;
3846
- return emitNeonCall (builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3816
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3847
3817
getLoc (E->getExprLoc ()));
3848
3818
}
3849
3819
case NEON::BI__builtin_neon_vqshld_n_u64:
@@ -3857,7 +3827,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
3857
3827
: " aarch64.neon.sqshl" ;
3858
3828
Ops.push_back (emitScalarExpr (E->getArg (1 )));
3859
3829
Ops[1 ] = builder.createIntCast (Ops[1 ], IntType);
3860
- return emitNeonCall (builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3830
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {IntType, IntType}, Ops, Intrinsic, IntType,
3861
3831
getLoc (E->getExprLoc ()));
3862
3832
}
3863
3833
case NEON::BI__builtin_neon_vrshrd_n_u64:
@@ -3875,7 +3845,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
3875
3845
assert (APSInt && " Expected argument to be a constant" );
3876
3846
int64_t SV = -APSInt->getSExtValue ();
3877
3847
Ops[1 ] = builder.getSInt64 (SV, getLoc (E->getExprLoc ()));
3878
- return emitNeonCall (builder, {IntType, builder.getSInt64Ty ()}, Ops,
3848
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {IntType, builder.getSInt64Ty ()}, Ops,
3879
3849
Intrinsic, IntType, getLoc (E->getExprLoc ()));
3880
3850
}
3881
3851
case NEON::BI__builtin_neon_vrsrad_n_u64:
@@ -3892,7 +3862,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
3892
3862
3893
3863
llvm::SmallVector<mlir::Value, 2 > args = {
3894
3864
Ops[1 ], builder.createIntCast (Ops[2 ], IntType)};
3895
- Ops[1 ] = emitNeonCall (builder, {IntType, IntType}, args, Intrinsic, IntType,
3865
+ Ops[1 ] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {IntType, IntType}, args, Intrinsic, IntType,
3896
3866
getLoc (E->getExprLoc ()));
3897
3867
return builder.createAdd (Ops[0 ], builder.createBitcast (Ops[1 ], IntType));
3898
3868
}
@@ -4040,7 +4010,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
4040
4010
name = " aarch64.neon.pmull" ;
4041
4011
cir::VectorType argTy = builder.getExtendedOrTruncatedElementVectorType (
4042
4012
ty, false /* truncated */ , !usgn);
4043
- return emitNeonCall (builder, {argTy, argTy}, Ops, name, ty,
4013
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {argTy, argTy}, Ops, name, ty,
4044
4014
getLoc (E->getExprLoc ()));
4045
4015
}
4046
4016
case NEON::BI__builtin_neon_vmax_v:
@@ -4061,7 +4031,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
4061
4031
llvm::StringRef name = usgn ? " aarch64.neon.umin" : " aarch64.neon.smin" ;
4062
4032
if (cir::isFPOrFPVectorTy (ty))
4063
4033
name = " aarch64.neon.fmin" ;
4064
- return emitNeonCall (builder, {ty, ty}, Ops, name, ty,
4034
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {ty, ty}, Ops, name, ty,
4065
4035
getLoc (E->getExprLoc ()));
4066
4036
}
4067
4037
case NEON::BI__builtin_neon_vminh_f16: {
@@ -4072,15 +4042,15 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
4072
4042
llvm::StringRef name = usgn ? " aarch64.neon.uabd" : " aarch64.neon.sabd" ;
4073
4043
if (cir::isFPOrFPVectorTy (ty))
4074
4044
name = " aarch64.neon.fabd" ;
4075
- return emitNeonCall (builder, {ty, ty}, Ops, name, ty,
4045
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {ty, ty}, Ops, name, ty,
4076
4046
getLoc (E->getExprLoc ()));
4077
4047
}
4078
4048
case NEON::BI__builtin_neon_vpadal_v:
4079
4049
case NEON::BI__builtin_neon_vpadalq_v: {
4080
4050
cir::VectorType argTy = getHalfEltSizeTwiceNumElemsVecType (builder, vTy);
4081
4051
mlir::Location loc = getLoc (E->getExprLoc ());
4082
4052
llvm::SmallVector<mlir::Value, 1 > args = {Ops[1 ]};
4083
- mlir::Value tmp = emitNeonCall (
4053
+ mlir::Value tmp = emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (
4084
4054
builder, {argTy}, args,
4085
4055
usgn ? " aarch64.neon.uaddlp" : " aarch64.neon.saddlp" , vTy, loc);
4086
4056
mlir::Value addEnd = builder.createBitcast (Ops[0 ], vTy);
@@ -4114,13 +4084,13 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
4114
4084
case NEON::BI__builtin_neon_vqrshrun_n_v:
4115
4085
// The prototype of builtin_neon_vqrshrun_n can be found at
4116
4086
// https://developer.arm.com/architectures/instruction-sets/intrinsics/
4117
- return emitNeonCall (
4087
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (
4118
4088
builder,
4119
4089
{builder.getExtendedOrTruncatedElementVectorType (ty, true , true ),
4120
4090
SInt32Ty},
4121
4091
Ops, " aarch64.neon.sqrshrun" , ty, getLoc (E->getExprLoc ()));
4122
4092
case NEON::BI__builtin_neon_vqshrn_n_v:
4123
- return emitNeonCall (
4093
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (
4124
4094
builder,
4125
4095
{builder.getExtendedOrTruncatedElementVectorType (
4126
4096
vTy, true /* extend */ ,
@@ -4129,15 +4099,15 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
4129
4099
Ops, usgn ? " aarch64.neon.uqshrn" : " aarch64.neon.sqshrn" , ty,
4130
4100
getLoc (E->getExprLoc ()));
4131
4101
case NEON::BI__builtin_neon_vrshrn_n_v:
4132
- return emitNeonCall (
4102
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (
4133
4103
builder,
4134
4104
{builder.getExtendedOrTruncatedElementVectorType (
4135
4105
vTy, true /* extend */ ,
4136
4106
mlir::cast<cir::IntType>(vTy.getEltType ()).isSigned ()),
4137
4107
SInt32Ty},
4138
4108
Ops, " aarch64.neon.rshrn" , ty, getLoc (E->getExprLoc ()));
4139
4109
case NEON::BI__builtin_neon_vqrshrn_n_v:
4140
- return emitNeonCall (
4110
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (
4141
4111
builder,
4142
4112
{builder.getExtendedOrTruncatedElementVectorType (
4143
4113
vTy, true /* extend */ ,
@@ -4151,7 +4121,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
4151
4121
case NEON::BI__builtin_neon_vrnda_v:
4152
4122
case NEON::BI__builtin_neon_vrndaq_v: {
4153
4123
assert (!cir::MissingFeatures::emitConstrainedFPCall ());
4154
- return emitNeonCall (builder, {ty}, Ops, " round" , ty,
4124
+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {ty}, Ops, " round" , ty,
4155
4125
getLoc (E->getExprLoc ()));
4156
4126
}
4157
4127
case NEON::BI__builtin_neon_vrndih_f16: {
@@ -4174,7 +4144,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
4174
4144
case NEON::BI__builtin_neon_vrndns_f32: {
4175
4145
mlir::Value arg0 = emitScalarExpr (E->getArg (0 ));
4176
4146
args.push_back (arg0);
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- return emitNeonCall <cir::RoundEvenOp>(builder, {arg0.getType ()}, args,
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+ return emitNeonCallToOp <cir::RoundEvenOp>(builder, {arg0.getType ()}, args, std:: nullopt ,
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getCIRGenModule ().FloatTy ,
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getLoc (E->getExprLoc ()));
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}
@@ -4334,7 +4304,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
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cir::VectorType vTy = cir::VectorType::get (builder.getContext (), eltTy, 4 );
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Ops.push_back (emitScalarExpr (E->getArg (0 )));
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// This is to add across the vector elements, so wider result type needed.
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- Ops[0 ] = emitNeonCall (builder, {vTy}, Ops,
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+ Ops[0 ] = emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {vTy}, Ops,
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usgn ? " aarch64.neon.uaddv" : " aarch64.neon.saddv" ,
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SInt32Ty, getLoc (E->getExprLoc ()));
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return builder.createIntCast (Ops[0 ], eltTy);
@@ -4443,7 +4413,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
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mlir::Type argTy = cir::VectorType::get (builder.getContext (),
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usgn ? UInt16Ty : SInt16Ty, 8 );
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llvm::SmallVector<mlir::Value, 1 > argOps = {emitScalarExpr (E->getArg (0 ))};
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- return emitNeonCall (builder, {argTy}, argOps,
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+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {argTy}, argOps,
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usgn ? " aarch64.neon.uaddlv" : " aarch64.neon.saddlv" ,
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usgn ? UInt32Ty : SInt32Ty, getLoc (E->getExprLoc ()));
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}
@@ -4457,7 +4427,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
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mlir::Type argTy = cir::VectorType::get (builder.getContext (),
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usgn ? UInt16Ty : SInt16Ty, 4 );
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llvm::SmallVector<mlir::Value, 1 > argOps = {emitScalarExpr (E->getArg (0 ))};
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- return emitNeonCall (builder, {argTy}, argOps,
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+ return emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {argTy}, argOps,
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usgn ? " aarch64.neon.uaddlv" : " aarch64.neon.saddlv" ,
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usgn ? UInt32Ty : SInt32Ty, getLoc (E->getExprLoc ()));
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}
@@ -4487,7 +4457,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
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cir::VectorType shitAmtVecTy =
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usgn ? getSignChangedVectorType (builder, vTy) : vTy;
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mlir::Value tmp =
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- emitNeonCall (builder, {vTy, shitAmtVecTy}, tmpOps,
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+ emitNeonCallToOp<cir::LLVMIntrinsicCallOp> (builder, {vTy, shitAmtVecTy}, tmpOps,
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usgn ? " aarch64.neon.urshl" : " aarch64.neon.srshl" , vTy,
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getLoc (E->getExprLoc ()), false ,
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1 /* shift amount is args[1]*/ , true /* right shift */ );
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