diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index e51dc8d76ac0dd..d0138d6b00017a 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -40,8 +40,6 @@ code bases. - Setting the deprecated CMake variable ``GCC_INSTALL_PREFIX`` (which sets the default ``--gcc-toolchain=``) now leads to a fatal error. -- The ``le32`` and ``le64`` targets have been removed. - C/C++ Language Potentially Breaking Changes ------------------------------------------- diff --git a/clang/docs/tools/clang-formatted-files.txt b/clang/docs/tools/clang-formatted-files.txt index 62871133a68075..a8ee8f1fcb87c2 100644 --- a/clang/docs/tools/clang-formatted-files.txt +++ b/clang/docs/tools/clang-formatted-files.txt @@ -362,6 +362,7 @@ clang/lib/Basic/Targets/BPF.cpp clang/lib/Basic/Targets/BPF.h clang/lib/Basic/Targets/Hexagon.h clang/lib/Basic/Targets/Lanai.h +clang/lib/Basic/Targets/Le64.h clang/lib/Basic/Targets/M68k.h clang/lib/Basic/Targets/MSP430.h clang/lib/Basic/Targets/NVPTX.cpp diff --git a/clang/lib/Basic/CMakeLists.txt b/clang/lib/Basic/CMakeLists.txt index e7ebc8f191aa6b..f30680552e0f5b 100644 --- a/clang/lib/Basic/CMakeLists.txt +++ b/clang/lib/Basic/CMakeLists.txt @@ -102,6 +102,7 @@ add_clang_library(clangBasic Targets/DirectX.cpp Targets/Hexagon.cpp Targets/Lanai.cpp + Targets/Le64.cpp Targets/LoongArch.cpp Targets/M68k.cpp Targets/MSP430.cpp diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 0b8e565345b6a4..29133f9ee8fcec 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -23,6 +23,7 @@ #include "Targets/DirectX.h" #include "Targets/Hexagon.h" #include "Targets/Lanai.h" +#include "Targets/Le64.h" #include "Targets/LoongArch.h" #include "Targets/M68k.h" #include "Targets/MSP430.h" @@ -343,6 +344,17 @@ std::unique_ptr AllocateTarget(const llvm::Triple &Triple, return std::make_unique(Triple, Opts); } + case llvm::Triple::le32: + switch (os) { + case llvm::Triple::NaCl: + return std::make_unique>(Triple, Opts); + default: + return nullptr; + } + + case llvm::Triple::le64: + return std::make_unique(Triple, Opts); + case llvm::Triple::ppc: switch (os) { case llvm::Triple::Linux: diff --git a/clang/lib/Basic/Targets/Le64.cpp b/clang/lib/Basic/Targets/Le64.cpp new file mode 100644 index 00000000000000..f7afa0e747d67b --- /dev/null +++ b/clang/lib/Basic/Targets/Le64.cpp @@ -0,0 +1,30 @@ +//===--- Le64.cpp - Implement Le64 target feature support -----------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements Le64 TargetInfo objects. +// +//===----------------------------------------------------------------------===// + +#include "Le64.h" +#include "Targets.h" +#include "clang/Basic/Builtins.h" +#include "clang/Basic/MacroBuilder.h" +#include "clang/Basic/TargetBuiltins.h" + +using namespace clang; +using namespace clang::targets; + +ArrayRef Le64TargetInfo::getTargetBuiltins() const { + return {}; +} + +void Le64TargetInfo::getTargetDefines(const LangOptions &Opts, + MacroBuilder &Builder) const { + DefineStd(Builder, "unix", Opts); + defineCPUMacros(Builder, "le64", /*Tuning=*/false); +} diff --git a/clang/lib/Basic/Targets/Le64.h b/clang/lib/Basic/Targets/Le64.h new file mode 100644 index 00000000000000..45f6a4e9dd75d8 --- /dev/null +++ b/clang/lib/Basic/Targets/Le64.h @@ -0,0 +1,64 @@ +//===--- Le64.h - Declare Le64 target feature support -----------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file declares Le64 TargetInfo objects. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H +#define LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H + +#include "clang/Basic/TargetInfo.h" +#include "clang/Basic/TargetOptions.h" +#include "llvm/Support/Compiler.h" +#include "llvm/TargetParser/Triple.h" + +namespace clang { +namespace targets { + +class LLVM_LIBRARY_VISIBILITY Le64TargetInfo : public TargetInfo { + +public: + Le64TargetInfo(const llvm::Triple &Triple, const TargetOptions &) + : TargetInfo(Triple) { + NoAsmVariants = true; + LongWidth = LongAlign = PointerWidth = PointerAlign = 64; + MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; + resetDataLayout("e-m:e-v128:32-v16:16-v32:32-v96:32-n8:16:32:64-S128"); + } + + void getTargetDefines(const LangOptions &Opts, + MacroBuilder &Builder) const override; + + ArrayRef getTargetBuiltins() const override; + + BuiltinVaListKind getBuiltinVaListKind() const override { + return TargetInfo::PNaClABIBuiltinVaList; + } + + std::string_view getClobbers() const override { return ""; } + + ArrayRef getGCCRegNames() const override { + return std::nullopt; + } + + ArrayRef getGCCRegAliases() const override { + return std::nullopt; + } + + bool validateAsmConstraint(const char *&Name, + TargetInfo::ConstraintInfo &Info) const override { + return false; + } + + bool hasProtectedVisibility() const override { return false; } +}; + +} // namespace targets +} // namespace clang +#endif // LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h index 0a4f06967fff5a..5f27c3469f861d 100644 --- a/clang/lib/Basic/Targets/OSTargets.h +++ b/clang/lib/Basic/Targets/OSTargets.h @@ -841,6 +841,9 @@ class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo { "i64:64-i128:128-n8:16:32:64-S128"); } else if (Triple.getArch() == llvm::Triple::mipsel) { // Handled on mips' setDataLayout. + } else { + assert(Triple.getArch() == llvm::Triple::le32); + this->resetDataLayout("e-p:32:32-i64:64"); } } }; diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp index ee05cddc3f651f..0c002b553e4c60 100644 --- a/clang/lib/CodeGen/CodeGenModule.cpp +++ b/clang/lib/CodeGen/CodeGenModule.cpp @@ -116,6 +116,8 @@ createTargetCodeGenInfo(CodeGenModule &CGM) { default: return createDefaultTargetCodeGenInfo(CGM); + case llvm::Triple::le32: + return createPNaClTargetCodeGenInfo(CGM); case llvm::Triple::m68k: return createM68kTargetCodeGenInfo(CGM); case llvm::Triple::mips: diff --git a/clang/lib/CodeGen/ItaniumCXXABI.cpp b/clang/lib/CodeGen/ItaniumCXXABI.cpp index 6e5fa0faf73d70..e1d056765a8663 100644 --- a/clang/lib/CodeGen/ItaniumCXXABI.cpp +++ b/clang/lib/CodeGen/ItaniumCXXABI.cpp @@ -576,6 +576,13 @@ CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) { return new XLCXXABI(CGM); case TargetCXXABI::GenericItanium: + if (CGM.getContext().getTargetInfo().getTriple().getArch() + == llvm::Triple::le32) { + // For PNaCl, use ARM-style method pointers so that PNaCl code + // does not assume anything about the alignment of function + // pointers. + return new ItaniumCXXABI(CGM, /*UseARMMethodPtrABI=*/true); + } return new ItaniumCXXABI(CGM); case TargetCXXABI::Microsoft: diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index d48b26cc741327..a8a7cef09972e7 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -3822,6 +3822,12 @@ static void RenderBuiltinOptions(const ToolChain &TC, const llvm::Triple &T, if (UseBuiltins) A->render(Args, CmdArgs); } + + // le32-specific flags: + // -fno-math-builtin: clang should not convert math builtins to intrinsics + // by default. + if (TC.getArch() == llvm::Triple::le32) + CmdArgs.push_back("-fno-math-builtin"); } bool Driver::getDefaultModuleCachePath(SmallVectorImpl &Result) { diff --git a/clang/test/CodeGen/bitfield-access-pad.c b/clang/test/CodeGen/bitfield-access-pad.c index 8608c5bd8be116..edda7b7798d057 100644 --- a/clang/test/CodeGen/bitfield-access-pad.c +++ b/clang/test/CodeGen/bitfield-access-pad.c @@ -16,6 +16,7 @@ // Configs that have expensive unaligned access // Little Endian // RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s +// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s // Big endian // RUN: %clang_cc1 -triple=m68k-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s diff --git a/clang/test/CodeGen/bitfield-access-unit.c b/clang/test/CodeGen/bitfield-access-unit.c index c1b0a43cccc885..d0553c5183eeff 100644 --- a/clang/test/CodeGen/bitfield-access-unit.c +++ b/clang/test/CodeGen/bitfield-access-unit.c @@ -53,8 +53,8 @@ // RUN: %clang_cc1 -triple=sparc-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT-STRICT %s // RUN: %clang_cc1 -triple=tce-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT-STRICT %s -// m68-elf is a strict alignment ISA with 4-byte aligned 64-bit or 2-byte -// aligned 32-bit integer types. This more compex to describe here. +// Both le64-elf and m68-elf are strict alignment ISAs with 4-byte aligned +// 64-bit or 2-byte aligned 32-bit integer types. This more compex to describe here. // If unaligned access is expensive don't stick these together. struct A { diff --git a/clang/test/CodeGenCXX/bitfield-access-empty.cpp b/clang/test/CodeGenCXX/bitfield-access-empty.cpp index 460fe6eef4b902..4922ed1e7f3de8 100644 --- a/clang/test/CodeGenCXX/bitfield-access-empty.cpp +++ b/clang/test/CodeGenCXX/bitfield-access-empty.cpp @@ -26,6 +26,7 @@ // RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s // RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s // RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s +// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s // RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s // RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s // RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s diff --git a/clang/test/CodeGenCXX/bitfield-access-tail.cpp b/clang/test/CodeGenCXX/bitfield-access-tail.cpp index fb961f327f2e5c..1539e17cad4369 100644 --- a/clang/test/CodeGenCXX/bitfield-access-tail.cpp +++ b/clang/test/CodeGenCXX/bitfield-access-tail.cpp @@ -26,6 +26,7 @@ // RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s // RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s // RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s +// RUN: %clang_cc1 -triple=le64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s // RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s // RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s // RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s diff --git a/clang/test/Preprocessor/predefined-macros-no-warnings.c b/clang/test/Preprocessor/predefined-macros-no-warnings.c index d44b99a2b192a1..722e3e77214b64 100644 --- a/clang/test/Preprocessor/predefined-macros-no-warnings.c +++ b/clang/test/Preprocessor/predefined-macros-no-warnings.c @@ -75,6 +75,8 @@ // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k-linux // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple m68k-netbsd +// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple le32-nacl +// RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple le64 // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc-freebsd // RUN: %clang_cc1 %s -Eonly -Wsystem-headers -Werror -triple ppc-netbsd diff --git a/llvm/include/llvm/TargetParser/Triple.h b/llvm/include/llvm/TargetParser/Triple.h index cb2be3bbd29f7b..b3bb354b38ff58 100644 --- a/llvm/include/llvm/TargetParser/Triple.h +++ b/llvm/include/llvm/TargetParser/Triple.h @@ -88,6 +88,8 @@ class Triple { xtensa, // Tensilica: Xtensa nvptx, // NVPTX: 32-bit nvptx64, // NVPTX: 64-bit + le32, // le32: generic little-endian 32-bit CPU (PNaCl) + le64, // le64: generic little-endian 64-bit CPU (PNaCl) amdil, // AMDIL amdil64, // AMDIL with 64-bit pointers hsail, // AMD HSAIL diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp index a54a02ac61d681..4fc1ff5aaa051f 100644 --- a/llvm/lib/TargetParser/Triple.cpp +++ b/llvm/lib/TargetParser/Triple.cpp @@ -44,6 +44,8 @@ StringRef Triple::getArchTypeName(ArchType Kind) { case hsail: return "hsail"; case kalimba: return "kalimba"; case lanai: return "lanai"; + case le32: return "le32"; + case le64: return "le64"; case loongarch32: return "loongarch32"; case loongarch64: return "loongarch64"; case m68k: return "m68k"; @@ -197,6 +199,9 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) { case nvptx: return "nvvm"; case nvptx64: return "nvvm"; + case le32: return "le32"; + case le64: return "le64"; + case amdil: case amdil64: return "amdil"; @@ -427,6 +432,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) { .Case("xcore", xcore) .Case("nvptx", nvptx) .Case("nvptx64", nvptx64) + .Case("le32", le32) + .Case("le64", le64) .Case("amdil", amdil) .Case("amdil64", amdil64) .Case("hsail", hsail) @@ -567,6 +574,8 @@ static Triple::ArchType parseArch(StringRef ArchName) { .Case("xcore", Triple::xcore) .Case("nvptx", Triple::nvptx) .Case("nvptx64", Triple::nvptx64) + .Case("le32", Triple::le32) + .Case("le64", Triple::le64) .Case("amdil", Triple::amdil) .Case("amdil64", Triple::amdil64) .Case("hsail", Triple::hsail) @@ -896,6 +905,8 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) { case Triple::hsail: case Triple::kalimba: case Triple::lanai: + case Triple::le32: + case Triple::le64: case Triple::loongarch32: case Triple::loongarch64: case Triple::m68k: @@ -1592,6 +1603,7 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::hsail: case llvm::Triple::kalimba: case llvm::Triple::lanai: + case llvm::Triple::le32: case llvm::Triple::loongarch32: case llvm::Triple::m68k: case llvm::Triple::mips: @@ -1624,6 +1636,7 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::bpfeb: case llvm::Triple::bpfel: case llvm::Triple::hsail64: + case llvm::Triple::le64: case llvm::Triple::loongarch64: case llvm::Triple::mips64: case llvm::Triple::mips64el: @@ -1682,6 +1695,7 @@ Triple Triple::get32BitArchVariant() const { case Triple::hsail: case Triple::kalimba: case Triple::lanai: + case Triple::le32: case Triple::loongarch32: case Triple::m68k: case Triple::mips: @@ -1712,6 +1726,7 @@ Triple Triple::get32BitArchVariant() const { case Triple::aarch64_be: T.setArch(Triple::armeb); break; case Triple::amdil64: T.setArch(Triple::amdil); break; case Triple::hsail64: T.setArch(Triple::hsail); break; + case Triple::le64: T.setArch(Triple::le32); break; case Triple::loongarch64: T.setArch(Triple::loongarch32); break; case Triple::mips64: T.setArch(Triple::mips, getSubArch()); @@ -1766,6 +1781,7 @@ Triple Triple::get64BitArchVariant() const { case Triple::bpfeb: case Triple::bpfel: case Triple::hsail64: + case Triple::le64: case Triple::loongarch64: case Triple::mips64: case Triple::mips64el: @@ -1789,6 +1805,7 @@ Triple Triple::get64BitArchVariant() const { case Triple::arm: T.setArch(Triple::aarch64); break; case Triple::armeb: T.setArch(Triple::aarch64_be); break; case Triple::hsail: T.setArch(Triple::hsail64); break; + case Triple::le32: T.setArch(Triple::le64); break; case Triple::loongarch32: T.setArch(Triple::loongarch64); break; case Triple::mips: T.setArch(Triple::mips64, getSubArch()); @@ -1831,6 +1848,8 @@ Triple Triple::getBigEndianArchVariant() const { case Triple::hsail64: case Triple::hsail: case Triple::kalimba: + case Triple::le32: + case Triple::le64: case Triple::loongarch32: case Triple::loongarch64: case Triple::msp430: @@ -1934,6 +1953,8 @@ bool Triple::isLittleEndian() const { case Triple::hsail64: case Triple::hsail: case Triple::kalimba: + case Triple::le32: + case Triple::le64: case Triple::loongarch32: case Triple::loongarch64: case Triple::mips64el: diff --git a/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn b/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn index d2cf5243627a04..576ab1db54988d 100644 --- a/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn +++ b/llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn @@ -108,6 +108,7 @@ static_library("Basic") { "Targets/DirectX.cpp", "Targets/Hexagon.cpp", "Targets/Lanai.cpp", + "Targets/Le64.cpp", "Targets/LoongArch.cpp", "Targets/M68k.cpp", "Targets/MSP430.cpp",