diff --git a/IGC/Compiler/CISACodeGen/CISABuilder.cpp b/IGC/Compiler/CISACodeGen/CISABuilder.cpp index 27ae4fa54ffe..312a23843909 100644 --- a/IGC/Compiler/CISACodeGen/CISABuilder.cpp +++ b/IGC/Compiler/CISACodeGen/CISABuilder.cpp @@ -820,7 +820,7 @@ VISA_PredOpnd* CEncoder::GetFlagOperand(const SFlag& flag) VISA_PREDICATE_STATE predState = (flag.invertFlag) ? PredState_INVERSE : PredState_NO_INVERSE; VISA_PREDICATE_CONTROL predCtrl = PRED_CTRL_NON; - + switch (flag.mode) { case EPRED_ALL: predCtrl = PRED_CTRL_ALL; break; @@ -889,7 +889,7 @@ Common_VISA_EMask_Ctrl CEncoder::GetAluEMask(CVariable* dst) noMask = true; } } - } + } return ConvertMaskToVisaType(mask, noMask); } @@ -1515,7 +1515,7 @@ void CEncoder::LogicOp( if(src1 != NULL) src1Dcl = src1->visaPredVariable; - // Try to use NOT instruction for predicate, we won't have phi on + // Try to use NOT instruction for predicate, we won't have phi on // predicate since Legalization pass convert i1 phi to i32. if (opcode == ISA_NOT) SetNoMask(); @@ -2424,7 +2424,7 @@ void CEncoder::Gather4Inst( if (!isIdxLT16) { uint16_t aoffimmiVal = (uint16_t)offset->GetImmediateValue() | BIT(15); - V(vKernel->CreateVISAImmediate(aoffimmi, &aoffimmiVal, ISA_TYPE_UW)); + V(vKernel->CreateVISAImmediate(aoffimmi, &aoffimmiVal, ISA_TYPE_UW)); } V(vKernel->AppendVISA3dGather4( @@ -2498,7 +2498,7 @@ void CEncoder::Fence(bool CommitEnable, ( L3_Flush_Constant_Data << 3 ) | ( L3_Flush_RW_Data << 4 ) | ( (!Global_Mem_Fence) << 5 ) | // bit 5: 1 -- local, 0 -- global - ( L1_Flush_Constant_Data << 6 ) | + ( L1_Flush_Constant_Data << 6 ) | ( SWFence << 7 ) | ( CommitEnable << 0 ); @@ -3472,10 +3472,10 @@ void CEncoder::InitEncoder( bool canAbortOnSpill ) SetVISAWaTable(m_program->m_Platform->getWATable()); bool enableVISADump = IGC_IS_FLAG_ENABLED(EnableVISASlowpath) || IGC_IS_FLAG_ENABLED(ShaderDumpEnable); - V(CreateVISABuilder(vbuilder, vISA_3D, enableVISADump ? CM_CISA_BUILDER_BOTH : CM_CISA_BUILDER_GEN, + V(CreateVISABuilder(vbuilder, vISA_3D, enableVISADump ? CM_CISA_BUILDER_BOTH : CM_CISA_BUILDER_GEN, VISAPlatform, params.size(), params.data(), &m_WaTable)); - // Set up options. This must be done before creating any variable/instructions + // Set up options. This must be done before creating any variable/instructions // since some of the options affect IR building. if (IGC_IS_FLAG_ENABLED(ForceNoFP64bRegioning)) @@ -3483,7 +3483,7 @@ void CEncoder::InitEncoder( bool canAbortOnSpill ) vbuilder->SetOption(vISA_forceNoFP64bRegioning, true); } - if (context->type == ShaderType::OPENCL_SHADER && context->m_floatDenormMode32 == FLOAT_DENORM_RETAIN && + if (context->type == ShaderType::OPENCL_SHADER && context->m_floatDenormMode32 == FLOAT_DENORM_RETAIN && context->m_floatDenormMode64 == FLOAT_DENORM_RETAIN) { vbuilder->SetOption(vISA_hasRNEandDenorm, true); @@ -3736,7 +3736,7 @@ void CEncoder::InitEncoder( bool canAbortOnSpill ) { /* Some tools only use 32bits hash, to maintain compatibility across lot of unknown tool chains doing Compare for only LowerPart - */ + */ if (IGC_GET_FLAG_VALUE(ShaderDebugHashCode) == (DWORD)context->hash.getAsmHash()) { vbuilder->SetOption(vISA_setStartBreakPoint, true); @@ -4216,9 +4216,9 @@ void CEncoder::Compile() { context->m_retryManager.SetSpillSize(jitInfo->numGRFSpillFill); m_program->m_spillSize = jitInfo->numGRFSpillFill; - m_program->m_spillCost = + m_program->m_spillCost = float(jitInfo->numGRFSpillFill) / jitInfo->numAsmCount; - + context->m_retryManager.numInstructions = jitInfo->numAsmCount; } COMPILER_TIME_END(m_program->GetContext(), TIME_CG_vISACompile); @@ -4269,9 +4269,7 @@ void CEncoder::Compile() MEM_SNAPSHOT( IGC::SMS_AFTER_vISACompile_SIMD32 ); } - if ((context->type == ShaderType::PIXEL_SHADER || - context->type == ShaderType::COMPUTE_SHADER )&& - m_program->m_dispatchSize == SIMDMode::SIMD16) + if (m_program->m_dispatchSize == SIMDMode::SIMD16) { uint sendStallCycle = 0; uint staticCycle = 0; diff --git a/IGC/Compiler/CodeGenContext.cpp b/IGC/Compiler/CodeGenContext.cpp index 42157276d448..7c0c260c4126 100644 --- a/IGC/Compiler/CodeGenContext.cpp +++ b/IGC/Compiler/CodeGenContext.cpp @@ -176,8 +176,8 @@ bool RetryManager::PickupKernels(CodeGenContext* cgCtx) } unsigned RetryManager::getStateCnt() -{ - return sizeof(RetryTable) / sizeof(RetryState); +{ + return sizeof(RetryTable) / sizeof(RetryState); }; CShader* RetryManager::PickCSEntryForcedFromDriver(SIMDMode& simdMode, unsigned char forcedSIMDModeFromDriver) @@ -284,7 +284,7 @@ CShader* RetryManager::PickCSEntryEarly(SIMDMode& simdMode, simdMode = SIMDMode::SIMD16; return m_simdEntries[1]; } - assert((m_simdEntries[0] == NULL) || simd8NoSpill == true); // If SIMD16 doesn't spill, SIMD8 shouldn't, if it exists + assert((m_simdEntries[0] == NULL) || simd8NoSpill == true); // If SIMD16 doesn't spill, SIMD8 shouldn't, if it exists } } @@ -412,9 +412,9 @@ LLVMContextWrapper::LLVMContextWrapper(bool createResourceDimTypes) } } -void LLVMContextWrapper::AddRef() +void LLVMContextWrapper::AddRef() { - refCount++; + refCount++; } void LLVMContextWrapper::Release() @@ -703,4 +703,6 @@ bool CodeGenContext::isPOSH() const "IGC::PositionOnlyVertexShader") != nullptr; } + + } \ No newline at end of file diff --git a/IGC/Compiler/CodeGenPublic.h b/IGC/Compiler/CodeGenPublic.h index b6f71a248ac1..0837017ad25a 100644 --- a/IGC/Compiler/CodeGenPublic.h +++ b/IGC/Compiler/CodeGenPublic.h @@ -226,7 +226,7 @@ namespace IGC bool isPerSample; bool oMask; bool VectorMask; - + bool hasPrimID; bool isCoarsePS; bool hasCoarsePixelSize; @@ -258,7 +258,7 @@ namespace IGC OctEltUnit VertexURBEntryReadLength; /// corresponds to 3DSTATE_VS Vertex URB Entry Read Offset OctEltUnit VertexURBEntryReadOffset; - /// corresponds to 3DSTATE_VS VS Vertex URB Entry Output Length + /// corresponds to 3DSTATE_VS VS Vertex URB Entry Output Length OctEltUnit VertexURBEntryOutputReadLength; /// corresponds to 3DSTATE_VS VS Vertex URB Entry Output Offset OctEltUnit VertexURBEntryOutputReadOffset; @@ -500,7 +500,7 @@ namespace IGC CBTILayout( const USC::SShaderStageBTLayout* pLayout, - const std::vector& colorBufferMappings) : + const std::vector& colorBufferMappings) : m_pLayout(pLayout), m_ColorBufferMappings(colorBufferMappings) {} @@ -544,10 +544,10 @@ namespace IGC bool IsFirstTry(); bool IsLastTry(CodeGenContext* cgCtx); unsigned GetRetryId() const; - + void Enable(); void Disable(); - + void SetSpillSize(unsigned int spillSize); unsigned int GetLastSpillSize(); unsigned int numInstructions = 0; @@ -577,7 +577,7 @@ namespace IGC // cache the compiled kernel during retry CShader* m_simdEntries[3]; - CShader* PickCSEntryForcedFromDriver(SIMDMode& simdMode, + CShader* PickCSEntryForcedFromDriver(SIMDMode& simdMode, unsigned char forcedSIMDModeFromDriver); CShader* PickCSEntryByRegKey(SIMDMode& simdMode); CShader* PickCSEntryEarly(SIMDMode& simdMode, @@ -673,7 +673,7 @@ namespace IGC const CPlatform& _platform, ///< IGC HW platform description const CDriverInfo& driverInfo, ///< Queries to know runtime features support const bool createResourceDimTypes = true, - LLVMContextWrapper* LLVMContext = nullptr)///< LLVM context to use, if null a new one will be created + LLVMContextWrapper* LLVMContext = nullptr)///< LLVM context to use, if null a new one will be created : type(_type), platform(_platform), btiLayout(_bitLayout), m_DriverInfo(driverInfo), llvmCtxWrapper(LLVMContext) { if (llvmCtxWrapper == nullptr) @@ -989,7 +989,7 @@ namespace IGC const COCLBTILayout& btiLayout, const CPlatform& platform, const TC::STB_TranslateInputArgs* pInputArgs, - const CDriverInfo& driverInfo, + const CDriverInfo& driverInfo, LLVMContextWrapper* llvmContext = nullptr, bool shouldUseNonCoherentStatelessBTI = false, const bool createResourceDimTypes = true) diff --git a/IGC/common/MDFrameWork.h b/IGC/common/MDFrameWork.h index 8fe951d8c3f8..8d33e6fcddc6 100644 --- a/IGC/common/MDFrameWork.h +++ b/IGC/common/MDFrameWork.h @@ -136,6 +136,7 @@ namespace IGC std::vector colorOutputMask; }; + struct SInputDesc { unsigned int index = 0; @@ -194,7 +195,7 @@ namespace IGC int alignment; std::vector Buffer; }; - + struct ImmConstantInfo { std::vector data; @@ -244,7 +245,7 @@ namespace IGC // When true compiler can assume that resources bound to two different // bindings do not alias. - bool statefullResourcesNotAliased = false; + bool statefullResourcesNotAliased = false; unsigned int privateMemoryPerWI = 0; std::array m_ShaderResourceViewMcsMask; diff --git a/IGC/common/autogen.py b/IGC/common/autogen.py index 94d361833c49..247c8c5f8057 100644 --- a/IGC/common/autogen.py +++ b/IGC/common/autogen.py @@ -32,7 +32,7 @@ # usage: autogen.py __MDFrameWorkFile__ = sys.argv[1] -__genFile__ = sys.argv[2] +__genFile__ = sys.argv[2] __genDir__ = os.path.dirname(__genFile__) if not os.path.exists(__genDir__): @@ -60,7 +60,7 @@ line = next(file, None) insideIGCNameSpace = True if insideIGCNameSpace: - line = line.split("//")[0] + line = line.split("//")[0] if line.find("struct") != -1: words = line.split() structureNames.append(words[1]) @@ -79,6 +79,9 @@ if line.find("};") != -1: insideIGCNameSpace = False +def skipLine(line): + return False + def storeVars(line): vars = line.split() for i in range(1, len(vars)): @@ -198,7 +201,7 @@ def genCode(): foundStruct = False insideStruct = False output.write("}\n\n") - + for item in structureNames: foundStruct = False insideStruct = False @@ -222,18 +225,20 @@ def genCode(): inputFile.close() continue else: - if line: + if skipLine(line) == False: line = line.split("//")[0] while line.find("};") == -1: extractVars(line) line = next(file, None) + while skipLine(line) == True: + line = next(file, None) line = line.split("//")[0] printCalls(item) del structDataMembers[:] foundStruct = False insideStruct = False output.write("}\n\n") - + for item in enumNames: foundStruct = False insideStruct = False @@ -294,11 +299,13 @@ def genCode(): inputFile.close() continue else: - if line: + if skipLine(line) == False: line = line.split("//")[0] while line.find("};") == -1: extractVars(line) line = next(file, None) + while skipLine(line) == True: + line = next(file, None) line = line.split("//")[0] printReadCalls(item) del structDataMembers[:]