From a9b7656f93954267852f24e160bccc7a69ea1b01 Mon Sep 17 00:00:00 2001 From: Bovine Date: Tue, 23 Dec 2014 03:39:50 -0700 Subject: [PATCH] Fix to VFPU register allocation. Fixes #7174 GetFreeXRegs(_,_,true) invalidates registers it can see on spill, but it can't see all the registers in the array due to how we call it so we have to invalidate the rest ourselves. Not doing so can get it to use the same register twice. --- Core/MIPS/x86/Jit.cpp | 2 +- Core/MIPS/x86/RegCacheFPU.cpp | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/Core/MIPS/x86/Jit.cpp b/Core/MIPS/x86/Jit.cpp index ce9ab287b50c..53b71334b5de 100644 --- a/Core/MIPS/x86/Jit.cpp +++ b/Core/MIPS/x86/Jit.cpp @@ -121,7 +121,7 @@ JitOptions::JitOptions() continueBranches = false; continueJumps = false; continueMaxInstructions = 300; - enableVFPUSIMD = false; + enableVFPUSIMD = true; // Set by Asm if needed. reserveR15ForAsm = false; } diff --git a/Core/MIPS/x86/RegCacheFPU.cpp b/Core/MIPS/x86/RegCacheFPU.cpp index 8f2f0ac21014..84a4c765bcf2 100644 --- a/Core/MIPS/x86/RegCacheFPU.cpp +++ b/Core/MIPS/x86/RegCacheFPU.cpp @@ -354,6 +354,9 @@ X64Reg FPURegCache::LoadRegsVS(const u8 *v, int n) { for (int i = 0; i < 4; ++i) { xrsLoaded[i] = false; } + for (int i = 2; i < n; ++i){ + xrs[i] = INVALID_REG; + } regsLoaded = 0; }