imx6ull-mmc-npi.dts

/*
 * Copyright (C) 2016 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/dts-v1/;

#include <dt-bindings/input/input.h>
#include "imx6ull.dtsi"

/ {
	model = "Embedfire i.MX6ULL Board";
	compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";

	aliases {
		pwm0 = &pwm1;
		pwm1 = &pwm2;
		pwm2 = &pwm3;
		pwm3 = &pwm4;
	};
	chosen {
		stdout-path = &uart1; 
	};

	memory {
		reg = <0x80000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x14000000>;
			linux,cma-default;
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;


		reg_sd1_vmmc: regulator@1 {
			compatible = "regulator-fixed";
			regulator-name = "VSD_3V3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
			off-on-delay = <20000>;
			enable-active-high;
		};
/*
		reg_gpio_dvfs: regulator-gpio {
			compatible = "regulator-gpio";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_dvfs>;
			regulator-min-microvolt = <1300000>;
			regulator-max-microvolt = <1400000>;
			regulator-name = "gpio_dvfs";
			regulator-type = "voltage";
			gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
			states = <1300000 0x1 1400000 0x0>;
		};
*/
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_led>;

		led0: cpu {
			label = "cpu";
			gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
			default-state = "on";
			linux,default-trigger = "heartbeat";   
		};
	};

	xgj_key {
		compatible = "xgj-key";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_key>;
		xgj-key-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;     /* 默认低电平，按键按下高电平 */
		status = "okay";            
		// interrupt-parent = <&gpio5>;  
		// interrupts = <1 IRQ_TYPE_EDGE_RISING>;     /* 指定中断，触发方式为上升沿触发 */ 
	}; 

	red_led_pwm {
		compatible = "red_led,pwm";
		pinctrl-names = "default";
		pinctrl-0 = <&red_led_pwm>;

		back {
			pwm-names = "red_led_pwm3";
			pwms = <&pwm3 0 50000>;
		};
	};   
	
	// hc_sr501 {
	// 	compatible = "hc_sr501";
	// 	pinctrl-names = "default";
	//  	pinctrl-0 = <&pinctrl_key>;
	// 	gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
	// 	status = "disabled"; 
	// }; 

	hc_sr04 {
		compatible = "hc_sr04";
		pinctrl-names = "default";
	 	pinctrl-0 = <&pinctrl_sr04_1
		             &pinctrl_sr04_2>;
		trig-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;   
		echo-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
		status = "disabled"; 
	};

	ds18b20 {
		compatible = "xgj,ds18b20";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ds18b20>;
		ds18b20-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 
		status = "disabled"; 
	};

	dht11 {
		compatible = "xgj,dht11";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_ds18b20>;
		dht11-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 
		status = "disabled"; 
	};
	
	// dht11 {
	// 	#address-cells = <1>;
	// 	#size-cells = <1>;
	// 	pinctrl-names = "default";
	// 	compatible = "dht11";
	// 	linux,open-drain;
	// 	pinctrl-0 = <&pinctrl_dht11>;
	// 	dht11_pin = <&gpio1 2 GPIO_ACTIVE_HIGH>;	/*dht11 pin*/
	// 	status = "disabled";
	// };


	/* External sound card */
	sound: sound {
		status = "disabled";
	};

	spi4: 74hc595 {
		compatible = "spi-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi4>;
		pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
		status = "disabled";
		gpio-sck = <&gpio5 11 0>;
		gpio-mosi = <&gpio5 10 0>;
		cs-gpios = <&gpio5 7 0>;
		num-chipselects = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		gpio_spi: gpio_spi@0 {
			compatible = "fairchild,74hc595";
			gpio-controller;
			#gpio-cells = <2>;
			reg = <0>;
			registers-number = <1>;
			registers-default = /bits/ 8 <0x57>;
			spi-max-frequency = <100000>;
		};
	};
};

&i2c1 {	
	clock-frequency = <100000>; 
	pinctrl-names = "default"; 
	pinctrl-0 = <&pinctrl_i2c1>;   
	status = "okay"; 
	#address-cells = <1>;
	#size-cells = <0>;    
   /* 设备树修改查看是否修改成功，查看内核目录/sys/bus/i2c/devices/看是否存在0x1E地址的设备 */
	ap3216c@1E {
		compatible = "xgj-ap3216c"; 
//        compatible = "fire,i2c_ap3216c";
		reg = <0x1E>; 
		interrupt-parent = <&gpio5>;
		interrupts = <2 IRQ_TYPE_EDGE_BOTH>;   //IRQ_TYPE_EDGE_RISING 
		status = "okay"; 
	};

	mpu6050@68 {
		compatible = "xgj,mpu6050";
		status = "okay"; 
		reg = <0x68>;
		interrupt-parent = <&gpio5>;
		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
	};          
};

&ecspi1 {
	fsl,spi-num-chipselects = <1>;           /* 片选引脚数 */
	cs-gpios = <&gpio4 26 0>;                /* 片选引脚 */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	xgj_oled@0 {
		dc-gpios = <&gpio4 24 0>;            /* 命令数据选择引脚 */ 
		rst-gpios = <&gpio1 2 0>;            /* 复位引脚 */   
		compatible = "xgj,oled";             /* 匹配属性 */
		spi-max-frequency = <20000000>;      /* 时钟频率 */
		reg = <0>;                           /* 0 通道 */ 
	};    
};


&cpu0 {
	/*dc-supply = <&reg_gpio_dvfs>;*/
	clock-frequency = <800000000>;
};

&clks {
	assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
	assigned-clock-rates = <786432000>;
};


&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	phy-mode = "rmii";
	phy-handle = <&ethphy0>;
	status = "okay";
};

&fec2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet2>;
	phy-mode = "rmii";
	phy-handle = <&ethphy1>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@2 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <2>;
			micrel,led-mode = <1>;
			clocks = <&clks IMX6UL_CLK_ENET_REF>;
			clock-names = "rmii-ref";
		};

		ethphy1: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <1>;
			micrel,led-mode = <1>;
			clocks = <&clks IMX6UL_CLK_ENET2_REF>;
			clock-names = "rmii-ref";
		};
	};
};


&gpc {
	fsl,cpu_pupscr_sw2iso = <0xf>;
	fsl,cpu_pupscr_sw = <0x0>;
	fsl,cpu_pdnscr_iso2sw = <0x1>;
	fsl,cpu_pdnscr_iso = <0x1>;
	fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
};


&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog_1>;

	pinctrl_hog_1: hoggrp-1 {
		fsl,pins = <
			MX6UL_PAD_UART1_RTS_B__GPIO1_IO19	0x17059 /* SD1 CD */
			MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT	0x17059 /* SD1 VSELECT */
			MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */
		>;
	};

	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0
			MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	0x1b0b0
			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x1b0b0
			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x1b0b0
			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0
			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0
			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0
			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031
		>;
	};

	pinctrl_enet2: enet2grp {
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO07__ENET2_MDC		0x1b0b0
			MX6UL_PAD_GPIO1_IO06__ENET2_MDIO	0x1b0b0
			MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN	0x1b0b0
			MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER	0x1b0b0
			MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00	0x1b0b0
			MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01	0x1b0b0
			MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN	0x1b0b0
			MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00	0x1b0b0
			MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01	0x1b0b0
			MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b031
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
		>;
	};


	pinctrl_dht11: dht11grp {
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x10b0	/*dht11*/
		>;
	};

	pinctrl_sr04_1: sr04grp1 {                /*!< Function assigned for the core: Cortex-A7[ca7] */
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04   0x1b0b0 
		>;
	};

	/*ds18b20*/
	pinctrl_ds18b20: ds18b20grp {
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0x10b0  
		>;
	}; 

	pinctrl_ecspi1: ecspi1grp {   
		fsl,pins = <
			MX6UL_PAD_CSI_DATA07__ECSPI1_MISO  0x10b0
			MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI  0x10b0   /* IO4_27 */
			MX6UL_PAD_CSI_DATA04__ECSPI1_SCLK  0x10b0   /* IO4_25 */ 
			MX6UL_PAD_CSI_DATA05__ECSPI1_SS0   0x10b0   /* cs-gpios IO4_26 */
			MX6UL_PAD_CSI_DATA03__GPIO4_IO24   0x10b0   /* dc-gpios IO4_24 */
			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02   0x10b0   /* rst-gpios IO1_02 */
		>;

	}; 

	
/*
        pinctrl_dvfs: dvfsgrp {
                fsl,pins = <
                        MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03      0x79
                >;
        };
*/
	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10071
			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
		>;
	};

	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
		fsl,pins = <
			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
		>;
	};

	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
		fsl,pins = <
			MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
			MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
			MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
			MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
			MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
			MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
			MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
		>;
	};

	pinctrl_usdhc2_8bit: usdhc2grp_8bit {
		fsl,pins = <
			MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
			MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
		>;
	};

	pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
		fsl,pins = <
			MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100b9
			MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170b9
			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
		>;
	};

	pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
		fsl,pins = <
			MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100f9
			MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170f9
			MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
			MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
			MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
			MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
			MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
			MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
			MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
			MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
		>;
	};
	pinctrl_led: ledgrp {
			fsl,pins = <
				MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x1b0b0
			>;
		};

	red_led_pwm: ledsgrp {
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x1b0b0
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
			MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
		>;
	}; 
};

&iomuxc_snvs {
	pinctrl-names = "default_snvs";
	pinctrl-0 = <&pinctrl_hog_2>;
	pinctrl_hog_2: hoggrp-2 {
		fsl,pins = <
			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00      0x80000000
		>;
	};
	pinctrl_spi4: spi4grp {
					fsl,pins = <
						MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10		0x70a1
						MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11		0x70a1
						MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07		0x70a1
						MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08		0x80000000
					>;
	};

	pinctrl_key: keygrp {
		fsl,pins = <
			MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01     0x000110A1
		>;
	};

	pinctrl_sr04_2: sr04grp2 {        /*!< Function assigned for the core: Cortex-A7[ca7] */
            fsl,pins = <
                MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01      0x000110A1
            >;
	};
};

&snvs_pwrkey {
	status = "okay";
};

&pxp {
	status = "okay";
};


&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};


&usbotg1 {
	dr_mode = "otg";
	srp-disable;
	hnp-disable;
	adp-disable;
	status = "okay";
};

&usbotg2 {
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

&usbphy1 {
	fsl,tx-d-cal = <106>;
};

&usbphy2 {
	fsl,tx-d-cal = <106>;
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	no-1-8-v;
	/*cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;*/
	keep-power-in-suspend;
	/*non-removable;*/
	enable-sdio-wakeup;
	vmmc-supply = <&reg_sd1_vmmc>;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2_8bit>;
	non-removable;
	status = "okay";
};