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compgen.c
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/*
* $Id: compgen.c,v 1.24 1996/08/13 13:29:35 grubba Exp $
*
* Compilergenerator. Generates a compiler from M68000 to Sparc binary code.
*
* $Log: compgen.c,v $
* Revision 1.23 1996/08/11 14:48:46 grubba
* Added option to turn off SR optimization.
*
* Revision 1.22 1996/08/10 18:48:55 grubba
* Fixed some SR related bugs.
* Enabled SR optimization.
*
* Revision 1.21 1996/08/10 15:47:56 grubba
* Optimized some opcodes.
* Prepared for partial SR optimization.
*
* Revision 1.20 1996/08/04 14:22:41 grubba
* The compiler table now holds information needed for SR optimization.
*
* Revision 1.19 1996/07/17 20:11:12 grubba
* Added EOR.
* Fixed bug with AND -- bad mask.
*
* Revision 1.18 1996/07/17 19:16:23 grubba
* Implemented interrupts. None generated yet though.
* Implemented STOP.
*
* Revision 1.17 1996/07/17 16:01:15 grubba
* Changed from {U,}{LONG,WORD,BYTE} to [SU]{8,16,32}.
* Hopefully all places got patched.
*
* Revision 1.16 1996/07/16 23:29:17 grubba
* MOVE_USP was broken -- It only saved the lowest byte of the USP.
*
* Revision 1.15 1996/07/16 22:42:39 grubba
* Fixed typo in the last patch.
*
* Revision 1.14 1996/07/16 22:36:56 grubba
* The last bug-fix saved the registers to memory instead of the registerbank!
* Fixed same problem with XORI_SR.
*
* Revision 1.13 1996/07/16 22:28:54 grubba
* Fixed major bug with ANDI_SR -- It didn't flip stacks when going to Usermode.
* Implemented ADDX.
*
* Revision 1.12 1996/07/15 20:32:10 grubba
* Cleaned up shift code.
* Implemented C & X in ASR and LSR.
*
* Revision 1.11 1996/07/15 14:35:22 grubba
* Added Left and Right to the various shift mnemonics.
*
* Revision 1.10 1996/07/14 15:14:58 grubba
* Fixed bug with ROd.
* Added MULS.
* MULU now modifies SR.
*
* Revision 1.9 1996/07/08 21:22:13 grubba
* Added TEF_SRC_QUICK8 in some places.
*
* Revision 1.8 1996/07/07 13:29:18 grubba
* Removed the obsolete dis_*() functions, and their entry in the opcode_info struct.
*
* Revision 1.7 1996/07/04 18:08:23 grubba
* Added DIVU and EXT.
*
* Revision 1.6 1996/07/03 15:39:47 grubba
* Added opcode NEG.
*
* Revision 1.5 1996/07/03 15:01:14 grubba
* Fixed a bug with OR Dn, <ea>. The mask was wrong.
*
* Revision 1.4 1996/07/02 22:17:31 grubba
* The immediate shift opcodes didn't shift when the arg was 0 i.e. 8.
*
* Revision 1.3 1996/07/01 19:16:44 grubba
* Implemented ASL and ASR.
* Changed semantics for new_codeinfo(), it doesn't allocate space for the code.
* Added PeepHoleOptimize(). At the moment it just mallocs and copies the code.
* Removed some warnings.
*
* Revision 1.2 1996/07/01 11:44:26 grubba
* Missing opcodes NBCD and PEA added to the table.
* Opcode PEA implemented.
*
* Revision 1.1.1.1 1996/06/30 23:51:52 grubba
* Entry into CVS
*
* Revision 1.20 1996/06/30 23:03:39 grubba
* Fixed some more bugs.
* Fixed a major bug with RTE.
* Implemented MULU, LINE_F.
* In some places SR wasn't saved on return.
* Attempts to start Schedule()!
*
* Revision 1.19 1996/06/30 01:20:31 grubba
* Fixed a bug in EXG the table mask was wrong, it always wrote one result to D0.
* There seems to be a bug with BGT or CMP.
*
* Revision 1.18 1996/06/25 21:30:11 grubba
* Fixed bug in UNLK -- it missed a TEF_DST_LOAD.
* New implementation of MOVEM -- Kludgy, but it generates better code.
*
* Revision 1.17 1996/06/24 21:28:23 grubba
* MOVEM might still be broken.
*
* Revision 1.16 1996/06/24 19:15:31 grubba
* Fixed many subtle bugs in the tab_* and as_* functions.
*
* Revision 1.15 1996/06/24 18:02:02 grubba
* Fixed a major bug with LSR/LSL. They shifted in the wrong direction.
*
* Revision 1.14 1996/06/23 22:05:02 grubba
* Now uses (d16, PC) addressing mode for short branches.
* Removed compgen version information from the generated files -- less to recompile.
*
* Revision 1.13 1996/06/23 20:34:10 grubba
* Fixed a bug with 16bit conditional branches.
*
* Revision 1.12 1996/06/20 22:14:31 grubba
* Fixed bugs in the implementation of LINK and UNLK.
*
* Revision 1.11 1996/06/20 22:09:51 grubba
* Fixed bugs with short backward branches.
* Opcode table is now compiled in parts.
* Implemented LINK, UNLK, ADDA and others.
*
* Revision 1.10 1996/06/20 16:48:44 grubba
* Implemented SUBI.
* Next version will hopefully split the opcode_table into smaller chunks, that
* gas can compile separately.
*
* Revision 1.9 1996/06/19 11:08:25 grubba
* Fixed several bugs.
* Added several new opcodes.
*
* Revision 1.8 1996/06/07 21:42:09 grubba
* Seems to work somewhat.
* Next version will create tables in an assembler file instead.
*
* Revision 1.7 1996/06/06 11:36:37 grubba
* Seems to generate correct code.
* Able to run the ROM checksum-test.
* MOVE not implemented yet.
*
* Revision 1.6 1996/06/01 09:31:29 grubba
* Major changes.
* Now generates output split into several files.
* Now generates gasp assembler preprocessor output.
* Now uses templates to build instructions.
*
* Revision 1.5 1996/05/19 23:41:02 grubba
* Added UNLK.
*
* Revision 1.4 1996/05/18 14:27:21 grubba
* Now with DBcc and Bcc.
*
* Revision 1.3 1996/05/14 21:39:07 grubba
* Added generation of emit_load_%02x().
* Fixed some bugs.
* comp_load_ea() now supports most (all?) M68000 addressing modes.
* Generated code-size reduced from ~23M to ~16M, but still needs to be reduced more.
*
* Revision 1.2 1996/05/13 10:46:55 grubba
* Implemented some more opcodes.
* Now supports two different compiler models. (SLOW_COMPILER).
* comp_* functions conventions changed. The generated code may now use:
* ULONG **code -- Pointer to pointer to next instruction to generate.
* ULONG *pc -- Pointer to next M68000 programcounter (word address).
* USHORT *mem -- 16MB M68000 emulated memory.
*
* Revision 1.1 1996/05/12 16:37:15 grubba
* Initial revision
*
*
*/
/* TODO:
*
* * X bit not implemented.
*
* * Need to check if the Supervisor bit changes in several places.
*
* * Several places where there are many stack accesses may be optimized
* to a single add, and offsetted memory accesses.
*
* * Most op-codes still not implemented.
*/
/*
* Includes
*/
#include <stdio.h>
#include <stdlib.h>
#include "types.h"
#include "recomp.h"
#include "m68k.h"
#include "sparc.h"
#include "compiler.h"
/*
* Prototypes
*/
int comp_supervisor(FILE *, U16, const char *);
int comp_clobber(FILE *, U8, U8, U8);
/*
* Functions
*/
void as_exception(FILE *fp, U16 opcode)
{
/* On entry:
* %acc0 : vector number
* %acc1 : old status register
*
* Returns:
* %i0 : Next address to start executing at.
*/
/* FIXME: Need to check for bad SSP => HALT */
/* FIXME: Need to check for zapped code */
fputs(" ! Were we in supervisormode before?\n"
" sethi %hi(0x2000), %o1\n"
" btst %o1, %sr\n"
" bne 0f\n"
" ld [ %regs + _A7 ], %o0\n"
" ! Flip stacks\n"
" st %o0, [ %regs + _USP ]\n"
" ld [ %regs + _SSP ], %o0\n"
" st %o0, [ %regs + _A7 ]\n"
" ! Set supervisor bit\n"
" or %sr, %o1, %sr\n"
"0:\n"
" ! Push format/offset on stack\n"
" add -2, %o0, %o0\n"
" sth %acc0, [ %mem + %o0 ]\n"
" ! Push PC on stack\n"
" add -2, %o0, %o0\n"
" sth %pc, [ %mem + %o0 ]\n"
" srl %pc, 0x10, %o1\n"
" add -2, %o0, %o0\n"
" sth %o1, [ %mem + %o0 ]\n"
" ! Push old sr on stack\n"
" add -2, %o0, %o0\n"
" sth %acc1, [ %mem + %o0 ]\n"
" ! Store the new stack pointer\n"
" st %o0, [ %regs + _A7 ]\n"
" ! Store PC\n"
" st %pc, [ %regs + _PC ]\n"
" ! Fech VBR\n"
" ld [ %regs + _VBR ], %o0\n"
" ! Store SR\n"
" st %sr, [ %regs + _SR ]\n"
" and 0x3ff, %acc0, %acc0\n"
" sll %acc0, 2, %acc0\n"
" add %o0, %acc0, %o0\n"
" ld [ %mem + %o0 ], %i0\n"
" ret\n"
" restore\n", fp);
}
/*
* Defaults
*/
int head_default(U16 opcode)
{
return(1);
}
int head_not_implemented(U16 opcode)
{
return(0);
}
void tab_default(FILE *fp, U16 opcode, const char *mnemonic)
{
/* LOAD_EA, LOAD_EO, WRITE_BACK */
fprintf(fp, "0x%08x, opcode_%04x, ",
TEF_DST | TEF_DST_LOAD | TEF_WRITE_BACK |
(opcode & TEF_DST_MASK), opcode);
}
int comp_default(FILE *fp, U16 opcode, const char *mnemonic)
{
/* Usually not needed */
return(0);
}
/*
* M68000 instruction implementations
*/
void tab_addi(FILE *fp, U16 opcode, const char *mnemonic)
{
/* LOAD_IMM, LOAD_EA, LOAD_EO, WRITE_BACK */
fprintf(fp,
"0x%08x\n"
" addcc %%acc1, %%acc0, %%acc0\n"
" .long ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_IMM | ((opcode & 0x00c0)<<9) |
TEF_DST | TEF_DST_LOAD | (opcode & 0x00ff) |
TEF_WRITE_BACK | TEF_FIX_SR | TEF_FASTMODE);
}
int head_addx(U16 opcode)
{
return(opcode == 0xd100);
}
void tab_addx(FILE *fp, U16 opcode, const char *mnemonic)
{
if (opcode & 0x0008) {
/* ADDX -(Ay), -(Ax) */
fprintf(fp, "0x%08x, opcode_d100, ",
TEF_SRC | TEF_SRC_LOAD | (opcode & 0x0e00) | ((opcode & 0x00c0)<<9) |
TEF_DST | TEF_DST_LOAD | (opcode & 0x00c7) | TEF_WRITE_BACK | 0x8002 |
TEF_FIX_SR);
} else {
/* ADDX Dy, Dx */
fprintf(fp, "0x%08x, opcode_d100, ",
TEF_SRC | TEF_SRC_LOAD | (opcode & 0x0e00) | ((opcode & 0x00c0)<<9) |
TEF_DST | TEF_DST_LOAD | (opcode & 0x00c7) | TEF_WRITE_BACK |
TEF_FIX_SR);
}
}
void as_addx(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" and 0x10, %%sr, %%o0\n"
" add %%acc0, %%acc1, %%acc0\n"
" srl %%o0, 8, %%o0\n"
" addcc %%o0, %%acc0, %%acc0\n");
}
void tab_andi(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
"0x%08x\n"
" andcc %%acc1, %%acc0, %%acc0\n"
" .long ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_IMM | ((opcode & 0x00c0)<<9) |
TEF_DST | TEF_DST_LOAD | (opcode & 0x00ff) | TEF_WRITE_BACK |
TEF_FASTMODE);
}
void tab_andi_sr(FILE *fp, U16 opcode, const char *mnemonic)
{
/* SUPERVISOR, IMMEDIATE */
fprintf(fp, "0x%08x, opcode_%04x, ",
TEF_SUPERVISOR | TEF_SRC | TEF_SRC_LOAD | TEF_SRC_IMM | TEF_SRC_WORD,
opcode);
}
void as_andi_sr(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" sethi %%hi(0x2000), %%o0\n"
" btst %%o0, %%acc1\n"
" bne 0f\n"
" and %%acc1, %%sr, %%sr\n"
" ! Stack flip-time.\n"
" ld [ %%regs + _A7 ], %%o0\n"
" st %%o0, [ %%regs + _SSP ]\n"
" ld [ %%regs + _USP ], %%o0\n"
" st %%o0, [ %%regs + _A7 ]\n"
"0:\n");
}
int head_bchg(U16 opcode)
{
return(opcode == 0x0140);
}
void tab_bchg(FILE *fp, U16 opcode, const char *mnemonic)
{
/* FIXME: This will fail on #xxx, Dn FIXED? */
if ((opcode & 0xffc0) == 0x0840) {
/* Immediate */
if (opcode & 0x0038) {
fprintf(fp, "0x%08x, opcode_0140, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | TEF_SRC_IMM |
TEF_DST | TEF_DST_LOAD | TEF_DST_BYTE | (opcode & 0x003f) |
TEF_WRITE_BACK);
} else {
/* Dn */
fprintf(fp, "0x%08x, opcode_0140, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | TEF_SRC_IMM |
TEF_DST | TEF_DST_LOAD | TEF_DST_LONG | (opcode & 0x003f) |
TEF_WRITE_BACK);
}
} else {
/* LOAD_EA, LOAD_EO, WRITE_BACK */
if (opcode & 0x0038) {
fprintf(fp, "0x%08x, opcode_0140, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_LONG | (opcode & 0x0e00) |
TEF_DST | TEF_DST_LOAD | TEF_DST_BYTE | (opcode & 0x003f) |
TEF_WRITE_BACK);
} else {
/* Dn */
fprintf(fp, "0x%08x, opcode_0140, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_LONG | (opcode & 0x0e00) |
TEF_DST | TEF_DST_LOAD | TEF_DST_LONG | (opcode & 0x003f) |
TEF_WRITE_BACK);
}
}
}
void as_bchg(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" mov 0x01, %%o0\n"
" sll %%o0, %%acc1, %%o0\n"
" btst %%acc0, %%o0\n"
" xor %%acc0, %%o0, %%acc0\n");
}
int head_bclr(U16 opcode)
{
return(opcode == 0x0180);
}
void tab_bclr(FILE *fp, U16 opcode, const char *mnemonic)
{
if ((opcode & 0xffc0) == 0x0880) {
/* Immediate */
if (opcode & 0x0038) {
fprintf(fp, "0x%08x, opcode_0180, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | TEF_SRC_IMM |
TEF_DST | TEF_DST_LOAD | TEF_DST_BYTE | (opcode & 0x003f) |
TEF_WRITE_BACK);
} else {
/* Dn */
fprintf(fp, "0x%08x, opcode_0180, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | TEF_SRC_IMM |
TEF_DST | TEF_DST_LOAD | TEF_DST_LONG | (opcode & 0x003f) |
TEF_WRITE_BACK);
}
} else {
if (opcode & 0x0038) {
fprintf(fp, "0x%08x, opcode_0180, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | (opcode & 0x0e00) |
TEF_DST | TEF_DST_LOAD | TEF_DST_BYTE | (opcode & 0x003f) |
TEF_WRITE_BACK);
} else {
/* Dn */
fprintf(fp, "0x%08x, opcode_0180, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | (opcode & 0x0e00) |
TEF_DST | TEF_DST_LOAD | TEF_DST_LONG | (opcode & 0x003f) |
TEF_WRITE_BACK);
}
}
}
void as_bclr(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" mov 0x01, %%o0\n"
" sll %%o0, %%acc1, %%o0\n"
" btst %%acc0, %%o0\n"
" andn %%acc0, %%o0, %%acc0\n");
}
int head_bset(U16 opcode)
{
return(opcode == 0x01c0);
}
void tab_bset(FILE *fp, U16 opcode, const char *mnemonic)
{
if ((opcode & 0xffc0) == 0x08c0) {
/* Immediate */
if (opcode & 0x0038) {
fprintf(fp, "0x%08x, opcode_01c0, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | TEF_SRC_IMM |
TEF_DST | TEF_DST_LOAD | TEF_DST_BYTE | (opcode & 0x003f) |
TEF_WRITE_BACK);
} else {
/* Dn */
fprintf(fp, "0x%08x, opcode_01c0, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | TEF_SRC_IMM |
TEF_DST | TEF_DST_LOAD | TEF_DST_LONG | (opcode & 0x003f) |
TEF_WRITE_BACK);
}
} else {
if (opcode & 0x0038) {
fprintf(fp, "0x%08x, opcode_01c0, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | (opcode & 0x0e00) |
TEF_DST | TEF_DST_LOAD | TEF_DST_BYTE | (opcode & 0x003f) |
TEF_WRITE_BACK);
} else {
/* Dn */
fprintf(fp, "0x%08x, opcode_01c0, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | (opcode & 0x0e00) |
TEF_DST | TEF_DST_LOAD | TEF_DST_LONG | (opcode & 0x003f) |
TEF_WRITE_BACK);
}
}
}
void as_bset(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" mov 0x01, %%o0\n"
" sll %%o0, %%acc1, %%o0\n"
" btst %%acc0, %%o0\n"
" or %%acc0, %%o0, %%acc0\n");
}
int head_btst(U16 opcode)
{
return(opcode == 0x0100);
}
void tab_btst(FILE *fp, U16 opcode, const char *mnemonic)
{
/* FIXME: This will fail on #xxx, Dn */
if ((opcode & 0xffc0) == 0x0800) {
/* Immediate */
if (opcode & 0x0038) {
fprintf(fp, "0x%08x, opcode_0100, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | TEF_SRC_IMM |
TEF_DST | TEF_DST_LOAD | TEF_DST_BYTE | (opcode & 0x003f));
} else {
/* Dn */
fprintf(fp, "0x%08x, opcode_0100, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | TEF_SRC_IMM |
TEF_DST | TEF_DST_LOAD | TEF_DST_LONG | (opcode & 0x003f));
}
} else {
/* LOAD_EA, LOAD_EO, WRITE_BACK */
if (opcode & 0x0038) {
fprintf(fp, "0x%08x, opcode_0100, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | (opcode & 0x0e00) |
TEF_DST | TEF_DST_LOAD | TEF_DST_BYTE | (opcode & 0x003f));
} else {
/* Dn */
fprintf(fp, "0x%08x, opcode_0100, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | (opcode & 0x0e00) |
TEF_DST | TEF_DST_LOAD | TEF_DST_LONG | (opcode & 0x003f));
}
}
}
void as_btst(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" mov 0x01, %%o0\n"
" sll %%o0, %%acc1, %%o0\n"
" btst %%acc0, %%o0\n");
}
void tab_cmp(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp, "0x%08x\n"
" subcc %%acc0, %%acc1, %%g0\n"
" .long ",
TEF_SRC | TEF_SRC_LOAD | ((opcode & 0x00ff)<<9) | TEF_FASTMODE |
TEF_DST | TEF_DST_LOAD | (opcode & 0x00c0) | ((opcode & 0x0e00)>>9));
}
void tab_cmpa(FILE *fp, U16 opcode, const char *mnemonic)
{
/* FIXME: BUGS on 0xb3e0 => cmpa.l a1, (xxxx.W, PC) */
/* FIXME: This will fail on .W FIXED? */
if (opcode & 0x100) {
/* Long */
fprintf(fp,
"0x%08x\n"
" subcc %%acc0, %%acc1, %%g0\n"
" .long ",
TEF_SRC | TEF_SRC_LOAD | ((opcode & 0x003f)<<9) | TEF_SRC_LONG |
TEF_DST | TEF_DST_LOAD | ((opcode & 0x1e00)>>9) | TEF_DST_LONG |
TEF_FASTMODE);
} else {
/* Word */
fprintf(fp,
"0x%08x\n"
" subcc %%acc0, %%acc1, %%g0\n"
" .long ",
TEF_SRC | TEF_SRC_LOAD | ((opcode & 0x003f)<<9) | TEF_SRC_WORD |
TEF_DST | TEF_DST_LOAD | ((opcode & 0x1e00)>>9) | TEF_DST_LONG |
TEF_FASTMODE);
}
}
void tab_cmpi(FILE *fp, U16 opcode, const char *mnemonic)
{
/* Since we always sign-extend to 32-bits, we can always do a longword compare */
fprintf(fp,
"0x%08x\n"
" subcc %%acc0, %%acc1, %%g0\n"
" .long ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_IMM | ((opcode & 0x00c0)<<9) |
TEF_DST | TEF_DST_LOAD | (opcode & 0x00ff) | TEF_FASTMODE);
}
void tab_cmpm(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
"0x%08x\n"
" subcc %%acc0, %%acc1, %%g0\n"
" .long ",
TEF_SRC | TEF_SRC_LOAD | 0x3000 | (opcode & 0x0e00) |
TEF_DST | TEF_DST_LOAD | 0x0018 | (opcode & 0x00c7) |
((opcode & 0x00c0)<<9) | TEF_FASTMODE);
}
void tab_eori_sr(FILE *fp, U16 opcode, const char *mnemonic)
{
/* SUPERVISOR, IMMEDIATE */
fprintf(fp, "0x%08x, opcode_%04x, ",
TEF_SUPERVISOR |
TEF_SRC | TEF_SRC_IMM | TEF_SRC_WORD | TEF_SRC_LOAD
, opcode);
}
void as_eori_sr(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" sethi %%hi(0x2000), %%o0\n"
" btst %%o0, %%acc1\n"
" be 0f\n"
" xor %%acc1, %%sr, %%sr\n"
" ! Time to flip stacks.\n"
" ld [ %%regs + _A7 ], %%o0\n"
" st %%o0, [ %%regs + _SSP ]\n"
" ld [ %%regs + _USP ], %%o0\n"
" st %%o0, [ %%regs + _A7 ]\n"
"0:\n");
}
int head_illegal(U16 opcode)
{
return(opcode == 0x4afc);
}
void tab_illegal(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp, "0x%08x, opcode_4afc, ", TEF_TERMINATE);
}
void as_illegal(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" mov 0x%04x, %%acc0\n"
" mov %%sr, %%acc1\n", VEC_ILL_INSTR);
as_exception(fp, opcode);
}
void tab_lea(FILE *fp, U16 opcode, const char *mnemonic)
{
/* LOAD_EA */
fprintf(fp,
"0x%08x\n"
" mov %%ea, %%acc0\n"
" .long ",
TEF_SRC | TEF_SRC_LONG | ((opcode & 0x003f)<<9) | TEF_FASTMODE |
TEF_DST | TEF_DST_LONG | ((opcode & 0x0e00)>>9) | 0x0008 | TEF_WRITE_BACK);
}
int head_link(U16 opcode)
{
return(opcode == 0x4e50);
}
void tab_link(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp, "0x%08x, opcode_4e50, ",
TEF_SRC | TEF_SRC_IMM | TEF_SRC_LOAD | TEF_SRC_WORD | TEF_WRITE_BACK |
TEF_DST | (opcode & 0x0007) | 0x0008 | TEF_DST_LONG | TEF_DST_LOAD);
}
void as_link(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" ld [ %%regs + _A7 ], %%o0\n"
" add -4, %%o0, %%o0\n"
" ld [ %%vecs + _VEC_STORE_LONG ], %%o7\n"
" mov %%o0, %%ea\n"
" st %%o0, [ %%regs + _A7 ]\n"
" call %%o7\n"
" mov %%acc0, %%o1\n"
" add %%ea, %%acc1, %%o0\n"
" mov %%ea, %%acc0\n"
" st %%o0, [ %%regs + _A7 ]\n");
}
void tab_move(FILE *fp, U16 opcode, const char *mnemonic)
{
U32 size = 0;
U32 base;
switch(opcode & 0x3000) {
case 0x1000: /* Byte */
size = TEF_SRC_BYTE | TEF_DST_BYTE;
break;
case 0x2000: /* Long */
size = TEF_SRC_LONG | TEF_DST_LONG;
break;
case 0x3000: /* Word */
size = TEF_SRC_WORD | TEF_DST_WORD;
break;
}
base = ((opcode & 0x003f)<<9) | ((opcode & 0x0e00)>>9) | ((opcode & 0x01c0)>>3);
fprintf(fp,
"0x%08x\n"
" orcc %%acc1, %%g0, %%acc0\n"
" .long ",
TEF_SRC | TEF_DST | base | size | TEF_SRC_LOAD |
TEF_WRITE_BACK | TEF_FASTMODE);
}
int head_move_sr(U16 opcode)
{
return(opcode == 0x46c0);
}
void tab_move_sr(FILE *fp, U16 opcode, const char *mnemonic)
{
if ((opcode & 0xffc0) == 0x46c0) {
/* Move to SR */
fprintf(fp, "0x%08x, opcode_46c0, ", TEF_SUPERVISOR |
TEF_DST | TEF_DST_WORD | (opcode & 0x003f) | TEF_DST_LOAD);
} else {
/* Move from SR */
fprintf(fp, "0x%08x\n"
" mov %%sr, %%acc0\n"
" .long ",
TEF_SUPERVISOR | TEF_FASTMODE |
TEF_DST | TEF_DST_WORD | (opcode & 0x003f) | TEF_WRITE_BACK);
}
}
void as_move_sr(FILE *fp, U16 opcode, const char *mnemonic)
{
if (opcode == 0x46c0) {
/* Move to SR */
fprintf(fp,
" sethi %%hi(0x2000), %%o0\n"
" btst %%acc0, %%o0\n"
" bne 0f\n"
" mov %%acc0, %%sr\n"
" ld [ %%regs + _A7 ], %%o0\n"
" st %%o0, [ %%regs + _SSP ]\n"
" ld [ %%regs + _USP ], %%o0\n"
" st %%o0, [ %%regs + _A7 ]\n"
"0:\n");
}
}
void tab_movea(FILE *fp, U16 opcode, const char *mnemonic)
{
U32 size = 0;
switch(opcode & 0x3000) {
case 0x2000: /* Long */
size = TEF_SRC_LONG;
break;
case 0x3000: /* Word */
size = TEF_SRC_WORD;
break;
}
fprintf(fp,
"0x%08x\n"
" mov %%acc1, %%acc0\n"
" .long ",
TEF_SRC | TEF_SRC_LOAD | ((opcode & 0x3f)<<9) | size |
TEF_DST | TEF_DST_LONG | ((opcode & 0x0e00)>>9) | 0x0008 |
TEF_WRITE_BACK | TEF_FASTMODE);
}
#if 0
int comp_moves(FILE *fp, U16 opcode, const char *mnemonic){
comp_supervisor(fp, opcode, mnemonic);
return(comp_illegal(fp, opcode, mnemonic));
}
#endif /* 0 */
void tab_ori(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
"0x%08x\n"
" orcc %%acc1, %%acc0, %%acc0\n"
" .long ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_IMM | ((opcode & 0x00c0)<<9) |
TEF_DST | TEF_DST_LOAD | (opcode & 0x00ff) | TEF_WRITE_BACK |
TEF_FASTMODE);
}
int head_ori_ccr(U16 opcode)
{
return (opcode == 0x003c);
}
void tab_ori_ccr(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp, "0x%08x, opcode_003c, ",
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_IMM | TEF_SRC_BYTE);
}
void as_ori_ccr(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" and 0x1f, %%acc1, %%acc1\n" /* Avoid sign extension */
" or %%acc1, %%sr, %%sr\n");
}
void tab_ori_sr(FILE *fp, U16 opcode, const char *mnemonic)
{
/* SUPERVISOR, IMMEDIATE */
fprintf(fp,
"0x%08x\n"
" or %%acc1, %%sr, %%sr\n"
" .long ",
TEF_SUPERVISOR | TEF_FASTMODE |
TEF_SRC | TEF_SRC_LOAD | TEF_SRC_IMM | TEF_SRC_WORD);
}
int head_clr(U16 opcode)
{
return (opcode == 0x4200);
}
void tab_clr(FILE *fp, U16 opcode, const char *mnemonic)
{
/* LOAD_EA, WRITE_BACK */
fprintf(fp, "0x%08x, opcode_4200, ",
TEF_DST | (opcode & 0xff) | TEF_WRITE_BACK);
}
void as_clr(FILE *fp, U16 opcode, const char *mnemonic)
{
fputs(" and -0x10, %sr, %sr\n"
" mov %g0, %acc0\n"
" or 0x04, %sr, %sr\n",
fp);
}
int head_neg(U16 opcode)
{
return (opcode == 0x4400);
}
void tab_neg(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp, "0x%08x, opcode_4400, ",
TEF_DST | TEF_DST_LOAD | (opcode & 0x00ff) | TEF_WRITE_BACK);
}
void as_neg(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" subcc %%g0, %%acc0, %%acc0\n"
" and -32, %%sr, %%sr\n"
" bcs,a 0f\n"
" or 0x11, %%sr, %%sr\n"
" or 0x04, %%sr, %%sr\n"
"0:\n"
" blt,a 0f\n"
" or 0x08, %%sr, %%sr\n"
"0:\n"
" bvs,a 0f\n"
" or 0x02, %%sr, %%sr\n"
"0:\n");
}
void tab_not(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
"0x%08x\n"
" xorcc -1, %%acc0, %%acc0\n"
" .long ",
TEF_DST | TEF_DST_LOAD | (opcode & 0x00ff) |
TEF_WRITE_BACK | TEF_FASTMODE);
}
int head_pea(U16 opcode)
{
return(opcode == 0x4850);
}
void tab_pea(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp, "0x%08x, opcode_4850, ",
TEF_DST | TEF_DST_LONG | (opcode & 0x003f));
}
void as_pea(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" ld [ %%regs + _A7 ], %%o0\n"
" mov %%ea, %%o1\n"
" add -4, %%o0, %%o0\n"
" ld [ %%vecs + _VEC_STORE_LONG ], %%o7\n"
" call %%o7\n"
" st %%o0, [ %%regs + _A7 ]\n");
}
int head_movem(U16 opcode)
{
return (0);
}
void tab_movem(FILE *fp, U16 opcode, const char *mnemonic)
{
U32 base = TEF_DST | TEF_SRC |
((opcode & 0x0040)?TEF_DST_LONG:TEF_DST_WORD);
if (opcode & 0x0400) {
if ((opcode & 0x0038) == 0x0018) {
/* MOVEM (An)+, xxxx */
base |= TEF_DST_MOVEM | TEF_WRITE_BACK | ((opcode & 0x003f)<<9);
} else {
base |= TEF_DST_MOVEM | ((opcode & 0x003f)<<9);
}
} else {
if ((opcode & 0x0038) == 0x0020) {
/* MOVEM xxxx, -(An) */
base |= TEF_SRC_MOVEM | TEF_WRITE_BACK | (opcode & 0x003f);
} else {
base |= TEF_SRC_MOVEM | (opcode & 0x003f);
}
}
fprintf(fp, "0x%08x, 0x00000000, ", base);
}
void as_movem(FILE *fp, U16 opcode, const char *mnemonic)
{
/* Everything is magic */
}
void tab_move_usp(FILE *fp, U16 opcode, const char *mnemonic)
{
/* SUPERVISOR */
if (opcode & 0x0008) {
/* From USP */
fprintf(fp,
"0x%08x\n"
" ld [ %%regs + _USP ], %%acc0\n"
" .long ",
TEF_SUPERVISOR | TEF_FASTMODE |
TEF_DST | TEF_DST_LONG | 0x0008 | (opcode & 0x0007) | TEF_WRITE_BACK);
} else {
/* To USP */
fprintf(fp,
"0x%08x\n"
" st %%acc0, [ %%regs + _USP ]\n"
" .long ",
TEF_SUPERVISOR | TEF_FASTMODE |
TEF_DST | TEF_DST_LONG | 0x0008 | (opcode & 0x0007) | TEF_DST_LOAD);
}
}
void tab_reset(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp, "0x%08x, opcode_%04x, ", TEF_SUPERVISOR, opcode);
}
void as_reset(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,
" ld [ %%vecs + _VEC_RESET ], %%o7\n"
" call %%o7\n"
" nop\n");
}
void tab_nop(FILE *fp, U16 opcode, const char *mnemonic)
{
/* No need to do anything */
fprintf(fp, "0, opcode_4e71, ");
}
void as_nop(FILE *fp, U16 opcode, const char *mnemonic)
{
/* No need to do anything */
}
void tab_stop(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp, "0x%08x, opcode_4e72, ",
TEF_SUPERVISOR | TEF_SRC | TEF_SRC_LOAD | TEF_SRC_WORD | TEF_SRC_IMM |
TEF_TERMINATE);
}
void as_stop(FILE *fp, U16 opcode, const char *mnemonic)
{
fprintf(fp,