diff --git a/Documents/HUGS Protocol Doc.pdf b/Documents/HUGS Protocol Doc.pdf index 8cc8d51..81d6776 100644 Binary files a/Documents/HUGS Protocol Doc.pdf and b/Documents/HUGS Protocol Doc.pdf differ diff --git a/HUGS/HUGS.uvguix.Phil b/HUGS/HUGS.uvguix.Phil index 742d374..2c33f89 100644 --- a/HUGS/HUGS.uvguix.Phil +++ b/HUGS/HUGS.uvguix.Phil @@ -110,8 +110,8 @@ 0 - 60 - 010000000400000001000000010000000100000001000000000000000200000000000000010000000100000000000000280000002800000000000000 + 484 + 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898 @@ -3598,4 +3598,49 @@ + + 1 + 0 + + 100 + 3 + + RTE\Device\GD32F130C8\startup_gd32f1x0.s + 0 + 136 + 149 + 1 + + 0 + + + .\Src\main.c + 0 + 65 + 76 + 1 + + 0 + + + .\Src\commsHUGS.c + 0 + 171 + 211 + 1 + + 0 + + + .\Src\bldc.c + 40 + 28 + 35 + 1 + + 0 + + + + diff --git a/HUGS/Listings/HUGS.map b/HUGS/Listings/HUGS.map index 634b08a..add343f 100644 --- a/HUGS/Listings/HUGS.map +++ b/HUGS/Listings/HUGS.map @@ -449,39 +449,39 @@ Image Symbol Table .text 0x08001520 Section 0 comms.o(.text) .text 0x08001590 Section 0 commssteering.o(.text) .text 0x08001644 Section 0 commshugs.o(.text) - .text 0x08001a58 Section 0 gd32f1x0_adc.o(.text) - .text 0x080020dc Section 0 gd32f1x0_dma.o(.text) - .text 0x08002590 Section 0 gd32f1x0_fwdgt.o(.text) - .text 0x0800265c Section 0 gd32f1x0_gpio.o(.text) - .text 0x08002838 Section 0 gd32f1x0_misc.o(.text) - .text 0x0800295c Section 0 gd32f1x0_rcu.o(.text) - .text 0x08003204 Section 0 gd32f1x0_timer.o(.text) - .text 0x08003f30 Section 0 gd32f1x0_usart.o(.text) - .text 0x08004580 Section 64 startup_gd32f1x0.o(.text) - .text 0x080045c0 Section 0 system_gd32f1x0.o(.text) - system_clock_72m_irc8m 0x080045c1 Thumb Code 106 system_gd32f1x0.o(.text) - system_clock_config 0x0800462b Thumb Code 8 system_gd32f1x0.o(.text) - .text 0x080047ac Section 138 rt_memcpy_v6.o(.text) - .text 0x08004836 Section 100 rt_memcpy_w.o(.text) - .text 0x0800489a Section 0 heapauxi.o(.text) - .text 0x080048a0 Section 74 sys_stackheap_outer.o(.text) - .text 0x080048ea Section 0 exit.o(.text) - .text 0x080048fc Section 8 libspace.o(.text) - .text 0x08004904 Section 0 sys_exit.o(.text) - .text 0x08004910 Section 2 use_no_semi.o(.text) - .text 0x08004912 Section 0 indicate_semi.o(.text) - i.blockPWM 0x08004912 Section 0 bldc.o(i.blockPWM) - x$fpl$dcmpinf 0x0800497a Section 24 dcmpi.o(x$fpl$dcmpinf) - x$fpl$dflt 0x08004992 Section 46 dflt_clz.o(x$fpl$dflt) - x$fpl$dleqf 0x080049c0 Section 120 dleqf.o(x$fpl$dleqf) - x$fpl$dnaninf 0x08004a38 Section 156 dnaninf.o(x$fpl$dnaninf) - x$fpl$ffix 0x08004ad4 Section 54 ffix.o(x$fpl$ffix) - x$fpl$fflt 0x08004b0c Section 48 fflt_clz.o(x$fpl$fflt) - x$fpl$fmul 0x08004b3c Section 258 fmul.o(x$fpl$fmul) - x$fpl$fnaninf 0x08004c3e Section 140 fnaninf.o(x$fpl$fnaninf) - x$fpl$fretinf 0x08004cca Section 10 fretinf.o(x$fpl$fretinf) - .constdata 0x08004cd4 Section 776 bldc.o(.constdata) - x$fpl$usenofp 0x08004cd4 Section 0 usenofp.o(x$fpl$usenofp) + .text 0x08001a60 Section 0 gd32f1x0_adc.o(.text) + .text 0x080020e4 Section 0 gd32f1x0_dma.o(.text) + .text 0x08002598 Section 0 gd32f1x0_fwdgt.o(.text) + .text 0x08002664 Section 0 gd32f1x0_gpio.o(.text) + .text 0x08002840 Section 0 gd32f1x0_misc.o(.text) + .text 0x08002964 Section 0 gd32f1x0_rcu.o(.text) + .text 0x0800320c Section 0 gd32f1x0_timer.o(.text) + .text 0x08003f38 Section 0 gd32f1x0_usart.o(.text) + .text 0x08004588 Section 64 startup_gd32f1x0.o(.text) + .text 0x080045c8 Section 0 system_gd32f1x0.o(.text) + system_clock_72m_irc8m 0x080045c9 Thumb Code 106 system_gd32f1x0.o(.text) + system_clock_config 0x08004633 Thumb Code 8 system_gd32f1x0.o(.text) + .text 0x080047b4 Section 138 rt_memcpy_v6.o(.text) + .text 0x0800483e Section 100 rt_memcpy_w.o(.text) + .text 0x080048a2 Section 0 heapauxi.o(.text) + .text 0x080048a8 Section 74 sys_stackheap_outer.o(.text) + .text 0x080048f2 Section 0 exit.o(.text) + .text 0x08004904 Section 8 libspace.o(.text) + .text 0x0800490c Section 0 sys_exit.o(.text) + .text 0x08004918 Section 2 use_no_semi.o(.text) + .text 0x0800491a Section 0 indicate_semi.o(.text) + i.blockPWM 0x0800491a Section 0 bldc.o(i.blockPWM) + x$fpl$dcmpinf 0x08004982 Section 24 dcmpi.o(x$fpl$dcmpinf) + x$fpl$dflt 0x0800499a Section 46 dflt_clz.o(x$fpl$dflt) + x$fpl$dleqf 0x080049c8 Section 120 dleqf.o(x$fpl$dleqf) + x$fpl$dnaninf 0x08004a40 Section 156 dnaninf.o(x$fpl$dnaninf) + x$fpl$ffix 0x08004adc Section 54 ffix.o(x$fpl$ffix) + x$fpl$fflt 0x08004b14 Section 48 fflt_clz.o(x$fpl$fflt) + x$fpl$fmul 0x08004b44 Section 258 fmul.o(x$fpl$fmul) + x$fpl$fnaninf 0x08004c46 Section 140 fnaninf.o(x$fpl$fnaninf) + x$fpl$fretinf 0x08004cd2 Section 10 fretinf.o(x$fpl$fretinf) + .constdata 0x08004cdc Section 776 bldc.o(.constdata) + x$fpl$usenofp 0x08004cdc Section 0 usenofp.o(x$fpl$usenofp) .data 0x20000000 Section 8 main.o(.data) .data 0x20000008 Section 114 bldc.o(.data) .data 0x2000007a Section 2 setup.o(.data) @@ -637,367 +637,367 @@ Image Symbol Table CheckUSARTSteerInput 0x080015b5 Thumb Code 54 commssteering.o(.text) UpdateUSARTSteerInput 0x080015eb Thumb Code 70 commssteering.o(.text) SendHUGSReply 0x08001645 Thumb Code 490 commshugs.o(.text) - CheckUSARTHUGSInput 0x0800182f Thumb Code 278 commshugs.o(.text) - UpdateUSARTHUGSInput 0x08001945 Thumb Code 188 commshugs.o(.text) - adc_deinit 0x08001a59 Thumb Code 20 gd32f1x0_adc.o(.text) - adc_enable 0x08001a6d Thumb Code 24 gd32f1x0_adc.o(.text) - adc_disable 0x08001a85 Thumb Code 14 gd32f1x0_adc.o(.text) - adc_calibration_enable 0x08001a93 Thumb Code 54 gd32f1x0_adc.o(.text) - adc_dma_mode_enable 0x08001ac9 Thumb Code 14 gd32f1x0_adc.o(.text) - adc_dma_mode_disable 0x08001ad7 Thumb Code 14 gd32f1x0_adc.o(.text) - adc_tempsensor_vrefint_enable 0x08001ae5 Thumb Code 14 gd32f1x0_adc.o(.text) - adc_tempsensor_vrefint_disable 0x08001af3 Thumb Code 14 gd32f1x0_adc.o(.text) - adc_vbat_enable 0x08001b01 Thumb Code 14 gd32f1x0_adc.o(.text) - adc_vbat_disable 0x08001b0f Thumb Code 14 gd32f1x0_adc.o(.text) - adc_discontinuous_mode_config 0x08001b1d Thumb Code 94 gd32f1x0_adc.o(.text) - adc_special_function_config 0x08001b7b Thumb Code 130 gd32f1x0_adc.o(.text) - adc_data_alignment_config 0x08001bfd Thumb Code 30 gd32f1x0_adc.o(.text) - adc_channel_length_config 0x08001c1b Thumb Code 88 gd32f1x0_adc.o(.text) - adc_regular_channel_config 0x08001c73 Thumb Code 218 gd32f1x0_adc.o(.text) - adc_inserted_channel_config 0x08001d4d Thumb Code 146 gd32f1x0_adc.o(.text) - adc_inserted_channel_offset_config 0x08001ddf Thumb Code 42 gd32f1x0_adc.o(.text) - adc_external_trigger_config 0x08001e09 Thumb Code 88 gd32f1x0_adc.o(.text) - adc_external_trigger_source_config 0x08001e61 Thumb Code 60 gd32f1x0_adc.o(.text) - adc_software_trigger_enable 0x08001e9d Thumb Code 38 gd32f1x0_adc.o(.text) - adc_regular_data_read 0x08001ec3 Thumb Code 10 gd32f1x0_adc.o(.text) - adc_inserted_data_read 0x08001ecd Thumb Code 60 gd32f1x0_adc.o(.text) - adc_flag_get 0x08001f09 Thumb Code 18 gd32f1x0_adc.o(.text) - adc_flag_clear 0x08001f1b Thumb Code 16 gd32f1x0_adc.o(.text) - adc_interrupt_flag_get 0x08001f2b Thumb Code 108 gd32f1x0_adc.o(.text) - adc_interrupt_flag_clear 0x08001f97 Thumb Code 16 gd32f1x0_adc.o(.text) - adc_interrupt_enable 0x08001fa7 Thumb Code 68 gd32f1x0_adc.o(.text) - adc_interrupt_disable 0x08001feb Thumb Code 68 gd32f1x0_adc.o(.text) - adc_watchdog_single_channel_enable 0x0800202f Thumb Code 40 gd32f1x0_adc.o(.text) - adc_watchdog_group_channel_enable 0x08002057 Thumb Code 92 gd32f1x0_adc.o(.text) - adc_watchdog_disable 0x080020b3 Thumb Code 18 gd32f1x0_adc.o(.text) - adc_watchdog_threshold_config 0x080020c5 Thumb Code 12 gd32f1x0_adc.o(.text) - dma_deinit 0x080020dd Thumb Code 88 gd32f1x0_dma.o(.text) - dma_init 0x08002135 Thumb Code 270 gd32f1x0_dma.o(.text) - dma_circulation_enable 0x08002243 Thumb Code 30 gd32f1x0_dma.o(.text) - dma_circulation_disable 0x08002261 Thumb Code 30 gd32f1x0_dma.o(.text) - dma_memory_to_memory_enable 0x0800227f Thumb Code 30 gd32f1x0_dma.o(.text) - dma_memory_to_memory_disable 0x0800229d Thumb Code 30 gd32f1x0_dma.o(.text) - dma_channel_enable 0x080022bb Thumb Code 30 gd32f1x0_dma.o(.text) - dma_channel_disable 0x080022d9 Thumb Code 30 gd32f1x0_dma.o(.text) - dma_periph_address_config 0x080022f7 Thumb Code 14 gd32f1x0_dma.o(.text) - dma_memory_address_config 0x08002305 Thumb Code 14 gd32f1x0_dma.o(.text) - dma_transfer_number_config 0x08002313 Thumb Code 14 gd32f1x0_dma.o(.text) - dma_transfer_number_get 0x08002321 Thumb Code 16 gd32f1x0_dma.o(.text) - dma_priority_config 0x08002331 Thumb Code 34 gd32f1x0_dma.o(.text) - dma_memory_width_config 0x08002353 Thumb Code 34 gd32f1x0_dma.o(.text) - dma_periph_width_config 0x08002375 Thumb Code 34 gd32f1x0_dma.o(.text) - dma_memory_increase_enable 0x08002397 Thumb Code 30 gd32f1x0_dma.o(.text) - dma_memory_increase_disable 0x080023b5 Thumb Code 30 gd32f1x0_dma.o(.text) - dma_periph_increase_enable 0x080023d3 Thumb Code 30 gd32f1x0_dma.o(.text) - dma_periph_increase_disable 0x080023f1 Thumb Code 30 gd32f1x0_dma.o(.text) - dma_transfer_direction_config 0x0800240f Thumb Code 64 gd32f1x0_dma.o(.text) - dma_interrupt_flag_get 0x0800244f Thumb Code 196 gd32f1x0_dma.o(.text) - dma_interrupt_flag_clear 0x08002513 Thumb Code 18 gd32f1x0_dma.o(.text) - dma_interrupt_enable 0x08002525 Thumb Code 30 gd32f1x0_dma.o(.text) - dma_interrupt_disable 0x08002543 Thumb Code 30 gd32f1x0_dma.o(.text) - dma_flag_get 0x08002561 Thumb Code 26 gd32f1x0_dma.o(.text) - dma_flag_clear 0x0800257b Thumb Code 18 gd32f1x0_dma.o(.text) - fwdgt_write_disable 0x08002591 Thumb Code 8 gd32f1x0_fwdgt.o(.text) - fwdgt_counter_reload 0x08002599 Thumb Code 10 gd32f1x0_fwdgt.o(.text) - fwdgt_enable 0x080025a3 Thumb Code 10 gd32f1x0_fwdgt.o(.text) - fwdgt_window_value_config 0x080025ad Thumb Code 54 gd32f1x0_fwdgt.o(.text) - fwdgt_config 0x080025e3 Thumb Code 94 gd32f1x0_fwdgt.o(.text) - fwdgt_flag_get 0x08002641 Thumb Code 18 gd32f1x0_fwdgt.o(.text) - gpio_deinit 0x0800265d Thumb Code 140 gd32f1x0_gpio.o(.text) - gpio_mode_set 0x080026e9 Thumb Code 78 gd32f1x0_gpio.o(.text) - gpio_output_options_set 0x08002737 Thumb Code 66 gd32f1x0_gpio.o(.text) - gpio_bit_set 0x08002779 Thumb Code 4 gd32f1x0_gpio.o(.text) - gpio_bit_reset 0x0800277d Thumb Code 4 gd32f1x0_gpio.o(.text) - gpio_bit_write 0x08002781 Thumb Code 10 gd32f1x0_gpio.o(.text) - gpio_port_write 0x0800278b Thumb Code 4 gd32f1x0_gpio.o(.text) - gpio_input_bit_get 0x0800278f Thumb Code 16 gd32f1x0_gpio.o(.text) - gpio_input_port_get 0x0800279f Thumb Code 8 gd32f1x0_gpio.o(.text) - gpio_output_bit_get 0x080027a7 Thumb Code 16 gd32f1x0_gpio.o(.text) - gpio_output_port_get 0x080027b7 Thumb Code 8 gd32f1x0_gpio.o(.text) - gpio_af_set 0x080027bf Thumb Code 94 gd32f1x0_gpio.o(.text) - gpio_pin_lock 0x0800281d Thumb Code 18 gd32f1x0_gpio.o(.text) - nvic_priority_group_set 0x08002839 Thumb Code 10 gd32f1x0_misc.o(.text) - nvic_irq_enable 0x08002843 Thumb Code 156 gd32f1x0_misc.o(.text) - nvic_irq_disable 0x080028df Thumb Code 18 gd32f1x0_misc.o(.text) - nvic_vector_table_set 0x080028f1 Thumb Code 14 gd32f1x0_misc.o(.text) - system_lowpower_set 0x080028ff Thumb Code 16 gd32f1x0_misc.o(.text) - system_lowpower_reset 0x0800290f Thumb Code 16 gd32f1x0_misc.o(.text) - systick_clksource_set 0x0800291f Thumb Code 40 gd32f1x0_misc.o(.text) - rcu_deinit 0x0800295d Thumb Code 112 gd32f1x0_rcu.o(.text) - rcu_periph_clock_enable 0x080029cd Thumb Code 28 gd32f1x0_rcu.o(.text) - rcu_periph_clock_disable 0x080029e9 Thumb Code 28 gd32f1x0_rcu.o(.text) - rcu_periph_clock_sleep_enable 0x08002a05 Thumb Code 28 gd32f1x0_rcu.o(.text) - rcu_periph_clock_sleep_disable 0x08002a21 Thumb Code 28 gd32f1x0_rcu.o(.text) - rcu_periph_reset_enable 0x08002a3d Thumb Code 28 gd32f1x0_rcu.o(.text) - rcu_periph_reset_disable 0x08002a59 Thumb Code 28 gd32f1x0_rcu.o(.text) - rcu_bkp_reset_enable 0x08002a75 Thumb Code 14 gd32f1x0_rcu.o(.text) - rcu_bkp_reset_disable 0x08002a83 Thumb Code 14 gd32f1x0_rcu.o(.text) - rcu_system_clock_source_config 0x08002a91 Thumb Code 22 gd32f1x0_rcu.o(.text) - rcu_system_clock_source_get 0x08002aa7 Thumb Code 10 gd32f1x0_rcu.o(.text) - rcu_ahb_clock_config 0x08002ab1 Thumb Code 22 gd32f1x0_rcu.o(.text) - rcu_apb1_clock_config 0x08002ac7 Thumb Code 22 gd32f1x0_rcu.o(.text) - rcu_apb2_clock_config 0x08002add Thumb Code 22 gd32f1x0_rcu.o(.text) - rcu_adc_clock_config 0x08002af3 Thumb Code 148 gd32f1x0_rcu.o(.text) - rcu_usbd_clock_config 0x08002b87 Thumb Code 22 gd32f1x0_rcu.o(.text) - rcu_ckout_config 0x08002b9d Thumb Code 24 gd32f1x0_rcu.o(.text) - rcu_pll_config 0x08002bb5 Thumb Code 28 gd32f1x0_rcu.o(.text) - rcu_usart_clock_config 0x08002bd1 Thumb Code 22 gd32f1x0_rcu.o(.text) - rcu_cec_clock_config 0x08002be7 Thumb Code 22 gd32f1x0_rcu.o(.text) - rcu_rtc_clock_config 0x08002bfd Thumb Code 22 gd32f1x0_rcu.o(.text) - rcu_hxtal_prediv_config 0x08002c13 Thumb Code 20 gd32f1x0_rcu.o(.text) - rcu_lxtal_drive_capability_config 0x08002c27 Thumb Code 22 gd32f1x0_rcu.o(.text) - rcu_flag_get 0x08002c3d Thumb Code 30 gd32f1x0_rcu.o(.text) - rcu_all_reset_flag_clear 0x08002c5b Thumb Code 14 gd32f1x0_rcu.o(.text) - rcu_interrupt_flag_get 0x08002c69 Thumb Code 18 gd32f1x0_rcu.o(.text) - rcu_interrupt_flag_clear 0x08002c7b Thumb Code 12 gd32f1x0_rcu.o(.text) - rcu_interrupt_enable 0x08002c87 Thumb Code 12 gd32f1x0_rcu.o(.text) - rcu_interrupt_disable 0x08002c93 Thumb Code 12 gd32f1x0_rcu.o(.text) - rcu_osci_stab_wait 0x08002c9f Thumb Code 284 gd32f1x0_rcu.o(.text) - rcu_osci_on 0x08002dbb Thumb Code 28 gd32f1x0_rcu.o(.text) - rcu_osci_off 0x08002dd7 Thumb Code 28 gd32f1x0_rcu.o(.text) - rcu_osci_bypass_mode_enable 0x08002df3 Thumb Code 94 gd32f1x0_rcu.o(.text) - rcu_osci_bypass_mode_disable 0x08002e51 Thumb Code 94 gd32f1x0_rcu.o(.text) - rcu_hxtal_clock_monitor_enable 0x08002eaf Thumb Code 14 gd32f1x0_rcu.o(.text) - rcu_hxtal_clock_monitor_disable 0x08002ebd Thumb Code 14 gd32f1x0_rcu.o(.text) - rcu_irc8m_adjust_value_set 0x08002ecb Thumb Code 20 gd32f1x0_rcu.o(.text) - rcu_irc14m_adjust_value_set 0x08002edf Thumb Code 20 gd32f1x0_rcu.o(.text) - rcu_voltage_key_unlock 0x08002ef3 Thumb Code 28 gd32f1x0_rcu.o(.text) - rcu_deepsleep_voltage_set 0x08002f0f Thumb Code 30 gd32f1x0_rcu.o(.text) - rcu_power_down_voltage_set 0x08002f2d Thumb Code 30 gd32f1x0_rcu.o(.text) - rcu_clock_freq_get 0x08002f4b Thumb Code 690 gd32f1x0_rcu.o(.text) - timer_deinit 0x08003205 Thumb Code 210 gd32f1x0_timer.o(.text) - timer_init 0x080032d7 Thumb Code 126 gd32f1x0_timer.o(.text) - timer_enable 0x08003355 Thumb Code 10 gd32f1x0_timer.o(.text) - timer_disable 0x0800335f Thumb Code 10 gd32f1x0_timer.o(.text) - timer_auto_reload_shadow_enable 0x08003369 Thumb Code 10 gd32f1x0_timer.o(.text) - timer_auto_reload_shadow_disable 0x08003373 Thumb Code 10 gd32f1x0_timer.o(.text) - timer_update_event_enable 0x0800337d Thumb Code 10 gd32f1x0_timer.o(.text) - timer_update_event_disable 0x08003387 Thumb Code 10 gd32f1x0_timer.o(.text) - timer_counter_alignment 0x08003391 Thumb Code 16 gd32f1x0_timer.o(.text) - timer_counter_up_direction 0x080033a1 Thumb Code 14 gd32f1x0_timer.o(.text) - timer_counter_down_direction 0x080033af Thumb Code 18 gd32f1x0_timer.o(.text) - timer_prescaler_config 0x080033c1 Thumb Code 14 gd32f1x0_timer.o(.text) - timer_repetition_value_config 0x080033cf Thumb Code 4 gd32f1x0_timer.o(.text) - timer_autoreload_value_config 0x080033d3 Thumb Code 4 gd32f1x0_timer.o(.text) - timer_counter_value_config 0x080033d7 Thumb Code 4 gd32f1x0_timer.o(.text) - timer_counter_read 0x080033db Thumb Code 8 gd32f1x0_timer.o(.text) - timer_prescaler_read 0x080033e3 Thumb Code 10 gd32f1x0_timer.o(.text) - timer_single_pulse_mode_config 0x080033ed Thumb Code 26 gd32f1x0_timer.o(.text) - timer_update_source_config 0x08003407 Thumb Code 26 gd32f1x0_timer.o(.text) - timer_interrupt_enable 0x08003421 Thumb Code 8 gd32f1x0_timer.o(.text) - timer_interrupt_disable 0x08003429 Thumb Code 8 gd32f1x0_timer.o(.text) - timer_interrupt_flag_get 0x08003431 Thumb Code 32 gd32f1x0_timer.o(.text) - timer_interrupt_flag_clear 0x08003451 Thumb Code 8 gd32f1x0_timer.o(.text) - timer_flag_get 0x08003459 Thumb Code 18 gd32f1x0_timer.o(.text) - timer_flag_clear 0x0800346b Thumb Code 8 gd32f1x0_timer.o(.text) - timer_dma_enable 0x08003473 Thumb Code 8 gd32f1x0_timer.o(.text) - timer_dma_disable 0x0800347b Thumb Code 8 gd32f1x0_timer.o(.text) - timer_channel_dma_request_source_select 0x08003483 Thumb Code 26 gd32f1x0_timer.o(.text) - timer_dma_transfer_config 0x0800349d Thumb Code 24 gd32f1x0_timer.o(.text) - timer_event_software_generate 0x080034b5 Thumb Code 8 gd32f1x0_timer.o(.text) - timer_break_config 0x080034bd Thumb Code 30 gd32f1x0_timer.o(.text) - timer_break_enable 0x080034db Thumb Code 10 gd32f1x0_timer.o(.text) - timer_break_disable 0x080034e5 Thumb Code 8 gd32f1x0_timer.o(.text) - timer_automatic_output_enable 0x080034ed Thumb Code 10 gd32f1x0_timer.o(.text) - timer_automatic_output_disable 0x080034f7 Thumb Code 8 gd32f1x0_timer.o(.text) - timer_primary_output_config 0x080034ff Thumb Code 22 gd32f1x0_timer.o(.text) - timer_channel_control_shadow_config 0x08003515 Thumb Code 22 gd32f1x0_timer.o(.text) - timer_channel_control_shadow_update_config 0x0800352b Thumb Code 26 gd32f1x0_timer.o(.text) - timer_channel_output_config 0x08003545 Thumb Code 472 gd32f1x0_timer.o(.text) - timer_channel_output_mode_config 0x0800371d Thumb Code 90 gd32f1x0_timer.o(.text) - timer_channel_output_pulse_value_config 0x08003777 Thumb Code 38 gd32f1x0_timer.o(.text) - timer_channel_output_shadow_config 0x0800379d Thumb Code 90 gd32f1x0_timer.o(.text) - timer_channel_output_fast_config 0x080037f7 Thumb Code 90 gd32f1x0_timer.o(.text) - timer_channel_output_clear_config 0x08003851 Thumb Code 90 gd32f1x0_timer.o(.text) - timer_channel_output_polarity_config 0x080038ab Thumb Code 92 gd32f1x0_timer.o(.text) - timer_channel_complementary_output_polarity_config 0x08003907 Thumb Code 70 gd32f1x0_timer.o(.text) - timer_ocpre_clear_source_config 0x0800394d Thumb Code 26 gd32f1x0_timer.o(.text) - timer_channel_output_state_config 0x08003967 Thumb Code 92 gd32f1x0_timer.o(.text) - timer_channel_complementary_output_state_config 0x080039c3 Thumb Code 70 gd32f1x0_timer.o(.text) - timer_channel_input_capture_prescaler_config 0x08003a09 Thumb Code 90 gd32f1x0_timer.o(.text) - timer_input_capture_config 0x08003a63 Thumb Code 332 gd32f1x0_timer.o(.text) - timer_channel_capture_value_register_read 0x08003baf Thumb Code 42 gd32f1x0_timer.o(.text) - timer_input_pwm_capture_config 0x08003bd9 Thumb Code 352 gd32f1x0_timer.o(.text) - timer_hall_mode_config 0x08003d39 Thumb Code 26 gd32f1x0_timer.o(.text) - timer_input_trigger_source_select 0x08003d53 Thumb Code 16 gd32f1x0_timer.o(.text) - timer_master_output_trigger_source_select 0x08003d63 Thumb Code 16 gd32f1x0_timer.o(.text) - timer_slave_mode_select 0x08003d73 Thumb Code 16 gd32f1x0_timer.o(.text) - timer_master_slave_mode_config 0x08003d83 Thumb Code 26 gd32f1x0_timer.o(.text) - timer_external_trigger_config 0x08003d9d Thumb Code 30 gd32f1x0_timer.o(.text) - timer_quadrature_decoder_mode_config 0x08003dbb Thumb Code 64 gd32f1x0_timer.o(.text) - timer_internal_clock_config 0x08003dfb Thumb Code 8 gd32f1x0_timer.o(.text) - timer_internal_trigger_as_external_clock_config 0x08003e03 Thumb Code 32 gd32f1x0_timer.o(.text) - timer_external_trigger_as_external_clock_config 0x08003e23 Thumb Code 164 gd32f1x0_timer.o(.text) - timer_external_clock_mode0_config 0x08003ec7 Thumb Code 56 gd32f1x0_timer.o(.text) - timer_external_clock_mode1_config 0x08003eff Thumb Code 32 gd32f1x0_timer.o(.text) - timer_external_clock_mode1_disable 0x08003f1f Thumb Code 10 gd32f1x0_timer.o(.text) - timer_channel_remap_config 0x08003f29 Thumb Code 6 gd32f1x0_timer.o(.text) - usart_deinit 0x08003f31 Thumb Code 58 gd32f1x0_usart.o(.text) - usart_baudrate_set 0x08003f6b Thumb Code 120 gd32f1x0_usart.o(.text) - usart_parity_config 0x08003fe3 Thumb Code 24 gd32f1x0_usart.o(.text) - usart_word_length_set 0x08003ffb Thumb Code 24 gd32f1x0_usart.o(.text) - usart_stop_bit_set 0x08004013 Thumb Code 24 gd32f1x0_usart.o(.text) - usart_enable 0x0800402b Thumb Code 10 gd32f1x0_usart.o(.text) - usart_disable 0x08004035 Thumb Code 10 gd32f1x0_usart.o(.text) - usart_transmit_config 0x0800403f Thumb Code 16 gd32f1x0_usart.o(.text) - usart_receive_config 0x0800404f Thumb Code 16 gd32f1x0_usart.o(.text) - usart_data_transmit 0x0800405f Thumb Code 8 gd32f1x0_usart.o(.text) - usart_data_receive 0x08004067 Thumb Code 10 gd32f1x0_usart.o(.text) - usart_data_first_config 0x08004071 Thumb Code 28 gd32f1x0_usart.o(.text) - usart_invert_config 0x0800408d Thumb Code 110 gd32f1x0_usart.o(.text) - usart_overrun_enable 0x080040fb Thumb Code 18 gd32f1x0_usart.o(.text) - usart_overrun_disable 0x0800410d Thumb Code 18 gd32f1x0_usart.o(.text) - usart_oversample_config 0x0800411f Thumb Code 24 gd32f1x0_usart.o(.text) - usart_sample_bit_config 0x08004137 Thumb Code 24 gd32f1x0_usart.o(.text) - usart_autobaud_detection_enable 0x0800414f Thumb Code 10 gd32f1x0_usart.o(.text) - usart_autobaud_detection_disable 0x08004159 Thumb Code 10 gd32f1x0_usart.o(.text) - usart_autobaud_detection_mode_config 0x08004163 Thumb Code 16 gd32f1x0_usart.o(.text) - usart_mute_mode_enable 0x08004173 Thumb Code 10 gd32f1x0_usart.o(.text) - usart_mute_mode_disable 0x0800417d Thumb Code 10 gd32f1x0_usart.o(.text) - usart_mute_mode_wakeup_config 0x08004187 Thumb Code 24 gd32f1x0_usart.o(.text) - usart_address_detection_mode_config 0x0800419f Thumb Code 28 gd32f1x0_usart.o(.text) - usart_address_config 0x080041bb Thumb Code 32 gd32f1x0_usart.o(.text) - usart_receiver_timeout_enable 0x080041db Thumb Code 10 gd32f1x0_usart.o(.text) - usart_receiver_timeout_disable 0x080041e5 Thumb Code 10 gd32f1x0_usart.o(.text) - usart_receiver_timeout_config 0x080041ef Thumb Code 16 gd32f1x0_usart.o(.text) - usart_lin_mode_enable 0x080041ff Thumb Code 18 gd32f1x0_usart.o(.text) - usart_lin_mode_disable 0x08004211 Thumb Code 18 gd32f1x0_usart.o(.text) - usart_lin_break_dection_length_config 0x08004223 Thumb Code 20 gd32f1x0_usart.o(.text) - usart_halfduplex_enable 0x08004237 Thumb Code 18 gd32f1x0_usart.o(.text) - usart_halfduplex_disable 0x08004249 Thumb Code 18 gd32f1x0_usart.o(.text) - usart_clock_enable 0x0800425b Thumb Code 18 gd32f1x0_usart.o(.text) - usart_clock_disable 0x0800426d Thumb Code 18 gd32f1x0_usart.o(.text) - usart_synchronous_clock_config 0x0800427f Thumb Code 50 gd32f1x0_usart.o(.text) - usart_smartcard_mode_enable 0x080042b1 Thumb Code 18 gd32f1x0_usart.o(.text) - usart_smartcard_mode_disable 0x080042c3 Thumb Code 18 gd32f1x0_usart.o(.text) - usart_smartcard_mode_nack_enable 0x080042d5 Thumb Code 18 gd32f1x0_usart.o(.text) - usart_smartcard_mode_nack_disable 0x080042e7 Thumb Code 18 gd32f1x0_usart.o(.text) - usart_guard_time_config 0x080042f9 Thumb Code 36 gd32f1x0_usart.o(.text) - usart_block_length_config 0x0800431d Thumb Code 24 gd32f1x0_usart.o(.text) - usart_smartcard_autoretry_config 0x08004335 Thumb Code 32 gd32f1x0_usart.o(.text) - usart_irda_mode_enable 0x08004355 Thumb Code 18 gd32f1x0_usart.o(.text) - usart_irda_mode_disable 0x08004367 Thumb Code 18 gd32f1x0_usart.o(.text) - usart_irda_lowpower_config 0x08004379 Thumb Code 20 gd32f1x0_usart.o(.text) - usart_prescaler_config 0x0800438d Thumb Code 24 gd32f1x0_usart.o(.text) - usart_hardware_flow_rts_config 0x080043a5 Thumb Code 24 gd32f1x0_usart.o(.text) - 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gd32f1x0_usart.o(.text) - usart_flag_get 0x080044c9 Thumb Code 30 gd32f1x0_usart.o(.text) - usart_flag_clear 0x080044e7 Thumb Code 18 gd32f1x0_usart.o(.text) - usart_interrupt_enable 0x080044f9 Thumb Code 26 gd32f1x0_usart.o(.text) - usart_interrupt_disable 0x08004513 Thumb Code 26 gd32f1x0_usart.o(.text) - usart_command_enable 0x0800452d Thumb Code 8 gd32f1x0_usart.o(.text) - usart_interrupt_flag_get 0x08004535 Thumb Code 56 gd32f1x0_usart.o(.text) - usart_interrupt_flag_clear 0x0800456d Thumb Code 18 gd32f1x0_usart.o(.text) - Reset_Handler 0x08004581 Thumb Code 8 startup_gd32f1x0.o(.text) - ADC_CMP_IRQHandler 0x0800459b Thumb Code 0 startup_gd32f1x0.o(.text) - CAN0_RX0_IRQHandler 0x0800459b Thumb Code 0 startup_gd32f1x0.o(.text) - CAN0_RX1_IRQHandler 0x0800459b Thumb Code 0 startup_gd32f1x0.o(.text) - CAN0_SCE_IRQHandler 0x0800459b Thumb Code 0 startup_gd32f1x0.o(.text) - CAN0_TX_IRQHandler 0x0800459b Thumb Code 0 startup_gd32f1x0.o(.text) - CAN1_RX0_IRQHandler 0x0800459b Thumb Code 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0x08004913 Thumb Code 0 indicate_semi.o(.text) - blockPWM 0x08004913 Thumb Code 104 bldc.o(i.blockPWM) - __fpl_dcmp_Inf 0x0800497b Thumb Code 24 dcmpi.o(x$fpl$dcmpinf) - __aeabi_i2d 0x08004993 Thumb Code 0 dflt_clz.o(x$fpl$dflt) - _dflt 0x08004993 Thumb Code 46 dflt_clz.o(x$fpl$dflt) - __aeabi_cdcmple 0x080049c1 Thumb Code 0 dleqf.o(x$fpl$dleqf) - _dcmple 0x080049c1 Thumb Code 120 dleqf.o(x$fpl$dleqf) - __fpl_dcmple_InfNaN 0x08004a23 Thumb Code 0 dleqf.o(x$fpl$dleqf) - __fpl_dnaninf 0x08004a39 Thumb Code 156 dnaninf.o(x$fpl$dnaninf) - __aeabi_f2iz 0x08004ad5 Thumb Code 0 ffix.o(x$fpl$ffix) - _ffix 0x08004ad5 Thumb Code 54 ffix.o(x$fpl$ffix) - __aeabi_i2f 0x08004b0d Thumb Code 0 fflt_clz.o(x$fpl$fflt) - _fflt 0x08004b0d Thumb Code 48 fflt_clz.o(x$fpl$fflt) - __aeabi_fmul 0x08004b3d Thumb Code 0 fmul.o(x$fpl$fmul) - _fmul 0x08004b3d Thumb Code 258 fmul.o(x$fpl$fmul) - __fpl_fnaninf 0x08004c3f Thumb Code 140 fnaninf.o(x$fpl$fnaninf) - __fpl_fretinf 0x08004ccb Thumb Code 10 fretinf.o(x$fpl$fretinf) - __I$use$fp 0x08004cd4 Number 0 usenofp.o(x$fpl$usenofp) - pwm_res 0x08004cd4 Data 2 bldc.o(.constdata) - WHEEL_PERIMETER 0x08004cd8 Data 4 bldc.o(.constdata) - SPEED_TICKS_FACTOR 0x08004cdc Data 4 bldc.o(.constdata) - SINE_TICKS_FACTOR 0x08004ce0 Data 4 bldc.o(.constdata) - MIN_SPEED 0x08004ce4 Data 4 bldc.o(.constdata) - MAX_PHASE_PERIOD 0x08004ce8 Data 4 bldc.o(.constdata) - MM_PER_CYCLE_FLOAT 0x08004cec Data 4 bldc.o(.constdata) - sineTable 0x08004cf0 Data 720 bldc.o(.constdata) - hall_to_pos 0x08004fc0 Data 8 bldc.o(.constdata) - KF 0x08004fc8 Data 4 bldc.o(.constdata) - KFO 0x08004fcc Data 4 bldc.o(.constdata) - KP 0x08004fd0 Data 4 bldc.o(.constdata) - KI 0x08004fd4 Data 4 bldc.o(.constdata) - ILIMIT 0x08004fd8 Data 4 bldc.o(.constdata) - Region$$Table$$Base 0x08004fdc Number 0 anon$$obj.o(Region$$Table) - Region$$Table$$Limit 0x08004ffc Number 0 anon$$obj.o(Region$$Table) + CheckUSARTHUGSInput 0x0800182f Thumb Code 284 commshugs.o(.text) + UpdateUSARTHUGSInput 0x0800194b Thumb Code 188 commshugs.o(.text) + adc_deinit 0x08001a61 Thumb Code 20 gd32f1x0_adc.o(.text) + adc_enable 0x08001a75 Thumb Code 24 gd32f1x0_adc.o(.text) + adc_disable 0x08001a8d Thumb Code 14 gd32f1x0_adc.o(.text) + adc_calibration_enable 0x08001a9b Thumb Code 54 gd32f1x0_adc.o(.text) + adc_dma_mode_enable 0x08001ad1 Thumb Code 14 gd32f1x0_adc.o(.text) + adc_dma_mode_disable 0x08001adf Thumb Code 14 gd32f1x0_adc.o(.text) + adc_tempsensor_vrefint_enable 0x08001aed Thumb Code 14 gd32f1x0_adc.o(.text) + adc_tempsensor_vrefint_disable 0x08001afb Thumb Code 14 gd32f1x0_adc.o(.text) + adc_vbat_enable 0x08001b09 Thumb Code 14 gd32f1x0_adc.o(.text) + adc_vbat_disable 0x08001b17 Thumb Code 14 gd32f1x0_adc.o(.text) + adc_discontinuous_mode_config 0x08001b25 Thumb Code 94 gd32f1x0_adc.o(.text) + adc_special_function_config 0x08001b83 Thumb Code 130 gd32f1x0_adc.o(.text) + adc_data_alignment_config 0x08001c05 Thumb Code 30 gd32f1x0_adc.o(.text) + adc_channel_length_config 0x08001c23 Thumb Code 88 gd32f1x0_adc.o(.text) + adc_regular_channel_config 0x08001c7b Thumb Code 218 gd32f1x0_adc.o(.text) + adc_inserted_channel_config 0x08001d55 Thumb Code 146 gd32f1x0_adc.o(.text) + adc_inserted_channel_offset_config 0x08001de7 Thumb Code 42 gd32f1x0_adc.o(.text) + adc_external_trigger_config 0x08001e11 Thumb Code 88 gd32f1x0_adc.o(.text) + adc_external_trigger_source_config 0x08001e69 Thumb Code 60 gd32f1x0_adc.o(.text) + adc_software_trigger_enable 0x08001ea5 Thumb Code 38 gd32f1x0_adc.o(.text) + adc_regular_data_read 0x08001ecb Thumb Code 10 gd32f1x0_adc.o(.text) + adc_inserted_data_read 0x08001ed5 Thumb Code 60 gd32f1x0_adc.o(.text) + adc_flag_get 0x08001f11 Thumb Code 18 gd32f1x0_adc.o(.text) + adc_flag_clear 0x08001f23 Thumb Code 16 gd32f1x0_adc.o(.text) + adc_interrupt_flag_get 0x08001f33 Thumb Code 108 gd32f1x0_adc.o(.text) + adc_interrupt_flag_clear 0x08001f9f Thumb Code 16 gd32f1x0_adc.o(.text) + adc_interrupt_enable 0x08001faf Thumb Code 68 gd32f1x0_adc.o(.text) + adc_interrupt_disable 0x08001ff3 Thumb Code 68 gd32f1x0_adc.o(.text) + adc_watchdog_single_channel_enable 0x08002037 Thumb Code 40 gd32f1x0_adc.o(.text) + adc_watchdog_group_channel_enable 0x0800205f Thumb Code 92 gd32f1x0_adc.o(.text) + adc_watchdog_disable 0x080020bb Thumb Code 18 gd32f1x0_adc.o(.text) + adc_watchdog_threshold_config 0x080020cd Thumb Code 12 gd32f1x0_adc.o(.text) + dma_deinit 0x080020e5 Thumb Code 88 gd32f1x0_dma.o(.text) + dma_init 0x0800213d Thumb Code 270 gd32f1x0_dma.o(.text) + dma_circulation_enable 0x0800224b Thumb Code 30 gd32f1x0_dma.o(.text) + dma_circulation_disable 0x08002269 Thumb Code 30 gd32f1x0_dma.o(.text) + dma_memory_to_memory_enable 0x08002287 Thumb Code 30 gd32f1x0_dma.o(.text) + dma_memory_to_memory_disable 0x080022a5 Thumb Code 30 gd32f1x0_dma.o(.text) + dma_channel_enable 0x080022c3 Thumb Code 30 gd32f1x0_dma.o(.text) + dma_channel_disable 0x080022e1 Thumb Code 30 gd32f1x0_dma.o(.text) + dma_periph_address_config 0x080022ff Thumb Code 14 gd32f1x0_dma.o(.text) + dma_memory_address_config 0x0800230d Thumb Code 14 gd32f1x0_dma.o(.text) + dma_transfer_number_config 0x0800231b Thumb Code 14 gd32f1x0_dma.o(.text) + dma_transfer_number_get 0x08002329 Thumb Code 16 gd32f1x0_dma.o(.text) + dma_priority_config 0x08002339 Thumb Code 34 gd32f1x0_dma.o(.text) + dma_memory_width_config 0x0800235b Thumb Code 34 gd32f1x0_dma.o(.text) + dma_periph_width_config 0x0800237d Thumb Code 34 gd32f1x0_dma.o(.text) + dma_memory_increase_enable 0x0800239f Thumb Code 30 gd32f1x0_dma.o(.text) + dma_memory_increase_disable 0x080023bd Thumb Code 30 gd32f1x0_dma.o(.text) + dma_periph_increase_enable 0x080023db Thumb Code 30 gd32f1x0_dma.o(.text) + dma_periph_increase_disable 0x080023f9 Thumb Code 30 gd32f1x0_dma.o(.text) + dma_transfer_direction_config 0x08002417 Thumb Code 64 gd32f1x0_dma.o(.text) + dma_interrupt_flag_get 0x08002457 Thumb Code 196 gd32f1x0_dma.o(.text) + dma_interrupt_flag_clear 0x0800251b Thumb Code 18 gd32f1x0_dma.o(.text) + dma_interrupt_enable 0x0800252d Thumb Code 30 gd32f1x0_dma.o(.text) + dma_interrupt_disable 0x0800254b Thumb Code 30 gd32f1x0_dma.o(.text) + dma_flag_get 0x08002569 Thumb Code 26 gd32f1x0_dma.o(.text) + dma_flag_clear 0x08002583 Thumb Code 18 gd32f1x0_dma.o(.text) + fwdgt_write_disable 0x08002599 Thumb Code 8 gd32f1x0_fwdgt.o(.text) + fwdgt_counter_reload 0x080025a1 Thumb Code 10 gd32f1x0_fwdgt.o(.text) + fwdgt_enable 0x080025ab Thumb Code 10 gd32f1x0_fwdgt.o(.text) + fwdgt_window_value_config 0x080025b5 Thumb Code 54 gd32f1x0_fwdgt.o(.text) + fwdgt_config 0x080025eb Thumb Code 94 gd32f1x0_fwdgt.o(.text) + fwdgt_flag_get 0x08002649 Thumb Code 18 gd32f1x0_fwdgt.o(.text) + gpio_deinit 0x08002665 Thumb Code 140 gd32f1x0_gpio.o(.text) + gpio_mode_set 0x080026f1 Thumb Code 78 gd32f1x0_gpio.o(.text) + gpio_output_options_set 0x0800273f Thumb Code 66 gd32f1x0_gpio.o(.text) + gpio_bit_set 0x08002781 Thumb Code 4 gd32f1x0_gpio.o(.text) + gpio_bit_reset 0x08002785 Thumb Code 4 gd32f1x0_gpio.o(.text) + gpio_bit_write 0x08002789 Thumb Code 10 gd32f1x0_gpio.o(.text) + gpio_port_write 0x08002793 Thumb Code 4 gd32f1x0_gpio.o(.text) + gpio_input_bit_get 0x08002797 Thumb Code 16 gd32f1x0_gpio.o(.text) + gpio_input_port_get 0x080027a7 Thumb Code 8 gd32f1x0_gpio.o(.text) + gpio_output_bit_get 0x080027af Thumb Code 16 gd32f1x0_gpio.o(.text) + gpio_output_port_get 0x080027bf Thumb Code 8 gd32f1x0_gpio.o(.text) + gpio_af_set 0x080027c7 Thumb Code 94 gd32f1x0_gpio.o(.text) + gpio_pin_lock 0x08002825 Thumb Code 18 gd32f1x0_gpio.o(.text) + nvic_priority_group_set 0x08002841 Thumb Code 10 gd32f1x0_misc.o(.text) + nvic_irq_enable 0x0800284b Thumb Code 156 gd32f1x0_misc.o(.text) + nvic_irq_disable 0x080028e7 Thumb Code 18 gd32f1x0_misc.o(.text) + nvic_vector_table_set 0x080028f9 Thumb Code 14 gd32f1x0_misc.o(.text) + system_lowpower_set 0x08002907 Thumb Code 16 gd32f1x0_misc.o(.text) + system_lowpower_reset 0x08002917 Thumb Code 16 gd32f1x0_misc.o(.text) + systick_clksource_set 0x08002927 Thumb Code 40 gd32f1x0_misc.o(.text) + rcu_deinit 0x08002965 Thumb Code 112 gd32f1x0_rcu.o(.text) + rcu_periph_clock_enable 0x080029d5 Thumb Code 28 gd32f1x0_rcu.o(.text) + rcu_periph_clock_disable 0x080029f1 Thumb Code 28 gd32f1x0_rcu.o(.text) + rcu_periph_clock_sleep_enable 0x08002a0d Thumb Code 28 gd32f1x0_rcu.o(.text) + rcu_periph_clock_sleep_disable 0x08002a29 Thumb Code 28 gd32f1x0_rcu.o(.text) + rcu_periph_reset_enable 0x08002a45 Thumb Code 28 gd32f1x0_rcu.o(.text) + rcu_periph_reset_disable 0x08002a61 Thumb Code 28 gd32f1x0_rcu.o(.text) + rcu_bkp_reset_enable 0x08002a7d Thumb Code 14 gd32f1x0_rcu.o(.text) + rcu_bkp_reset_disable 0x08002a8b Thumb Code 14 gd32f1x0_rcu.o(.text) + rcu_system_clock_source_config 0x08002a99 Thumb Code 22 gd32f1x0_rcu.o(.text) + rcu_system_clock_source_get 0x08002aaf Thumb Code 10 gd32f1x0_rcu.o(.text) + rcu_ahb_clock_config 0x08002ab9 Thumb Code 22 gd32f1x0_rcu.o(.text) + rcu_apb1_clock_config 0x08002acf Thumb Code 22 gd32f1x0_rcu.o(.text) + rcu_apb2_clock_config 0x08002ae5 Thumb Code 22 gd32f1x0_rcu.o(.text) + rcu_adc_clock_config 0x08002afb Thumb Code 148 gd32f1x0_rcu.o(.text) + rcu_usbd_clock_config 0x08002b8f Thumb Code 22 gd32f1x0_rcu.o(.text) + rcu_ckout_config 0x08002ba5 Thumb Code 24 gd32f1x0_rcu.o(.text) + rcu_pll_config 0x08002bbd Thumb Code 28 gd32f1x0_rcu.o(.text) + rcu_usart_clock_config 0x08002bd9 Thumb Code 22 gd32f1x0_rcu.o(.text) + rcu_cec_clock_config 0x08002bef Thumb Code 22 gd32f1x0_rcu.o(.text) + rcu_rtc_clock_config 0x08002c05 Thumb Code 22 gd32f1x0_rcu.o(.text) + rcu_hxtal_prediv_config 0x08002c1b Thumb Code 20 gd32f1x0_rcu.o(.text) + rcu_lxtal_drive_capability_config 0x08002c2f Thumb Code 22 gd32f1x0_rcu.o(.text) + rcu_flag_get 0x08002c45 Thumb Code 30 gd32f1x0_rcu.o(.text) + rcu_all_reset_flag_clear 0x08002c63 Thumb Code 14 gd32f1x0_rcu.o(.text) + rcu_interrupt_flag_get 0x08002c71 Thumb Code 18 gd32f1x0_rcu.o(.text) + rcu_interrupt_flag_clear 0x08002c83 Thumb Code 12 gd32f1x0_rcu.o(.text) + rcu_interrupt_enable 0x08002c8f Thumb Code 12 gd32f1x0_rcu.o(.text) + rcu_interrupt_disable 0x08002c9b Thumb Code 12 gd32f1x0_rcu.o(.text) + rcu_osci_stab_wait 0x08002ca7 Thumb Code 284 gd32f1x0_rcu.o(.text) + rcu_osci_on 0x08002dc3 Thumb Code 28 gd32f1x0_rcu.o(.text) + rcu_osci_off 0x08002ddf Thumb Code 28 gd32f1x0_rcu.o(.text) + rcu_osci_bypass_mode_enable 0x08002dfb Thumb Code 94 gd32f1x0_rcu.o(.text) + rcu_osci_bypass_mode_disable 0x08002e59 Thumb Code 94 gd32f1x0_rcu.o(.text) + rcu_hxtal_clock_monitor_enable 0x08002eb7 Thumb Code 14 gd32f1x0_rcu.o(.text) + rcu_hxtal_clock_monitor_disable 0x08002ec5 Thumb Code 14 gd32f1x0_rcu.o(.text) + rcu_irc8m_adjust_value_set 0x08002ed3 Thumb Code 20 gd32f1x0_rcu.o(.text) + rcu_irc14m_adjust_value_set 0x08002ee7 Thumb Code 20 gd32f1x0_rcu.o(.text) + rcu_voltage_key_unlock 0x08002efb Thumb Code 28 gd32f1x0_rcu.o(.text) + rcu_deepsleep_voltage_set 0x08002f17 Thumb Code 30 gd32f1x0_rcu.o(.text) + rcu_power_down_voltage_set 0x08002f35 Thumb Code 30 gd32f1x0_rcu.o(.text) + rcu_clock_freq_get 0x08002f53 Thumb Code 690 gd32f1x0_rcu.o(.text) + timer_deinit 0x0800320d Thumb Code 210 gd32f1x0_timer.o(.text) + timer_init 0x080032df Thumb Code 126 gd32f1x0_timer.o(.text) + timer_enable 0x0800335d Thumb Code 10 gd32f1x0_timer.o(.text) + timer_disable 0x08003367 Thumb Code 10 gd32f1x0_timer.o(.text) + timer_auto_reload_shadow_enable 0x08003371 Thumb Code 10 gd32f1x0_timer.o(.text) + timer_auto_reload_shadow_disable 0x0800337b Thumb Code 10 gd32f1x0_timer.o(.text) + timer_update_event_enable 0x08003385 Thumb Code 10 gd32f1x0_timer.o(.text) + timer_update_event_disable 0x0800338f Thumb Code 10 gd32f1x0_timer.o(.text) + timer_counter_alignment 0x08003399 Thumb Code 16 gd32f1x0_timer.o(.text) + timer_counter_up_direction 0x080033a9 Thumb Code 14 gd32f1x0_timer.o(.text) + timer_counter_down_direction 0x080033b7 Thumb Code 18 gd32f1x0_timer.o(.text) + timer_prescaler_config 0x080033c9 Thumb Code 14 gd32f1x0_timer.o(.text) + timer_repetition_value_config 0x080033d7 Thumb Code 4 gd32f1x0_timer.o(.text) + timer_autoreload_value_config 0x080033db Thumb Code 4 gd32f1x0_timer.o(.text) + timer_counter_value_config 0x080033df Thumb Code 4 gd32f1x0_timer.o(.text) + timer_counter_read 0x080033e3 Thumb Code 8 gd32f1x0_timer.o(.text) + timer_prescaler_read 0x080033eb Thumb Code 10 gd32f1x0_timer.o(.text) + timer_single_pulse_mode_config 0x080033f5 Thumb Code 26 gd32f1x0_timer.o(.text) + timer_update_source_config 0x0800340f Thumb Code 26 gd32f1x0_timer.o(.text) + timer_interrupt_enable 0x08003429 Thumb Code 8 gd32f1x0_timer.o(.text) + timer_interrupt_disable 0x08003431 Thumb Code 8 gd32f1x0_timer.o(.text) + timer_interrupt_flag_get 0x08003439 Thumb Code 32 gd32f1x0_timer.o(.text) + timer_interrupt_flag_clear 0x08003459 Thumb Code 8 gd32f1x0_timer.o(.text) + timer_flag_get 0x08003461 Thumb Code 18 gd32f1x0_timer.o(.text) + timer_flag_clear 0x08003473 Thumb Code 8 gd32f1x0_timer.o(.text) + timer_dma_enable 0x0800347b Thumb Code 8 gd32f1x0_timer.o(.text) + timer_dma_disable 0x08003483 Thumb Code 8 gd32f1x0_timer.o(.text) + timer_channel_dma_request_source_select 0x0800348b Thumb Code 26 gd32f1x0_timer.o(.text) + timer_dma_transfer_config 0x080034a5 Thumb Code 24 gd32f1x0_timer.o(.text) + timer_event_software_generate 0x080034bd Thumb Code 8 gd32f1x0_timer.o(.text) + timer_break_config 0x080034c5 Thumb Code 30 gd32f1x0_timer.o(.text) + timer_break_enable 0x080034e3 Thumb Code 10 gd32f1x0_timer.o(.text) + timer_break_disable 0x080034ed Thumb Code 8 gd32f1x0_timer.o(.text) + timer_automatic_output_enable 0x080034f5 Thumb Code 10 gd32f1x0_timer.o(.text) + timer_automatic_output_disable 0x080034ff Thumb Code 8 gd32f1x0_timer.o(.text) + timer_primary_output_config 0x08003507 Thumb Code 22 gd32f1x0_timer.o(.text) + timer_channel_control_shadow_config 0x0800351d Thumb Code 22 gd32f1x0_timer.o(.text) + timer_channel_control_shadow_update_config 0x08003533 Thumb Code 26 gd32f1x0_timer.o(.text) + timer_channel_output_config 0x0800354d Thumb Code 472 gd32f1x0_timer.o(.text) + timer_channel_output_mode_config 0x08003725 Thumb Code 90 gd32f1x0_timer.o(.text) + timer_channel_output_pulse_value_config 0x0800377f Thumb Code 38 gd32f1x0_timer.o(.text) + timer_channel_output_shadow_config 0x080037a5 Thumb Code 90 gd32f1x0_timer.o(.text) + timer_channel_output_fast_config 0x080037ff Thumb Code 90 gd32f1x0_timer.o(.text) + timer_channel_output_clear_config 0x08003859 Thumb Code 90 gd32f1x0_timer.o(.text) + timer_channel_output_polarity_config 0x080038b3 Thumb Code 92 gd32f1x0_timer.o(.text) + timer_channel_complementary_output_polarity_config 0x0800390f Thumb Code 70 gd32f1x0_timer.o(.text) + timer_ocpre_clear_source_config 0x08003955 Thumb Code 26 gd32f1x0_timer.o(.text) + timer_channel_output_state_config 0x0800396f Thumb Code 92 gd32f1x0_timer.o(.text) + timer_channel_complementary_output_state_config 0x080039cb Thumb Code 70 gd32f1x0_timer.o(.text) + timer_channel_input_capture_prescaler_config 0x08003a11 Thumb Code 90 gd32f1x0_timer.o(.text) + timer_input_capture_config 0x08003a6b Thumb Code 332 gd32f1x0_timer.o(.text) + timer_channel_capture_value_register_read 0x08003bb7 Thumb Code 42 gd32f1x0_timer.o(.text) + timer_input_pwm_capture_config 0x08003be1 Thumb Code 352 gd32f1x0_timer.o(.text) + timer_hall_mode_config 0x08003d41 Thumb Code 26 gd32f1x0_timer.o(.text) + timer_input_trigger_source_select 0x08003d5b Thumb Code 16 gd32f1x0_timer.o(.text) + timer_master_output_trigger_source_select 0x08003d6b Thumb Code 16 gd32f1x0_timer.o(.text) + timer_slave_mode_select 0x08003d7b Thumb Code 16 gd32f1x0_timer.o(.text) + timer_master_slave_mode_config 0x08003d8b Thumb Code 26 gd32f1x0_timer.o(.text) + timer_external_trigger_config 0x08003da5 Thumb Code 30 gd32f1x0_timer.o(.text) + timer_quadrature_decoder_mode_config 0x08003dc3 Thumb Code 64 gd32f1x0_timer.o(.text) + timer_internal_clock_config 0x08003e03 Thumb Code 8 gd32f1x0_timer.o(.text) + timer_internal_trigger_as_external_clock_config 0x08003e0b Thumb Code 32 gd32f1x0_timer.o(.text) + timer_external_trigger_as_external_clock_config 0x08003e2b Thumb Code 164 gd32f1x0_timer.o(.text) + timer_external_clock_mode0_config 0x08003ecf Thumb Code 56 gd32f1x0_timer.o(.text) + timer_external_clock_mode1_config 0x08003f07 Thumb Code 32 gd32f1x0_timer.o(.text) + timer_external_clock_mode1_disable 0x08003f27 Thumb Code 10 gd32f1x0_timer.o(.text) + timer_channel_remap_config 0x08003f31 Thumb Code 6 gd32f1x0_timer.o(.text) + usart_deinit 0x08003f39 Thumb Code 58 gd32f1x0_usart.o(.text) + usart_baudrate_set 0x08003f73 Thumb Code 120 gd32f1x0_usart.o(.text) + usart_parity_config 0x08003feb Thumb Code 24 gd32f1x0_usart.o(.text) + usart_word_length_set 0x08004003 Thumb Code 24 gd32f1x0_usart.o(.text) + usart_stop_bit_set 0x0800401b Thumb Code 24 gd32f1x0_usart.o(.text) + usart_enable 0x08004033 Thumb Code 10 gd32f1x0_usart.o(.text) + usart_disable 0x0800403d Thumb Code 10 gd32f1x0_usart.o(.text) + usart_transmit_config 0x08004047 Thumb Code 16 gd32f1x0_usart.o(.text) + usart_receive_config 0x08004057 Thumb Code 16 gd32f1x0_usart.o(.text) + usart_data_transmit 0x08004067 Thumb Code 8 gd32f1x0_usart.o(.text) + usart_data_receive 0x0800406f Thumb Code 10 gd32f1x0_usart.o(.text) + usart_data_first_config 0x08004079 Thumb Code 28 gd32f1x0_usart.o(.text) + usart_invert_config 0x08004095 Thumb Code 110 gd32f1x0_usart.o(.text) + usart_overrun_enable 0x08004103 Thumb Code 18 gd32f1x0_usart.o(.text) + usart_overrun_disable 0x08004115 Thumb Code 18 gd32f1x0_usart.o(.text) + usart_oversample_config 0x08004127 Thumb Code 24 gd32f1x0_usart.o(.text) + usart_sample_bit_config 0x0800413f Thumb Code 24 gd32f1x0_usart.o(.text) + usart_autobaud_detection_enable 0x08004157 Thumb Code 10 gd32f1x0_usart.o(.text) + usart_autobaud_detection_disable 0x08004161 Thumb Code 10 gd32f1x0_usart.o(.text) + usart_autobaud_detection_mode_config 0x0800416b Thumb Code 16 gd32f1x0_usart.o(.text) + usart_mute_mode_enable 0x0800417b Thumb Code 10 gd32f1x0_usart.o(.text) + usart_mute_mode_disable 0x08004185 Thumb Code 10 gd32f1x0_usart.o(.text) + usart_mute_mode_wakeup_config 0x0800418f Thumb Code 24 gd32f1x0_usart.o(.text) + usart_address_detection_mode_config 0x080041a7 Thumb Code 28 gd32f1x0_usart.o(.text) + usart_address_config 0x080041c3 Thumb Code 32 gd32f1x0_usart.o(.text) + usart_receiver_timeout_enable 0x080041e3 Thumb Code 10 gd32f1x0_usart.o(.text) + usart_receiver_timeout_disable 0x080041ed Thumb Code 10 gd32f1x0_usart.o(.text) + usart_receiver_timeout_config 0x080041f7 Thumb Code 16 gd32f1x0_usart.o(.text) + usart_lin_mode_enable 0x08004207 Thumb Code 18 gd32f1x0_usart.o(.text) + usart_lin_mode_disable 0x08004219 Thumb Code 18 gd32f1x0_usart.o(.text) + usart_lin_break_dection_length_config 0x0800422b Thumb Code 20 gd32f1x0_usart.o(.text) + usart_halfduplex_enable 0x0800423f Thumb Code 18 gd32f1x0_usart.o(.text) + usart_halfduplex_disable 0x08004251 Thumb Code 18 gd32f1x0_usart.o(.text) + usart_clock_enable 0x08004263 Thumb Code 18 gd32f1x0_usart.o(.text) + usart_clock_disable 0x08004275 Thumb Code 18 gd32f1x0_usart.o(.text) + usart_synchronous_clock_config 0x08004287 Thumb Code 50 gd32f1x0_usart.o(.text) + usart_smartcard_mode_enable 0x080042b9 Thumb Code 18 gd32f1x0_usart.o(.text) + usart_smartcard_mode_disable 0x080042cb Thumb Code 18 gd32f1x0_usart.o(.text) + usart_smartcard_mode_nack_enable 0x080042dd Thumb Code 18 gd32f1x0_usart.o(.text) + usart_smartcard_mode_nack_disable 0x080042ef Thumb Code 18 gd32f1x0_usart.o(.text) + usart_guard_time_config 0x08004301 Thumb Code 36 gd32f1x0_usart.o(.text) + usart_block_length_config 0x08004325 Thumb Code 24 gd32f1x0_usart.o(.text) + usart_smartcard_autoretry_config 0x0800433d Thumb Code 32 gd32f1x0_usart.o(.text) + usart_irda_mode_enable 0x0800435d Thumb Code 18 gd32f1x0_usart.o(.text) + usart_irda_mode_disable 0x0800436f Thumb Code 18 gd32f1x0_usart.o(.text) + usart_irda_lowpower_config 0x08004381 Thumb Code 20 gd32f1x0_usart.o(.text) + usart_prescaler_config 0x08004395 Thumb Code 24 gd32f1x0_usart.o(.text) + usart_hardware_flow_rts_config 0x080043ad Thumb Code 24 gd32f1x0_usart.o(.text) + usart_hardware_flow_cts_config 0x080043c5 Thumb Code 24 gd32f1x0_usart.o(.text) + usart_rs485_driver_enable 0x080043dd Thumb Code 18 gd32f1x0_usart.o(.text) + usart_rs485_driver_disable 0x080043ef Thumb Code 18 gd32f1x0_usart.o(.text) + usart_driver_assertime_config 0x08004401 Thumb Code 32 gd32f1x0_usart.o(.text) + usart_driver_deassertime_config 0x08004421 Thumb Code 32 gd32f1x0_usart.o(.text) + usart_depolarity_config 0x08004441 Thumb Code 28 gd32f1x0_usart.o(.text) + usart_dma_receive_config 0x0800445d Thumb Code 16 gd32f1x0_usart.o(.text) + usart_dma_transmit_config 0x0800446d Thumb Code 16 gd32f1x0_usart.o(.text) + usart_reception_error_dma_disable 0x0800447d Thumb Code 18 gd32f1x0_usart.o(.text) + usart_reception_error_dma_enable 0x0800448f Thumb Code 18 gd32f1x0_usart.o(.text) + usart_wakeup_enable 0x080044a1 Thumb Code 10 gd32f1x0_usart.o(.text) + usart_wakeup_disable 0x080044ab Thumb Code 10 gd32f1x0_usart.o(.text) + usart_wakeup_mode_config 0x080044b5 Thumb Code 28 gd32f1x0_usart.o(.text) + usart_flag_get 0x080044d1 Thumb Code 30 gd32f1x0_usart.o(.text) + usart_flag_clear 0x080044ef Thumb Code 18 gd32f1x0_usart.o(.text) + usart_interrupt_enable 0x08004501 Thumb Code 26 gd32f1x0_usart.o(.text) + usart_interrupt_disable 0x0800451b Thumb Code 26 gd32f1x0_usart.o(.text) + usart_command_enable 0x08004535 Thumb Code 8 gd32f1x0_usart.o(.text) + usart_interrupt_flag_get 0x0800453d Thumb Code 56 gd32f1x0_usart.o(.text) + usart_interrupt_flag_clear 0x08004575 Thumb Code 18 gd32f1x0_usart.o(.text) + Reset_Handler 0x08004589 Thumb Code 8 startup_gd32f1x0.o(.text) + ADC_CMP_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + CAN0_RX0_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + CAN0_RX1_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + CAN0_SCE_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + CAN0_TX_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + CAN1_RX0_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + CAN1_RX1_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + CAN1_SCE_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + CAN1_TX_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + CEC_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + DMA_Channel5_6_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + EXTI0_1_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + EXTI2_3_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + EXTI4_15_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + FMC_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + I2C0_ER_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + I2C0_EV_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + I2C1_ER_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + I2C1_EV_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + I2C2_ER_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + I2C2_EV_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + LVD_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + RCU_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + RTC_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + SLCD_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + SPI0_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + SPI1_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + SPI2_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + TIMER0_Channel_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + TIMER14_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + TIMER15_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + TIMER16_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + TIMER1_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + TIMER2_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + TIMER5_DAC_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + TSI_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + USART0_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + USART1_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + USBDWakeUp_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + USBD_HP_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + USBD_LP_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + WWDGT_IRQHandler 0x080045a3 Thumb Code 0 startup_gd32f1x0.o(.text) + __user_initial_stackheap 0x080045a5 Thumb Code 10 startup_gd32f1x0.o(.text) + SystemInit 0x0800463b Thumb Code 118 system_gd32f1x0.o(.text) + SystemCoreClockUpdate 0x080046b1 Thumb Code 208 system_gd32f1x0.o(.text) + __aeabi_memcpy 0x080047b5 Thumb Code 0 rt_memcpy_v6.o(.text) + __rt_memcpy 0x080047b5 Thumb Code 138 rt_memcpy_v6.o(.text) + _memcpy_lastbytes 0x0800481b Thumb Code 0 rt_memcpy_v6.o(.text) + __aeabi_memcpy4 0x0800483f Thumb Code 0 rt_memcpy_w.o(.text) + __aeabi_memcpy8 0x0800483f Thumb Code 0 rt_memcpy_w.o(.text) + __rt_memcpy_w 0x0800483f Thumb Code 100 rt_memcpy_w.o(.text) + _memcpy_lastbytes_aligned 0x08004887 Thumb Code 0 rt_memcpy_w.o(.text) + __use_two_region_memory 0x080048a3 Thumb Code 2 heapauxi.o(.text) + __rt_heap_escrow$2region 0x080048a5 Thumb Code 2 heapauxi.o(.text) + __rt_heap_expand$2region 0x080048a7 Thumb Code 2 heapauxi.o(.text) + __user_setup_stackheap 0x080048a9 Thumb Code 74 sys_stackheap_outer.o(.text) + exit 0x080048f3 Thumb Code 18 exit.o(.text) + __user_libspace 0x08004905 Thumb Code 8 libspace.o(.text) + __user_perproc_libspace 0x08004905 Thumb Code 0 libspace.o(.text) + __user_perthread_libspace 0x08004905 Thumb Code 0 libspace.o(.text) + _sys_exit 0x0800490d Thumb Code 8 sys_exit.o(.text) + __I$use$semihosting 0x08004919 Thumb Code 0 use_no_semi.o(.text) + __use_no_semihosting_swi 0x08004919 Thumb Code 2 use_no_semi.o(.text) + __semihosting_library_function 0x0800491b Thumb Code 0 indicate_semi.o(.text) + blockPWM 0x0800491b Thumb Code 104 bldc.o(i.blockPWM) + __fpl_dcmp_Inf 0x08004983 Thumb Code 24 dcmpi.o(x$fpl$dcmpinf) + __aeabi_i2d 0x0800499b Thumb Code 0 dflt_clz.o(x$fpl$dflt) + _dflt 0x0800499b Thumb Code 46 dflt_clz.o(x$fpl$dflt) + __aeabi_cdcmple 0x080049c9 Thumb Code 0 dleqf.o(x$fpl$dleqf) + _dcmple 0x080049c9 Thumb Code 120 dleqf.o(x$fpl$dleqf) + __fpl_dcmple_InfNaN 0x08004a2b Thumb Code 0 dleqf.o(x$fpl$dleqf) + __fpl_dnaninf 0x08004a41 Thumb Code 156 dnaninf.o(x$fpl$dnaninf) + __aeabi_f2iz 0x08004add Thumb Code 0 ffix.o(x$fpl$ffix) + _ffix 0x08004add Thumb Code 54 ffix.o(x$fpl$ffix) + __aeabi_i2f 0x08004b15 Thumb Code 0 fflt_clz.o(x$fpl$fflt) + _fflt 0x08004b15 Thumb Code 48 fflt_clz.o(x$fpl$fflt) + __aeabi_fmul 0x08004b45 Thumb Code 0 fmul.o(x$fpl$fmul) + _fmul 0x08004b45 Thumb Code 258 fmul.o(x$fpl$fmul) + __fpl_fnaninf 0x08004c47 Thumb Code 140 fnaninf.o(x$fpl$fnaninf) + __fpl_fretinf 0x08004cd3 Thumb Code 10 fretinf.o(x$fpl$fretinf) + __I$use$fp 0x08004cdc Number 0 usenofp.o(x$fpl$usenofp) + pwm_res 0x08004cdc Data 2 bldc.o(.constdata) + WHEEL_PERIMETER 0x08004ce0 Data 4 bldc.o(.constdata) + SPEED_TICKS_FACTOR 0x08004ce4 Data 4 bldc.o(.constdata) + SINE_TICKS_FACTOR 0x08004ce8 Data 4 bldc.o(.constdata) + MIN_SPEED 0x08004cec Data 4 bldc.o(.constdata) + MAX_PHASE_PERIOD 0x08004cf0 Data 4 bldc.o(.constdata) + MM_PER_CYCLE_FLOAT 0x08004cf4 Data 4 bldc.o(.constdata) + sineTable 0x08004cf8 Data 720 bldc.o(.constdata) + hall_to_pos 0x08004fc8 Data 8 bldc.o(.constdata) + KF 0x08004fd0 Data 4 bldc.o(.constdata) + KFO 0x08004fd4 Data 4 bldc.o(.constdata) + KP 0x08004fd8 Data 4 bldc.o(.constdata) + KI 0x08004fdc Data 4 bldc.o(.constdata) + ILIMIT 0x08004fe0 Data 4 bldc.o(.constdata) + Region$$Table$$Base 0x08004fe4 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x08005004 Number 0 anon$$obj.o(Region$$Table) activateWeakening 0x20000000 Data 1 main.o(.data) command_timeout_counter 0x20000002 Data 2 main.o(.data) inactivity_timeout_counter 0x20000004 Data 4 main.o(.data) @@ -1074,9 +1074,9 @@ Memory Map of the image Image Entry point : 0x08000169 - Load Region LR_IROM1 (Base: 0x08000000, Size: 0x0000509c, Max: 0x00010000, ABSOLUTE) + Load Region LR_IROM1 (Base: 0x08000000, Size: 0x000050a4, Max: 0x00010000, ABSOLUTE) - Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00004ffc, Max: 0x00010000, ABSOLUTE) + Execution Region ER_IROM1 (Exec base: 0x08000000, Load base: 0x08000000, Size: 0x00005004, Max: 0x00010000, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object @@ -1134,60 +1134,60 @@ Memory Map of the image 0x0800141c 0x0800141c 0x00000104 Code RO 209 .text it.o 0x08001520 0x08001520 0x00000070 Code RO 243 .text comms.o 0x08001590 0x08001590 0x000000b4 Code RO 267 .text commssteering.o - 0x08001644 0x08001644 0x00000414 Code RO 321 .text commshugs.o - 0x08001a58 0x08001a58 0x00000684 Code RO 350 .text gd32f1x0_adc.o - 0x080020dc 0x080020dc 0x000004b4 Code RO 398 .text gd32f1x0_dma.o - 0x08002590 0x08002590 0x000000cc Code RO 422 .text gd32f1x0_fwdgt.o - 0x0800265c 0x0800265c 0x000001dc Code RO 446 .text gd32f1x0_gpio.o - 0x08002838 0x08002838 0x00000124 Code RO 494 .text gd32f1x0_misc.o - 0x0800295c 0x0800295c 0x000008a8 Code RO 546 .text gd32f1x0_rcu.o - 0x08003204 0x08003204 0x00000d2a Code RO 594 .text gd32f1x0_timer.o - 0x08003f2e 0x08003f2e 0x00000002 PAD - 0x08003f30 0x08003f30 0x0000064e Code RO 618 .text gd32f1x0_usart.o - 0x0800457e 0x0800457e 0x00000002 PAD - 0x08004580 0x08004580 0x00000040 Code RO 666 .text startup_gd32f1x0.o - 0x080045c0 0x080045c0 0x000001ec Code RO 673 .text system_gd32f1x0.o - 0x080047ac 0x080047ac 0x0000008a Code RO 702 .text c_w.l(rt_memcpy_v6.o) - 0x08004836 0x08004836 0x00000064 Code RO 704 .text c_w.l(rt_memcpy_w.o) - 0x0800489a 0x0800489a 0x00000006 Code RO 706 .text c_w.l(heapauxi.o) - 0x080048a0 0x080048a0 0x0000004a Code RO 755 .text c_w.l(sys_stackheap_outer.o) - 0x080048ea 0x080048ea 0x00000012 Code RO 757 .text c_w.l(exit.o) - 0x080048fc 0x080048fc 0x00000008 Code RO 765 .text c_w.l(libspace.o) - 0x08004904 0x08004904 0x0000000c Code RO 826 .text c_w.l(sys_exit.o) - 0x08004910 0x08004910 0x00000002 Code RO 837 .text c_w.l(use_no_semi.o) - 0x08004912 0x08004912 0x00000000 Code RO 839 .text c_w.l(indicate_semi.o) - 0x08004912 0x08004912 0x00000068 Code RO 163 i.blockPWM bldc.o - 0x0800497a 0x0800497a 0x00000018 Code RO 731 x$fpl$dcmpinf fz_ws.l(dcmpi.o) - 0x08004992 0x08004992 0x0000002e Code RO 711 x$fpl$dflt fz_ws.l(dflt_clz.o) - 0x080049c0 0x080049c0 0x00000078 Code RO 716 x$fpl$dleqf fz_ws.l(dleqf.o) - 0x08004a38 0x08004a38 0x0000009c Code RO 733 x$fpl$dnaninf fz_ws.l(dnaninf.o) - 0x08004ad4 0x08004ad4 0x00000036 Code RO 718 x$fpl$ffix fz_ws.l(ffix.o) - 0x08004b0a 0x08004b0a 0x00000002 PAD - 0x08004b0c 0x08004b0c 0x00000030 Code RO 723 x$fpl$fflt fz_ws.l(fflt_clz.o) - 0x08004b3c 0x08004b3c 0x00000102 Code RO 728 x$fpl$fmul fz_ws.l(fmul.o) - 0x08004c3e 0x08004c3e 0x0000008c Code RO 735 x$fpl$fnaninf fz_ws.l(fnaninf.o) - 0x08004cca 0x08004cca 0x0000000a Code RO 737 x$fpl$fretinf fz_ws.l(fretinf.o) - 0x08004cd4 0x08004cd4 0x00000000 Code RO 739 x$fpl$usenofp fz_ws.l(usenofp.o) - 0x08004cd4 0x08004cd4 0x00000308 Data RO 142 .constdata bldc.o - 0x08004fdc 0x08004fdc 0x00000020 Data RO 892 Region$$Table anon$$obj.o + 0x08001644 0x08001644 0x0000041c Code RO 321 .text commshugs.o + 0x08001a60 0x08001a60 0x00000684 Code RO 350 .text gd32f1x0_adc.o + 0x080020e4 0x080020e4 0x000004b4 Code RO 398 .text gd32f1x0_dma.o + 0x08002598 0x08002598 0x000000cc Code RO 422 .text gd32f1x0_fwdgt.o + 0x08002664 0x08002664 0x000001dc Code RO 446 .text gd32f1x0_gpio.o + 0x08002840 0x08002840 0x00000124 Code RO 494 .text gd32f1x0_misc.o + 0x08002964 0x08002964 0x000008a8 Code RO 546 .text gd32f1x0_rcu.o + 0x0800320c 0x0800320c 0x00000d2a Code RO 594 .text gd32f1x0_timer.o + 0x08003f36 0x08003f36 0x00000002 PAD + 0x08003f38 0x08003f38 0x0000064e Code RO 618 .text gd32f1x0_usart.o + 0x08004586 0x08004586 0x00000002 PAD + 0x08004588 0x08004588 0x00000040 Code RO 666 .text startup_gd32f1x0.o + 0x080045c8 0x080045c8 0x000001ec Code RO 673 .text system_gd32f1x0.o + 0x080047b4 0x080047b4 0x0000008a Code RO 702 .text c_w.l(rt_memcpy_v6.o) + 0x0800483e 0x0800483e 0x00000064 Code RO 704 .text c_w.l(rt_memcpy_w.o) + 0x080048a2 0x080048a2 0x00000006 Code RO 706 .text c_w.l(heapauxi.o) + 0x080048a8 0x080048a8 0x0000004a Code RO 755 .text c_w.l(sys_stackheap_outer.o) + 0x080048f2 0x080048f2 0x00000012 Code RO 757 .text c_w.l(exit.o) + 0x08004904 0x08004904 0x00000008 Code RO 765 .text c_w.l(libspace.o) + 0x0800490c 0x0800490c 0x0000000c Code RO 826 .text c_w.l(sys_exit.o) + 0x08004918 0x08004918 0x00000002 Code RO 837 .text c_w.l(use_no_semi.o) + 0x0800491a 0x0800491a 0x00000000 Code RO 839 .text c_w.l(indicate_semi.o) + 0x0800491a 0x0800491a 0x00000068 Code RO 163 i.blockPWM bldc.o + 0x08004982 0x08004982 0x00000018 Code RO 731 x$fpl$dcmpinf fz_ws.l(dcmpi.o) + 0x0800499a 0x0800499a 0x0000002e Code RO 711 x$fpl$dflt fz_ws.l(dflt_clz.o) + 0x080049c8 0x080049c8 0x00000078 Code RO 716 x$fpl$dleqf fz_ws.l(dleqf.o) + 0x08004a40 0x08004a40 0x0000009c Code RO 733 x$fpl$dnaninf fz_ws.l(dnaninf.o) + 0x08004adc 0x08004adc 0x00000036 Code RO 718 x$fpl$ffix fz_ws.l(ffix.o) + 0x08004b12 0x08004b12 0x00000002 PAD + 0x08004b14 0x08004b14 0x00000030 Code RO 723 x$fpl$fflt fz_ws.l(fflt_clz.o) + 0x08004b44 0x08004b44 0x00000102 Code RO 728 x$fpl$fmul fz_ws.l(fmul.o) + 0x08004c46 0x08004c46 0x0000008c Code RO 735 x$fpl$fnaninf fz_ws.l(fnaninf.o) + 0x08004cd2 0x08004cd2 0x0000000a Code RO 737 x$fpl$fretinf fz_ws.l(fretinf.o) + 0x08004cdc 0x08004cdc 0x00000000 Code RO 739 x$fpl$usenofp fz_ws.l(usenofp.o) + 0x08004cdc 0x08004cdc 0x00000308 Data RO 142 .constdata bldc.o + 0x08004fe4 0x08004fe4 0x00000020 Data RO 892 Region$$Table anon$$obj.o - Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x08004ffc, Size: 0x00000998, Max: 0x00002000, ABSOLUTE) + Execution Region RW_IRAM1 (Exec base: 0x20000000, Load base: 0x08005004, Size: 0x00000998, Max: 0x00002000, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object - 0x20000000 0x08004ffc 0x00000008 Data RW 5 .data main.o - 0x20000008 0x08005004 0x00000072 Data RW 143 .data bldc.o - 0x2000007a 0x08005076 0x00000002 Data RW 182 .data setup.o - 0x2000007c 0x08005078 0x00000009 Data RW 210 .data it.o - 0x20000085 0x08005081 0x0000000a Data RW 268 .data commssteering.o - 0x2000008f 0x0800508b 0x00000001 PAD - 0x20000090 0x0800508c 0x0000000b Data RW 323 .data commshugs.o - 0x2000009b 0x08005097 0x00000001 PAD - 0x2000009c 0x08005098 0x00000004 Data RW 674 .data system_gd32f1x0.o + 0x20000000 0x08005004 0x00000008 Data RW 5 .data main.o + 0x20000008 0x0800500c 0x00000072 Data RW 143 .data bldc.o + 0x2000007a 0x0800507e 0x00000002 Data RW 182 .data setup.o + 0x2000007c 0x08005080 0x00000009 Data RW 210 .data it.o + 0x20000085 0x08005089 0x0000000a Data RW 268 .data commssteering.o + 0x2000008f 0x08005093 0x00000001 PAD + 0x20000090 0x08005094 0x0000000b Data RW 323 .data commshugs.o + 0x2000009b 0x0800509f 0x00000001 PAD + 0x2000009c 0x080050a0 0x00000004 Data RW 674 .data system_gd32f1x0.o 0x200000a0 - 0x00000084 Zero RW 181 .bss setup.o 0x20000124 - 0x00000011 Zero RW 322 .bss commshugs.o - 0x20000135 0x0800509c 0x00000003 PAD + 0x20000135 0x080050a4 0x00000003 PAD 0x20000138 - 0x00000060 Zero RW 766 .bss c_w.l(libspace.o) 0x20000198 - 0x00000400 Zero RW 664 HEAP startup_gd32f1x0.o 0x20000598 - 0x00000400 Zero RW 663 STACK startup_gd32f1x0.o @@ -1202,7 +1202,7 @@ Image component sizes 2140 314 776 114 0 6967 bldc.o 112 0 0 0 0 1185 comms.o - 1044 94 0 11 17 3742 commshugs.o + 1052 96 0 11 17 3750 commshugs.o 180 20 0 10 0 1913 commssteering.o 1668 22 0 0 0 6861 gd32f1x0_adc.o 1204 8 0 0 0 5807 gd32f1x0_dma.o @@ -1219,7 +1219,7 @@ Image component sizes 492 52 0 4 0 1893 system_gd32f1x0.o ---------------------------------------------------------------------- - 17936 862 1168 160 2200 172732 Object Totals + 17944 864 1168 160 2200 172740 Object Totals 0 0 32 0 0 0 (incl. Generated) 4 0 0 2 3 0 (incl. Padding) @@ -1281,15 +1281,15 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug - 19308 898 1168 160 2296 171672 Grand Totals - 19308 898 1168 160 2296 171672 ELF Image Totals - 19308 898 1168 160 0 0 ROM Totals + 19316 900 1168 160 2296 171680 Grand Totals + 19316 900 1168 160 2296 171680 ELF Image Totals + 19316 900 1168 160 0 0 ROM Totals ============================================================================== - Total RO Size (Code + RO Data) 20476 ( 20.00kB) + Total RO Size (Code + RO Data) 20484 ( 20.00kB) Total RW Size (RW Data + ZI Data) 2456 ( 2.40kB) - Total ROM Size (Code + RO Data + RW Data) 20636 ( 20.15kB) + Total ROM Size (Code + RO Data + RW Data) 20644 ( 20.16kB) ============================================================================== diff --git a/HUGS/Objects/HUGS.axf b/HUGS/Objects/HUGS.axf index 90e458f..59f99e8 100644 Binary files a/HUGS/Objects/HUGS.axf and b/HUGS/Objects/HUGS.axf differ diff --git a/HUGS/Objects/HUGS.build_log.htm b/HUGS/Objects/HUGS.build_log.htm index 59cf5a5..985e654 100644 --- a/HUGS/Objects/HUGS.build_log.htm +++ b/HUGS/Objects/HUGS.build_log.htm @@ -29,7 +29,7 @@

Output:

Build target 'Target 1' compiling commsHUGS.c... linking... -Program Size: Code=19308 RO-data=1168 RW-data=160 ZI-data=2296 +Program Size: Code=19316 RO-data=1168 RW-data=160 ZI-data=2296 FromELF: creating hex file... ".\Objects\HUGS.axf" - 0 Error(s), 0 Warning(s). @@ -73,67 +73,67 @@

Collection of Component Files used:

* Component: ARM::CMSIS:CORE:5.3.0 * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:ADC:3.1.0 - Include file: Device\Firmware\Peripherals\inc\gd32f1x0_adc.h Source file: Device\Firmware\Peripherals\src\gd32f1x0_adc.c + Include file: Device\Firmware\Peripherals\inc\gd32f1x0_adc.h * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:DMA:3.1.0 Source file: Device\Firmware\Peripherals\src\gd32f1x0_dma.c Include file: Device\Firmware\Peripherals\inc\gd32f1x0_dma.h * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:FWDGT:3.1.0 - Source file: Device\Firmware\Peripherals\src\gd32f1x0_fwdgt.c Include file: Device\Firmware\Peripherals\inc\gd32f1x0_fwdgt.h + Source file: Device\Firmware\Peripherals\src\gd32f1x0_fwdgt.c * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:GPIO:3.1.0 - Source file: Device\Firmware\Peripherals\src\gd32f1x0_gpio.c Include file: Device\Firmware\Peripherals\inc\gd32f1x0_gpio.h + Source file: Device\Firmware\Peripherals\src\gd32f1x0_gpio.c * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:I2C:3.1.0 - Include file: Device\Firmware\Peripherals\inc\gd32f1x0_i2c.h Source file: Device\Firmware\Peripherals\src\gd32f1x0_i2c.c + Include file: Device\Firmware\Peripherals\inc\gd32f1x0_i2c.h * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:MCUDBG:3.1.0 - Source file: Device\Firmware\Peripherals\src\gd32f1x0_dbg.c Include file: Device\Firmware\Peripherals\inc\gd32f1x0_dbg.h + Source file: Device\Firmware\Peripherals\src\gd32f1x0_dbg.c * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:MISC:3.1.0 Include file: Device\Firmware\Peripherals\inc\gd32f1x0_misc.h Source file: Device\Firmware\Peripherals\src\gd32f1x0_misc.c * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:OPA:3.1.0 - Include file: Device\Firmware\Peripherals\inc\gd32f1x0_opa.h Source file: Device\Firmware\Peripherals\src\gd32f1x0_opa.c + Include file: Device\Firmware\Peripherals\inc\gd32f1x0_opa.h * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:PMU:3.1.0 Source file: Device\Firmware\Peripherals\src\gd32f1x0_pmu.c Include file: Device\Firmware\Peripherals\inc\gd32f1x0_pmu.h * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:RCU:3.1.0 - Include file: Device\Firmware\Peripherals\inc\gd32f1x0_rcu.h Source file: Device\Firmware\Peripherals\src\gd32f1x0_rcu.c + Include file: Device\Firmware\Peripherals\inc\gd32f1x0_rcu.h * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:SYSCFG:3.1.0 - Include file: Device\Firmware\Peripherals\inc\gd32f1x0_syscfg.h Source file: Device\Firmware\Peripherals\src\gd32f1x0_syscfg.c + Include file: Device\Firmware\Peripherals\inc\gd32f1x0_syscfg.h * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:TIMER:3.1.0 - Include file: Device\Firmware\Peripherals\inc\gd32f1x0_timer.h Source file: Device\Firmware\Peripherals\src\gd32f1x0_timer.c + Include file: Device\Firmware\Peripherals\inc\gd32f1x0_timer.h * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:USART:3.1.0 Include file: Device\Firmware\Peripherals\inc\gd32f1x0_usart.h Source file: Device\Firmware\Peripherals\src\gd32f1x0_usart.c * Component: GigaDevice::Device:GD32F1x0_StdPeripherals:WWDGT:3.1.0 - Source file: Device\Firmware\Peripherals\src\gd32f1x0_wwdgt.c Include file: Device\Firmware\Peripherals\inc\gd32f1x0_wwdgt.h + Source file: Device\Firmware\Peripherals\src\gd32f1x0_wwdgt.c * Component: GigaDevice::Device:GD32F1x0_libopt:3.1.0 Include file: Device\Include\gd32f1x0_libopt.h * Component: GigaDevice::Device:Startup:3.1.0 - Source file: Device\Source\system_gd32f1x0.c Source file: Device\Source\startup_gd32f1x0.s + Source file: Device\Source\system_gd32f1x0.c Include file: Device\Include\gd32f1x0.h Build Time Elapsed: 00:00:01 diff --git a/HUGS/Objects/HUGS.hex b/HUGS/Objects/HUGS.hex index 69178af..9da5cef 100644 --- a/HUGS/Objects/HUGS.hex +++ b/HUGS/Objects/HUGS.hex @@ -1,59 +1,59 @@ :020000040800F2 -:100000009809002081450008EF140008F114000849 +:100000009809002089450008EF140008F114000841 :10001000F5140008F9140008FD14000800000000A1 :1000200000000000000000000000000001150008B2 :100030000315000800000000051500081D14000845 -:100040009B4500089B4500089B4500089B45000810 -:100050009B4500089B4500089B4500089B45000800 -:100060009B45000887140008A1140008BB14000871 -:100070009B450008751400089B4500089B45000837 -:100080009B4500089B450008000000003114000853 -:100090009B4500089B4500089B4500089B450008C0 -:1000A0009B4500089B4500089B4500089B450008B0 -:1000B0009B450008000000009B4500080000000070 -:1000C0009B450008000000009B4500089B45000878 -:1000D0009B4500089B4500089B4500080000000068 -:1000E00000000000000000009B4500089B45000840 -:1000F0009B4500089B4500089B4500089B45000860 -:100100009B45000800000000000000009B4500081F +:10004000A3450008A3450008A3450008A3450008F0 +:10005000A3450008A3450008A3450008A3450008E0 +:10006000A345000887140008A1140008BB14000869 +:10007000A345000875140008A3450008A34500081F +:10008000A3450008A3450008000000003114000843 +:10009000A3450008A3450008A3450008A3450008A0 +:1000A000A3450008A3450008A3450008A345000890 +:1000B000A345000800000000A34500080000000060 +:1000C000A345000800000000A3450008A345000860 +:1000D000A3450008A3450008A34500080000000050 +:1000E0000000000000000000A3450008A345000830 +:1000F000A3450008A3450008A3450008A345000840 +:10010000A34500080000000000000000A34500080F :1001100000000000000000000000000000000000DF :1001200000000000000000000000000000000000CF :1001300000000000000000000000000000000000BF :1001400000000000000000000000000000000000AF -:1001500000000000000000009B4500089B450008CF -:100160009B4500089B45000800F002F800F03AF8B3 +:100150000000000000000000A3450008A3450008BF +:10016000A3450008A345000800F002F800F03AF8A3 :100170000AA090E8000C82448344AAF10107DA4502 :1001800001D100F02FF8AFF2090EBAE80F0013F01A -:10019000010F18BFFB1A43F001031847404E00003F -:1001A000604E0000103A24BF78C878C1FAD85207D0 +:10019000010F18BFFB1A43F001031847484E000037 +:1001A000684E0000103A24BF78C878C1FAD85207C8 :1001B00024BF30C830C144BF04680C6070470000E1 :1001C0000023002400250026103A28BF78C1FBD860 :1001D000520728BF30C148BF0B6070471FB51FBD15 -:1001E00010B510BD04F05CFB1146FFF7F7FF00F0FF -:1001F0005DF804F07AFB03B4FFF7F2FF03BC04F0F0 -:1002000081FB0000002400207949087002F0C4F945 +:1001E00010B510BD04F060FB1146FFF7F7FF00F0FB +:1001F0005DF804F07EFB03B4FFF7F2FF03BC04F0EC +:1002000085FB0000002400207949087002F0C8F93D :10021000002000F065F90020764908700120764939 :100220000870002000F0FEF801F00CFA00BF05E0B5 :1002300072490C700A2001F050F9641C082CF7DB9D -:1002400000206E4908706E4803F072FE00220421FF -:100250006C4802F095FA01E002F09EF9FCE710B557 +:1002400000206E4908706E4803F076FE00220421FB +:100250006C4802F099FA01E002F0A2F9FCE710B54F :100260000446B4F5004F01D1012000E00020024611 -:100270004FF400414FF0904002F082FAB4F5805FF5 +:100270004FF400414FF0904002F086FAB4F5805FF1 :1002800001D1012000E0002002464FF480514FF0E0 -:10029000904002F075FA082C01D1012000E0002006 -:1002A00002460821574802F06BFA10BD04F0FCF931 +:10029000904002F079FA082C01D1012000E0002002 +:1002A00002460821574802F06FFA10BD04F000FA28 :1002B000554800686422B0FBF2F1481EB0F1807F1F :1002C00000D31BE0481E4FF0E022506150170F2270 :1002D000002804DB13071C0E4C4B1C5406E01307CC :1002E0001D0E4B4B00F00F04241F1D5500BF0020B6 :1002F0004FF0E02290610720106100BF00F092FCF7 :1003000008B900BFFEE700F087FC00F0A6FC00F093 -:10031000CCFC012204213B4802F032FA00F09AFFA3 -:1003200000F027FF00F063FE02F036F900F0F9FF5D -:10033000072032490870642001F0CFF802F02CF950 -:1003400000202E49087001E002F026F94FF4004128 -:10035000304802F01CFA0028F6D148E02648007820 -:1003600028B94FF400412B4802F011FA08B1FFF709 +:10031000CCFC012204213B4802F036FA00F09AFF9F +:1003200000F027FF00F063FE02F03AF900F0F9FF59 +:10033000072032490870642001F0CFF802F030F94C +:1003400000202E49087001E002F02AF94FF4004124 +:10035000304802F020FA0028F6D148E0264800781C +:1003600028B94FF400412B4802F015FA08B1FFF705 :1003700049FF2948008848F6B801884204DD4FF457 :100380000040FFF76CFF22E02348008848F2E801B4 :1003900088420ADD2048008848F6B801884204DA1D @@ -61,7 +61,7 @@ :1003B0001811884209DD1848008848F2E80188428F :1003C00003DA0820FFF74BFF01E0FFF71BFF13489C :1003D00001680068401C114A10601148814201D92F -:1003E000FFF710FF052001F078F802F0D5F8B5E727 +:1003E000FFF710FF052001F078F802F0D9F8B5E723 :1003F000620000209A00002092000020610000208E :1004000000440040000400489C00002000E400E09C :1004100018ED00E00008004808000020040000205B @@ -86,8 +86,8 @@ :100540000968C54A92FBF1F1C44A92F9002051436F :1005500008B2C3490968A1EBE1110144C04A116026 :1005600011460968C91109B2B94A1180704770B5BE -:10057000BC48006804F0CAFA0546BB4904F0DEFA3C -:10058000044604F0A7FA70BD01B2B84A118000F128 +:10057000BC48006804F0CEFA0546BB4904F0E2FA34 +:10058000044604F0ABFA70BD01B2B84A118000F124 :10059000780109B2B64A118000F1F00109B2B54AFA :1005A0001180B249B1F9001001F5B4714FF4B47281 :1005B00091FBF2F302FB131109B2AC4A1180AC4972 @@ -109,25 +109,25 @@ :1006B00070475D4991F90010002907DD75490978F7 :1006C000C1EB0111E92202EB810008E071490978D0 :1006D000C1EB0111B42202EB8101E93908B2704784 -:1006E0002DE9F0414FF400616B4802F050F80446E8 -:1006F00002216A4802F04BF805464FF480416848F1 -:1007000002F045F8064604EB450000EB8600C7B250 +:1006E0002DE9F0414FF400616B4802F054F80446E4 +:1006F00002216A4802F04FF805464FF480416848ED +:1007000002F049F8064604EB450000EB8600C7B24C :100710006448C05DBDE8F0812DE9F8436248008877 :10072000401C614908806148007830B30846008861 :1007300041F2883190FBF1F15D480078401C91FB5B :10074000F0F200FB1210C0B95748008857490978E9 :1007500090FBF1F201FB1200A8B95648007808B9E5 :10076000012000E0002053490870084602784FF449 -:100770008061494802F004F805E000224FF48061EE -:10078000454801F0FDFF4C48B0F90000B0F57A7F14 +:100770008061494802F008F805E000224FF48061EA +:10078000454802F001F84C48B0F90000B0F57A7F16 :1007900013DA49480088401C00B24749088047499D :1007A0004988474AB2F90020881800EBD0714910F7 :1007B00009B2434A1180BDE8F8833B4800886421B0 :1007C00090FBF1F201FB120000287DD13B4800882C :1007D00045F66A6148434FF47A71B0FBF1F080B29C :1007E000064636494988364AB2F90020891A354A00 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a/HUGS/Objects/HUGS.htm b/HUGS/Objects/HUGS.htm index 4e44369..9eb8110 100644 --- a/HUGS/Objects/HUGS.htm +++ b/HUGS/Objects/HUGS.htm @@ -3,7 +3,7 @@ Static Call Graph - [.\Objects\HUGS.axf]

Static Call Graph for image .\Objects\HUGS.axf

-

#<CALLGRAPH># ARM Linker, 5060750: Last Updated: Mon May 18 22:26:09 2020 +

#<CALLGRAPH># ARM Linker, 5060750: Last Updated: Sun May 24 23:14:37 2020

Maximum Stack Usage = 160 bytes + Unknown(Cycles, Untraceable Function Pointers)

Call chain for Maximum Stack Depth:

@@ -633,7 +633,7 @@

  • >>   ShutOff -

    CheckUSARTHUGSInput (Thumb, 278 bytes, Stack size 16 bytes, commshugs.o(.text)) +

    CheckUSARTHUGSInput (Thumb, 284 bytes, Stack size 16 bytes, commshugs.o(.text))

    [Stack]


    [Calls]