rk3588-nanopi6-rev09.dts

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2023 FriendlyElec Computer Tech. Co., Ltd.
 * (http://www.friendlyelec.com)
 */

/dts-v1/;

#include "rk3588.dtsi"
#include "rk3588-nanopi6-common.dtsi"

/ {
	model = "FriendlyElec CM3588";
	compatible = "friendlyelec,cm3588", "rockchip,rk3588";

	aliases {
		ethernet0 = &r8125_u10;
		nvme0 = &nvme0;
		nvme1 = &nvme1;
		nvme2 = &nvme2;
		nvme3 = &nvme3;
	};

	/* If hdmirx node is disabled, delete the reserved-memory node here. */
	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/* Reserve 128MB memory for hdmirx-controller@fdee0000 */
		cma {
			compatible = "shared-dma-pool";
			reusable;
			reg = <0x0 (256 * 0x100000) 0x0 (128 * 0x100000)>;
			linux,cma-default;
		};
	};

	dp0_sound: dp0-sound {
		status = "okay";
		compatible = "rockchip,hdmi";
		rockchip,card-name= "rockchip,dp0";
		rockchip,mclk-fs = <512>;
		rockchip,cpu = <&spdif_tx2>;
		rockchip,codec = <&dp0 1>;
	};

	rt5616_sound: rt5616-sound {
		status = "okay";
		compatible = "simple-audio-card";
		pinctrl-names = "default";
		pinctrl-0 = <&hp_det>;

		simple-audio-card,name = "realtek,rt5616-codec";
		simple-audio-card,format = "i2s";
		simple-audio-card,mclk-fs = <256>;

		simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
		simple-audio-card,hp-pin-name = "Headphone Jack";

		simple-audio-card,widgets =
			"Headphone", "Headphone Jack",
			"Microphone", "Microphone Jack";
		simple-audio-card,routing =
			"Headphone Jack", "HPOL",
			"Headphone Jack", "HPOR",
			"MIC1", "Microphone Jack",
			"Microphone Jack", "micbias1";

		simple-audio-card,cpu {
			sound-dai = <&i2s0_8ch>;
		};
		simple-audio-card,codec {
			sound-dai = <&rt5616>;
		};
	};

	fan: pwm-fan {
		status = "okay";
		compatible = "pwm-fan";
		#cooling-cells = <2>;
		fan-supply = <&vcc5v0_sys>;
		pwms = <&pwm1 0 50000 0>;
		cooling-levels = <0 35 64 100 150 255>;
		rockchip,hold-time-ms = <2000>;
		rockchip,temp-trips = <
			50000	1
			55000	2
			60000	3
			65000	4
			70000	5
		>;
	};

	adc_keys: adc-keys {
		compatible = "adc-keys";
		io-channels = <&saradc 1>;
		io-channel-names = "buttons";
		keyup-threshold-microvolt = <1800000>;
		poll-interval = <100>;

		vol-up-key {
			label = "volume up";
			linux,code = <KEY_VOLUMEUP>;
			press-threshold-microvolt = <17000>;
		};
	};

	gpio_keys: gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&key1_pin>;

		button@1 {
			debounce-interval = <50>;
			gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
			label = "K1";
			linux,code = <BTN_1>;
			wakeup-source;
		};
	};

	gpio_leds: gpio-leds {
		compatible = "gpio-leds";

		sys_led: led-0 {
			gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
			label = "sys_led";
			linux,default-trigger = "heartbeat";
			pinctrl-names = "default";
			pinctrl-0 = <&sys_led_pin>;
		};

		usr_led: led-1 {
			gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>;
			label = "usr_led";
			pinctrl-names = "default";
			pinctrl-0 = <&usr_led_pin>;
		};
	};

	hdmi1_sound: hdmi1-sound {
		status = "disabled";
		compatible = "rockchip,hdmi";
		rockchip,mclk-fs = <128>;
		rockchip,card-name = "rockchip,hdmi1";
		rockchip,cpu = <&i2s6_8ch>;
		rockchip,codec = <&hdmi1>;
	};

	hdmiin_sound: hdmiin-sound {
		status = "disabled";
		compatible = "rockchip,hdmi";
		rockchip,mclk-fs = <128>;
		rockchip,format = "i2s";
		rockchip,bitclock-master = <&hdmirx_ctrler>;
		rockchip,frame-master = <&hdmirx_ctrler>;
		rockchip,card-name = "rockchip,hdmiin";
		rockchip,cpu = <&i2s7_8ch>;
		rockchip,codec = <&hdmirx_ctrler 0>;
		rockchip,jack-det;
	};

	vcc5v0_host_30: vcc5v0-host-30 {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&vcc5v0_host30_en>;
		regulator-name = "vcc5v0_host_30";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&vcc5v0_usb>;
	};

	vcc3v3_host_32: vcc3v3-host-32 {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&vcc3v3_host32_en>;
		regulator-name = "vcc3v3_host_32";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&vcc5v0_sys>;
	};

	vcc5v0_host_20: vcc5v0-host-20 {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&vcc5v0_host20_en>;
		regulator-name = "vcc5v0_host_20";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&vcc5v0_usb>;
	};

	vcc3v3_pcie30: vcc3v3-pcie30 {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3_pcie30";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&vcc5v0_sys>;
	};
};

&combphy0_ps {
	status = "okay";
};

&combphy1_ps {
	status = "okay";
};

&combphy2_psu {
	status = "okay";
};

&display_subsystem {
	clocks = <&hdptxphy_hdmi0>, <&hdptxphy_hdmi1>;
	clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
};

&dp0 {
	status = "okay";
};

&dp0_in_vp0 {
	status = "disabled";
};

&dp0_in_vp1 {
	status = "disabled";
};

&dp0_in_vp2 {
	status = "okay";
};

&dp0_sound {
	status = "okay";
};

&gmac1 {
	status = "disabled";
};

&hdmi0 {
	enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&hdmi0_in_vp0 {
	status = "okay";
};

&hdmi0_in_vp1 {
	status = "disabled";
};

&hdmi0_in_vp2 {
	status = "disabled";
};

&hdmi0_sound {
	status = "okay";
};

&hdmi1 {
	enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&hdmi1_in_vp0 {
	status = "disabled";
};

&hdmi1_in_vp1 {
	status = "okay";
};

&hdmi1_in_vp2 {
	status = "disabled";
};

&hdmi1_sound {
	status = "okay";
};

&hdmiin_sound {
	status = "okay";
};

/* Should work with at least 128MB cma reserved above. */
&hdmirx_ctrler {
	status = "okay";

	#sound-dai-cells = <1>;
	edid-version = <3>;
	/* Effective level used to trigger HPD: 0-low, 1-high */
	hpd-trigger-level = <1>;
	hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&hdmim1_rx &hdmirx_det>;
};

&hdptxphy_hdmi0 {
	status = "okay";
};

&hdptxphy_hdmi1 {
	status = "okay";
};

dsi0_i2c: &i2c5 {
	pinctrl-0 = <&i2c5m0_xfer>;
};

&i2c6 {
	clock-frequency = <200000>;
	status = "okay";

	eeprom@53 {
		compatible = "microchip,24c02", "atmel,24c02";
		reg = <0x53>;
		#address-cells = <2>;
		#size-cells = <0>;
		pagesize = <16>;
		size = <256>;

		eui_48: eui-48@fa {
			reg = <0xfa 0x06>;
		};
	};

	usbc0: fusb302@22 {
		compatible = "fcs,fusb302";
		reg = <0x22>;
		interrupt-parent = <&gpio0>;
		interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
		int-n-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&usbc0_int>;
		vbus-supply = <&vbus5v0_typec>;
		status = "okay";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				usbc0_role_sw: endpoint@0 {
					remote-endpoint = <&dwc3_0_role_switch>;
				};
			};
		};

		usb_con: connector {
			compatible = "usb-c-connector";
			label = "USB-C";
			data-role = "dual";
			power-role = "dual";
			try-power-role = "sink";
			op-sink-microwatt = <1000000>;
			sink-pdos =
				<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
			source-pdos =
				<PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;

			altmodes {
				#address-cells = <1>;
				#size-cells = <0>;

				altmode@0 {
					reg = <0>;
					svid = <0xff01>;
					vdo = <0xffffffff>;
				};
			};

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					usbc0_orien_sw: endpoint {
						remote-endpoint = <&usbdp_phy0_orientation_switch>;
					};
				};

				port@1 {
					reg = <1>;
					dp_altmode_mux: endpoint {
						remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
					};
				};
			};
		};
	};
};

&i2c7 {
	clock-frequency = <200000>;
	status = "okay";

	rt5616: rt5616@1b {
		status = "okay";
		#sound-dai-cells = <0>;
		compatible = "rt5616";
		reg = <0x1b>;
		clocks = <&mclkout_i2s0>;
		clock-names = "mclk";
		assigned-clocks = <&mclkout_i2s0>;
		assigned-clock-rates = <12288000>;
		pinctrl-names = "default";
		pinctrl-0 = <&i2s0_mclk>;
	};

	/* connected with MIPI-CSI1 */
};

&i2c8 {
	status = "okay";
	pinctrl-0 = <&i2c8m2_xfer>;
	/* connected with Header_2.54MM */
};

&i2s0_8ch {
	status = "okay";
	pinctrl-0 = <&i2s0_lrck
		     &i2s0_sclk
		     &i2s0_sdi0
		     &i2s0_sdo0>;
	rockchip,trcm-sync-tx-only;
};

&i2s6_8ch {
	status = "okay";
};

&i2s7_8ch {
	status = "okay";
};

&mach {
	hwrev = <9>;
	model = "CM3588";
};

&mdio1 {
	status = "disabled";
};

&pcie2x1l0 {
	/* 2. CON14: pcie30phy port0 lane1 */
	max-link-speed = <3>;
	num-lanes = <1>;
	phys = <&pcie30phy>;
	reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&vcc3v3_pcie30>;
	status = "okay";

	pcie@0,0 {
		reg = <0x00200000 0 0 0 0>;
		#address-cells = <3>;
		#size-cells = <2>;

		nvme1: pcie@20,0 {
			reg = <0x000000 0 0 0 0>;
		};
	};
};

&pcie2x1l1 {
	/* 4. CON16: pcie30phy port1 lane1 */
	max-link-speed = <3>;
	num-lanes = <1>;
	phys = <&pcie30phy>;
	reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&vcc3v3_pcie30>;
	status = "okay";

	pcie@0,0 {
		reg = <0x00300000 0 0 0 0>;
		#address-cells = <3>;
		#size-cells = <2>;

		nvme3: pcie@30,0 {
			reg = <0x000000 0 0 0 0>;
		};
	};
};

&pcie2x1l2 {
	reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&vcc_3v3_pcie20>;
	status = "okay";

	pcie@0,0 {
		reg = <0x00400000 0 0 0 0>;
		#address-cells = <3>;
		#size-cells = <2>;

		r8125_u10: pcie@40,0 {
			reg = <0x000000 0 0 0 0>;
			local-mac-address = [ 00 00 00 00 00 00 ];
		};
	};
};

&pcie30phy {
	rockchip,pcie30-phymode = <PHY_MODE_PCIE_NABIBI>;
	status = "okay";
};

&pcie3x4 {
	/* 1. CON13: pcie30phy port0 lane0 */
	max-link-speed = <3>;
	num-lanes = <1>;
	reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&vcc3v3_pcie30>;
	status = "okay";

	pcie@0,0 {
		reg = <0x00000000 0 0 0 0>;
		#address-cells = <3>;
		#size-cells = <2>;

		nvme0: pcie@0,0 {
			reg = <0x000000 0 0 0 0>;
		};
	};
};

&pcie3x2 {
	/* 3. CON15: pcie30phy port1 lane0 */
	max-link-speed = <3>;
	num-lanes = <1>;
	reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
	vpcie3v3-supply = <&vcc3v3_pcie30>;
	status = "okay";

	pcie@0,0 {
		reg = <0x00100000 0 0 0 0>;
		#address-cells = <3>;
		#size-cells = <2>;

		nvme2: pcie@10,0 {
			reg = <0x000000 0 0 0 0>;
		};
	};
};

&pinctrl {
	gpio-key {
		key1_pin: key1-pin {
			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	gpio-leds {
		sys_led_pin: sys-led-pin {
			rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		usr_led_pin: usr-led-pin {
			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	headphone {
		hp_det: hp-det {
			rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	hdmi {
		hdmirx_det: hdmirx-det {
			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	lcd {
		/omit-if-no-ref/
		lcd_rst0_gpio: lcd-rst0-gpio {
			rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		/omit-if-no-ref/
		lcd_rst1_gpio: lcd-rst1-gpio {
			rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		/omit-if-no-ref/
		touch_dsi0_gpio: touch-dsi0-gpio {
			rockchip,pins =
				<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>,
				<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		/omit-if-no-ref/
		touch_dsi1_gpio: touch-dsi1-gpio {
			rockchip,pins =
				<4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
				<4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	sdmmc {
		sd_s0_pwr: sd-s0-pwr {
			rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>;
		};
	};

	usb {
		vcc5v0_host30_en: vcc5v0-host30-en {
			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
		};
		vcc5v0_host20_en: vcc5v0-host20-en {
			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
		};
		vcc3v3_host32_en: vcc3v3-host32-en {
			rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

&pwm1 {
	pinctrl-0 = <&pwm1m1_pins>;
	status = "okay";
};

dsi0_pwm: &pwm2 {
	pinctrl-0 = <&pwm2m1_pins>;
};

&pwm8 {
	pinctrl-0 = <&pwm8m0_pins>;
	status = "okay";
};

&spdif_tx2 {
	status = "okay";
};

&u2phy0 {
	status = "okay";
};

&u2phy0_otg {
	rockchip,typec-vbus-det;
	status = "okay";
};

&u2phy1 {
	status = "okay";
};

&u2phy1_otg {
	phy-supply = <&vcc5v0_host_30>;
	status = "okay";
};

&u2phy2 {
	status = "okay";
};

&u2phy2_host {
	phy-supply = <&vcc5v0_host_20>;
	status = "okay";
};

&u2phy3 {
	status = "okay";
};

&u2phy3_host {
	phy-supply = <&vcc3v3_host_32>;
	status = "okay";
};

&usb_host1_ehci {
	status = "okay";
};

&usb_host1_ohci {
	status = "okay";
};

&usbdp_phy0 {
	orientation-switch;
	rockchip,dp-lane-mux = <0 1 2 3 >;
	svid = <0xff01>;
	sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
	sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
	status = "okay";

	port {
		#address-cells = <1>;
		#size-cells = <0>;
		usbdp_phy0_orientation_switch: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&usbc0_orien_sw>;
		};

		usbdp_phy0_dp_altmode_mux: endpoint@1 {
			reg = <1>;
			remote-endpoint = <&dp_altmode_mux>;
		};
	};
};

&usbdp_phy0_dp {
	status = "okay";
};

&usbdp_phy0_u3 {
	status = "okay";
};

&usbdrd3_0 {
	status = "okay";
};

&usbdrd_dwc3_0 {
	dr_mode = "otg";
	usb-role-switch;
	status = "okay";

	port {
		#address-cells = <1>;
		#size-cells = <0>;
		dwc3_0_role_switch: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&usbc0_role_sw>;
		};
	};
};

&usbdp_phy1 {
	status = "okay";
};

&usbdp_phy1_u3 {
	status = "okay";
};

&usbdrd3_1 {
	status = "okay";
};

&usbdrd_dwc3_1 {
	dr_mode = "host";
	snps,xhci-trb-ent-quirk;
	status = "okay";
};

&usbhost3_0 {
	status = "okay";
};

&usbhost_dwc3_0 {
	dr_mode = "host";
	status = "okay";
};

&vcc_3v3_sd_s0 {
	/delete-property/ enable-active-high;
	gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>;
};

&vop {
	disable-win-move;
};

&vp0 {
	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 |
				1 << ROCKCHIP_VOP2_CLUSTER1)>;
	rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER0>;
	cursor-win-id = <ROCKCHIP_VOP2_ESMART0>;
};

&vp1 {
	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART1 |
				1 << ROCKCHIP_VOP2_ESMART2)>;
	rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER2>;
	cursor-win-id = <ROCKCHIP_VOP2_ESMART1>;
};

&vp2 {
	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
	rockchip,primary-plane = <ROCKCHIP_VOP2_CLUSTER3>;
	cursor-win-id = <ROCKCHIP_VOP2_ESMART3>;
};

&vp3 {
	/delete-property/ rockchip,plane-mask;
	/delete-property/ rockchip,primary-plane;
	status = "disabled";
};

/* GPIO Connector */
&pwm5 {
	pinctrl-0 = <&pwm5m1_pins>;
	status = "okay";
};

&pwm9 {
	pinctrl-0 = <&pwm9m0_pins>;
	status = "okay";
};

&spi0 {
	num-cs = <1>;
	pinctrl-0 = <&spi0m2_cs0 &spi0m2_pins>;
	status = "disabled";

	spidev0: spidev@0 {
		compatible = "rockchip,spidev";
		reg = <0>;
		spi-max-frequency = <5000000>;
		status = "disabled";
	};
};

&spi4 {
	num-cs = <1>;
	pinctrl-0 = <&spi4m1_cs0 &spi4m1_pins>;
	status = "disabled";
};

&uart0 {
	pinctrl-0 = <&uart0m0_xfer>;
	status = "disabled";
};

&uart3 {
	pinctrl-0 = <&uart3m1_xfer>;
	status = "disabled";
};

&uart4 {
	pinctrl-0 = <&uart4m2_xfer>;
	status = "disabled";
};

&uart6 {
	pinctrl-0 = <&uart6m1_xfer>;
	status = "okay";
};

&uart7 {
	pinctrl-0 = <&uart7m2_xfer>;
	status = "disabled";
};

&uart8 {
	pinctrl-0 = <&uart8m1_xfer>;
	status = "disabled";
};