diff --git a/esp-hal/Cargo.toml b/esp-hal/Cargo.toml index daf43e4b3e8..e9aa1c8fc70 100644 --- a/esp-hal/Cargo.toml +++ b/esp-hal/Cargo.toml @@ -61,14 +61,14 @@ ufmt-write = { version = "0.1.0", optional = true } # IMPORTANT: # Each supported device MUST have its PAC included below along with a # corresponding feature. -esp32 = { version = "0.28.0", features = ["critical-section"], optional = true } -esp32c2 = { version = "0.17.0", features = ["critical-section"], optional = true } -esp32c3 = { version = "0.20.0", features = ["critical-section"], optional = true } -esp32c6 = { git = "https://github.com/esp-rs/esp-pacs", rev = "9cd33c6", features = ["critical-section"], optional = true } -esp32h2 = { git = "https://github.com/esp-rs/esp-pacs", rev = "9cd33c6", features = ["critical-section"], optional = true } -esp32p4 = { git = "https://github.com/esp-rs/esp-pacs", rev = "9cd33c6", features = ["critical-section"], optional = true } -esp32s2 = { version = "0.19.0", features = ["critical-section"], optional = true } -esp32s3 = { version = "0.23.0", features = ["critical-section"], optional = true } +esp32 = { git = "https://github.com/esp-rs/esp-pacs", rev = "55f9f6c", features = ["critical-section"], optional = true } +esp32c2 = { git = "https://github.com/esp-rs/esp-pacs", rev = "55f9f6c", features = ["critical-section"], optional = true } +esp32c3 = { git = "https://github.com/esp-rs/esp-pacs", rev = "55f9f6c", features = ["critical-section"], optional = true } +esp32c6 = { git = "https://github.com/esp-rs/esp-pacs", rev = "55f9f6c", features = ["critical-section"], optional = true } +esp32h2 = { git = "https://github.com/esp-rs/esp-pacs", rev = "55f9f6c", features = ["critical-section"], optional = true } +esp32p4 = { git = "https://github.com/esp-rs/esp-pacs", rev = "55f9f6c", features = ["critical-section"], optional = true } +esp32s2 = { git = "https://github.com/esp-rs/esp-pacs", rev = "55f9f6c", features = ["critical-section"], optional = true } +esp32s3 = { git = "https://github.com/esp-rs/esp-pacs", rev = "55f9f6c", features = ["critical-section"], optional = true } [build-dependencies] basic-toml = "0.1.8" diff --git a/esp-hal/src/clock/clocks_ll/esp32p4.rs b/esp-hal/src/clock/clocks_ll/esp32p4.rs index d7c4de3a68f..0c28b61ae68 100644 --- a/esp-hal/src/clock/clocks_ll/esp32p4.rs +++ b/esp-hal/src/clock/clocks_ll/esp32p4.rs @@ -194,40 +194,40 @@ pub(crate) fn esp32p4_rtc_update_to_xtal(freq: XtalClock, div: u8, default: bool unsafe { (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl0() - .modify(|_, w| w.reg_cpu_clk_div_num().bits(div - 1)); + .modify(|_, w| w.cpu_clk_div_num().bits(div - 1)); (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl0() - .modify(|_, w| w.reg_cpu_clk_div_numerator().bits(0)); + .modify(|_, w| w.cpu_clk_div_numerator().bits(0)); (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl0() - .modify(|_, w| w.reg_cpu_clk_div_denominator().bits(0)); + .modify(|_, w| w.cpu_clk_div_denominator().bits(0)); // Set memory divider (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl1() - .modify(|_, w| w.reg_mem_clk_div_num().bits((mem_divider - 1) as u8)); + .modify(|_, w| w.mem_clk_div_num().bits((mem_divider - 1) as u8)); // Set system divider (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl1() - .modify(|_, w| w.reg_sys_clk_div_num().bits((sys_divider - 1) as u8)); + .modify(|_, w| w.sys_clk_div_num().bits((sys_divider - 1) as u8)); // Set APB divider (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl2() - .modify(|_, w| w.reg_apb_clk_div_num().bits((apb_divider - 1) as u8)); + .modify(|_, w| w.apb_clk_div_num().bits((apb_divider - 1) as u8)); // Bus update (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl0() - .modify(|_, w| w.reg_soc_clk_div_update().set_bit()); + .modify(|_, w| w.soc_clk_div_update().set_bit()); while (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl0() .read() - .reg_soc_clk_div_update() + .soc_clk_div_update() .bit_is_set() {} @@ -354,35 +354,35 @@ pub(crate) fn esp32p4_rtc_freq_to_cpll_mhz(cpu_clock_speed: CpuClock) { (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl0() - .modify(|_, w| w.reg_cpu_clk_div_num().bits((div_integer - 1) as u8)); + .modify(|_, w| w.cpu_clk_div_num().bits((div_integer - 1) as u8)); (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl0() - .modify(|_, w| w.reg_cpu_clk_div_numerator().bits(0)); + .modify(|_, w| w.cpu_clk_div_numerator().bits(0)); (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl0() - .modify(|_, w| w.reg_cpu_clk_div_denominator().bits(0)); + .modify(|_, w| w.cpu_clk_div_denominator().bits(0)); // Set memory divider (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl1() - .modify(|_, w| w.reg_mem_clk_div_num().bits((mem_div - 1) as u8)); + .modify(|_, w| w.mem_clk_div_num().bits((mem_div - 1) as u8)); // Set system divider (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl1() - .modify(|_, w| w.reg_sys_clk_div_num().bits((sys_div - 1) as u8)); + .modify(|_, w| w.sys_clk_div_num().bits((sys_div - 1) as u8)); // Set APB divider (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl2() - .modify(|_, w| w.reg_apb_clk_div_num().bits((apb_div - 1) as u8)); + .modify(|_, w| w.apb_clk_div_num().bits((apb_div - 1) as u8)); // Bus update (&*crate::soc::peripherals::HP_SYS_CLKRST::PTR) .root_clk_ctrl0() - .modify(|_, w| w.reg_soc_clk_div_update().set_bit()); + .modify(|_, w| w.soc_clk_div_update().set_bit()); ets_update_cpu_frequency(cpu_clock_speed.mhz()); } diff --git a/esp-hal/src/gpio.rs b/esp-hal/src/gpio.rs index 5c1e76ea50e..81c1390530e 100644 --- a/esp-hal/src/gpio.rs +++ b/esp-hal/src/gpio.rs @@ -1909,7 +1909,7 @@ macro_rules! gpio { impl $crate::gpio::GpioSignal for [] { fn output_signals() -> [Option; 6]{ #[allow(unused_mut)] - let mut output_signals = [None,None,None,None,None,None]; + let mut output_signals = [None, None, None, None, None, None]; $( $( @@ -1921,7 +1921,7 @@ macro_rules! gpio { } fn input_signals() -> [Option; 6] { #[allow(unused_mut)] - let mut input_signals = [None,None,None,None,None,None]; + let mut input_signals = [None, None, None, None, None, None]; $( $( @@ -2801,24 +2801,24 @@ pub mod lp_gpio { if enable { lp_io .out_enable_w1ts() - .write(|w| w.lp_gpio_enable_w1ts().variant(1 << PIN)); + .write(|w| w.enable_w1ts().variant(1 << PIN)); } else { lp_io .out_enable_w1tc() - .write(|w| w.lp_gpio_enable_w1tc().variant(1 << PIN)); + .write(|w| w.enable_w1tc().variant(1 << PIN)); } } fn input_enable(&self, enable: bool) { - get_pin_reg(PIN).modify(|_, w| w.lp_gpio0_fun_ie().bit(enable)); + get_pin_reg(PIN).modify(|_, w| w.fun_ie().bit(enable)); } fn pullup_enable(&self, enable: bool) { - get_pin_reg(PIN).modify(|_, w| w.lp_gpio0_fun_wpu().bit(enable)); + get_pin_reg(PIN).modify(|_, w| w.fun_wpu().bit(enable)); } fn pulldown_enable(&self, enable: bool) { - get_pin_reg(PIN).modify(|_, w| w.lp_gpio0_fun_wpd().bit(enable)); + get_pin_reg(PIN).modify(|_, w| w.fun_wpd().bit(enable)); } #[doc(hidden)] @@ -2827,18 +2827,18 @@ pub mod lp_gpio { if level { lp_io .out_data_w1ts() - .write(|w| w.lp_gpio_out_data_w1ts().variant(1 << PIN)); + .write(|w| w.out_data_w1ts().variant(1 << PIN)); } else { lp_io .out_data_w1tc() - .write(|w| w.lp_gpio_out_data_w1tc().variant(1 << PIN)); + .write(|w| w.out_data_w1tc().variant(1 << PIN)); } } #[doc(hidden)] pub fn get_level(&self) -> bool { let lp_io = unsafe { &*crate::peripherals::LP_IO::PTR }; - (lp_io.in_().read().lp_gpio_in_data_next().bits() & 1 << PIN) != 0 + (lp_io.in_().read().data_next().bits() & 1 << PIN) != 0 } /// Configures the pin as an input with the internal pull-up resistor @@ -2889,7 +2889,7 @@ pub mod lp_gpio { .gpio_mux() .modify(|r, w| w.sel().variant(r.sel().bits() | 1 << pin)); - get_pin_reg(pin).modify(|_, w| w.lp_gpio0_mcu_sel().variant(0)); + get_pin_reg(pin).modify(|_, w| w.mcu_sel().variant(0)); } #[inline(always)] @@ -2930,9 +2930,7 @@ pub mod lp_gpio { unsafe fn apply_wakeup(&mut self, wakeup: bool, level: u8) { let lp_io = &*$crate::peripherals::LP_IO::ptr(); lp_io.[< pin $gpionum >]().modify(|_, w| { - w - .[< lp_gpio $gpionum _wakeup_enable >]().bit(wakeup) - .[< lp_gpio $gpionum _int_type >]().bits(level) + w.wakeup_enable().bit(wakeup).int_type().bits(level) }); } @@ -2972,9 +2970,9 @@ pub mod lp_gpio { let lp_io = &*$crate::peripherals::LP_IO::ptr(); lp_io.[< gpio $gpionum >]().modify(|_, w| { w - .[< lp_gpio $gpionum _slp_sel >]().bit(false) - .[< lp_gpio $gpionum _fun_ie >]().bit(input_enable) - .[< lp_gpio $gpionum _mcu_sel >]().bits(func as u8) + .slp_sel().bit(false) + .fun_ie().bit(input_enable) + .mcu_sel().bits(func as u8) }); } } @@ -2983,12 +2981,12 @@ pub mod lp_gpio { impl $crate::gpio::RTCPinWithResistors for GpioPin { fn rtcio_pullup(&mut self, enable: bool) { let lp_io = unsafe { &*$crate::peripherals::LP_IO::ptr() }; - lp_io.[< gpio $gpionum >]().modify(|_, w| w.[< lp_gpio $gpionum _fun_wpu >]().bit(enable)); + lp_io.[< gpio $gpionum >]().modify(|_, w| w.fun_wpu().bit(enable)); } fn rtcio_pulldown(&mut self, enable: bool) { let lp_io = unsafe { &*$crate::peripherals::LP_IO::ptr() }; - lp_io.[< gpio $gpionum >]().modify(|_, w| w.[< lp_gpio $gpionum _fun_wpd >]().bit(enable)); + lp_io.[< gpio $gpionum >]().modify(|_, w| w.fun_wpd().bit(enable)); } } )+ diff --git a/esp-hal/src/uart.rs b/esp-hal/src/uart.rs index 9f57e12733b..e4338f47944 100644 --- a/esp-hal/src/uart.rs +++ b/esp-hal/src/uart.rs @@ -1820,8 +1820,8 @@ pub mod lp_uart { .gpio_mux() .modify(|r, w| w.sel().variant(r.sel().bits() | 1 << 5)); - lp_io.gpio4().modify(|_, w| w.lp_gpio4_mcu_sel().variant(1)); - lp_io.gpio5().modify(|_, w| w.lp_gpio5_mcu_sel().variant(1)); + lp_io.gpio4().modify(|_, w| w.mcu_sel().variant(1)); + lp_io.gpio5().modify(|_, w| w.mcu_sel().variant(1)); Self::new_with_config(uart, Config::default()) }