From 562c891ef9bfbb085755ba3029b6efabd9b72935 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Thu, 12 Sep 2024 12:59:12 +0200 Subject: [PATCH] SPI pins are no longer optional (#2133) * SPI pins are no longer optional, rename DummyPin * Swap QSPI test expected levels * Tweak documentation around Level, implement PeripheralOutput * Fmt --- esp-hal/CHANGELOG.md | 5 +- esp-hal/MIGRATING-0.20.md | 13 ++ esp-hal/src/dma/mod.rs | 2 +- esp-hal/src/gpio/interconnect.rs | 8 +- esp-hal/src/gpio/mod.rs | 17 +- .../src/gpio/{dummy_pin.rs => placeholder.rs} | 152 +++++++++--------- esp-hal/src/spi/master.rs | 108 ++++--------- examples/src/bin/embassy_spi.rs | 2 +- examples/src/bin/qspi_flash.rs | 9 +- .../spi_halfduplex_read_manufacturer_id.rs | 10 +- examples/src/bin/spi_loopback.rs | 8 +- examples/src/bin/spi_loopback_dma.rs | 2 +- hil-test/tests/i2s.rs | 10 +- hil-test/tests/i2s_async.rs | 10 +- hil-test/tests/lcd_cam_i8080.rs | 24 +-- hil-test/tests/lcd_cam_i8080_async.rs | 24 +-- hil-test/tests/qspi_read.rs | 52 ++---- hil-test/tests/qspi_write.rs | 38 +---- hil-test/tests/qspi_write_read.rs | 50 ++---- .../tests/spi_full_duplex_dma_write_read.rs | 1 - 20 files changed, 190 insertions(+), 355 deletions(-) rename esp-hal/src/gpio/{dummy_pin.rs => placeholder.rs} (59%) diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md index 9c95a843c44..47734e434b9 100644 --- a/esp-hal/CHANGELOG.md +++ b/esp-hal/CHANGELOG.md @@ -12,7 +12,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ### Added - Introduce traits for the DMA buffer objects (#1976) -- Implement `embedded-hal` output pin traits for `DummyPin` (#2019) +- Implement `embedded-hal` output pin traits for `NoPin` (#2019, #2133) - Added `esp_hal::init` to simplify HAL initialisation (#1970, #1999) - Added GpioPin::degrade to create ErasePins easily. Same for AnyPin by accident. (#2075) - Added missing functions to `Flex`: `unlisten`, `is_interrupt_set`, `wakeup_enable`, `wait_for_high`, `wait_for_low`, `wait_for_rising_edge`, `wait_for_falling_edge`, `wait_for_any_edge`. (#2075) @@ -39,6 +39,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - ESP32: Added support for touch sensing on GPIO32 and 33 (#2109) - Replaced `AnyPin` with `InputSignal` and `OutputSignal` and renamed `ErasedPin` to `AnyPin` (#2128) - Replaced the `ErasedTimer` enum with the `AnyTimer` struct. (#?) +- Changed the parameters of `Spi::with_pins` to no longer be optional (#2133) +- Renamed `DummyPin` to `NoPin` and removed all internal logic from it. (#2133) +- The `NO_PIN` constant has been removed. (#2133) ### Fixed diff --git a/esp-hal/MIGRATING-0.20.md b/esp-hal/MIGRATING-0.20.md index 1668c778028..1e6c6509e2c 100644 --- a/esp-hal/MIGRATING-0.20.md +++ b/esp-hal/MIGRATING-0.20.md @@ -146,3 +146,16 @@ configure an input pin, and pass it to `set_edge_signal` or `set_ctrl_signal`. - )); + ch0.set_edge_signal(Input::new(io.pins.gpio5, Pull::Down)); ``` + +## SPI pins and `NO_PIN` + +Use `NoPin` in place of the now-removed `NO_PIN` constant. + +SPI pins, when using the `with_pin` function, are no longer optional. +You can pass `NoPin` or `Level` as inputs, and `NoPin` as output if you don't need a particular pin. + +```diff + let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) +- .with_pins(Some(sclk), Some(mosi), NO_PIN, NO_PIN); ++ .with_pins(sclk, mosi, Level::Low, NoPin); +``` diff --git a/esp-hal/src/dma/mod.rs b/esp-hal/src/dma/mod.rs index f354fb374fd..c462cc2d74c 100644 --- a/esp-hal/src/dma/mod.rs +++ b/esp-hal/src/dma/mod.rs @@ -35,7 +35,7 @@ //! 100.kHz(), //! SpiMode::Mode0, //! ) -//! .with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs)) +//! .with_pins(sclk, mosi, miso, cs) //! .with_dma(dma_channel.configure( //! false, //! DmaPriority::Priority0, diff --git a/esp-hal/src/gpio/interconnect.rs b/esp-hal/src/gpio/interconnect.rs index cc9333598ce..e046694ac06 100644 --- a/esp-hal/src/gpio/interconnect.rs +++ b/esp-hal/src/gpio/interconnect.rs @@ -5,11 +5,11 @@ use crate::{ self, AlternateFunction, AnyPin, - DummyPin, GpioPin, GpioProperties, InputPin, Level, + NoPin, OutputSignalType, PeripheralInput, PeripheralOutput, @@ -331,7 +331,7 @@ impl PeripheralOutput for OutputSignal { enum AnyInputSignalInner { Input(InputSignal), Constant(Level), - Dummy(DummyPin), + Dummy(NoPin), } /// A type-erased input signal. @@ -358,8 +358,8 @@ impl From for AnyInputSignal { } } -impl From for AnyInputSignal { - fn from(pin: DummyPin) -> Self { +impl From for AnyInputSignal { + fn from(pin: NoPin) -> Self { Self(AnyInputSignalInner::Dummy(pin)) } } diff --git a/esp-hal/src/gpio/mod.rs b/esp-hal/src/gpio/mod.rs index 8965533a3b7..45505445f46 100644 --- a/esp-hal/src/gpio/mod.rs +++ b/esp-hal/src/gpio/mod.rs @@ -26,8 +26,8 @@ //! - [Output] and [OutputOpenDrain] pins can be used as digital outputs. //! - [Flex] pin is a pin that can be used as an input and output pin. //! - [AnyPin] is a type-erased GPIO pin with support for inverted signalling. -//! - [DummyPin] is a useful for cases where peripheral driver requires a pin, -//! but real pin cannot be used. +//! - [NoPin] is a useful for cases where peripheral driver requires a pin, but +//! real pin cannot be used. //! //! ### GPIO interconnect //! @@ -77,10 +77,10 @@ use crate::{ InterruptConfigurable, }; -mod dummy_pin; pub mod interconnect; +mod placeholder; -pub use dummy_pin::DummyPin; +pub use placeholder::NoPin; #[cfg(soc_etm)] pub mod etm; @@ -90,7 +90,6 @@ pub mod lp_io; pub mod rtc_io; /// Convenience constant for `Option::None` pin -pub const NO_PIN: Option = None; static USER_INTERRUPT_HANDLER: CFnPtr = CFnPtr::NULL; @@ -147,6 +146,14 @@ pub enum WakeEvent { } /// Digital input or output level. +/// +/// `Level` can be used to control a GPIO output, and it can act as a peripheral +/// signal and be connected to peripheral inputs and outputs. +/// +/// When connected to a peripheral +/// input, the peripheral will read the corresponding level from that signal. +/// +/// When connected to a peripheral output, the level will be ignored. #[derive(Debug, Eq, PartialEq, Copy, Clone)] #[cfg_attr(feature = "defmt", derive(defmt::Format))] pub enum Level { diff --git a/esp-hal/src/gpio/dummy_pin.rs b/esp-hal/src/gpio/placeholder.rs similarity index 59% rename from esp-hal/src/gpio/dummy_pin.rs rename to esp-hal/src/gpio/placeholder.rs index 478628c6474..c984f3860f4 100644 --- a/esp-hal/src/gpio/dummy_pin.rs +++ b/esp-hal/src/gpio/placeholder.rs @@ -1,34 +1,17 @@ -//! Placeholder pins. +//! Placeholder pins/signals. //! //! These are useful to pass them into peripheral drivers where you don't want //! an actual pin but one is required. +// This module also contains peripheral signal impls for `Level` to avoid +// polluting the main module. use super::*; -/// DummyPin, not useful everywhere as it panics if number() is called -#[derive(Default, Clone)] -pub struct DummyPin { - value: bool, -} - -impl DummyPin { - /// Create a dummy pin. - pub fn new() -> Self { - Self { value: false } - } -} - -impl crate::peripheral::Peripheral for DummyPin { - type P = Self; - - unsafe fn clone_unchecked(&mut self) -> Self::P { - Self { value: self.value } - } +impl PeripheralSignal for Level { + fn pull_direction(&self, _pull: Pull, _internal: private::Internal) {} } -impl private::Sealed for DummyPin {} - -impl PeripheralInput for DummyPin { +impl PeripheralInput for Level { fn input_signals(&self, _: private::Internal) -> [Option; 6] { [None; 6] } @@ -40,11 +23,14 @@ impl PeripheralInput for DummyPin { fn enable_input_in_sleep_mode(&mut self, _on: bool, _: private::Internal) {} fn is_input_high(&self, _: private::Internal) -> bool { - self.value + *self == Level::High } fn connect_input_to_peripheral(&mut self, signal: InputSignal, _: private::Internal) { - let value = if self.value { ONE_INPUT } else { ZERO_INPUT }; + let value = match self { + Level::High => ONE_INPUT, + Level::Low => ZERO_INPUT, + }; unsafe { &*GPIO::PTR } .func_in_sel_cfg(signal as usize - FUNC_IN_SEL_OFFSET) @@ -61,48 +47,14 @@ impl PeripheralInput for DummyPin { fn disconnect_input_from_peripheral(&mut self, _signal: InputSignal, _: private::Internal) {} } -impl PeripheralSignal for Level { - delegate::delegate! { - to match self { - Level::High => DummyPin { value: true }, - Level::Low => DummyPin { value: false }, - } { - fn pull_direction(&self, pull: Pull, _internal: private::Internal); - } - } -} - -impl PeripheralInput for Level { - delegate::delegate! { - to match self { - Level::High => DummyPin { value: true }, - Level::Low => DummyPin { value: false }, - } { - fn init_input(&self, _pull: Pull, _internal: private::Internal); - fn enable_input(&mut self, _on: bool, _internal: private::Internal); - fn enable_input_in_sleep_mode(&mut self, _on: bool, _internal: private::Internal); - fn is_input_high(&self, _internal: private::Internal) -> bool; - fn connect_input_to_peripheral(&mut self, _signal: InputSignal, _internal: private::Internal); - fn disconnect_input_from_peripheral(&mut self, _signal: InputSignal, _internal: private::Internal); - fn input_signals(&self, _internal: private::Internal) -> [Option; 6]; - } - } -} - -impl PeripheralSignal for DummyPin { - fn pull_direction(&self, _pull: Pull, _internal: private::Internal) {} -} - -impl PeripheralOutput for DummyPin { +impl PeripheralOutput for Level { fn set_to_open_drain_output(&mut self, _: private::Internal) {} fn set_to_push_pull_output(&mut self, _: private::Internal) {} fn enable_output(&mut self, _on: bool, _: private::Internal) {} - fn set_output_high(&mut self, on: bool, _: private::Internal) { - self.value = on; - } + fn set_output_high(&mut self, _on: bool, _: private::Internal) {} fn set_drive_strength(&mut self, _strength: DriveStrength, _: private::Internal) {} @@ -115,7 +67,7 @@ impl PeripheralOutput for DummyPin { fn internal_pull_down_in_sleep_mode(&mut self, _on: bool, _: private::Internal) {} fn is_set_high(&self, _: private::Internal) -> bool { - self.value + false } fn output_signals(&self, _: private::Internal) -> [Option; 6] { @@ -127,49 +79,99 @@ impl PeripheralOutput for DummyPin { fn disconnect_from_peripheral_output(&mut self, _signal: OutputSignal, _: private::Internal) {} } -impl embedded_hal_02::digital::v2::OutputPin for DummyPin { +/// Placeholder pin, used when no pin is required when using a peripheral. +/// +/// When used as a peripheral signal, `NoPin` is equivalent to [`Level::Low`]. +#[derive(Default, Clone, Copy)] +pub struct NoPin; + +impl crate::peripheral::Peripheral for NoPin { + type P = Self; + + unsafe fn clone_unchecked(&mut self) -> Self::P { + Self + } +} + +impl private::Sealed for NoPin {} + +impl PeripheralSignal for NoPin { + fn pull_direction(&self, _pull: Pull, _internal: private::Internal) {} +} + +impl PeripheralInput for NoPin { + delegate::delegate! { + to Level::Low { + fn init_input(&self, _pull: Pull, _internal: private::Internal); + fn enable_input(&mut self, _on: bool, _internal: private::Internal); + fn enable_input_in_sleep_mode(&mut self, _on: bool, _internal: private::Internal); + fn is_input_high(&self, _internal: private::Internal) -> bool; + fn connect_input_to_peripheral(&mut self, _signal: InputSignal, _internal: private::Internal); + fn disconnect_input_from_peripheral(&mut self, _signal: InputSignal, _internal: private::Internal); + fn input_signals(&self, _internal: private::Internal) -> [Option; 6]; + } + } +} + +impl PeripheralOutput for NoPin { + delegate::delegate! { + to Level::Low { + fn set_to_open_drain_output(&mut self, _internal: private::Internal); + fn set_to_push_pull_output(&mut self, _internal: private::Internal); + fn enable_output(&mut self, _on: bool, _internal: private::Internal); + fn set_output_high(&mut self, _on: bool, _internal: private::Internal); + fn set_drive_strength(&mut self, _strength: DriveStrength, _internal: private::Internal); + fn enable_open_drain(&mut self, _on: bool, _internal: private::Internal); + fn enable_output_in_sleep_mode(&mut self, _on: bool, _internal: private::Internal); + fn internal_pull_up_in_sleep_mode(&mut self, _on: bool, _internal: private::Internal); + fn internal_pull_down_in_sleep_mode(&mut self, _on: bool, _internal: private::Internal); + fn is_set_high(&self, _internal: private::Internal) -> bool; + fn output_signals(&self, _internal: private::Internal) -> [Option; 6]; + fn connect_peripheral_to_output(&mut self, _signal: OutputSignal, _internal: private::Internal); + fn disconnect_from_peripheral_output(&mut self, _signal: OutputSignal, _internal: private::Internal); + } + } +} + +impl embedded_hal_02::digital::v2::OutputPin for NoPin { type Error = core::convert::Infallible; fn set_high(&mut self) -> Result<(), Self::Error> { - self.set_output_high(true, private::Internal); Ok(()) } fn set_low(&mut self) -> Result<(), Self::Error> { - self.set_output_high(false, private::Internal); Ok(()) } } -impl embedded_hal_02::digital::v2::StatefulOutputPin for DummyPin { +impl embedded_hal_02::digital::v2::StatefulOutputPin for NoPin { fn is_set_high(&self) -> Result { - Ok(PeripheralOutput::is_set_high(self, private::Internal)) + Ok(false) } fn is_set_low(&self) -> Result { - Ok(!PeripheralOutput::is_set_high(self, private::Internal)) + Ok(false) } } -impl embedded_hal::digital::ErrorType for DummyPin { +impl embedded_hal::digital::ErrorType for NoPin { type Error = core::convert::Infallible; } -impl embedded_hal::digital::OutputPin for DummyPin { +impl embedded_hal::digital::OutputPin for NoPin { fn set_low(&mut self) -> Result<(), Self::Error> { - self.set_output_high(true, private::Internal); Ok(()) } fn set_high(&mut self) -> Result<(), Self::Error> { - self.set_output_high(false, private::Internal); Ok(()) } } -impl embedded_hal::digital::StatefulOutputPin for DummyPin { +impl embedded_hal::digital::StatefulOutputPin for NoPin { fn is_set_high(&mut self) -> Result { - Ok(PeripheralOutput::is_set_high(self, private::Internal)) + Ok(false) } fn is_set_low(&mut self) -> Result { - Ok(!PeripheralOutput::is_set_high(self, private::Internal)) + Ok(false) } } diff --git a/esp-hal/src/spi/master.rs b/esp-hal/src/spi/master.rs index e62b0588e63..2d79dd1a484 100644 --- a/esp-hal/src/spi/master.rs +++ b/esp-hal/src/spi/master.rs @@ -51,7 +51,7 @@ //! 100.kHz(), //! SpiMode::Mode0, //! ) -//! .with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs)); +//! .with_pins(sclk, mosi, miso, cs); //! # } //! ``` //! @@ -82,7 +82,7 @@ use super::{ use crate::{ clock::Clocks, dma::{DmaPeripheral, DmaRxBuffer, DmaTxBuffer, Rx, Tx}, - gpio::{InputSignal, OutputSignal, PeripheralInput, PeripheralOutput}, + gpio::{InputSignal, NoPin, OutputSignal, PeripheralInput, PeripheralOutput}, interrupt::InterruptHandler, peripheral::{Peripheral, PeripheralRef}, peripherals::spi2::RegisterBlock, @@ -575,7 +575,7 @@ where /// Setup pins for this SPI instance. /// - /// All pins are optional. Pass [crate::gpio::NO_PIN] if you don't need the + /// All pins are optional. Pass [crate::gpio::NoPin] if you don't need the /// given pin. pub fn with_pins< SCK: PeripheralOutput, @@ -584,36 +584,15 @@ where CS: PeripheralOutput, >( self, - sck: Option + 'd>, - mosi: Option + 'd>, - miso: Option + 'd>, - cs: Option + 'd>, + sck: impl Peripheral

+ 'd, + mosi: impl Peripheral

+ 'd, + miso: impl Peripheral

+ 'd, + cs: impl Peripheral

+ 'd, ) -> Self { - let this = if let Some(sck) = sck { - self.with_sck(sck) - } else { - self - }; - - let this = if let Some(mosi) = mosi { - this.with_mosi(mosi) - } else { - this - }; - - let this = if let Some(miso) = miso { - this.with_miso(miso) - } else { - this - }; - - let this = if let Some(cs) = cs { - this.with_cs(cs) - } else { - this - }; - - this + self.with_sck(sck) + .with_mosi(mosi) + .with_miso(miso) + .with_cs(cs) } pub(crate) fn new_internal( @@ -632,7 +611,8 @@ where spi.spi.init(); spi.spi.set_data_mode(mode); - spi + // Disconnect any lingering connections + spi.with_pins(NoPin, NoPin, NoPin, NoPin) } /// Change the bus frequency of the SPI instance. @@ -737,7 +717,7 @@ where /// Setup pins for this SPI instance. /// - /// All pins are optional. Pass [crate::gpio::NO_PIN] if you don't need the + /// All pins are optional. Pass [crate::gpio::NoPin] if you don't need the /// given pin. pub fn with_pins< SCK: PeripheralOutput, @@ -748,50 +728,19 @@ where CS: PeripheralOutput, >( self, - sck: Option + 'd>, - mosi: Option + 'd>, - miso: Option + 'd>, - sio2: Option + 'd>, - sio3: Option + 'd>, - cs: Option + 'd>, + sck: impl Peripheral

+ 'd, + mosi: impl Peripheral

+ 'd, + miso: impl Peripheral

+ 'd, + sio2: impl Peripheral

+ 'd, + sio3: impl Peripheral

+ 'd, + cs: impl Peripheral

+ 'd, ) -> Self { - let this = if let Some(sck) = sck { - self.with_sck(sck) - } else { - self - }; - - let this = if let Some(mosi) = mosi { - this.with_mosi(mosi) - } else { - this - }; - - let this = if let Some(miso) = miso { - this.with_miso(miso) - } else { - this - }; - - let this = if let Some(sio2) = sio2 { - this.with_sio2(sio2) - } else { - this - }; - - let this = if let Some(sio3) = sio3 { - this.with_sio3(sio3) - } else { - this - }; - - let this = if let Some(cs) = cs { - this.with_cs(cs) - } else { - this - }; - - this + self.with_sck(sck) + .with_mosi(mosi) + .with_miso(miso) + .with_sio2(sio2) + .with_sio3(sio3) + .with_cs(cs) } pub(crate) fn new_internal( @@ -804,13 +753,14 @@ where let mut spi = Spi { spi, - _mode: PhantomData, + _mode: PhantomData::, }; spi.spi.setup(frequency); spi.spi.init(); spi.spi.set_data_mode(mode); - spi + // Disconnect any lingering connections + spi.with_pins(NoPin, NoPin, NoPin, NoPin, NoPin, NoPin) } /// Change the bus frequency of the SPI instance in half-duplex mode. diff --git a/examples/src/bin/embassy_spi.rs b/examples/src/bin/embassy_spi.rs index 9ac562444b3..4187226feaf 100644 --- a/examples/src/bin/embassy_spi.rs +++ b/examples/src/bin/embassy_spi.rs @@ -59,7 +59,7 @@ async fn main(_spawner: Spawner) { let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs)) + .with_pins(sclk, mosi, miso, cs) .with_dma(dma_channel.configure_for_async(false, DmaPriority::Priority0)) .with_buffers(dma_rx_buf, dma_tx_buf); diff --git a/examples/src/bin/qspi_flash.rs b/examples/src/bin/qspi_flash.rs index f68074bdf82..036a17d3998 100644 --- a/examples/src/bin/qspi_flash.rs +++ b/examples/src/bin/qspi_flash.rs @@ -80,14 +80,7 @@ fn main() -> ! { let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_pins( - Some(sclk), - Some(mosi), - Some(miso), - Some(sio2), - Some(sio3), - Some(cs), - ) + .with_pins(sclk, mosi, miso, sio2, sio3, cs) .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); let delay = Delay::new(); diff --git a/examples/src/bin/spi_halfduplex_read_manufacturer_id.rs b/examples/src/bin/spi_halfduplex_read_manufacturer_id.rs index b6f20d7897e..4bd36151707 100644 --- a/examples/src/bin/spi_halfduplex_read_manufacturer_id.rs +++ b/examples/src/bin/spi_halfduplex_read_manufacturer_id.rs @@ -63,14 +63,8 @@ fn main() -> ! { } } - let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100.kHz(), SpiMode::Mode0).with_pins( - Some(sclk), - Some(mosi), - Some(miso), - Some(sio2), - Some(sio3), - Some(cs), - ); + let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) + .with_pins(sclk, mosi, miso, sio2, sio3, cs); let delay = Delay::new(); diff --git a/examples/src/bin/spi_loopback.rs b/examples/src/bin/spi_loopback.rs index c24dd894e2e..613cbaceca8 100644 --- a/examples/src/bin/spi_loopback.rs +++ b/examples/src/bin/spi_loopback.rs @@ -36,12 +36,8 @@ fn main() -> ! { let miso = miso_mosi.peripheral_input(); let mosi = miso_mosi.into_peripheral_output(); - let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0).with_pins( - Some(sclk), - Some(mosi), - Some(miso), - Some(cs), - ); + let mut spi = + Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0).with_pins(sclk, mosi, miso, cs); let delay = Delay::new(); diff --git a/examples/src/bin/spi_loopback_dma.rs b/examples/src/bin/spi_loopback_dma.rs index 93167c145b3..50faea72910 100644 --- a/examples/src/bin/spi_loopback_dma.rs +++ b/examples/src/bin/spi_loopback_dma.rs @@ -54,7 +54,7 @@ fn main() -> ! { let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs)) + .with_pins(sclk, mosi, miso, cs) .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); let delay = Delay::new(); diff --git a/hil-test/tests/i2s.rs b/hil-test/tests/i2s.rs index 4fb0b36dbe8..a0263ce9283 100644 --- a/hil-test/tests/i2s.rs +++ b/hil-test/tests/i2s.rs @@ -12,7 +12,7 @@ use esp_hal::{ delay::Delay, dma::{Dma, DmaPriority}, dma_buffers, - gpio::{DummyPin, Io}, + gpio::{Io, NoPin}, i2s::{DataFormat, I2s, I2sReadDma, I2sWriteDma, Standard}, prelude::*, }; @@ -75,15 +75,15 @@ mod tests { let mut i2s_tx = i2s .i2s_tx - .with_bclk(DummyPin::new()) - .with_ws(DummyPin::new()) + .with_bclk(NoPin) + .with_ws(NoPin) .with_dout(dout) .build(); let mut i2s_rx = i2s .i2s_rx - .with_bclk(DummyPin::new()) - .with_ws(DummyPin::new()) + .with_bclk(NoPin) + .with_ws(NoPin) .with_din(din) .build(); diff --git a/hil-test/tests/i2s_async.rs b/hil-test/tests/i2s_async.rs index e5a1c59ae26..2fa00f64efd 100644 --- a/hil-test/tests/i2s_async.rs +++ b/hil-test/tests/i2s_async.rs @@ -11,7 +11,7 @@ use esp_hal::{ dma::{Dma, DmaPriority}, - gpio::{DummyPin, Io}, + gpio::{Io, NoPin}, i2s::{asynch::*, DataFormat, I2s, I2sTx, Standard}, peripherals::I2S0, prelude::*, @@ -124,15 +124,15 @@ mod tests { let i2s_tx = i2s .i2s_tx - .with_bclk(DummyPin::new()) - .with_ws(DummyPin::new()) + .with_bclk(NoPin) + .with_ws(NoPin) .with_dout(dout) .build(); let i2s_rx = i2s .i2s_rx - .with_bclk(DummyPin::new()) - .with_ws(DummyPin::new()) + .with_bclk(NoPin) + .with_ws(NoPin) .with_din(din) .build(); diff --git a/hil-test/tests/lcd_cam_i8080.rs b/hil-test/tests/lcd_cam_i8080.rs index 131c159ddc0..7bde429d7b1 100644 --- a/hil-test/tests/lcd_cam_i8080.rs +++ b/hil-test/tests/lcd_cam_i8080.rs @@ -8,7 +8,7 @@ use esp_hal::{ dma::{Dma, DmaDescriptor, DmaPriority}, dma_buffers, - gpio::DummyPin, + gpio::NoPin, lcd_cam::{ lcd::i8080::{Command, Config, TxEightBits, I8080}, LcdCam, @@ -50,16 +50,7 @@ mod tests { fn test_i8080_8bit(ctx: Context<'static>) { let channel = ctx.dma.channel0.configure(false, DmaPriority::Priority0); - let pins = TxEightBits::new( - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - ); + let pins = TxEightBits::new(NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin); let mut i8080 = I8080::new( ctx.lcd_cam.lcd, @@ -82,16 +73,7 @@ mod tests { .dma .channel0 .configure_for_async(false, DmaPriority::Priority0); - let pins = TxEightBits::new( - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - ); + let pins = TxEightBits::new(NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin); let mut i8080 = I8080::new( ctx.lcd_cam.lcd, diff --git a/hil-test/tests/lcd_cam_i8080_async.rs b/hil-test/tests/lcd_cam_i8080_async.rs index 29f2e74aaf5..6a8079305ee 100644 --- a/hil-test/tests/lcd_cam_i8080_async.rs +++ b/hil-test/tests/lcd_cam_i8080_async.rs @@ -9,7 +9,7 @@ use esp_hal::{ dma::{Dma, DmaDescriptor, DmaPriority}, dma_buffers, - gpio::DummyPin, + gpio::NoPin, lcd_cam::{ lcd::i8080::{Command, Config, TxEightBits, I8080}, LcdCam, @@ -51,16 +51,7 @@ mod tests { #[test] async fn test_i8080_8bit(ctx: Context<'static>) { let channel = ctx.dma.channel0.configure(false, DmaPriority::Priority0); - let pins = TxEightBits::new( - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - ); + let pins = TxEightBits::new(NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin); let mut i8080 = I8080::new( ctx.lcd_cam.lcd, @@ -83,16 +74,7 @@ mod tests { .dma .channel0 .configure_for_async(false, DmaPriority::Priority0); - let pins = TxEightBits::new( - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - DummyPin::new(), - ); + let pins = TxEightBits::new(NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin); let mut i8080 = I8080::new( ctx.lcd_cam.lcd, diff --git a/hil-test/tests/qspi_read.rs b/hil-test/tests/qspi_read.rs index e910e2653ab..8f6debc1701 100644 --- a/hil-test/tests/qspi_read.rs +++ b/hil-test/tests/qspi_read.rs @@ -8,7 +8,7 @@ use esp_hal::{ dma::{Channel, Dma, DmaPriority, DmaRxBuf}, dma_buffers, - gpio::{AnyPin, Io, Level, Output}, + gpio::{AnyPin, Io, Level, NoPin, Output}, prelude::*, spi::{ master::{Address, Command, Spi, SpiDma}, @@ -62,7 +62,7 @@ fn execute( .unwrap(); (spi, dma_rx_buf) = transfer.wait(); - assert_eq!(dma_rx_buf.as_slice(), &[wanted; DMA_BUFFER_SIZE]); + assert_eq!(dma_rx_buf.as_slice(), &[0; DMA_BUFFER_SIZE]); // SPI should read all '1's miso_mirror.set_high(); @@ -80,7 +80,7 @@ fn execute( (_, dma_rx_buf) = transfer.wait(); - assert_eq!(dma_rx_buf.as_slice(), &[0xFF; DMA_BUFFER_SIZE]); + assert_eq!(dma_rx_buf.as_slice(), &[wanted; DMA_BUFFER_SIZE]); } #[cfg(test)] @@ -123,71 +123,41 @@ mod tests { #[timeout(3)] fn test_spi_reads_correctly_from_gpio_pin_0(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - Some(ctx.miso), - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, ctx.miso, NoPin, NoPin, NoPin, NoPin) .with_dma(ctx.dma_channel); - // SPI should read '0b11101110' - super::execute(spi, ctx.miso_mirror, 238); + super::execute(spi, ctx.miso_mirror, 0b0001_0001); } #[test] #[timeout(3)] fn test_spi_reads_correctly_from_gpio_pin_1(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - Some(ctx.miso), - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, NoPin, ctx.miso, NoPin, NoPin, NoPin) .with_dma(ctx.dma_channel); - // SPI should read '0b11011101' - super::execute(spi, ctx.miso_mirror, 221); + super::execute(spi, ctx.miso_mirror, 0b0010_0010); } #[test] #[timeout(3)] fn test_spi_reads_correctly_from_gpio_pin_2(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - Some(ctx.miso), - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, NoPin, NoPin, ctx.miso, NoPin, NoPin) .with_dma(ctx.dma_channel); // SPI should read '0b10111011' - super::execute(spi, ctx.miso_mirror, 187); + super::execute(spi, ctx.miso_mirror, 0b0100_0100); } #[test] #[timeout(3)] fn test_spi_reads_correctly_from_gpio_pin_3(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - Some(ctx.miso), - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, NoPin, NoPin, NoPin, ctx.miso, NoPin) .with_dma(ctx.dma_channel); // SPI should read '0b01110111' - super::execute(spi, ctx.miso_mirror, 119); + super::execute(spi, ctx.miso_mirror, 0b1000_1000); } } diff --git a/hil-test/tests/qspi_write.rs b/hil-test/tests/qspi_write.rs index cf6dff48834..3950024e885 100644 --- a/hil-test/tests/qspi_write.rs +++ b/hil-test/tests/qspi_write.rs @@ -8,7 +8,7 @@ use esp_hal::{ dma::{Channel, Dma, DmaPriority, DmaTxBuf}, dma_buffers, - gpio::{interconnect::InputSignal, AnyPin, Io, Pull}, + gpio::{interconnect::InputSignal, AnyPin, Io, NoPin}, pcnt::{channel::EdgeMode, unit::Unit, Pcnt}, prelude::*, spi::{ @@ -128,14 +128,7 @@ mod tests { #[timeout(3)] fn test_spi_writes_correctly_to_pin_0(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - Some(ctx.mosi), - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, ctx.mosi, NoPin, NoPin, NoPin, NoPin) .with_dma(ctx.dma_channel); let pcnt = Pcnt::new(ctx.pcnt); @@ -152,14 +145,7 @@ mod tests { #[timeout(3)] fn test_spi_writes_correctly_to_pin_1(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - Some(ctx.mosi), - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, NoPin, ctx.mosi, NoPin, NoPin, NoPin) .with_dma(ctx.dma_channel); let pcnt = Pcnt::new(ctx.pcnt); @@ -176,14 +162,7 @@ mod tests { #[timeout(3)] fn test_spi_writes_correctly_to_pin_2(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - Some(ctx.mosi), - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, NoPin, NoPin, ctx.mosi, NoPin, NoPin) .with_dma(ctx.dma_channel); let pcnt = Pcnt::new(ctx.pcnt); @@ -200,14 +179,7 @@ mod tests { #[timeout(3)] fn test_spi_writes_correctly_to_pin_3(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - Some(ctx.mosi), - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, NoPin, NoPin, NoPin, ctx.mosi, NoPin) .with_dma(ctx.dma_channel); let pcnt = Pcnt::new(ctx.pcnt); diff --git a/hil-test/tests/qspi_write_read.rs b/hil-test/tests/qspi_write_read.rs index 5d4d19d7654..0c683b2d79e 100644 --- a/hil-test/tests/qspi_write_read.rs +++ b/hil-test/tests/qspi_write_read.rs @@ -10,7 +10,7 @@ use esp_hal::{ dma::{Channel, Dma, DmaPriority, DmaRxBuf, DmaTxBuf}, dma_buffers, - gpio::{AnyPin, Io, Level, Output}, + gpio::{AnyPin, Io, Level, NoPin, Output}, prelude::*, spi::{ master::{Address, Command, Spi, SpiDma}, @@ -52,7 +52,7 @@ fn execute( let mut dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap(); let mut dma_tx_buf = DmaTxBuf::new(descriptors, buffer).unwrap(); - dma_tx_buf.fill(&[0xff; DMA_BUFFER_SIZE]); + dma_tx_buf.fill(&[0x00; DMA_BUFFER_SIZE]); let transfer = spi .write( @@ -69,7 +69,7 @@ fn execute( .unwrap(); (spi, _) = transfer.wait(); - mosi_mirror.set_low(); + mosi_mirror.set_high(); let transfer = spi .read( @@ -125,67 +125,39 @@ mod tests { #[timeout(3)] fn test_spi_writes_correctly_to_pin_0(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - Some(ctx.mosi), - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, ctx.mosi, NoPin, NoPin, NoPin, NoPin) .with_dma(ctx.dma_channel); - super::execute(spi, ctx.mosi_mirror, !0b0001_0001); + super::execute(spi, ctx.mosi_mirror, 0b0001_0001); } #[test] #[timeout(3)] fn test_spi_writes_correctly_to_pin_1(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - Some(ctx.mosi), - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, NoPin, ctx.mosi, NoPin, NoPin, NoPin) .with_dma(ctx.dma_channel); - super::execute(spi, ctx.mosi_mirror, !0b0010_0010); + super::execute(spi, ctx.mosi_mirror, 0b0010_0010); } #[test] #[timeout(3)] fn test_spi_writes_correctly_to_pin_2(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - Some(ctx.mosi), - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, NoPin, NoPin, ctx.mosi, NoPin, NoPin) .with_dma(ctx.dma_channel); - super::execute(spi, ctx.mosi_mirror, !0b0100_0100); + super::execute(spi, ctx.mosi_mirror, 0b0100_0100); } #[test] #[timeout(3)] fn test_spi_writes_correctly_to_pin_3(ctx: Context) { let spi = Spi::new_half_duplex(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_pins( - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - esp_hal::gpio::NO_PIN, - Some(ctx.mosi), - esp_hal::gpio::NO_PIN, - ) + .with_pins(NoPin, NoPin, NoPin, NoPin, ctx.mosi, NoPin) .with_dma(ctx.dma_channel); - super::execute(spi, ctx.mosi_mirror, !0b1000_1000); + super::execute(spi, ctx.mosi_mirror, 0b1000_1000); } } diff --git a/hil-test/tests/spi_full_duplex_dma_write_read.rs b/hil-test/tests/spi_full_duplex_dma_write_read.rs index 0880578ca40..b8daff3fb3c 100644 --- a/hil-test/tests/spi_full_duplex_dma_write_read.rs +++ b/hil-test/tests/spi_full_duplex_dma_write_read.rs @@ -67,7 +67,6 @@ mod tests { let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) .with_sck(sclk) - .with_mosi(esp_hal::gpio::DummyPin::new()) .with_miso(miso) .with_dma(dma_channel.configure(false, DmaPriority::Priority0));