diff --git a/src/easylink/smartrf_settings_predefined.h b/src/CC1310_LAUNCHXL.c similarity index 62% rename from src/easylink/smartrf_settings_predefined.h rename to src/CC1310_LAUNCHXL.c index fe91cde..cdf8df5 100644 --- a/src/easylink/smartrf_settings_predefined.h +++ b/src/CC1310_LAUNCHXL.c @@ -29,34 +29,16 @@ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef INCLUDE_RFSETTINGS_868GFSK -#define INCLUDE_RFSETTINGS_868GFSK -//********************************************************************************* -// These settings have been generated for use with TI-RTOS and cc13xxware -// -// Generated by SmartRF Studio version 2.4.0 -// Tested for TI-RTOS version tirtos_simplelink_2_20_xx -// Device: CC13xx Rev. 2.1 -// -//********************************************************************************* -#include -#include -#include +/* Include drivers */ #include -#include +/* RF hwi and swi priority */ +const RFCC26XX_HWAttrs RFCC26XX_hwAttrs = { + .hwiCpe0Priority = ~0, + .hwiHwPriority = ~0, + .swiCpe0Priority = 0, + .swiHwPriority = 0, +}; -// TI-RTOS RF Mode Object -extern RF_Mode RF_prop; - -// RF Core API commands -extern rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_50kbps2gfsk; -extern rfc_CMD_FS_t RF_cmdFs_50kbps2gfsk; -extern RF_Mode RF_prop_50kbps2gfsk; -extern rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_625bpsLrm; -extern rfc_CMD_FS_t RF_cmdFs_625bpsLrm; -extern RF_Mode RF_prop_625bpsLrm; - -#endif // INCLUDE_RFSETTINGS_868GFSK diff --git a/src/CC1350_LAUNCHXL.c b/src/CC1350_LAUNCHXL.c deleted file mode 100644 index e753283..0000000 --- a/src/CC1350_LAUNCHXL.c +++ /dev/null @@ -1,8 +0,0 @@ -#include -/* RF hwi and swi priority */ -const RFCC26XX_HWAttrs RFCC26XX_hwAttrs = { - .hwiCpe0Priority = ~0, - .hwiHwPriority = ~0, - .swiCpe0Priority = 0, - .swiHwPriority = 0, -}; diff --git a/src/easylink/EasyLink.c b/src/easylink/EasyLink.c index ff7edfc..5a4b62d 100644 --- a/src/easylink/EasyLink.c +++ b/src/easylink/EasyLink.c @@ -37,9 +37,11 @@ #include #include #include +#include +#include +#include "smartrf_settings/smartrf_settings_predefined.h" #include "smartrf_settings/smartrf_settings.h" -#include "smartrf_settings_predefined.h" #include #include @@ -49,11 +51,16 @@ #include #include +#include "Board.h" + +union setupCmd_t{ + rfc_CMD_PROP_RADIO_DIV_SETUP_t divSetup; + rfc_CMD_PROP_RADIO_SETUP_t setup; +}; + #define EASYLINK_MAX_ADDR_SIZE 8 #define EASYLINK_MAX_ADDR_FILTERS 3 -#define EASYLINK_OUTPUT_POWER_TBL_SIZE 16 - //Primary IEEE address location #define EASYLINK_PRIMARY_IEEE_ADDR_LOCATION 0x500012F0 //Secondary IEEE address location @@ -119,103 +126,11 @@ static bool rfModeMultiClient = false; static uint32_t asyncRxTimeOut = 0; //local commands, contents will be defined by modulation type -static rfc_CMD_PROP_RADIO_DIV_SETUP_t EasyLink_cmdPropRadioDivSetup; +static union setupCmd_t EasyLink_cmdPropRadioSetup; static rfc_CMD_FS_t EasyLink_cmdFs; static RF_Mode EasyLink_RF_prop; - -//Tx command -/*static*/ rfc_CMD_PROP_TX_t EasyLink_cmdPropTx = -{ - .commandNo = 0x3801, - .status = 0x0000, - .pNextOp = 0, - .startTime = 0x00000000, - .startTrigger.triggerType = 0x0, - .startTrigger.bEnaCmd = 0x0, - .startTrigger.triggerNo = 0x0, - .startTrigger.pastTrig = 0x0, - .condition.rule = 0x1, - .condition.nSkip = 0x0, - .pktConf.bFsOff = 0x0, - .pktConf.bUseCrc = 0x1, - .pktConf.bVarLen = 0x1, - .pktLen = 0, - .syncWord = 0x930b51de, - .pPkt = 0, -}; - -//Rx command -static rfc_CMD_PROP_RX_ADV_t EasyLink_cmdPropRxAdv = { - .commandNo = 0x3804, - .status = 0x0000, - .pNextOp = 0, - .startTime = 0x00000000, - .startTrigger.triggerType = TRIG_NOW, - .startTrigger.bEnaCmd = 0x0, - .startTrigger.triggerNo = 0x0, - .startTrigger.pastTrig = 0x0, - .condition.rule = 0x1, - .condition.nSkip = 0x0, - .pktConf.bFsOff = 0x0, - .pktConf.bRepeatOk = 0x0, - .pktConf.bRepeatNok = 0x0, - .pktConf.bUseCrc = 0x1, - .pktConf.bCrcIncSw = 0x0, - .pktConf.bCrcIncHdr = 0x1, - .pktConf.endType = 0x0, - .pktConf.filterOp = 0x1, - .rxConf.bAutoFlushIgnored = 0x0, - .rxConf.bAutoFlushCrcErr = 0x0, - .rxConf.bIncludeHdr = 0x1, - .rxConf.bIncludeCrc = 0x0, - .rxConf.bAppendRssi = 0x0, - .rxConf.bAppendTimestamp = 0x0, - .rxConf.bAppendStatus = 0x0, - .syncWord0 = 0x930b51de, - .syncWord1 = 0, - .maxPktLen = 0, - .hdrConf.numHdrBits = 8, - .hdrConf.lenPos = 0, - .hdrConf.numLenBits = 8, - .addrConf.addrType = 0, - .addrConf.addrSize = 0, - .addrConf.addrPos = 0, - .addrConf.numAddr = 1, - .lenOffset = 0, - .endTrigger.triggerType = TRIG_NEVER, - .endTrigger.bEnaCmd = 0x0, - .endTrigger.triggerNo = 0x0, - .endTrigger.pastTrig = 0x0, - .endTime = 0x00000000, - .pAddr = 0, - .pQueue = 0, - .pOutput = 0, -}; - -// TX Power dBm lookup table - values from SmartRF Studio -typedef struct outputConfig { - int8_t dbm; - uint16_t txPower; /* Value for the PROP_DIV_RADIO_SETUP.txPower field */ -} OutputConfig; - -static const OutputConfig outputPower[EASYLINK_OUTPUT_POWER_TBL_SIZE] = { - { 0, 0x0041 }, - { 1, 0x10c3 }, - { 2, 0x1042 }, - { 3, 0x14c4 }, - { 4, 0x18c5 }, - { 5, 0x18c6 }, - { 6, 0x1cc7 }, - { 7, 0x20c9 }, - { 8, 0x24cb }, - { 9, 0x2ccd }, - { 10, 0x38d3 }, - { 11, 0x50da }, - { 12, 0xb818 }, - { 13, 0xa73f }, /* 12.5 */ - { 14, 0xa73f }, - {-10, 0x08c0 }, -}; +static rfc_CMD_PROP_TX_t EasyLink_cmdPropTx; +static rfc_CMD_PROP_RX_ADV_t EasyLink_cmdPropRxAdv; // The table for setting the Rx Address Filters static uint8_t addrFilterTable[EASYLINK_MAX_ADDR_FILTERS * EASYLINK_MAX_ADDR_SIZE] = {0xaa}; @@ -363,7 +278,7 @@ static EasyLink_Status enableTestMode(EasyLink_CtrlOption mode) txTestCmd.config.bFsOff = 1; txTestCmd.syncWord = EasyLink_cmdPropTx.syncWord; - txTestCmd.config.whitenMode = EasyLink_cmdPropRadioDivSetup.formatConf.whitenMode; + txTestCmd.config.whitenMode = EasyLink_cmdPropRadioSetup.setup.formatConf.whitenMode; //set tone (unmodulated) or signal (modulated) if (mode == EasyLink_Ctrl_Test_Tone) @@ -428,35 +343,55 @@ EasyLink_Status EasyLink_init(EasyLink_PhyType ui32ModType) if (ui32ModType == EasyLink_Phy_Custom) { - memcpy(&EasyLink_cmdPropRadioDivSetup, &RF_cmdPropRadioDivSetup, sizeof(rfc_CMD_PROP_RADIO_DIV_SETUP_t)); + if(ChipInfo_GetChipType() == CHIP_TYPE_CC2650) + { + memcpy(&EasyLink_cmdPropRadioSetup.setup, &RF_cmdPropRadioDivSetup, sizeof(rfc_CMD_PROP_RADIO_SETUP_t)); + } + else + { + memcpy(&EasyLink_cmdPropRadioSetup.divSetup, &RF_cmdPropRadioDivSetup, sizeof(rfc_CMD_PROP_RADIO_DIV_SETUP_t)); + } memcpy(&EasyLink_cmdFs, &RF_cmdFs, sizeof(rfc_CMD_FS_t)); memcpy(&EasyLink_RF_prop, &RF_prop, sizeof(RF_Mode)); - //Copy the Synch word from the SmartRF setting Rx/Tx command - EasyLink_cmdPropRxAdv.syncWord0 = RF_cmdPropRx.syncWord; - EasyLink_cmdPropTx.syncWord = RF_cmdPropTx.syncWord; + memcpy(&EasyLink_cmdPropRxAdv, RF_pCmdPropRxAdv_preDef, sizeof(rfc_CMD_PROP_RX_ADV_t)); + memcpy(&EasyLink_cmdPropTx, &RF_cmdPropTx, sizeof(rfc_CMD_PROP_TX_t)); } - else if (ui32ModType == EasyLink_Phy_50kbps2gfsk) + else if ( (ui32ModType == EasyLink_Phy_50kbps2gfsk) && (ChipInfo_GetChipType() != CHIP_TYPE_CC2650) ) { - memcpy(&EasyLink_cmdPropRadioDivSetup, - &RF_cmdPropRadioDivSetup_50kbps2gfsk, + memcpy(&EasyLink_cmdPropRadioSetup.divSetup, + RF_pCmdPropRadioDivSetup_fsk, sizeof(rfc_CMD_PROP_RADIO_DIV_SETUP_t)); - memcpy(&EasyLink_cmdFs, &RF_cmdFs_50kbps2gfsk, sizeof(rfc_CMD_FS_t)); - memcpy(&EasyLink_RF_prop, &RF_prop_50kbps2gfsk, sizeof(RF_Mode)); - EasyLink_cmdPropRxAdv.syncWord0 = 0x930b51de; - EasyLink_cmdPropTx.syncWord = 0x930b51de; + memcpy(&EasyLink_cmdFs, RF_pCmdFs_preDef, sizeof(rfc_CMD_FS_t)); + memcpy(&EasyLink_RF_prop, RF_pProp_fsk, sizeof(RF_Mode)); + memcpy(&EasyLink_cmdPropRxAdv, RF_pCmdPropRxAdv_preDef, sizeof(rfc_CMD_PROP_RX_ADV_t)); + memcpy(&EasyLink_cmdPropTx, RF_pCmdPropTx_preDef, sizeof(rfc_CMD_PROP_TX_t)); } - else if (ui32ModType == EasyLink_Phy_625bpsLrm) + else if ( (ui32ModType == EasyLink_Phy_625bpsLrm) && (ChipInfo_GetChipType() != CHIP_TYPE_CC2650) ) { - memcpy(&EasyLink_cmdPropRadioDivSetup, - &RF_cmdPropRadioDivSetup_625bpsLrm, + memcpy(&EasyLink_cmdPropRadioSetup.divSetup, + RF_pCmdPropRadioDivSetup_lrm, sizeof(rfc_CMD_PROP_RADIO_DIV_SETUP_t)); - memcpy(&EasyLink_cmdFs, &RF_cmdFs_625bpsLrm, sizeof(rfc_CMD_FS_t)); - memcpy(&EasyLink_RF_prop, &RF_prop_625bpsLrm, sizeof(RF_Mode)); - EasyLink_cmdPropRxAdv.syncWord0 = 0x930b51de; - EasyLink_cmdPropTx.syncWord = 0x930b51de; + memcpy(&EasyLink_cmdFs, RF_pCmdFs_preDef, sizeof(rfc_CMD_FS_t)); + memcpy(&EasyLink_RF_prop, RF_pProp_lrm, sizeof(RF_Mode)); + memcpy(&EasyLink_cmdPropRxAdv, RF_pCmdPropRxAdv_preDef, sizeof(rfc_CMD_PROP_RX_ADV_t)); + memcpy(&EasyLink_cmdPropTx, RF_pCmdPropTx_preDef, sizeof(rfc_CMD_PROP_TX_t)); + } + else if ( (ui32ModType == EasyLink_Phy_2_4_200kbps2gfsk) && (ChipInfo_GetChipType() == CHIP_TYPE_CC2650) ) + { + memcpy(&EasyLink_cmdPropRadioSetup.setup, + RF_pCmdPropRadioSetup_2_4G_fsk, + sizeof(rfc_CMD_PROP_RADIO_SETUP_t)); + memcpy(&EasyLink_cmdFs, RF_pCmdFs_preDef, sizeof(rfc_CMD_FS_t)); + memcpy(&EasyLink_RF_prop, RF_pProp_2_4G_fsk, sizeof(RF_Mode)); + memcpy(&EasyLink_cmdPropRxAdv, RF_pCmdPropRxAdv_preDef, sizeof(rfc_CMD_PROP_RX_ADV_t)); + memcpy(&EasyLink_cmdPropTx, RF_pCmdPropTx_preDef, sizeof(rfc_CMD_PROP_TX_t)); } else { + if (busyMutex != NULL) + { + Semaphore_post(busyMutex); + } return EasyLink_Status_Param_Error; } @@ -467,7 +402,7 @@ EasyLink_Status EasyLink_init(EasyLink_PhyType ui32ModType) /* Request access to the radio */ rfHandle = RF_open(&rfObject, &EasyLink_RF_prop, - (RF_RadioSetup*)&EasyLink_cmdPropRadioDivSetup, &rfParams); + (RF_RadioSetup*)&EasyLink_cmdPropRadioSetup.setup, &rfParams); //Set Rx packet size, taking into account addr which is not in the hdr //(only length can be) @@ -538,7 +473,7 @@ EasyLink_Status EasyLink_setFrequency(uint32_t ui32Freq) /* Set the frequency */ EasyLink_cmdFs.frequency = (uint16_t)(ui32Freq / 1000000); EasyLink_cmdFs.fractFreq = (uint16_t) (((uint64_t)ui32Freq - - (EasyLink_cmdFs.frequency * 1000000)) * 65536 / 1000000); + ((uint64_t)EasyLink_cmdFs.frequency * 1000000)) * 65536 / 1000000); /* Run command */ RF_EventMask result = RF_runCmd(rfHandle, (RF_Op*)&EasyLink_cmdFs, @@ -593,23 +528,19 @@ EasyLink_Status EasyLink_setRfPwr(int8_t i8txPowerdBm) cmdSetPower.commandNo = CMD_SET_TX_POWER; - if (i8txPowerdBm < 0) + if (i8txPowerdBm < rfPowerTable[0].dbm) { - txPowerIdx = 15; + i8txPowerdBm = rfPowerTable[0].dbm; } - else if (i8txPowerdBm > 14) + else if (i8txPowerdBm > rfPowerTable[rfPowerTableSize-1].dbm ) { - txPowerIdx = 14; - } - else - { - txPowerIdx = i8txPowerdBm; + i8txPowerdBm = rfPowerTable[rfPowerTableSize-1].dbm; } - //if 14dBm power is requested then the CCFG_FORCE_VDDR_HH must be set in + //if max power is requested then the CCFG_FORCE_VDDR_HH must be set in //the ccfg #if (CCFG_FORCE_VDDR_HH != 0x1) - if (txPowerIdx == 14) + if (i8txPowerdBm == rfPowerTable[rfPowerTableSize-1].dbm) { //Release the busyMutex Semaphore_post(busyMutex); @@ -617,12 +548,16 @@ EasyLink_Status EasyLink_setRfPwr(int8_t i8txPowerdBm) } #endif - //CMD_SET_TX_POWER txPower is currently a bit filed in a struct, but will - //change to a uint16 in future releases. Hence do a memcpy to cater for - //both - memcpy(&(cmdSetPower.txPower), &(outputPower[txPowerIdx].txPower), - sizeof(uint16_t)); - EasyLink_cmdPropRadioDivSetup.txPower = outputPower[txPowerIdx].txPower; + for (txPowerIdx = 0; + txPowerIdx < rfPowerTableSize; + txPowerIdx++) + { + if (i8txPowerdBm >= rfPowerTable[txPowerIdx].dbm) + { + cmdSetPower.txPower = rfPowerTable[txPowerIdx].txPower; + EasyLink_cmdPropRadioSetup.setup.txPower = rfPowerTable[txPowerIdx].txPower; + } + } //point the Operational Command to the immediate set power command immOpCmd.cmdrVal = (uint32_t) &cmdSetPower; @@ -656,16 +591,24 @@ int8_t EasyLink_getRfPwr(void) } for (txPowerIdx = 0; - txPowerIdx < EASYLINK_OUTPUT_POWER_TBL_SIZE; + txPowerIdx < rfPowerTableSize; txPowerIdx++) { - if (outputPower[txPowerIdx].txPower == EasyLink_cmdPropRadioDivSetup.txPower) + if (rfPowerTable[txPowerIdx].txPower == EasyLink_cmdPropRadioSetup.setup.txPower) { - txPowerdBm = outputPower[txPowerIdx].dbm; + txPowerdBm = rfPowerTable[txPowerIdx].dbm; continue; } } + //if CCFG_FORCE_VDDR_HH is not set max power cannot be achieved +#if (CCFG_FORCE_VDDR_HH != 0x1) + if (txPowerdBm == rfPowerTable[rfPowerTableSize-1].dbm) + { + txPowerdBm = rfPowerTable[rfPowerTableSize-2].dbm; + } +#endif + return txPowerdBm; } diff --git a/src/easylink/EasyLink.h b/src/easylink/EasyLink.h index e16b6f2..baae3ae 100644 --- a/src/easylink/EasyLink.h +++ b/src/easylink/EasyLink.h @@ -145,7 +145,7 @@ extern "C" #include #include -#define EASYLINK_API_VERSION "EasyLink-v1.01.00" +#define EASYLINK_API_VERSION "EasyLink-v2.00.00" /// \brief defines the largest Tx/Rx payload that the interface can support #define EASYLINK_MAX_DATA_LENGTH 128 @@ -182,9 +182,10 @@ typedef enum /// \brief Phy Type passed to EasyLink_init typedef enum { - EasyLink_Phy_50kbps2gfsk = 0, ///Phy settings for 50kbps data rate, IEEE 802.15.4g GFSK. - EasyLink_Phy_625bpsLrm = 1, ///Phy settings for 625bps data rate, Long Range Mode. - EasyLink_Phy_Custom = 2, ///Customer Phy specific settings exported from SmartRF Studio + EasyLink_Phy_Custom = 0, ///Customer Phy specific settings exported from SmartRF Studio + EasyLink_Phy_50kbps2gfsk = 1, ///Phy settings for Sub1G 50kbps data rate, IEEE 802.15.4g GFSK. + EasyLink_Phy_625bpsLrm = 2, ///Phy settings for Sub1G 625bps data rate, Long Range Mode. + EasyLink_Phy_2_4_200kbps2gfsk = 3, ///Phy settings for 2.4Ghz 200kbps data rate, IEEE 802.15.4g GFSK. } EasyLink_PhyType; /// \brief Advance configuration options diff --git a/src/easylink/smartrf_settings_predefined.c b/src/easylink/smartrf_settings_predefined.c deleted file mode 100644 index f87c1bb..0000000 --- a/src/easylink/smartrf_settings_predefined.c +++ /dev/null @@ -1,324 +0,0 @@ -/* - * Copyright (c) 2015-2016, Texas Instruments Incorporated - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * * Neither the name of Texas Instruments Incorporated nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -//********************************************************************************* -// These settings have been generated for use with TI-RTOS and cc13xxware -// -// Generated by SmartRF Studio version 2.4.0 -// Tested for TI-RTOS version tirtos_simplelink_2_20_xx -// Device: CC13xx Rev. 2.1 -// -//********************************************************************************* - -#include -#include -#include -#include - -#include -#include -#include - -//********************************************************************************* -// 50kbps 2-GFSK settings: -// Frequency: 868.00000 MHz -// Data Format: Serial mode disable -// Deviation: 25.000 kHz -// Packet Length Config: Variable -// RX Filter BW: 98 kHz -// Symbol Rate: 50.00000 kBaud -// Sync Word Length: 32 Bits -// Whitening: No whitening - -// TI-RTOS RF Mode Object for 50kbps 2-GFSK -RF_Mode RF_prop_50kbps2gfsk = -{ - .rfMode = RF_MODE_PROPRIETARY_SUB_1, - .cpePatchFxn = &rf_patch_cpe_genfsk, - .mcePatchFxn = 0, - .rfePatchFxn = &rf_patch_rfe_genfsk, -}; - -// Overrides for CMD_PROP_RADIO_DIV_SETUP for 50kbps 2-GFSK -static uint32_t pOverrides_50kbps2gfsk[] = -{ - // override_use_patch_prop_genfsk.xml - // PHY: Use MCE ROM bank 4, RFE RAM patch - MCE_RFE_OVERRIDE(0,4,0,1,0,0), - // override_synth_prop_863_930_div5.xml - // Synth: Set recommended RTRIM to 7 - HW_REG_OVERRIDE(0x4038,0x0037), - // Synth: Set Fref to 4 MHz - (uint32_t)0x000684A3, - // Synth: Configure fine calibration setting - HW_REG_OVERRIDE(0x4020,0x7F00), - // Synth: Configure fine calibration setting - HW_REG_OVERRIDE(0x4064,0x0040), - // Synth: Configure fine calibration setting - (uint32_t)0xB1070503, - // Synth: Configure fine calibration setting - (uint32_t)0x05330523, - // Synth: Set loop bandwidth after lock to 20 kHz - (uint32_t)0x0A480583, - // Synth: Set loop bandwidth after lock to 20 kHz - (uint32_t)0x7AB80603, - // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference) - ADI_REG_OVERRIDE(1,4,0x9F), - // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1) - ADI_HALFREG_OVERRIDE(1,7,0x4,0x4), - // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering - (uint32_t)0x02010403, - // Synth: Configure extra PLL filtering - (uint32_t)0x00108463, - // Synth: Increase synth programming timeout - (uint32_t)0x04B00243, - // override_phy_gfsk_rx.xml - // Rx: Set LNA bias current trim offset to 3 - (uint32_t)0x00038883, - // Rx: Set RSSI offset to adjust reported RSSI by +5 dB - (uint32_t)0x00FB88A3, - // Rx: Freeze RSSI on sync found event - HW_REG_OVERRIDE(0x6084,0x35F1), - // override_phy_gfsk_pa_ramp_agc_reflevel_0x1a.xml - // Tx: Enable PA ramping (0x41). Rx: Set AGC reference level to 0x1A. - HW_REG_OVERRIDE(0x6088,0x411A), - // Tx: Configure PA ramping setting - HW_REG_OVERRIDE(0x608C,0x8213), - // override_phy_rx_aaf_bw_0xd.xml - // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD) - ADI_HALFREG_OVERRIDE(0,61,0xF,0xD), - // override_frontend_xd.xml - // Rx: Set RSSI offset to adjust reported RSSI by +5 dB - (uint32_t)0x00FB88A3, - // TX power override - // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8) - ADI_REG_OVERRIDE(0,12,0xF8), - (uint32_t)0xFFFFFFFF, -}; - - -// CMD_PROP_RADIO_DIV_SETUP for 50kbps 2-GFSK -rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_50kbps2gfsk = -{ - .commandNo = 0x3807, - .status = 0x0000, - .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx - .startTrigger = {0x0, 0x0, 0x0, 0x0}, - .condition = {0x1, 0x0}, - .modulation = {0x1, 0x64}, - .symbolRate = {0xF, 0x8000}, - .rxBw = 0x24, - .preamConf = {0x4, 0x0}, - .formatConf = {0x20, 0x0, 0x1, 0x0, 0x0}, - .config = {0x0, 0x1, 0x0, 0x0}, - .txPower = 0xA73F, - .pRegOverride = pOverrides_50kbps2gfsk, - .centerFreq = 0x0364, - .intFreq = 0x8000, - .loDivider = 0x05, -}; - -// CMD_FS for 50kbps 2-GFSK -rfc_CMD_FS_t RF_cmdFs_50kbps2gfsk = -{ - .commandNo = 0x0803, - .status = 0x0000, - .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx - .startTime = 0x00000000, -// .startTrigger = {0x0, 0x0, 0x0, 0x0}, - .startTrigger.triggerType = 0x0, - .startTrigger.bEnaCmd = 0x0, - .startTrigger.triggerNo = 0x0, - .startTrigger.pastTrig = 0x0, -// .condition = {0x1, 0x0}, - .condition.rule = 0x1, - .condition.nSkip = 0x0, - .frequency = 0x0364, - .fractFreq = 0x0000, -// .synthConf = {0x0, 0x0}, - .synthConf.bTxMode = 0x0, - .synthConf.refFreq = 0x0, - .__dummy0 = 0x00, - .__dummy1 = 0x00, - .__dummy2 = 0x00, - .__dummy3 = 0x0000, -}; - -//********************************************************************************* -// 625bps LRM settings: -// Frequency: 868.00000 MHz -// Data Format: Serial mode disable -// Deviation: 5.000 kHz -// RX Filter BW: 39 kHz -// Symbol Rate: 10.00061 kBaud -// Sync Word Length: 32 Bits -// Whitening: No whitening - -// TI-RTOS RF Mode Object for Long Range Mode -RF_Mode RF_prop_625bpsLrm = -{ - .rfMode = RF_MODE_PROPRIETARY_SUB_1, - .cpePatchFxn = &rf_patch_cpe_lrm, - .mcePatchFxn = 0, - .rfePatchFxn = 0, -}; - -// Overrides for CMD_PROP_RADIO_DIV_SETUP for Long Range Mode -uint32_t pOverrides_625bpsLrm[] = -{ - // override_use_prop_lrm_rom.xml - // PHY: Use MCE ROM bank 3, RFE ROM bank 4 - MCE_RFE_OVERRIDE(0,3,0,0,4,0), - // override_synth_prop_863_930_div5.xml - // Synth: Set recommended RTRIM to 7 - HW_REG_OVERRIDE(0x4038,0x0037), - // Synth: Set Fref to 4 MHz - (uint32_t)0x000684A3, - // Synth: Configure fine calibration setting - HW_REG_OVERRIDE(0x4020,0x7F00), - // Synth: Configure fine calibration setting - HW_REG_OVERRIDE(0x4064,0x0040), - // Synth: Configure fine calibration setting - (uint32_t)0xB1070503, - // Synth: Configure fine calibration setting - (uint32_t)0x05330523, - // Synth: Set loop bandwidth after lock to 20 kHz - (uint32_t)0x0A480583, - // Synth: Set loop bandwidth after lock to 20 kHz - (uint32_t)0x7AB80603, - // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference) - ADI_REG_OVERRIDE(1,4,0x9F), - // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1) - ADI_HALFREG_OVERRIDE(1,7,0x4,0x4), - // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering - (uint32_t)0x02010403, - // Synth: Configure extra PLL filtering - (uint32_t)0x00108463, - // Synth: Increase synth programming timeout - (uint32_t)0x04B00243, - // override_phy_gfsk_rx.xml - // Rx: Set LNA bias current trim offset to 3 - (uint32_t)0x00038883, - // Rx: Set RSSI offset to adjust reported RSSI by +5 dB - (uint32_t)0x00FB88A3, - // Rx: Freeze RSSI on sync found event - HW_REG_OVERRIDE(0x6084,0x35F1), - // override_phy_gfsk_agc_reflevel_0x1a.xml - // Rx: Set AGC reference level to 0x1A - HW_REG_OVERRIDE(0x6088,0x001A), - // override_phy_rx_aaf_bw_0xd.xml - // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD) - ADI_HALFREG_OVERRIDE(0,61,0xF,0xD), - // override_phy_lrm_rom_dsss8.xml - // PHY: Configure DSSS=8 - HW_REG_OVERRIDE(0x505C,0x073C), - // override_frontend_xd.xml - // Rx: Set RSSI offset to adjust reported RSSI by +5 dB - (uint32_t)0x00FB88A3, - // TX power override - // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8) - ADI_REG_OVERRIDE(0,12,0xF8), - (uint32_t)0xFFFFFFFF, -}; - - -// CMD_PROP_RADIO_DIV_SETUP for Long Range Mode -rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_625bpsLrm = -{ - .commandNo = 0x3807, - .status = 0x0000, - .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx -// .startTrigger = {0x0, 0x0, 0x0, 0x0}, - - .startTime = 0x00000000, - .startTrigger.triggerType = 0x0, - .startTrigger.bEnaCmd = 0x0, - .startTrigger.triggerNo = 0x0, - .startTrigger.pastTrig = 0x0, -// .condition = {0x1, 0x0}, - - .condition.rule = 0x1, - .condition.nSkip = 0x0, -// .modulation = {0x0, 0x14}, - .modulation.modType = 0x1, - .modulation.deviation = 0x64, -// .symbolRate = {0xF, 0x199A}, - .symbolRate.preScale = 0xF, - .symbolRate.rateWord = 0x8000, - .rxBw = 0x20, -// .preamConf = {0x5, 0x0}, - - .preamConf.nPreamBytes = 0x4, - .preamConf.preamMode = 0x0, -// .formatConf = {0x20, 0x0, 0x0, 0x8, 0x0}, - .formatConf.nSwBits = 0x20, - .formatConf.bBitReversal = 0x0, - .formatConf.bMsbFirst = 0x1, - .formatConf.fecMode = 0x0, - .formatConf.whitenMode = 0x0, -// .config = {0x0, 0x1, 0x0, 0x0}, - .config.frontEndMode = 0x0, - .config.biasMode = 0x1, - .config.analogCfgMode = 0x0, - .config.bNoFsPowerUp = 0x0, - .txPower = 0xA73F, - .pRegOverride = pOverrides_625bpsLrm, - .centerFreq = 0x0364, - .intFreq = 0x8000, - .loDivider = 0x05, -}; - -// CMD_FS for Long Range Mode -rfc_CMD_FS_t RF_cmdFs_625bpsLrm = -{ - .commandNo = 0x0803, - .status = 0x0000, - .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx - .startTime = 0x00000000, -// .startTrigger = {0x0, 0x0, 0x0, 0x0}, - .startTrigger.triggerType = 0x0, - .startTrigger.bEnaCmd = 0x0, - .startTrigger.triggerNo = 0x0, - .startTrigger.pastTrig = 0x0, -// .condition = {0x1, 0x0}, - .condition.rule = 0x1, - .condition.nSkip = 0x0, - .frequency = 0x0364, - .fractFreq = 0x0000, -// .synthConf = {0x0, 0x0}, - .synthConf.bTxMode = 0x0, - .synthConf.refFreq = 0x0, - .__dummy0 = 0x00, - .__dummy1 = 0x00, - .__dummy2 = 0x00, - .__dummy3 = 0x0000, -}; diff --git a/src/smartrf_settings/smartrf_settings.c b/src/smartrf_settings/smartrf_settings.c index 5b8207b..40b3c84 100644 --- a/src/smartrf_settings/smartrf_settings.c +++ b/src/smartrf_settings/smartrf_settings.c @@ -3,9 +3,9 @@ //********************************************************************************* // These settings have been generated for use with TI-RTOS and cc13xxware // -// Generated by SmartRF Studio version 2.4.0 -// Tested for TI-RTOS version tirtos_simplelink_2_20_xx -// Device: CC13xx Rev. 2.1 +// Generated by SmartRF Studio version 2.4.3 (build #23) +// Tested for TI-RTOS version tirtos_simplelink_2_21_xx +// Device: CC1310 Rev. 2.1 // //********************************************************************************* @@ -17,7 +17,7 @@ // Data Format: Serial mode disable // Deviation: 25.000 kHz // Packet Length Config: Variable -// Max Packet Length: 125 +// Max Packet Length: 128 // Packet Length: 30 // RX Filter BW: 98 kHz // Symbol Rate: 50.00000 kBaud @@ -74,13 +74,14 @@ static uint32_t pOverrides[] = (uint32_t)0x02010403, // Synth: Configure extra PLL filtering (uint32_t)0x00108463, - // Synth: Increase synth programming timeout + // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us) (uint32_t)0x04B00243, + // override_phy_rx_aaf_bw_0xd.xml + // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD) + ADI_HALFREG_OVERRIDE(0,61,0xF,0xD), // override_phy_gfsk_rx.xml // Rx: Set LNA bias current trim offset to 3 (uint32_t)0x00038883, - // Rx: Set RSSI offset to adjust reported RSSI by +5 dB - (uint32_t)0x00FB88A3, // Rx: Freeze RSSI on sync found event HW_REG_OVERRIDE(0x6084,0x35F1), // override_phy_gfsk_pa_ramp_agc_reflevel_0x1a.xml @@ -88,10 +89,7 @@ static uint32_t pOverrides[] = HW_REG_OVERRIDE(0x6088,0x411A), // Tx: Configure PA ramping setting HW_REG_OVERRIDE(0x608C,0x8213), - // override_phy_rx_aaf_bw_0xd.xml - // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD) - ADI_HALFREG_OVERRIDE(0,61,0xF,0xD), - // override_frontend_xd.xml + // override_phy_rx_rssi_offset_5db.xml // Rx: Set RSSI offset to adjust reported RSSI by +5 dB (uint32_t)0x00FB88A3, // TX power override @@ -108,14 +106,28 @@ rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup = .status = 0x0000, .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx .startTime = 0x00000000, - .startTrigger = {0x0, 0x0, 0x0, 0x0}, - .condition = {0x1, 0x0}, - .modulation = {0x1, 0x64}, - .symbolRate = {0xF, 0x8000}, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .modulation.modType = 0x1, + .modulation.deviation = 0x64, + .symbolRate.preScale = 0xF, + .symbolRate.rateWord = 0x8000, .rxBw = 0x24, - .preamConf = {0x4, 0x0}, - .formatConf = {0x20, 0x0, 0x1, 0x0, 0x0}, - .config = {0x0, 0x1, 0x0, 0x0}, + .preamConf.nPreamBytes = 0x4, + .preamConf.preamMode = 0x0, + .formatConf.nSwBits = 0x20, + .formatConf.bBitReversal = 0x0, + .formatConf.bMsbFirst = 0x1, + .formatConf.fecMode = 0x0, + .formatConf.whitenMode = 0x0, + .config.frontEndMode = 0x0, + .config.biasMode = 0x1, + .config.analogCfgMode = 0x0, + .config.bNoFsPowerUp = 0x0, .txPower = 0xA73F, .pRegOverride = pOverrides, .centerFreq = 0x0364, @@ -130,11 +142,16 @@ rfc_CMD_FS_t RF_cmdFs = .status = 0x0000, .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx .startTime = 0x00000000, - .startTrigger = {0x0, 0x0, 0x0, 0x0}, - .condition = {0x1, 0x0}, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, .frequency = 0x0364, .fractFreq = 0x0000, - .synthConf = {0x0, 0x0}, + .synthConf.bTxMode = 0x0, + .synthConf.refFreq = 0x0, .__dummy0 = 0x00, .__dummy1 = 0x00, .__dummy2 = 0x00, @@ -148,9 +165,15 @@ rfc_CMD_PROP_TX_t RF_cmdPropTx = .status = 0x0000, .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx .startTime = 0x00000000, - .startTrigger = {0x0, 0x0, 0x0, 0x0}, - .condition = {0x1, 0x0}, - .pktConf = {0x0, 0x1, 0x1}, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .pktConf.bFsOff = 0x0, + .pktConf.bUseCrc = 0x1, + .pktConf.bVarLen = 0x1, .pktLen = 0x1E, // SET APPLICATION PAYLOAD LENGTH .syncWord = 0x930B51DE, .pPkt = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx @@ -163,16 +186,63 @@ rfc_CMD_PROP_RX_t RF_cmdPropRx = .status = 0x0000, .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx .startTime = 0x00000000, - .startTrigger = {0x0, 0x0, 0x0, 0x0}, - .condition = {0x1, 0x0}, - .pktConf = {0x0, 0x0, 0x0, 0x1, 0x1, 0x0, 0x0, 0x0}, - .rxConf = {0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1}, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .pktConf.bFsOff = 0x0, + .pktConf.bRepeatOk = 0x0, + .pktConf.bRepeatNok = 0x0, + .pktConf.bUseCrc = 0x1, + .pktConf.bVarLen = 0x1, + .pktConf.bChkAddress = 0x0, + .pktConf.endType = 0x0, + .pktConf.filterOp = 0x0, + .rxConf.bAutoFlushIgnored = 0x0, + .rxConf.bAutoFlushCrcErr = 0x0, + .rxConf.bIncludeHdr = 0x1, + .rxConf.bIncludeCrc = 0x0, + .rxConf.bAppendRssi = 0x0, + .rxConf.bAppendTimestamp = 0x0, + .rxConf.bAppendStatus = 0x1, .syncWord = 0x930B51DE, - .maxPktLen = 0x7D, // MAKE SURE DATA ENTRY IS LARGE ENOUGH + .maxPktLen = 0x80, // MAKE SURE DATA ENTRY IS LARGE ENOUGH .address0 = 0xAA, .address1 = 0xBB, - .endTrigger = {0x1, 0x0, 0x0, 0x0}, + .endTrigger.triggerType = 0x1, + .endTrigger.bEnaCmd = 0x0, + .endTrigger.triggerNo = 0x0, + .endTrigger.pastTrig = 0x0, .endTime = 0x00000000, .pQueue = 0, // INSERT APPLICABLE POINTER: (dataQueue_t*)&xxx .pOutput = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx }; + +// CMD_TX_TEST +rfc_CMD_TX_TEST_t RF_cmdTxTest = +{ + .commandNo = 0x0808, + .status = 0x0000, + .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx + .startTime = 0x00000000, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .config.bUseCw = 0x0, + .config.bFsOff = 0x1, + .config.whitenMode = 0x2, + .__dummy0 = 0x00, + .txWord = 0xABCD, + .__dummy1 = 0x00, + .endTrigger.triggerType = 0x1, + .endTrigger.bEnaCmd = 0x0, + .endTrigger.triggerNo = 0x0, + .endTrigger.pastTrig = 0x0, + .syncWord = 0x930B51DE, + .endTime = 0x00000000, +}; diff --git a/src/smartrf_settings/smartrf_settings.h b/src/smartrf_settings/smartrf_settings.h index 49bd1d9..005c6f7 100644 --- a/src/smartrf_settings/smartrf_settings.h +++ b/src/smartrf_settings/smartrf_settings.h @@ -5,9 +5,9 @@ //********************************************************************************* // These settings have been generated for use with TI-RTOS and cc13xxware // -// Generated by SmartRF Studio version 2.4.0 -// Tested for TI-RTOS version tirtos_simplelink_2_20_xx -// Device: CC13xx Rev. 2.1 +// Generated by SmartRF Studio version 2.4.3 (build #20) +// Tested for TI-RTOS version tirtos_simplelink_2_21_xx +// Device: CC1310 Rev. 2.1 // //********************************************************************************* #include @@ -25,8 +25,6 @@ extern rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup; extern rfc_CMD_FS_t RF_cmdFs; extern rfc_CMD_PROP_TX_t RF_cmdPropTx; extern rfc_CMD_PROP_RX_t RF_cmdPropRx; - - - +extern rfc_CMD_TX_TEST_t RF_cmdTxTest; #endif // _SMARTRF_SETTINGS_H_ diff --git a/src/smartrf_settings/smartrf_settings_predefined.c b/src/smartrf_settings/smartrf_settings_predefined.c new file mode 100644 index 0000000..da45f2d --- /dev/null +++ b/src/smartrf_settings/smartrf_settings_predefined.c @@ -0,0 +1,602 @@ + + +//********************************************************************************* +// These settings have been generated for use with TI-RTOS and cc13xxware +// +// Generated by SmartRF Studio version 2.4.3 (build #23) +// Tested for TI-RTOS version tirtos_simplelink_2_21_xx +// Device: CC1310 Rev. 2.1 +// +//********************************************************************************* + + +//********************************************************************************* +// Parameter summary +// Address: aa-bb +// Frequency: 868.00000 MHz +// Data Format: Serial mode disable +// Deviation: 25.000 kHz +// Packet Length Config: Variable +// Max Packet Length: 128 +// Packet Length: 30 +// RX Filter BW: 98 kHz +// Symbol Rate: 50.00000 kBaud +// Sync Word Length: 32 Bits +// TX Power: 14 dBm (requires define CCFG_FORCE_VDDR_HH = 1 in ccfg.c, see CC13xx/CC26xx Technical Reference Manual) +// Whitening: No whitening + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "smartrf_settings_predefined.h" + +const rfPowerConfig_t rfPowerTable[] = { + {-10, 0x08c0 }, + { 0, 0x0041 }, + { 1, 0x10c3 }, + { 2, 0x1042 }, + { 3, 0x14c4 }, + { 4, 0x18c5 }, + { 5, 0x18c6 }, + { 6, 0x1cc7 }, + { 7, 0x20c9 }, + { 8, 0x24cb }, + { 9, 0x2ccd }, + { 10, 0x38d3 }, + { 11, 0x50da }, + { 12, 0xb818 }, + { 13, 0xa63f }, /* 12.5 */ + { 14, 0xa73f }, +}; + +const uint8_t rfPowerTableSize = (sizeof(rfPowerTable) / sizeof(rfPowerConfig_t)); + +// TI-RTOS RF Mode Object +RF_Mode RF_prop_fsk = +{ + .rfMode = RF_MODE_PROPRIETARY_SUB_1, + .cpePatchFxn = &rf_patch_cpe_genfsk, + .mcePatchFxn = 0, + .rfePatchFxn = &rf_patch_rfe_genfsk, +}; + +RF_Mode RF_prop_lrm = +{ + .rfMode = RF_MODE_PROPRIETARY_SUB_1, + .cpePatchFxn = &rf_patch_cpe_lrm, + .mcePatchFxn = 0, + .rfePatchFxn = &rf_patch_rfe_lrm, +}; + +RF_Mode RF_prop_ook = +{ + .rfMode = RF_MODE_PROPRIETARY_SUB_1, + .cpePatchFxn = &rf_patch_cpe_genook, + .mcePatchFxn = &rf_patch_mce_genook, + .rfePatchFxn = &rf_patch_rfe_genook, +}; + +RF_Mode RF_prop_hsm = +{ + .rfMode = RF_MODE_PROPRIETARY_SUB_1, + .cpePatchFxn = 0, + .mcePatchFxn = &rf_patch_mce_hsp_4mbps, + .rfePatchFxn = &rf_patch_rfe_hsp_4mbps, +}; + +// Overrides for CMD_PROP_RADIO_DIV_SETUP +uint32_t pOverrides_fsk[] = +{ + // override_use_patch_prop_genfsk.xml + // PHY: Use MCE ROM bank 4, RFE RAM patch + MCE_RFE_OVERRIDE(0,4,0,1,0,0), + // override_synth_prop_863_930_div5.xml + // Synth: Set recommended RTRIM to 7 + HW_REG_OVERRIDE(0x4038,0x0037), + // Synth: Set Fref to 4 MHz + (uint32_t)0x000684A3, + // Synth: Configure fine calibration setting + HW_REG_OVERRIDE(0x4020,0x7F00), + // Synth: Configure fine calibration setting + HW_REG_OVERRIDE(0x4064,0x0040), + // Synth: Configure fine calibration setting + (uint32_t)0xB1070503, + // Synth: Configure fine calibration setting + (uint32_t)0x05330523, + // Synth: Set loop bandwidth after lock to 20 kHz + (uint32_t)0x0A480583, + // Synth: Set loop bandwidth after lock to 20 kHz + (uint32_t)0x7AB80603, + // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference) + ADI_REG_OVERRIDE(1,4,0x9F), + // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1) + ADI_HALFREG_OVERRIDE(1,7,0x4,0x4), + // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering + (uint32_t)0x02010403, + // Synth: Configure extra PLL filtering + (uint32_t)0x00108463, + // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us) + (uint32_t)0x04B00243, + // override_phy_rx_aaf_bw_0xd.xml + // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD) + ADI_HALFREG_OVERRIDE(0,61,0xF,0xD), + // override_phy_gfsk_rx.xml + // Rx: Set LNA bias current trim offset to 3 + (uint32_t)0x00038883, + // Rx: Freeze RSSI on sync found event + HW_REG_OVERRIDE(0x6084,0x35F1), + // override_phy_gfsk_pa_ramp_agc_reflevel_0x1a.xml + // Tx: Enable PA ramping (0x41). Rx: Set AGC reference level to 0x1A. + HW_REG_OVERRIDE(0x6088,0x411A), + // Tx: Configure PA ramping setting + HW_REG_OVERRIDE(0x608C,0x8213), + // override_phy_rx_rssi_offset_5db.xml + // Rx: Set RSSI offset to adjust reported RSSI by +5 dB + (uint32_t)0x00FB88A3, + // TX power override + // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8) + ADI_REG_OVERRIDE(0,12,0xF8), + (uint32_t)0xFFFFFFFF, +}; + + +// Overrides for CMD_PROP_RADIO_DIV_SETUP LRM +uint32_t pOverrides_lrm[] = +{ + // override_use_patch_prop_lrm.xml + // PHY: Use MCE ROM bank 3, RFE RAM patch + MCE_RFE_OVERRIDE(0,3,0,1,0,0), + // override_synth_prop_863_930_div5.xml + // Synth: Set recommended RTRIM to 7 + HW_REG_OVERRIDE(0x4038,0x0037), + // Synth: Set Fref to 4 MHz + (uint32_t)0x000684A3, + // Synth: Configure fine calibration setting + HW_REG_OVERRIDE(0x4020,0x7F00), + // Synth: Configure fine calibration setting + HW_REG_OVERRIDE(0x4064,0x0040), + // Synth: Configure fine calibration setting + (uint32_t)0xB1070503, + // Synth: Configure fine calibration setting + (uint32_t)0x05330523, + // Synth: Set loop bandwidth after lock to 20 kHz + (uint32_t)0x0A480583, + // Synth: Set loop bandwidth after lock to 20 kHz + (uint32_t)0x7AB80603, + // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference) + ADI_REG_OVERRIDE(1,4,0x9F), + // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1) + ADI_HALFREG_OVERRIDE(1,7,0x4,0x4), + // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering + (uint32_t)0x02010403, + // Synth: Configure extra PLL filtering + (uint32_t)0x00108463, + // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us) + (uint32_t)0x04B00243, + // override_phy_rx_aaf_bw_0xd.xml + // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD) + ADI_HALFREG_OVERRIDE(0,61,0xF,0xD), + // override_phy_gfsk_rx.xml + // Rx: Set LNA bias current trim offset to 3 + (uint32_t)0x00038883, + // Rx: Freeze RSSI on sync found event + HW_REG_OVERRIDE(0x6084,0x35F1), + // override_phy_gfsk_pa_ramp_agc_reflevel_0x1a.xml + // Tx: Enable PA ramping (0x41). Rx: Set AGC reference level to 0x1A. + HW_REG_OVERRIDE(0x6088,0x411A), + // Tx: Configure PA ramping setting + HW_REG_OVERRIDE(0x608C,0x8213), + // override_phy_lrm_rom_dsss8.xml + // PHY: Configure DSSS=8 + HW_REG_OVERRIDE(0x505C,0x073C), + // override_phy_rx_rssi_offset_5db.xml + // Rx: Set RSSI offset to adjust reported RSSI by +5 dB + (uint32_t)0x00FB88A3, + // TX power override + // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8) + ADI_REG_OVERRIDE(0,12,0xF8), + (uint32_t)0xFFFFFFFF, +}; + +// Overrides for CMD_PROP_RADIO_DIV_SETUP OOK +uint32_t pOverrides_ook[] = +{ + // override_use_patch_prop_genook_nrz.xml + // PHY: Use MCE RAM patch, RFE RAM patch + MCE_RFE_OVERRIDE(1,0,0,1,0,0), + // override_synth_prop_863_930_div5.xml + // Synth: Set recommended RTRIM to 7 + HW_REG_OVERRIDE(0x4038,0x0037), + // Synth: Set Fref to 4 MHz + (uint32_t)0x000684A3, + // Synth: Configure fine calibration setting + HW_REG_OVERRIDE(0x4020,0x7F00), + // Synth: Configure fine calibration setting + HW_REG_OVERRIDE(0x4064,0x0040), + // Synth: Configure fine calibration setting + (uint32_t)0xB1070503, + // Synth: Configure fine calibration setting + (uint32_t)0x05330523, + // Synth: Set loop bandwidth after lock to 20 kHz + (uint32_t)0x0A480583, + // Synth: Set loop bandwidth after lock to 20 kHz + (uint32_t)0x7AB80603, + // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference) + ADI_REG_OVERRIDE(1,4,0x9F), + // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1) + ADI_HALFREG_OVERRIDE(1,7,0x4,0x4), + // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering + (uint32_t)0x02010403, + // Synth: Configure extra PLL filtering + (uint32_t)0x00108463, + // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us) + (uint32_t)0x04B00243, + // override_phy_rx_aaf_bw_0xd.xml + // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD) + ADI_HALFREG_OVERRIDE(0,61,0xF,0xD), + // override_phy_agc_reflevel_0x19.xml + // Rx: Set AGC reference level to 0x19 + HW_REG_OVERRIDE(0x6088,0x0019), + // override_phy_ook_rx.xml + // Rx: Set LNA bias current trim offset to 3 + (uint32_t)0x00038883, + // Rx: Freeze RSSI on sync found event + HW_REG_OVERRIDE(0x6084,0x35F1), + // override_phy_ook_tx_symbol_4_8kbaud.xml + // Tx: Set symbol duty-cycle delay before symbol ramp-down to 0x78 (=120). This means symbol ramp down will begin after reaching (T_symbol/2) plus wait a delay of (120/2)=60 us. + HW_REG_OVERRIDE(0x52B8,0x8078), + // override_phy_ook_rx_filter_iir_k_1div4.xml + // Rx: Set data filter to IIR, k=1/4. Explanation: 0x0000: k=1 (no filter), 0x0001: k=1/2, 0x0002: k=1/4, 0x0003: k=1/8. + HW_REG_OVERRIDE(0x5204,0x0002), + // override_phy_ook_tx_power_max.xml + // Tx: Ramp symbol shape to maximum PA level (0x7200). Explanation: min power=0x6100, ..., max power=0x7200. Bits [15:13] sets wait delay per PA ramp level. Bits[12:8] sets number of PA levels to use from ramp LUT (range 1-18). Bits[7:0] reserved. + HW_REG_OVERRIDE(0x6098,0x7200), + // override_phy_rx_rssi_offset_5db.xml + // Rx: Set RSSI offset to adjust reported RSSI by +5 dB + (uint32_t)0x00FB88A3, + (uint32_t)0xFFFFFFFF, +}; + +// Overrides for CMD_RADIO_SETUP HSM +uint32_t shapeovr[] = {0x00000000, 0x00000000, 0x00000000, 0x12010000, 0x72685C43, 0x8986817A}; + +uint32_t pOverrides_hsm[] = +{ + MCE_RFE_OVERRIDE(1, 0, 0, 1, 0, 0), + ADI_HALFREG_OVERRIDE(0, 61, 0xF, 0x0), + ADI_REG_OVERRIDE(1, 4, 0x9F), + ADI_HALFREG_OVERRIDE(1, 7, 0x4, 0x4), + HW_REG_OVERRIDE(0x4038, 0x003A), + HW_REG_OVERRIDE(0x4020, 0x7F00), + HW_REG_OVERRIDE(0x4064, 0x0040), + 0x000604A3, + 0xB1070503, + 0x05330523, + 0x0A480583, + 0x7AB80603, + 0x00108463, + 0x02010403, + 0x04B00243, + 0x00038883, + 0xC0040031, + (uint32_t) &shapeovr[0], + 0xC0040021, + (uint32_t) (0x00000035), + 0x000388A3, + HW_REG_OVERRIDE(0x50B4, 0x6666), + HW_REG_OVERRIDE(0x50B8, 0x000C), + (uint32_t)0xFFFFFFFF, +}; + + +// CMD_PROP_RADIO_DIV_SETUP FSK +rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_fsk = +{ + .commandNo = 0x3807, + .status = 0x0000, + .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx + .startTime = 0x00000000, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .modulation.modType = 0x1, + .modulation.deviation = 0x64, + .symbolRate.preScale = 0xF, + .symbolRate.rateWord = 0x8000, + .rxBw = 0x24, + .preamConf.nPreamBytes = 0x4, + .preamConf.preamMode = 0x0, + .formatConf.nSwBits = 0x20, + .formatConf.bBitReversal = 0x0, + .formatConf.bMsbFirst = 0x1, + .formatConf.fecMode = 0x0, + .formatConf.whitenMode = 0x0, + .config.frontEndMode = 0x0, + .config.biasMode = 0x1, + .config.analogCfgMode = 0x0, + .config.bNoFsPowerUp = 0x0, + .txPower = 0xA73F, + .pRegOverride = pOverrides_fsk, + .centerFreq = 0x0364, + .intFreq = 0x8000, + .loDivider = 0x05, +}; + +// CMD_PROP_RADIO_DIV_SETUP LRM +rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_lrm = +{ + .commandNo = 0x3807, + .status = 0x0000, + .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx + .startTime = 0x00000000, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .modulation.modType = 0x0, + .modulation.deviation = 0x14, + .symbolRate.preScale = 0xF, + .symbolRate.rateWord = 0x199A, + .rxBw = 0x20, + .preamConf.nPreamBytes = 0x5, + .preamConf.preamMode = 0x0, + .formatConf.nSwBits = 0x20, + .formatConf.bBitReversal = 0x0, + .formatConf.bMsbFirst = 0x0, + .formatConf.fecMode = 0x8, + .formatConf.whitenMode = 0x0, + .config.frontEndMode = 0x0, + .config.biasMode = 0x1, + .config.analogCfgMode = 0x0, + .config.bNoFsPowerUp = 0x0, + .txPower = 0xA73F, + .pRegOverride = pOverrides_lrm, + .centerFreq = 0x0364, + .intFreq = 0x8000, + .loDivider = 0x05, +}; + +// CMD_PROP_RADIO_DIV_SETUP OOK +rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_ook = +{ + .commandNo = 0x3807, + .status = 0x0000, + .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx + .startTime = 0x00000000, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .modulation.modType = 0x2, + .modulation.deviation = 0x0, + .symbolRate.preScale = 0xF, + .symbolRate.rateWord = 0xC4A, + .rxBw = 0x20, + .preamConf.nPreamBytes = 0x4, + .preamConf.preamMode = 0x0, + .formatConf.nSwBits = 0x20, + .formatConf.bBitReversal = 0x0, + .formatConf.bMsbFirst = 0x1, + .formatConf.fecMode = 0x0, + .formatConf.whitenMode = 0x1, + .config.frontEndMode = 0x0, + .config.biasMode = 0x1, + .config.analogCfgMode = 0x0, + .config.bNoFsPowerUp = 0x0, + .txPower = 0xA73F, + .pRegOverride = pOverrides_ook, + .centerFreq = 0x0364, + .intFreq = 0x8000, + .loDivider = 0x05, +}; + +// CMD_RADIO_SETUP HSM +rfc_CMD_RADIO_SETUP_t RF_cmdRadioSetup_hsm = +{ + .commandNo = CMD_RADIO_SETUP, + .status = 0x0000, + .pNextOp = 0x00000000, + .startTime = 0x00000000, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .mode = 0x05, + .loDivider = 5, + .config.frontEndMode = 0x0, + .config.biasMode = 0x1, + .config.bNoFsPowerUp = 0, + .txPower = 0x23F, + .pRegOverride = pOverrides_hsm, +}; + + +// CMD_TX_HS +rfc_CMD_HS_TX_t RF_cmdTxHS = +{ + .commandNo = 0x3841, + .status = 0x0000, + .pNextOp = 0x00000000, + .startTime = 0x00000000, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .pktConf.bFsOff = 0x0, + .pktConf.bUseCrc = 0x1, + .pktConf.bVarLen = 0x1, + .pQueue = 0, +}; + +// CMD_RX_HS +rfc_CMD_HS_RX_t RF_cmdRxHS = +{ + .commandNo = CMD_HS_RX, + .status = 0x0000, + .pNextOp = 0x00000000, + .startTime = 0x00000000, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .pktConf.bFsOff = 0, + .pktConf.bUseCrc = 1, + .pktConf.bVarLen = 1, + .pktConf.bRepeatOk = 0, + .pktConf.bRepeatNok = 0, + .pktConf.addressMode = 0, + .rxConf.bAutoFlushCrcErr = 0, + .rxConf.bIncludeLen = 1, + .rxConf.bIncludeCrc = 0, + .rxConf.bAppendStatus = 0, + .rxConf.bAppendTimestamp = 0, + .maxPktLen = 0, + .address0 = 0, + .address1 = 0, + .__dummy0 = 0, + .endTrigger.triggerType = 1, + .endTrigger.bEnaCmd = 0, + .endTrigger.triggerNo = 0, + .endTrigger.pastTrig = 0, + .endTime = 0, + .pQueue = 0, + .pOutput = 0, +}; + +// CMD_FS +rfc_CMD_FS_t RF_cmdFs_preDef = +{ + .commandNo = 0x0803, + .status = 0x0000, + .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx + .startTime = 0x00000000, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .frequency = 0x0364, + .fractFreq = 0x0000, + .synthConf.bTxMode = 0x0, + .synthConf.refFreq = 0x0, + .__dummy0 = 0x00, + .__dummy1 = 0x00, + .__dummy2 = 0x00, + .__dummy3 = 0x0000, +}; + +//Tx command +rfc_CMD_PROP_TX_t RF_cmdPropTx_preDef = +{ + .commandNo = 0x3801, + .status = 0x0000, + .pNextOp = 0, + .startTime = 0x00000000, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .pktConf.bFsOff = 0x0, + .pktConf.bUseCrc = 0x1, + .pktConf.bVarLen = 0x1, + .pktLen = 0x1E, // SET APPLICATION PAYLOAD LENGTH + .syncWord = 0x930B51DE, + .pPkt = 0, +}; + +//Rx command +rfc_CMD_PROP_RX_ADV_t RF_cmdPropRxAdv_preDef = { + .commandNo = 0x3804, + .status = 0x0000, + .pNextOp = 0, + .startTime = 0x00000000, + .startTrigger.triggerType = 0x0, + .startTrigger.bEnaCmd = 0x0, + .startTrigger.triggerNo = 0x0, + .startTrigger.pastTrig = 0x0, + .condition.rule = 0x1, + .condition.nSkip = 0x0, + .pktConf.bFsOff = 0x0, + .pktConf.bRepeatOk = 0x0, + .pktConf.bRepeatNok = 0x0, + .pktConf.bUseCrc = 0x1, + .pktConf.bCrcIncSw = 0x0, + .pktConf.bCrcIncHdr = 0x1, + .pktConf.endType = 0x0, + .pktConf.filterOp = 0x1, + .rxConf.bAutoFlushIgnored = 0x0, + .rxConf.bAutoFlushCrcErr = 0x0, + .rxConf.bIncludeHdr = 0x1, + .rxConf.bIncludeCrc = 0x0, + .rxConf.bAppendRssi = 0x0, + .rxConf.bAppendTimestamp = 0x0, + .rxConf.bAppendStatus = 0x0, + .syncWord0 = 0x930B51DE, + .syncWord1 = 0, + .maxPktLen = 0, + .hdrConf.numHdrBits = 8, + .hdrConf.lenPos = 0, + .hdrConf.numLenBits = 8, + .addrConf.addrType = 0, + .addrConf.addrSize = 0, + .addrConf.addrPos = 0, + .addrConf.numAddr = 1, + .lenOffset = 0, + .endTrigger.triggerType = 0x1, + .endTrigger.bEnaCmd = 0x0, + .endTrigger.triggerNo = 0x0, + .endTrigger.pastTrig = 0x0, + .endTime = 0x00000000, + .pAddr = 0, + .pQueue = 0, + .pOutput = 0, +}; + +/* RF command pointers for easylink */ +RF_Mode *RF_pProp_fsk = &RF_prop_fsk; +RF_Mode *RF_pProp_lrm = &RF_prop_lrm; +RF_Mode *RF_pProp_ook = &RF_prop_ook; +RF_Mode *RF_pProp_hsm = &RF_prop_hsm; +/* Stub out nsupported modes */ +RF_Mode *RF_pProp_2_4G_fsk = 0; + +rfc_CMD_PROP_RADIO_DIV_SETUP_t *RF_pCmdPropRadioDivSetup_fsk = &RF_cmdPropRadioDivSetup_fsk; +rfc_CMD_PROP_RADIO_DIV_SETUP_t *RF_pCmdPropRadioDivSetup_lrm = &RF_cmdPropRadioDivSetup_lrm; +rfc_CMD_PROP_RADIO_DIV_SETUP_t *RF_pCmdPropRadioDivSetup_ook = &RF_cmdPropRadioDivSetup_ook; +rfc_CMD_RADIO_SETUP_t *RF_pCmdRadioSetup_hsm = &RF_cmdRadioSetup_hsm; +/* Stub out nsupported modes */ +rfc_CMD_PROP_RADIO_SETUP_t *RF_pCmdPropRadioSetup_2_4G_fsk = 0; + +rfc_CMD_HS_TX_t *RF_pCmdTxHS = &RF_cmdTxHS; +rfc_CMD_HS_RX_t *RF_pCmdRxHS = &RF_cmdRxHS; +rfc_CMD_FS_t *RF_pCmdFs_preDef = &RF_cmdFs_preDef; +rfc_CMD_PROP_TX_t *RF_pCmdPropTx_preDef = &RF_cmdPropTx_preDef; +rfc_CMD_PROP_RX_ADV_t *RF_pCmdPropRxAdv_preDef = &RF_cmdPropRxAdv_preDef; diff --git a/src/smartrf_settings/smartrf_settings_predefined.h b/src/smartrf_settings/smartrf_settings_predefined.h new file mode 100644 index 0000000..9423505 --- /dev/null +++ b/src/smartrf_settings/smartrf_settings_predefined.h @@ -0,0 +1,49 @@ +#ifndef SMARTRF_SETTINGS_PREDEFINED +#define SMARTRF_SETTINGS_PREDEFINED + + +//********************************************************************************* +// These settings have been generated for use with TI-RTOS and cc13xxware +// +// Generated by SmartRF Studio version 2.4.3 (build #20). +// Tested for TI-RTOS version tirtos_simplelink_2_20_xx +// Device: CC13xx Rev. 2.1 +// +//********************************************************************************* +#include +#include +#include +#include +#include +#include + +// TX Power dBm lookup table - values from SmartRF Studio +typedef struct { + int8_t dbm; + uint16_t txPower; /* Value for the PROP_DIV_RADIO_SETUP.txPower field */ +} rfPowerConfig_t; + +extern const uint8_t rfPowerTableSize; +extern const rfPowerConfig_t rfPowerTable[]; + +// RF Core API commands +/* RF command pointers for easylink */ +extern RF_Mode *RF_pProp_fsk; +extern RF_Mode *RF_pProp_lrm; +extern RF_Mode *RF_pProp_ook; +extern RF_Mode *RF_pProp_hsm; +extern RF_Mode *RF_pProp_2_4G_fsk; + +extern rfc_CMD_PROP_RADIO_DIV_SETUP_t *RF_pCmdPropRadioDivSetup_fsk; +extern rfc_CMD_PROP_RADIO_DIV_SETUP_t *RF_pCmdPropRadioDivSetup_lrm; +extern rfc_CMD_PROP_RADIO_DIV_SETUP_t *RF_pCmdPropRadioDivSetup_ook; +extern rfc_CMD_RADIO_SETUP_t *RF_pCmdRadioSetup_hsm; +extern rfc_CMD_PROP_RADIO_SETUP_t *RF_pCmdPropRadioSetup_2_4G_fsk; + +extern rfc_CMD_HS_TX_t *RF_pCmdTxHS; +extern rfc_CMD_HS_RX_t *RF_pCmdRxHS; +extern rfc_CMD_FS_t *RF_pCmdFs_preDef; +extern rfc_CMD_PROP_TX_t *RF_pCmdPropTx_preDef; +extern rfc_CMD_PROP_RX_ADV_t *RF_pCmdPropRxAdv_preDef; + +#endif // SMARTRF_SETTINGS_PREDEFINED