From d176a6d17ea2c7e022aad9d21461168d3cc59473 Mon Sep 17 00:00:00 2001
From: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com>
Date: Wed, 14 Dec 2022 16:43:03 -0500
Subject: [PATCH] align Can builder with Pin trait convention

---
 examples/can.rs          |  4 ++--
 examples/rtic_can_log.rs | 10 +++++-----
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/examples/can.rs b/examples/can.rs
index fec571fc..0067e683 100644
--- a/examples/can.rs
+++ b/examples/can.rs
@@ -41,11 +41,11 @@ fn main() -> ! {
 
     let (can1_builder, _) = peripherals.can.clock(
         &mut peripherals.ccm.handle,
-        bsp::hal::ccm::can::ClockSelect::Pll2,
+        bsp::hal::ccm::can::ClockSelect::OSC,
         bsp::hal::ccm::can::PrescalarSelect::DIVIDE_1,
     );
 
-    let mut can1 = can1_builder.build();
+    let mut can1 = can1_builder.build(pins.p22, pins.p23);
     
     can1.set_baud_rate(1_000_000);
     can1.set_max_mailbox(16);
diff --git a/examples/rtic_can_log.rs b/examples/rtic_can_log.rs
index ff12c92e..7b573dc2 100644
--- a/examples/rtic_can_log.rs
+++ b/examples/rtic_can_log.rs
@@ -68,13 +68,13 @@ mod app {
 
         let pins = bsp::pins::t40::from_pads(cx.device.iomuxc);
 
-        let (can1_builder, _) = cx.device.can.clock(
-            &mut cx.device.ccm.handle,
-            bsp::hal::ccm::can::ClockSelect::Pll2,
+        let (can1_builder, _) = peripherals.can.clock(
+            &mut peripherals.ccm.handle,
+            bsp::hal::ccm::can::ClockSelect::OSC,
             bsp::hal::ccm::can::PrescalarSelect::DIVIDE_1,
         );
-
-        let can1: bsp::hal::can::CAN<U1> = can1_builder.build();
+    
+        let mut can1 = can1_builder.build(pins.p22, pins.p23);
 
         // The queue used for buffering bytes.
         let (_q_tx, q_rx) = cx.local.queue.split();