From 346b9fe80322e69b77f647cf705f0024ebd56f92 Mon Sep 17 00:00:00 2001 From: TIHan Date: Tue, 28 Mar 2023 19:09:29 -0700 Subject: [PATCH 1/3] Initial work --- src/coreclr/jit/codegenarm.cpp | 6 ++++++ src/coreclr/jit/codegenarm64.cpp | 6 ++++++ src/coreclr/jit/codegenxarch.cpp | 6 ++++++ 3 files changed, 18 insertions(+) diff --git a/src/coreclr/jit/codegenarm.cpp b/src/coreclr/jit/codegenarm.cpp index 2a49dbdd60db6..df7f579d37a2e 100644 --- a/src/coreclr/jit/codegenarm.cpp +++ b/src/coreclr/jit/codegenarm.cpp @@ -250,6 +250,12 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre attr = EA_SET_FLG(attr, EA_BYREF_FLG); } + // This is 'null', so do not initially GC track the register. + if ((targetType == TYP_REF) && (cnsVal == 0)) + { + attr = EA_REMOVE_FLG(attr, EA_GCREF_FLG); + } + instGen_Set_Reg_To_Imm(attr, targetReg, cnsVal); regSet.verifyRegUsed(targetReg); } diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index 63a5f3a452d04..a3e69deb3f1e5 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -2324,6 +2324,12 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre attr = EA_SET_FLG(attr, EA_BYREF_FLG); } + // This is 'null', so do not initially GC track the register. + if ((targetType == TYP_REF) && (cnsVal == 0)) + { + attr = EA_REMOVE_FLG(attr, EA_GCREF_FLG); + } + instGen_Set_Reg_To_Imm(attr, targetReg, cnsVal, INS_FLAGS_DONT_CARE DEBUGARG(con->gtTargetHandle) DEBUGARG(con->gtFlags)); regSet.verifyRegUsed(targetReg); diff --git a/src/coreclr/jit/codegenxarch.cpp b/src/coreclr/jit/codegenxarch.cpp index 5205c46b92756..0a2ddb96164cf 100644 --- a/src/coreclr/jit/codegenxarch.cpp +++ b/src/coreclr/jit/codegenxarch.cpp @@ -451,6 +451,12 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre attr = EA_SET_FLG(attr, EA_BYREF_FLG); } + // This is 'null', so do not initially GC track the register. + if ((targetType == TYP_REF) && (cnsVal == 0)) + { + attr = EA_REMOVE_FLG(attr, EA_GCREF_FLG); + } + instGen_Set_Reg_To_Imm(attr, targetReg, cnsVal, INS_FLAGS_DONT_CARE DEBUGARG(con->gtTargetHandle) DEBUGARG(con->gtFlags)); regSet.verifyRegUsed(targetReg); From 935e09a99d268dd8ee12b006fa0033d2a50870a7 Mon Sep 17 00:00:00 2001 From: TIHan Date: Tue, 28 Mar 2023 22:04:43 -0700 Subject: [PATCH 2/3] Added genCodeForReuseVal --- src/coreclr/jit/codegen.h | 1 + src/coreclr/jit/codegenarm.cpp | 6 ------ src/coreclr/jit/codegenarm64.cpp | 6 ------ src/coreclr/jit/codegenarmarch.cpp | 4 +--- src/coreclr/jit/codegencommon.cpp | 27 +++++++++++++++++++++++++++ src/coreclr/jit/codegenxarch.cpp | 10 +--------- 6 files changed, 30 insertions(+), 24 deletions(-) diff --git a/src/coreclr/jit/codegen.h b/src/coreclr/jit/codegen.h index 414cd0ec1db7b..7f43b9185abe7 100644 --- a/src/coreclr/jit/codegen.h +++ b/src/coreclr/jit/codegen.h @@ -1120,6 +1120,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX void genCodeForPhysReg(GenTreePhysReg* tree); void genCodeForNullCheck(GenTreeIndir* tree); void genCodeForCmpXchg(GenTreeCmpXchg* tree); + void genCodeForReuseVal(GenTree* treeNode); void genAlignStackBeforeCall(GenTreePutArgStk* putArgStk); void genAlignStackBeforeCall(GenTreeCall* call); diff --git a/src/coreclr/jit/codegenarm.cpp b/src/coreclr/jit/codegenarm.cpp index df7f579d37a2e..2a49dbdd60db6 100644 --- a/src/coreclr/jit/codegenarm.cpp +++ b/src/coreclr/jit/codegenarm.cpp @@ -250,12 +250,6 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre attr = EA_SET_FLG(attr, EA_BYREF_FLG); } - // This is 'null', so do not initially GC track the register. - if ((targetType == TYP_REF) && (cnsVal == 0)) - { - attr = EA_REMOVE_FLG(attr, EA_GCREF_FLG); - } - instGen_Set_Reg_To_Imm(attr, targetReg, cnsVal); regSet.verifyRegUsed(targetReg); } diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index a3e69deb3f1e5..63a5f3a452d04 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -2324,12 +2324,6 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre attr = EA_SET_FLG(attr, EA_BYREF_FLG); } - // This is 'null', so do not initially GC track the register. - if ((targetType == TYP_REF) && (cnsVal == 0)) - { - attr = EA_REMOVE_FLG(attr, EA_GCREF_FLG); - } - instGen_Set_Reg_To_Imm(attr, targetReg, cnsVal, INS_FLAGS_DONT_CARE DEBUGARG(con->gtTargetHandle) DEBUGARG(con->gtFlags)); regSet.verifyRegUsed(targetReg); diff --git a/src/coreclr/jit/codegenarmarch.cpp b/src/coreclr/jit/codegenarmarch.cpp index a93183c31f2cc..1db3591b794fb 100644 --- a/src/coreclr/jit/codegenarmarch.cpp +++ b/src/coreclr/jit/codegenarmarch.cpp @@ -143,9 +143,7 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode) // setting the GTF_REUSE_REG_VAL flag. if (treeNode->IsReuseRegVal()) { - // For now, this is only used for constant nodes. - assert(treeNode->OperIs(GT_CNS_INT, GT_CNS_DBL, GT_CNS_VEC)); - JITDUMP(" TreeNode is marked ReuseReg\n"); + genCodeForReuseVal(treeNode); return; } diff --git a/src/coreclr/jit/codegencommon.cpp b/src/coreclr/jit/codegencommon.cpp index 9fd3a65514991..6763383c49e84 100644 --- a/src/coreclr/jit/codegencommon.cpp +++ b/src/coreclr/jit/codegencommon.cpp @@ -9442,3 +9442,30 @@ bool CodeGen::genCanOmitNormalizationForBswap16(GenTree* tree) return (cast->gtCastType == TYP_USHORT) || (cast->gtCastType == TYP_SHORT); } + +//---------------------------------------------------------------------- +// genCodeForReuseVal: Generate code for a node marked with re-using a register. +// +// Arguments: +// tree - The node marked with re-using a register +// +// Remarks: +// Generates nothing, except for when the node is a CNS_INT(0) where +// we will define a new label to propagate GC info. We want to do this +// because if the node is a CNS_INT(0) and is re-using a register, +// that register could have been used for a CNS_INT(ref null) that is GC +// tracked. +// +void CodeGen::genCodeForReuseVal(GenTree* treeNode) +{ + assert(treeNode->IsReuseRegVal()); + + // For now, this is only used for constant nodes. + assert(treeNode->OperIs(GT_CNS_INT, GT_CNS_DBL, GT_CNS_VEC)); + JITDUMP(" TreeNode is marked ReuseReg\n"); + + if (treeNode->IsIntegralConst(0)) + { + genDefineTempLabel(genCreateTempLabel()); + } +} diff --git a/src/coreclr/jit/codegenxarch.cpp b/src/coreclr/jit/codegenxarch.cpp index 0a2ddb96164cf..cb5152f3c8413 100644 --- a/src/coreclr/jit/codegenxarch.cpp +++ b/src/coreclr/jit/codegenxarch.cpp @@ -451,12 +451,6 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre attr = EA_SET_FLG(attr, EA_BYREF_FLG); } - // This is 'null', so do not initially GC track the register. - if ((targetType == TYP_REF) && (cnsVal == 0)) - { - attr = EA_REMOVE_FLG(attr, EA_GCREF_FLG); - } - instGen_Set_Reg_To_Imm(attr, targetReg, cnsVal, INS_FLAGS_DONT_CARE DEBUGARG(con->gtTargetHandle) DEBUGARG(con->gtFlags)); regSet.verifyRegUsed(targetReg); @@ -1710,9 +1704,7 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode) // setting the GTF_REUSE_REG_VAL flag. if (treeNode->IsReuseRegVal()) { - // For now, this is only used for constant nodes. - assert((treeNode->OperIsConst())); - JITDUMP(" TreeNode is marked ReuseReg\n"); + genCodeForReuseVal(treeNode); return; } From 3e6c2f8492f3f81f2700716110ea72eb8be85c8f Mon Sep 17 00:00:00 2001 From: TIHan Date: Wed, 29 Mar 2023 12:14:58 -0700 Subject: [PATCH 3/3] Only create a label if the current IG is not empty --- src/coreclr/jit/codegencommon.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/coreclr/jit/codegencommon.cpp b/src/coreclr/jit/codegencommon.cpp index 6763383c49e84..2b0dd724a856e 100644 --- a/src/coreclr/jit/codegencommon.cpp +++ b/src/coreclr/jit/codegencommon.cpp @@ -9464,7 +9464,7 @@ void CodeGen::genCodeForReuseVal(GenTree* treeNode) assert(treeNode->OperIs(GT_CNS_INT, GT_CNS_DBL, GT_CNS_VEC)); JITDUMP(" TreeNode is marked ReuseReg\n"); - if (treeNode->IsIntegralConst(0)) + if (treeNode->IsIntegralConst(0) && GetEmitter()->emitCurIGnonEmpty()) { genDefineTempLabel(genCreateTempLabel()); }