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Makefile
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Makefile
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CC = gcc
CFLAGS = -g -Wall
OBJS = main.o util.o scan.o parse.o symtab.o analyze.o code.o cgen.o
tiny: $(OBJS)
$(CC) $(CFLAGS) -o tiny $(OBJS)
main.o: main.c globals.h util.h scan.h parse.h analyze.h cgen.h
$(CC) $(CFLAGS) -c main.c
util.o: util.c util.h globals.h
$(CC) $(CFLAGS) -c util.c
scan.o: scan.c scan.h util.h globals.h
$(CC) $(CFLAGS) -c scan.c
parse.o: parse.c parse.h scan.h globals.h util.h
$(CC) $(CFLAGS) -c parse.c
symtab.o: symtab.c symtab.h
$(CC) $(CFLAGS) -c symtab.c
analyze.o: analyze.c globals.h symtab.h analyze.h
$(CC) $(CFLAGS) -c analyze.c
code.o: code.c code.h globals.h
$(CC) $(CFLAGS) -c code.c
cgen.o: cgen.c globals.h symtab.h code.h cgen.h
$(CC) $(CFLAGS) -c cgen.c
clean:
rm -rf tiny
rm -rf tm
rm -rf main.o
rm -rf util.o
rm -rf scan.o
rm -rf parse.o
rm -rf symtab.o
rm -rf analyze.o
rm -rf code.o
rm -rf cgen.o
rm -rf tm.o
rm -rf *.o
tm: tm.c
$(CC) $(CFLAGS) -o tm tm.c
all: tiny tm