add gmac to edge

chraac · May 11, 2024 · a3d45cf · a3d45cf
1 parent 2f28669
commit a3d45cf
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Showing 8 changed files with 6,061 additions and 26 deletions.
diff --git a/config/kernel/linux-sunxi64-current.config b/config/kernel/linux-sunxi64-current.config
@@ -21,7 +21,6 @@ CONFIG_PAHOLE_VERSION=125
 CONFIG_IRQ_WORK=y
 CONFIG_BUILDTIME_TABLE_SORT=y
 CONFIG_THREAD_INFO_IN_TASK=y
-CONFIG_DEBUG_INFO=y
 
 #
 # General setup
@@ -2439,7 +2438,6 @@ CONFIG_NET_VENDOR_ALACRITECH=y
 CONFIG_NET_VENDOR_ALLWINNER=y
 CONFIG_SUN4I_EMAC=y
 CONFIG_SUNXI_GMAC=m
-CONFIG_PWM_SUNXI_ENHANCE=y
 # CONFIG_ALTERA_TSE is not set
 CONFIG_NET_VENDOR_AMAZON=y
 CONFIG_NET_VENDOR_AMD=y

diff --git a/config/kernel/linux-sunxi64-edge.config b/config/kernel/linux-sunxi64-edge.config
@@ -2446,6 +2446,7 @@ CONFIG_MDIO=m
 CONFIG_NET_VENDOR_ALACRITECH=y
 CONFIG_NET_VENDOR_ALLWINNER=y
 CONFIG_SUN4I_EMAC=y
+CONFIG_SUNXI_GMAC=m
 # CONFIG_ALTERA_TSE is not set
 CONFIG_NET_VENDOR_AMAZON=y
 CONFIG_NET_VENDOR_AMD=y
@@ -2552,6 +2553,7 @@ CONFIG_FIXED_PHY=y
 # MII PHY device drivers
 #
 CONFIG_AC200_PHY=m
+CONFIG_AC200_PHY_SUNXI=m
 CONFIG_AMD_PHY=m
 CONFIG_ADIN_PHY=m
 CONFIG_ADIN1100_PHY=m
@@ -4059,6 +4061,7 @@ CONFIG_MFD_SUN4I_GPADC=y
 CONFIG_MFD_BD9571MWV=m
 CONFIG_MFD_AC100=y
 CONFIG_MFD_AC200=m
+CONFIG_MFD_AC200_SUNXI=m
 CONFIG_MFD_AXP20X=y
 CONFIG_MFD_AXP20X_I2C=y
 CONFIG_MFD_AXP20X_RSB=y
@@ -7533,6 +7536,7 @@ CONFIG_PWM_CLK=m
 CONFIG_PWM_NTXEC=m
 CONFIG_PWM_PCA9685=m
 CONFIG_PWM_SUN4I=m
+CONFIG_PWM_SUNXI_ENHANCE=y
 CONFIG_PWM_XILINX=m
 
 #

diff --git a/...nel/archive/sunxi-6.6/patches.armbian/arm64-dts-sun50i-h618-orangepi-zero2w-add-dtb.patch b/...nel/archive/sunxi-6.6/patches.armbian/arm64-dts-sun50i-h618-orangepi-zero2w-add-dtb.patch
@@ -12,16 +12,6 @@ add log for thermal zone
 reference the sun50i-h618-cpu-dvfs.dtsi in zero2w
 
 remove i2c bind
-
-sync overlays
-
-Revert "sync overlays"
-
-This reverts commit 71cea923579a633fa0770da4db38a4861100777c.
-
-try fix ac200
-
-remove unused node in dts
 ---
  arch/arm64/boot/dts/allwinner/Makefile        |   1 +
  .../allwinner/sun50i-h618-orangepi-zero2w.dts | 444 ++++++++++++++++++
@@ -450,9 +440,9 @@ index 000000000000..3d02ab9ab14f
 +	/omit-if-no-ref/
 +	i2c4_ph_pins: i2c4-ph-pins {
 +		pins = "PH6", "PH7";
++
 +		function = "i2c4";
 +	};
-+
 +	/omit-if-no-ref/
 +	uart2_pi_pins: uart2-pi-pins {
 +		pins = "PI5", "PI6";

diff --git a/...nel/archive/sunxi-6.7/patches.armbian/arm64-dts-sun50i-h618-orangepi-zero2w-add-dtb.patch b/...nel/archive/sunxi-6.7/patches.armbian/arm64-dts-sun50i-h618-orangepi-zero2w-add-dtb.patch
@@ -1,4 +1,4 @@
-From 09a088f5c8e28c394a74730481adf9cec434fc93 Mon Sep 17 00:00:00 2001
+From d60a776c242b74a48fcdcb7bb4185cc803194231 Mon Sep 17 00:00:00 2001
 From: chraac <chraac@gmail.com>
 Date: Fri, 15 Mar 2024 12:30:26 +0800
 Subject: [PATCH] orangepi-zero2w add dtb
@@ -14,12 +14,12 @@ reference the sun50i-h618-cpu-dvfs.dtsi in zero2w
 remove i2c bind
 ---
  arch/arm64/boot/dts/allwinner/Makefile        |   1 +
- .../allwinner/sun50i-h618-orangepi-zero2w.dts | 435 ++++++++++++++++++
- 2 files changed, 436 insertions(+)
+ .../allwinner/sun50i-h618-orangepi-zero2w.dts | 444 ++++++++++++++++++
+ 2 files changed, 445 insertions(+)
  create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
 
 diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
-index 8b504ee408e78..a957365edc1aa 100644
+index 8b504ee408e7..a957365edc1a 100644
 --- a/arch/arm64/boot/dts/allwinner/Makefile
 +++ b/arch/arm64/boot/dts/allwinner/Makefile
 @@ -56,5 +56,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-sd.dtb
@@ -31,10 +31,10 @@ index 8b504ee408e78..a957365edc1aa 100644
  subdir-y	:= $(dts-dirs) overlay
 diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
 new file mode 100644
-index 0000000000000..c09cc24a8b279
+index 000000000000..3d02ab9ab14f
 --- /dev/null
 +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
-@@ -0,0 +1,435 @@
+@@ -0,0 +1,444 @@
 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 +/*
 + * Copyright (C) 2023 Arm Ltd.
@@ -328,16 +328,25 @@ index 0000000000000..c09cc24a8b279
 +	pinctrl-names = "default";
 +	pinctrl-0 = <&i2c3_pa_pins>;
 +
-+	ac200_x: mfd@10 {
++	ac200: mfd@10 {
 +		compatible = "x-powers,ac200";
 +		reg = <0x10>;
 +		clocks = <&ac200_pwm_clk>;
 +		// ephy id
-+		nvmem-cells = <&ephy_calibration>;
-+		nvmem-cell-names = "calibration";
-+
-+		ac200_ephy: phy {
-+			compatible = "x-powers,ac200-ephy";
++		interrupt-parent = <&pio>;
++		interrupts = <1 20 IRQ_TYPE_LEVEL_LOW>;
++		interrupt-controller;
++		#interrupt-cells = <1>;
++		nvmem-cells = <&ac200_bg>;
++		nvmem-cell-names = "bandgap";
++
++		ac200_ephy_ctl: syscon {
++			compatible = "x-powers,ac200-ephy-ctl";
++			#clock-cells = <0>;
++			#reset-cells = <0>;
++			phy-mode = "rmii";
++			nvmem-cells = <&ephy_calibration>;
++			nvmem-cell-names = "calibration";
 +			status = "okay";
 +		};
 +	};
@@ -431,9 +440,9 @@ index 0000000000000..c09cc24a8b279
 +	/omit-if-no-ref/
 +	i2c4_ph_pins: i2c4-ph-pins {
 +		pins = "PH6", "PH7";
++
 +		function = "i2c4";
 +	};
-+
 +	/omit-if-no-ref/
 +	uart2_pi_pins: uart2-pi-pins {
 +		pins = "PI5", "PI6";