From ad51e41fb5481a790b905ee23fd98126a6b1d892 Mon Sep 17 00:00:00 2001
From: michael-etzkorn <michael.etzkorn@sage-micro.com>
Date: Mon, 27 Dec 2021 21:36:08 -0600
Subject: [PATCH] Removed TraceGen in HeterogeneousTileExampleConfig

* Examples should be compatible with ExampleRocketSystem
* TraceGen examples should be given in groundtest
  - this might require fixing GroundTestSubsystem's intNode use.
---
 src/main/scala/system/Configs.scala | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/src/main/scala/system/Configs.scala b/src/main/scala/system/Configs.scala
index fdc8a87b42..569deb927c 100644
--- a/src/main/scala/system/Configs.scala
+++ b/src/main/scala/system/Configs.scala
@@ -5,20 +5,19 @@ package freechips.rocketchip.system
 
 import freechips.rocketchip.config.Config
 import freechips.rocketchip.subsystem._
-import freechips.rocketchip.groundtest.WithTraceGen
 
 class WithJtagDTMSystem extends freechips.rocketchip.subsystem.WithJtagDTM
 class WithDebugSBASystem extends freechips.rocketchip.subsystem.WithDebugSBA
 class WithDebugAPB extends freechips.rocketchip.subsystem.WithDebugAPB
 
 class BaseConfig extends Config(
-  new WithDefaultMemPort() ++
-  new WithDefaultMMIOPort() ++
-  new WithDefaultSlavePort() ++
+  new WithDefaultMemPort ++
+  new WithDefaultMMIOPort ++
+  new WithDefaultSlavePort ++
   new WithTimebase(BigInt(1000000)) ++ // 1 MHz
   new WithDTS("freechips,rocketchip-unknown", Nil) ++
   new WithNExtTopInterrupts(2) ++
-  new BaseSubsystemConfig()
+  new BaseSubsystemConfig
 )
 
 class DefaultConfig extends Config(new WithNBigCores(1) ++ new WithCoherentBusTopology ++ new BaseConfig)
@@ -34,12 +33,12 @@ class EightChannelConfig extends Config(new WithNMemoryChannels(8) ++ new Defaul
 
 class DualChannelDualBankConfig extends Config(
   new WithNMemoryChannels(2) ++
-  new WithNBanks(4) ++ new DefaultConfig)
+  new WithNBanks(4) ++ new DefaultConfig
+)
 
 class RoccExampleConfig extends Config(new WithRoccExample ++ new DefaultConfig)
 
 class HeterogeneousTileExampleConfig extends Config(
-  new WithTraceGen (n = 2, overrideMemOffset = Some(0x90000000L))() ++
   new WithNBigCores(n = 1) ++
   new WithNMedCores(n = 1) ++
   new WithNSmallCores(n = 1) ++
@@ -48,9 +47,11 @@ class HeterogeneousTileExampleConfig extends Config(
 )
 
 class Edge128BitConfig extends Config(
-  new WithEdgeDataBits(128) ++ new DefaultConfig)
+  new WithEdgeDataBits(128) ++ new DefaultConfig
+)
 class Edge32BitConfig extends Config(
-  new WithEdgeDataBits(32) ++ new DefaultConfig)
+  new WithEdgeDataBits(32) ++ new DefaultConfig
+)
 
 class SingleChannelBenchmarkConfig extends Config(new DefaultConfig)
 class DualChannelBenchmarkConfig extends Config(new WithNMemoryChannels(2) ++ new SingleChannelBenchmarkConfig)
@@ -63,7 +64,8 @@ class TinyConfig extends Config(
   new WithNBanks(0) ++
   new With1TinyCore ++
   new WithIncoherentBusTopology ++
-  new BaseConfig)
+  new BaseConfig
+)
 
 class MemPortOnlyConfig extends Config(
   new WithNoMMIOPort ++