-
Notifications
You must be signed in to change notification settings - Fork 4
/
Copy pathttyUSB0.log
executable file
·2625 lines (2591 loc) · 180 KB
/
ttyUSB0.log
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
Pll init start...
Pll init Done!!
mtcmos Start..
efuse of id : hsmtop is 1
mtcmos Done!
PLL Preloader mode
PLL Preloader mode ret 0
#T#PLL=2
bandgap filter: 0x1000C010 = 0x100F00
pcie 0x112800c0 = 0xFC1
#T#GPIO=0
[DDR Reserve] DRM_DEBUG_CTL (0x1000d030): 0x83F1
[DDR Reserve] WDT_DEBUG_CTL_2(0x10007048): 0x2F
[DDR Reserve] WDT_DEBUG_CTL_3(0x100070A8): 0x0
[DDR Reserve] MTK_DRM_DEBUG_0_REG(0x1000D500): 0x8
[DDR Reserve] DRAMC_AO_CHA + 0xD00(0x10230D00): 0x451C
[DDR Reserve] DDRPHY_AO_CHA + 0x1520(0x10239520): 0x0
[DDR Reserve] DRAMC_NAO_CHA + 0x80(0x10234080): 0x40060386
[DDR Reserve] DRAMC_NAO_CHA + 0x84(0x10234084): 0x10000000
[DDR Reserve] DRAMC_NAO_CHA + 0x88(0x10234088): 0x0
[DDR Reserve] DRAMC_AO_CHB + 0xD00(0x10240D00): 0x4
[DDR Reserve] DDRPHY_AO_CHB + 0x1520(0x10249520): 0x0
[DDR Reserve] DRAMC_NAO_CHB + 0x80(0x10244080): 0x40060386
[DDR Reserve] DRAMC_NAO_CHB + 0x84(0x10244084): 0x10000000
[DDR Reserve] DRAMC_NAO_CHB + 0x88(0x10244088): 0x0
[RGU] rst from: ?
[RGU] MODE: 0x4D
[RGU] STA: 0x0
[RGU] LENGTH: 0xFFE0
[RGU] INTERVAL: 0xFFF
[RGU] SWSYSRST: 0x0
[RGU] LATCH_CTL: 0x0
[RGU] NONRST_REG: 0x0
[RGU] NONRST_REG2: 0x20000000
[RGU] DEBUG_CTL: 0x0
[RGU] DEBUG_1_REG: 0x0
[RGU] parse g_rgu_status: 0 (0x0)
[RGU] Set NONRST_REG to 0x0
[RGU] mtk_wdt_mode_config mode value=30, tmp:22000030
[DOE_ENV]get_env apwdt_en
[RGU] mtk_wdt_mode_config mode value=7D, tmp:2200007D
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2)
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: 0x0
[RGU] rgu_update_reg: 0, bits: 0x300, addr: 0x100070A0, val: 0x0
[RGU] mtk_wdt_pre_init: MTK_WDT_DEBUG_CTL(0x0)
[RGU] mtk_wdt_pre_init: MTK_WDT_DEBUG_CTL2(0x0)
[RGU] mtk_wdt_pre_init: MTK_WDT_LATCH_CTL(0x21E71)
[DOE_ENV]get_env apwdt_en
[DOE_ENV]get_env apwdt_en
[DOE_ENV]get_env apwdt_en
[RGU] mtk_wdt_pre_init: MTK_WDT_REQ_MODE(1F0073), MTK_WDT_REQ_IRQ_EN(1B0070)
#T#WDT_PRE=21
RAM_CONSOLE_PL using SRAM
RAM_CONSOLE_PL start: 0x11D000, size: 0x800, sig: 0x737A24C2
RAM_CONSOLE_PL init done
RAM_CONSOLE_PL wdt status (0x0)=0x0
#T#Ram console=2
[PMIF] PLL_ULPOSC1_CON0/1/2 0x38A94D 0x52E000 0x400000
[PMIF] ULPOSC1 K done: 260M
[pmifclkmgr_set_spmi_m_clk] done
[pmifclkmgr_set_spmi_p_clk] done
#T#PMIFCLKMGR=3
[SPMI] spmi_read_check done, slvid:4
[SPMI] non-rcs dly:0, pol:1, sampl:0x1
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0
record write addr=0x0, data=0x0, cmd=0(the last)
[SPMI] spmi_read_check done, slvid:4
[SPMI] rcs_en dly:0, pol:1, sampl:0x1
[SPMI] spmi_read_check done, slvid:5
[SPMI] non-rcs dly:0, pol:1, sampl:0x1
[SPMI] spmi_read_check done, slvid:5
[SPMI] rcs_en dly:0, pol:1, sampl:0x1
#T#SPMI=10
[SPMI] spmi_read_check done, slvid:4
[SPMI] non-rcs dly:0, pol:1, sampl:0x1
#T#SPMI_P=1
KPD_DL_KEY1 not define
#T#I2C=1
DATE_CODE_YY:0, DATE_CODE_WW:0
[SegCode] Segment Code:0x2, PROJECT_CODE:0x0, FAB_CODE:0x0, RW_STA:0x992, CTL:0x0, DCM:0x7
#T#DEVINFO=1
[PMIC]Preloader Start
[PMIC] CHIP Code = 0x3030
[PMIC]POWER_HOLD :0x1
[PMIC]TOP_RST_STATUS[0x13C]=0x0
[PMIC]PONSTS[0xC]=0x24
[PMIC]POFFSTS[0xE]=0x0
[PMIC]TOPSTS[0x18]=0x6
[pmic_check_rst] PORSTB
[PMIC]just_rst = 0
[PMIC]RG_RSV_SWREG[0xA0D]=0x0
[pwrkey_dbg_status] powerkey:0 count=0(ms) g_pwrkey_release=0
[pmic_wdt_set] TOP_RST_MISC1=0x21
register vmd12 OK
register vrfdig OK
register vcore OK
register vmd11 OK
register vsram_md OK
register vsram_core OK
register vsram_proc OK
register vsram_rfdig OK
register vio18_2 OK
register vmdd2_no_used OK
register vefuse OK
register vio18_1 OK
register vmddr OK
register vmddq OK
register vmc OK
[MT6315]S5 RG_SLV_ID[0x136]=0xB5
[MT6315]S5 TOP_RST_STATUS[0x129]=0x0
[MT6315]S5 POFFSTS[0xC]=0x0
[MT6315]S5 RGS_POFFSTS[0xA0F]=0x14
[MT6315]S5 PG_SDN_STS0[0xF]=0xF
[MT6315]S5 OC_SDN_STS0[0x10]=0x0
[MT6315]S5 BUCK_OC_SDN_STS[0x1416]=0x0
[MT6315]S5 BUCK_OC_SDN_EN[0x1451]=0x1F
[MT6315]S5 TOP_RST_MISC[0x126]=0x0
register vproc OK
[MT6315]latch vproc 0 uV(0x0)
register vmdd2 OK
[MT6315]latch vmdd2 0 uV(0x0)
[MT6315]S5 set TOP_RST_MISC=0x3
0xFFFF:0xFFFF:0xFFFF:0xFFFF:0x4D1C:0x6C57:0x3980:0x1BCA:(S5)
[MT6315]mt6315_spmi_probe done
[PMIC]Init done
[pmic_enable_smart_reset] smart_en:0, smart_sdn_en:0
#T#PMIC=19
Current RTC time:[1988/10/22 23:8:28]
vproc/vsram run as hw default
[RGU] mtk_wdt_mode_config mode value=30, tmp:22000030
[RGU] mtk_wdt_mode_config mode value=7D, tmp:2200007D
[RGU] g_rgu_status: 0 (0x0)
[DOE_ENV]get_env apwdt_en
[RGU] bypass pwrkey: wdt does not trigger rst
#T#WDT_INIT=3
RAM_CONSOLE_PL wdt status (0x0)=0x0
#T#Ram console=0
[SD0] Host controller intialization start
MSDC0 HCLK_MUX[0x1000_0020][17:16] = 1, pdn = 0, CLK_MUX[0x1000_0020][26:24] = 1, pdn = 0, CLK_CG[0x1000_1094] bit2 = 0, bit6 = 0
MSDC0 MODE5[10005350] = 0x11111000 should: 0x11111???
MSDC0 MODE6[10005360] = 0x01111111 should: 0x?1111111
MSDC0 IES [11E00030] = 0x001FFFFF should: 0x????1FFE
MSDC0 SMT [11E000D0] = 0x000FFFFF should: 0x?????FFF
MSDC0 TDSEL0_0[11E000F0] = 0x00000000,[11E00100] = 0x00000000 should: 0x00000000MSDC0, should: 0x????0000
MSDC0 RDSEL0[11E00090] = 0x00000000, [11E000A0] = 0x00000000, [11E000B0] = 0x00000000 should: 0x00000000 ,should: 0x00000000 ,should: 0x??????00
MSDC0 DRV0 [11E00000] = 0x09249249, [11E00010] = 0x00249249 should: 0x?9249249, should: 0x???????9
PUPD/R1/R0: dat/cmd:0/0/1, clk/dst: 1/1/0
MSDC0 PUPD0 [11E00050] = 0x0003F401 should: 0x?????401
MSDC0 R0 [11E00070] = 0x0003EBFE should: 0x?????BFE
MSDC0 R1 [11E00080] = 0x00001401 should: 0x?????401
[SD0] SET_CLK(260kHz): SCLK(260kHz) MODE(0) DDR(0) DIV(400) DS(0) RS(0)
[SD0] Host controller intialization done
[mmc_init]: msdc0 start mmc_init_card()
[mmc_init_card]: start
[SD0] EXT_CSD_ERASE_GRP_DEF is Off, wp_size = 8192KB
[SD0] csd.write_prot_grpsz = 15, csd.erase_sctsz = 1024
[SD0] Switch to High-Speed mode!
[SD0] Switch to SDR buswidth
[SD0] SET_CLK(260kHz): SCLK(260kHz) MODE(0) DDR(0) DIV(400) DS(0) RS(0)
[SD0] Size: 29820 MB, Max.Speed: 52000 kHz, blklen(512), nblks(61071360)
[SD0] Initialized, eMMC45
[SD0] SET_CLK(52000kHz): SCLK(52000kHz) MODE(0) DDR(0) DIV(2) DS(0) RS(0)
[mmc_init_card]: finish successfully
#T#Boot dev init=220
[PLFM] Init Boot Device: OK(0)
[SD0] EXT_CSD_ERASE_GRP_DEF is Off, wp_size = 8192KB
[SD0] csd.write_prot_grpsz = 15, csd.erase_sctsz = 1024
[AB] Current boot: Preloader_a
[AB] ab_suffix: _a, ab_retry: 2, ab_boot_success: 1
[ROM_INFO] 'v131074'
[LIB] Loading SEC config
[LIB] Name =
[LIB] Config = 0x22, 0x11
0x31,0x41,0x35,0x32
GCPU Enhance,PL_V1.4
[SEC] reading seccfg
0x4D,0x4D,0x4D,0x4D,0x4,0x0,0x0,0x0,
[LIB] seclib_img_auth_load_sig [LIB] CFG read size '0x2000' '0x3C'
0x4D4D4D4D
[LIB] SEC CFG 'v4' exists
[LIB] HW DEC
[LIB] SEC CFG is valid. Lock state is 1
#T#Sec lib init=19
[SD0] EXT_CSD_ERASE_GRP_DEF is Off, wp_size = 8192KB
[SD0] csd.write_prot_grpsz = 15, csd.erase_sctsz = 1024
boot_part: 1
part name=loader_ext_a
[SEC_POLICY] reached the end, use default policy
[SEC_POLICY] sboot_state = 0x1
[SEC_POLICY] lock_state(default) = 0x4
img_auth_required=1
sbc_en = 1
sbc_en = 1
[SEC_POLICY] reached the end, use default policy
[SBC] cert verify, part = loader_ext_a, img = loader_ext_dram...ok
otp ver:0
[ver]ver:(verk,verc,otp)=(0, 0, 0) ok
img: loader_ext_dram cert vfy(67 ms)
load loader_ext_a_dram
img vfy...[SBC] img auth ok
ok
img: loader_ext_dram vfy(1 ms)
checking loader_ext: PL BUILD_TIME: 20211101-141814, loader_ext BUILD_TIME: 20211101-141814
#T#loader_ext_dram=79
#T#Long Pressed Reboot=0
[PLFM] Init PMIC: OK(0)
[PLFM] chip_ver[1]
Unmask all EINT event mask
[BLDR] Build Time: 20211101-141814
[DOE_ENV] No doconfig setting
[DOE_ENV]read_env_area fail, ret = -1
#T#dconfig init=7
#T#lastpc=0
Bring-UP : skip srclken_rc init
#T#srclken_rc=1
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS 1/2/3/4/7=2 1 1 2 1
clk_buf_dump_dts_log: PMIC_CLK_BUF?_OUTPUT_IMPEDANCE 1/2/3/4/7=3 4 3 4 3
clk_buf_dump_dts_log: PMIC_CLK_BUF?_CONTROLS_FOR_DESENSE 2/3/4=4 0 3
clk_buf_dump_clkbuf_log DCXO_CW00/09/12/13/15/19/19_1/19_2=0x6B6D 5B 80 4C F0F 48 24 4
clk_buf_dump_clkbuf_log spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0 0 1 1
clk_buf_dump_clkbuf_log clk buf vrfck_hv_en=0x0
clk_buf_dump_clkbuf_log DCXO_CW00/09/12/13/15/19/19_1/19_2=0x4E1D 51 80 3C F0F 46 1B 4
clk_buf_dump_clkbuf_log spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x0 1 1 0 0
clk_buf_dump_clkbuf_log clk buf vrfck_hv_en=0x0
pmwrap_interface_init: PMIF_SLP_REQ
[_pmic_interface_select] PMIFSPMI_SLEEP_PROTECTION_CRL(0x3B1D0)
[_pmic_interface_select] PMIFSPMI_P_SLEEP_PROTECTION_CRL(0x3B1D0)
[_pmic_interface_select] PMIFSPMI_MODE_CRL(0x2C5D)
[_pmic_interface_select] PMIFSPMI_P_MODE_CRL(0x2C5D)
[_pmic_interface_select] PMIFSPMI_INF_EN(0xBED)
[_pmic_interface_select] PMIFSPMI_OTHER_INF_EN(0x3)
[_pmic_interface_select] PMIFSPMI_ARB_EN(0x6BED)
clk_buf_init_pmic_wrap: DCXO_CMD_ADR0/WDATA0=0x4120412/10000
clk_buf_init_pmic_wrap: DCXO_CMD_ADR1/WDATA1=0x78C078D/10001
[clk_buf_init_pmic_wrap]: PMIC Slave ID: 0x4
#T#clk_buf_init=14
[RTC]get_frequency_meter: input=0x0, ouput=5
[RTC]get_frequency_meter: input=0x0, ouput=0
[RTC]get_frequency_meter: input=0x0, ouput=0
[RTC]RTC 32K mode setting wrong. Enter first boot/recovery.
[RTC]rtc_init#1 powerkey1 = 0xA8, powerkey2 = 0x223C, with LPD
[RTC]bbpu = 0x43, con = 0x9280, osc32con = 0xAA10, sec = 0xD0D5, yea = 0x2A15
[RTC]rtc_first_boot_init
[RTC]Enable EOSC LPD only
[RTC]rtc_lpd_init RTC_CON=0x486
[RTC]get_frequency_meter: input=0x0, ouput=5
[RTC]get_frequency_meter: input=0x0, ouput=5
[RTC]get_frequency_meter: input=0x0, ouput=3242
[RTC]eosc_cali: RG_FQMTR_CKSEL=0xA
[RTC]get_frequency_meter: input=0xF, ouput=884
[RTC]eosc_cali: val=0x374
[RTC]get_frequency_meter: input=0x7, ouput=759
[RTC]eosc_cali: val=0x2F7
[RTC]get_frequency_meter: input=0xB, ouput=822
[RTC]eosc_cali: val=0x336
[RTC]get_frequency_meter: input=0x9, ouput=792
[RTC]eosc_cali: val=0x318
[RTC]EOSC cali val = 0x9
[RTC]EOSC cali val = 0xDE49
[RTC]rtc_2sec_stat_clear
[RTC]32k-less mode
[RTC]rtc_2sec_reboot_check 0x2000, without 2sec reboot, type 0x0
[RTC]rtc 2sec reboot is not enabled
#T#rtc=234
[PMIC_INIT_SETTING] start
wk_oc_thd_setting: efuse_data: 0x8005
�yұ��S: no need adjust vmdd2/vio18_2
VAUX18=1800.0mV (0x0), VBG12=1220.0mV (0x3C)
pmic e3, efuse_data 700, rsv0 : C0, rsv1 : F1
[PMIC_INIT_SETTING] done v200804
[MT6330] 1 3,68
[MT6330] 1 4,68
[MT6330] 1 1,48
[MT6330] get volt 5, 40, 0, 0
vsram_core = 750000 uV
[MT6330] get volt 6, 56, 0, 0
vsram_proc = 850000 uV
[MT6330] get volt 4, 68, 0, 0
vsram_md = 825000 uV
[MT6330] get volt 1, 48, 0, 0
vrfdig = 700000 uV
[MT6330] get volt 2, 56, 0, 0
vcore = 750000 uV
[MT6330] get volt 3, 68, 0, 0
vmd11 = 825000 uV
#T#pmic=10
[TIA] TIA init done
#T#TIA=0
[DOE_ENV]get_env dvfs_v_mode
dvfsrc_opp_level_mapping: VMODE=0, RSV4=0
dvfsrc_opp_level_mapping: FINAL vcore_opp_uv: 750000, 650000, 600000, 550000
#T#dvfsrc_opp_level_mapping=2
[DDR Reserve] ddr reserve mode not be enabled yet
#T#chk DDR Reserve status=1
Enter mtk_kpd_gpio_set!
after set KP enable: KP_SEL = 0x1C70 !
[RTC]irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x0, spar1 = 0x800
[RTC]new_spare0 = 0x4000, new_spare1 = 0x5001, new_spare2 = 0x601, new_spare3 = 0x1
[RTC]bbpu = 0x0, con = 0x486, cali = 0x2000, osc32con = 0xDE69
#T#check Boot status-RTC=36
#T#check Boot status-PMIC=0
#T#check Boot status-WDT=0
#T#check Boot status-PWR key=0
[PLFM] Power key boot!
#T#check Boot status=0
[PMIC]POWER_HOLD :0x1
[RTC]rtc_bbpu_power_on done
#T#rtc_bbpu_power_on=3
#T#Enable PMIC Kpd clk=0
[dramc] nand part id:0x0
[dramc] init boot_para partition address is 0x0000000008688000
[dramc] init SRAM region for DRAM exception detection
[dramc] LAST_DRAM_FATAL_ERR_FLAG = 0x0
for cold boot, always return 0
[MT6330] 4 2,1
[MT6315]4 16,1
[MT6330] mt6330_ldo_convert_data, cnvdata 1800000, n_size 3
[MT6330] 1 8,12
[MT6330] 1 2,56
[MT6315]1 16,180
[MT6330] mt6330_ldo_convert_data, cnvdata 600000, n_size 3
[MT6330] 1 13,1
[MT6330] mt6330_ldo_convert_data, cnvdata 750000, n_size 3
[MT6330] 1 12,4
[dramc] read_offline_dram_mdl_data
[DRAMC][info] dram_type 6, mr5 1, rank0_size 0000000080000000, rank1_size 0000000000000000
eMMC cid: 15010034,58364B4D,4203E865,6A776827
[DRAMC] Nand id:15, 1, 0, 34, 58,
loop ALL DDR [DRAMC] qvl(0),type(206),mr5(1),rank0_size(0x0000000080000000),rank1_size(0x0000000000000000)
[DRAMC] get id:15, 1, 0, 34, 58, 36, 4B, 4D, 42,
loop ALL DDR [DRAMC] qvl(1),type(206),mr5(1),rank0_size(0x0000000080000000),rank1_size(0x0000000000000000)
[DRAMC] get id:
loop ALL DDR [DRAMC] qvl(2),type(6),mr5(FF),rank0_size(0x0000000080000000),rank1_size(0x0000000000000000)
[DRAMC] get id:
[DRAMC] qvl(0),type(206),mr5(1),rank0_size(0x0000000080000000),rank1_size(0x0000000000000000)
[EMI] CEN_CONA(0xF050F154),CEN_CONF(0x21000),CEN_CONH(0x4040003),CEN_CONK(0x0),CHN_CONA(0x4043010)
[MT6330] 1 2,40
Read voltage for 800, 4
[MT6330] mt6330_ldo_convert_data, cnvdata 12, n_size 3
[MT6330] get volt 8, 12, 0, 0
Vio18 = 1800000
[MT6330] get volt 2, 40, 0, 0
Vcore = 650000
[MT6315]get volt 16, 180, 1125000
Vdram = 1125000
[MT6330] mt6330_ldo_convert_data, cnvdata 1, n_size 3
[MT6330] get volt 13, 1, 0, 0
Vddq = 600000
[MT6330] mt6330_ldo_convert_data, cnvdata 4, n_size 3
[MT6330] get volt 12, 4, 0, 0
Vmddr = 750000
[dramc] DRAM K Type: FAST_K for shuffle: 4
[MT6330] 1 2,44
Read voltage for 1200, 2
[MT6330] mt6330_ldo_convert_data, cnvdata 12, n_size 3
[MT6330] get volt 8, 12, 0, 0
Vio18 = 1800000
[MT6330] get volt 2, 44, 0, 0
Vcore = 675000
[MT6315]get volt 16, 180, 1125000
Vdram = 1125000
[MT6330] mt6330_ldo_convert_data, cnvdata 1, n_size 3
[MT6330] get volt 13, 1, 0, 0
Vddq = 600000
[MT6330] mt6330_ldo_convert_data, cnvdata 4, n_size 3
[MT6330] get volt 12, 4, 0, 0
Vmddr = 750000
[dramc] DRAM K Type: FAST_K for shuffle: 2
[MT6330] 1 2,40
Read voltage for 600, 5
[MT6330] mt6330_ldo_convert_data, cnvdata 12, n_size 3
[MT6330] get volt 8, 12, 0, 0
Vio18 = 1800000
[MT6330] get volt 2, 40, 0, 0
Vcore = 650000
[MT6315]get volt 16, 180, 1125000
Vdram = 1125000
[MT6330] mt6330_ldo_convert_data, cnvdata 1, n_size 3
[MT6330] get volt 13, 1, 0, 0
Vddq = 600000
[MT6330] mt6330_ldo_convert_data, cnvdata 4, n_size 3
[MT6330] get volt 12, 4, 0, 0
Vmddr = 750000
[dramc] DRAM K Type: FAST_K for shuffle: 5
[MT6330] 1 2,44
Read voltage for 933, 3
[MT6330] mt6330_ldo_convert_data, cnvdata 12, n_size 3
[MT6330] get volt 8, 12, 0, 0
Vio18 = 1800000
[MT6330] get volt 2, 44, 0, 0
Vcore = 675000
[MT6315]get volt 16, 180, 1125000
Vdram = 1125000
[MT6330] mt6330_ldo_convert_data, cnvdata 1, n_size 3
[MT6330] get volt 13, 1, 0, 0
Vddq = 600000
[MT6330] mt6330_ldo_convert_data, cnvdata 4, n_size 3
[MT6330] get volt 12, 4, 0, 0
Vmddr = 750000
[dramc] DRAM K Type: FAST_K for shuffle: 3
[MT6330] 1 2,40
Read voltage for 400, 6
[MT6330] mt6330_ldo_convert_data, cnvdata 12, n_size 3
[MT6330] get volt 8, 12, 0, 0
Vio18 = 1800000
[MT6330] get volt 2, 40, 0, 0
Vcore = 650000
[MT6315]get volt 16, 180, 1125000
Vdram = 1125000
[MT6330] mt6330_ldo_convert_data, cnvdata 1, n_size 3
[MT6330] get volt 13, 1, 0, 0
Vddq = 600000
[MT6330] mt6330_ldo_convert_data, cnvdata 4, n_size 3
[MT6330] get volt 12, 4, 0, 0
Vmddr = 750000
[dramc] DRAM K Type: FAST_K for shuffle: 6
WARN: tr->DQ_AAMCK_DIV= d, Because of DQ_SEMI_OPEN, It's don't care.[MT6330] 1 2,56
Read voltage for 1866, 0
[MT6330] mt6330_ldo_convert_data, cnvdata 12, n_size 3
[MT6330] get volt 8, 12, 0, 0
Vio18 = 1800000
[MT6330] get volt 2, 56, 0, 0
Vcore = 750000
[MT6315]get volt 16, 180, 1125000
Vdram = 1125000
[MT6330] mt6330_ldo_convert_data, cnvdata 1, n_size 3
[MT6330] get volt 13, 1, 0, 0
Vddq = 600000
[MT6330] mt6330_ldo_convert_data, cnvdata 4, n_size 3
[MT6330] get volt 12, 4, 0, 0
Vmddr = 750000
[dramc] DRAM K Type: FAST_K for shuffle: 0
[MT6330] 1 2,48
Read voltage for 1600, 1
[MT6330] mt6330_ldo_convert_data, cnvdata 12, n_size 3
[MT6330] get volt 8, 12, 0, 0
Vio18 = 1800000
[MT6330] get volt 2, 48, 0, 0
Vcore = 700000
[MT6315]get volt 16, 180, 1125000
Vdram = 1125000
[MT6330] mt6330_ldo_convert_data, cnvdata 1, n_size 3
[MT6330] get volt 13, 1, 0, 0
Vddq = 600000
[MT6330] mt6330_ldo_convert_data, cnvdata 4, n_size 3
[MT6330] get volt 12, 4, 0, 0
Vmddr = 750000
[dramc] DRAM K Type: FAST_K for shuffle: 1
PPR Not assign channel/rank/bank!!
[MT6330] 1 2,56
Read voltage for 1866, 0
[MT6330] mt6330_ldo_convert_data, cnvdata 12, n_size 3
[MT6330] get volt 8, 12, 0, 0
Vio18 = 1800000
[MT6330] get volt 2, 56, 0, 0
Vcore = 750000
[MT6315]get volt 16, 180, 1125000
Vdram = 1125000
[MT6330] mt6330_ldo_convert_data, cnvdata 1, n_size 3
[MT6330] get volt 13, 1, 0, 0
Vddq = 600000
[MT6330] mt6330_ldo_convert_data, cnvdata 4, n_size 3
[MT6330] get volt 12, 4, 0, 0
Vmddr = 750000
[dramc] post_process_save_time_calibration is_storage_emmc: 0
[dramc] calibration data already in NAND storage, skip
[MT6330] 4 2,0
[MT6315]4 16,0
[MT6330] 1 2,56
[DRAMC] DRAM init complete
[MEM] 1st complex R/W mem test pass (start addr:0x44000000)
[LastDRAMC] 0x11D80C: 0x19870611
[LastDRAMC] 0x11D810: 0x451C0004
[LastDRAMC] 0x11D814: 0x0
[LastDRAMC] 0x11D818: 0x5C9B0615
[LastDRAMC] 0x11D81C: 0x0
[LastDRAMC] 0x11D820: 0x0
[LastDRAMC] 0x11D824: 0x80000000
[LastDRAMC] 0x11D828: 0x0
[LastDRAMC] 0x11D82C: 0x31F3DF0A
[LastDRAMC] 0x11D830: 0x6E9126A7
[LastDRAMC] 0x11D834: 0xA9B26872
[LastDRAMC] 0x11D838: 0xD2C27206
[LastDRAMC] 0x11D83C: 0x0
[LastDRAMC] 0x11D840: 0x0
[LastDRAMC] 0x11D844: 0x0
[LastDRAMC] 0x11D848: 0x0
[LastDRAMC] 0x11D84C: 0x0
[LastDRAMC] 0x11D850: 0x0
DRAM rank0 size:0x0000000080000000,
DRAM rank1 size=0x0000000000000000
DRAM rank0 size:0x0000000080000000,
DRAM rank1 size=0x0000000000000000
[EMI] ch0, rk0, dram addr: 3FFFE000
[EMI] bk4, rowFFFF, col0
DRAM rank0 size:0x0000000080000000,
DRAM rank1 size=0x0000000000000000
DRAM rank0 size:0x0000000080000000,
DRAM rank1 size=0x0000000000000000
DRAM rank0 size:0x0000000080000000,
DRAM rank1 size=0x0000000000000000
[EMI] ch1, rk0, dram addr: 3FFFE000
[EMI] bk4, rowFFFF, col0
DRAM rank0 size:0x0000000080000000,
DRAM rank1 size=0x0000000000000000
[dramc] DRAM_FATAL_ERR_FLAG = 0x80000000
#T#mem_init=198
[Dram_Buffer] g_dram_buf start addr: 0x42A00000
[Dram_Buffer] g_dram_buf->msdc_gpd_pool start addr: 0x42A75940
[Dram_Buffer] g_dram_buf->msdc_bd_pool start addr: 0x42A75980
#T#Init Dram buf=3
[DOE_ENV]get_env aee_enable
RAM_CONSOLE_PL aee enable 0
[PLFM] Efuse status(0)
#T#EFUSE Self Blow=1
[DOE_ENV]get_env DOE_CUSTOM_CONFIG_MAX_DRAM_SIZE
CUSTOM_CONFIG_MAX_DRAM_SIZE: 0x0000000800000000
total_dram_size: 0x0000000080000000, max_dram_size: 0x0000000800000000
dump mblock info
mblock[i] start=0000000040000000 size=0000000080000000
DRAM rank0 size:0x0000000080000000,
DRAM rank1 size=0x0000000000000000
DRAM rank0 size:0x0000000080000000,
DRAM rank1 size=0x0000000000000000
[EMI] ch0, rk0, dram addr: 0
[EMI] bk0, row0, col0
[DOE_ENV]get_env DOE_CUSTOM_CONFIG_MAX_DRAM_SIZE
CUSTOM_CONFIG_MAX_DRAM_SIZE: 0x0000000800000000
mblock_reserve: 00000000BFFFF000 - 00000000C0000000 from mblock 0
mblock_reserve: 000000007FFFF000 - 0000000080000000 from mblock 0
[EMI] mbist rsv_start=0x000000007FFFF000
DRAM rank0 size:0x0000000080000000,
DRAM rank1 size=0x0000000000000000
DRAM rank0 size:0x0000000080000000,
DRAM rank1 size=0x0000000000000000
[EMI] ch0, rk0, dram addr: 0
[EMI] bk0, row0, col0
#T#Get DRAM Info=11
[GPT_PL]Success to find valid GPT.
#T#part_init=9
PL_LOG_STORE:sram->sig value 0x9B9E2B58!
PL_LOG_STORE:sram header is not match, format all!
PL_LOG_STORE:set ram_header->sig = 0xABCD1234
PL_LOG_STORE:expdb partition start addr 0x108000, end addr 0x1508000, partition size 0x1400000, nr_sects 0xA000, blksz 0x200!
PL_LOG_STORE:get uart flag= 0x0
PL_LOG_STORE:log_to_emmc function flag 0x0!
PL_LOG_STORE:sram_dram_buff->sig 0x0!
mblock_reserve: 000000007FFBF000 - 000000007FFFF000 from mblock 0
PL_LOG_STORE:sram_header 0x11DF00,sig 0xABCD1234, sram_dram_buff 0x11DF0C, buf_addr 0x7FFBF000
#T#store_switch_to_dram=16
#T#rpmb=0
[MT6330] get volt 2, 56, 0, 0
vcore = 750000 uV
#T#before bldr_handshake=1
#T#seclib_brom_meta_mode=0
[BLDR] Tool connection is unlocked
[platform_vusb_on] VUSB33 is on
[USB] MDCIRQ 0x10000280 before: 0
[USB] MDCIRQ 0x10000280 after: 0
[PMIC]IsUsbCableIn 1
[PMIC]IsUsbCableIn 1
[PLFM] USB cable in
[TOOL] USB enum timeout (Yes), handshake timeout(Yes)
[TOOL] Enumeration(Start)
[TOOL] Enumeration(End): OK 493ms
[TOOL] : usb listen timeout
[TOOL] <USB> cannot detect tools!
#T#USB handshake=3313
#T#bldr_handshake=0
[DEVAPC]Device APC domain init setup:
[DEVAPC]APC_CON: INFRA_AO(0x1), PERI_AO(0x1), PERI_AO2(0x1), PERI_PAR_AO(0x1), FMEM_AO(0x1)
[DEVAPC]INFRA_AO_MAS_SEC_0:0x2800, PERI_AO_MAS_SEC_0:0x0, PERI_PAR_AO_MAS_SEC_0:0x0, FMEM_AO_MAS_SEC_0:0x0
[DEVAPC]Domain Setup: INFRA_AO (0x2000000), (0xE0008)
[DEVAPC]Domain Setup: PERI_AO (0x90000)
[DEVAPC]Domain Setup: PERI_PAR_AO (0x50505), (0x0), (0x0), (0x0), (0x500)
[DEVAPC]Domain Setup: FMEM_AO (0x0), (0x0), (0x601)
[DEVAPC]SRAMROM DOM_REMAP 0:0xF9FFFFF8, 1:0xEBFF
[DEVAPC]MMSYS DOM_REMAP 0:0xFFFDFFFC
[DEVAPC]CONNSYS/MD slave DOM_REMAP 0:0xFBFFFE88, 1:0xFFFF
#T#sec_boot_check=7
mblock_reserve: 0000000042C00000 - 0000000042E00000 from mblock 0
mblock_reserve: 0000000043E00000 - 0000000043E40000 from mblock 1
#T#trustzone pre init=2
[DOE_ENV]get_env aee_enable
RAM_CONSOLE_PL aee enable 0
mblock_reserve: 000000007FEB0000 - 000000007FFB0000 from mblock 2
SSPM enable sram SPM_CG_ENABLE=0x1
SSPM enable sram SSPM_SRAM_CG_ENABLE=0x1001012
[PART] partition name = sspm_a
[SEC_POLICY] reached the end, use default policy
[SEC_POLICY] sboot_state = 0x1
[SEC_POLICY] lock_state(default) = 0x4
[PART] img_auth_required = 1
[PART] Image with header, name: tinysys-sspm, addr: FFFFFFFFh, mode, size:-1, magic:5D473h
sbc_en = 1
sbc_en = 1
[SEC_POLICY] reached the end, use default policy
[SBC] cert verify, part = sspm_a, img = tinysys-sspm...ok
[ver]ver:(verk,verc,otp)=(0, 0, 0) ok
[PART] part: sspm_a img: tinysys-sspm cert vfy(42 ms)
[PART] load "sspm_a" from 0x0000000010888200 (dev) to 0x7FEB0018 (mem) [SUCCESS]
[PART] load speed: 10083KB/s, 382067 bytes, 37ms
[PART] img vfy...[SBC] img auth ok
ok
[PART] part: sspm_a img: tinysys-sspm vfy(4 ms)
[DOE_ENV]get_env apwdt_en
[DOE_ENV]get_env apwdt_en
[DOE_ENV]get_env aee_enable
RAM_CONSOLE_PL aee enable 0
[BLDR] SSPM Start without ddr reserved mode (normal boot)
[DOE_ENV]get_env aee_enable
RAM_CONSOLE_PL aee enable 0
[BLDR] lk2 partition not found
[BLDR] lk active = 0, lk2 active = 0
[BLDR] Loading LK Partition...
[PART] partition name = lk_a
[SEC_POLICY] reached the end, use default policy
[SEC_POLICY] sboot_state = 0x1
[SEC_POLICY] lock_state(default) = 0x4
[PART] img_auth_required = 1
[PART] Image with header, name: lk, addr: FFFFFFFFh, mode, size:-1, magic:6A1E0h
sbc_en = 1
sbc_en = 1
[SEC_POLICY] reached the end, use default policy
[SBC] cert verify, part = lk_a, img = lk...ok
[ver]ver:(verk,verc,otp)=(0, 0, 0) ok
[PART] part: lk_a img: lk cert vfy(42 ms)
[PART] load "lk_a" from 0x0000000010A88200 (dev) to 0x44000000 (mem) [SUCCESS]
[PART] load speed: 10105KB/s, 434656 bytes, 42ms
[PART] img vfy...[SBC] img auth ok
ok
[PART] part: lk_a img: lk vfy(4 ms)
LK addr: 0x44000000, size: 0x6B060
[PART] partition name = tee_a
[SEC_POLICY] reached the end, use default policy
[SEC_POLICY] sboot_state = 0x1
[SEC_POLICY] lock_state(default) = 0x4
[PART] img_auth_required = 1
[PART] Image with header, name: atf, addr: FFFFFFFFh, mode, size:0, magic:32C00h
sbc_en = 1
sbc_en = 1
[SEC_POLICY] reached the end, use default policy
[SBC] cert verify, part = tee_a, img = atf...ok
[ver]ver:(verk,verc,otp)=(0, 0, 0) ok
[PART] part: tee_a img: atf cert vfy(42 ms)
[PART] load "tee_a" from 0x0000000010B88200 (dev) to 0x42C00DC0 (mem) [SUCCESS]
[PART] load speed: 10149KB/s, 207872 bytes, 20ms
[PART] img vfy...[SBC] img auth ok
ok
[PART] part: tee_a img: atf vfy(2 ms)
[BLDR] tee_a part. ATF load addr:0x42C00DC0, size:0x33A80
[BLDR] bldr load tee part ret=0x0, addr=0x42C00DC0
mblock_reserve: 000000007FDB0000 - 000000007FEB0000 from mblock 2
[PART] partition name = mcupm_a
[SEC_POLICY] reached the end, use default policy
[SEC_POLICY] sboot_state = 0x1
[SEC_POLICY] lock_state(default) = 0x4
[PART] img_auth_required = 1
[PART] Image with header, name: tinysys-mcupm-RV33_A, addr: FFFFFFFFh, mode, size:-1, magic:616FBh
sbc_en = 1
sbc_en = 1
[SEC_POLICY] reached the end, use default policy
[SBC] cert verify, part = mcupm_a, img = tinysys-mcupm-RV33_A...ok
[ver]ver:(verk,verc,otp)=(0, 0, 0) ok
[PART] part: mcupm_a img: tinysys-mcupm-RV33_A cert vfy(42 ms)
[PART] load "mcupm_a" from 0x0000000010988200 (dev) to 0x7FDB0018 (mem) [SUCCESS]
[PART] load speed: 9993KB/s, 399099 bytes, 39ms
[PART] img vfy...[SBC] img auth ok
ok
[PART] part: mcupm_a img: tinysys-mcupm-RV33_A vfy(4 ms)
[DOE_ENV]get_env aee_enable
RAM_CONSOLE_PL aee enable 0
[BLDR] MCUPM start with normal boot
[BLDR] MCUPM part. load & reset finished
#T#load images=366
[IMG_VER] pl ver check, ver=(0, 0)
[ver]bypass update
[PICACHU] picachu_log_init
mblock_reserve: 000000005FF00000 - 000000005FF80000 from mblock 2
[PICACHU] pi_dram_log_addr = 0x5FF00000
[PICACHU] pi_dram_log_buf = 0x5FF40000
[PICACHU] pi_log_dram_addr = 0x5FF00000
[PICACHU][PICACHU] CPU: MT6890
[PICACHU][PICACHU] Date: Feb 17 2021 16:01:17
[PICACHU][CPU][Picachu][HRID][0]: 0xCFC49CEE
[PICACHU][CPU][Picachu][HRID][1]: 0x4CC68FAE
[PICACHU][CPU][Picachu][HRID][2]: 0x85E27292
[PICACHU][CPU][Picachu][HRID][3]: 0x2FABCBA7
[PICACHU][CPU][Picachu][SegCode]: 0x00000002
[PICACHU][CPU][Picachu][PTP_DUMP] ORIG_RES0: 0x00000001
[PICACHU][CPU][Picachu][PTP_DUMP] ORIG_RES1: 0x46162C2B
[PICACHU][CPU][Picachu][PTP_DUMP] ORIG_RES2: 0x79EC242B
[PICACHU][CPU][Picachu][PTP_DUMP] ORIG_RES3: 0x21112C21
[PICACHU][CPU][Picachu][PTP_DUMP] ORIG_RES4: 0x46162C2B
[PICACHU][CPU][Picachu][PTP_DUMP] ORIG_RES5: 0x00000000
[PICACHU][CPU][Picachu][PTP_DUMP] ORIG_RES6: 0x00000000
[PICACHU][CPU][Picachu][PTP_DUMP] ORIG_RES7: 0x1E011E01
[PICACHU][CPU][Picachu][PTP_DUMP] ORIG_RES8: 0x1E011E01
[PICACHU][CPU][Picachu][PTP_DUMP] ORIG_RES9: 0x00000000
[DOE_ENV]get_env picachu-status
mblock_reserve: 000000005FE00000 - 000000005FF00000 from mblock 2
[PART] partition name = pi_img_a
[SEC_POLICY] reached the end, use default policy
[SEC_POLICY] sboot_state = 0x1
[SEC_POLICY] lock_state(default) = 0x4
[PART] img_auth_required = 1
[PART] Image with header, name: pi_img, addr: FFFFFFFFh, mode, size:-1, magic:1D0h
sbc_en = 1
sbc_en = 1
[SEC_POLICY] reached the end, use default policy
[SBC] cert verify, part = pi_img_a, img = pi_img...ok
[ver]ver:(verk,verc,otp)=(0, 0, 0) ok
[PART] part: pi_img_a img: pi_img cert vfy(42 ms)
[PART] load "pi_img_a" from 0x0000000010588200 (dev) to 0x5FE00000 (mem) [SUCCESS]
[PART] load speed: 453KB/s, 464 bytes, 1ms
[PART] img vfy...[SBC] img auth ok
ok
[PART] part: pi_img_a img: pi_img vfy(1 ms)
[PICACHU][PICACHU] Image Date: 2171601
[DOE_ENV]get_env is_slt_flavor_load
[DOE_ENV]get_env is_aging_flavor_load
[PICACHU]cpu_dvfs_id=0, efuse_line_id=1, efuse_line_num=1
[PICACHU]target pgm:0x1 seg:0x2, use latest version of the same ptp 0x1
[PICACHU]bve=1
[PICACHU]dvma=100000, dvmi=68125
[PICACHU]adj1: 983750o 883750t 783750d 983750a 883750b 783750s
[PICACHU]evh=583750, version_id=1, vh=683750
[PICACHU]
[PICACHU]cpu_dvfs_id=1, efuse_line_id=1, efuse_line_num=1
[PICACHU]target pgm:0x1 seg:0x2, use latest version of the same ptp 0x1
[PICACHU]bve=1
[PICACHU]dvma=100000, dvmi=68125
[PICACHU]adj1: 983750o 883750t 783750d 983750a 883750b 783750s
[PICACHU]evh=583750, version_id=1, vh=683750
[PICACHU]
[PICACHU]vf2 [PICACHU]
[PICACHU]vf70 [PICACHU]vf24 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]
[PICACHU]vf2000 [PICACHU]vf600 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]
[PICACHU]vf2 [PICACHU]
[PICACHU]vf70 [PICACHU]vf24 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]
[PICACHU]vf1400 [PICACHU]vf420 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]
[PICACHU]vf0 [PICACHU]
[PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]
[PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]vf0 [PICACHU]
[PICACHU] picachu_log_dump
[PICACHU] pi_dram_log_buf = 0x5FF40000
#T#picachu=97
[CPU_SES] disable.
#T#ses_init=0
#T#mtk_subpmic=0
#T#pmif spmi post init=0
mblock_reserve: 0000000042880000 - 0000000042960000 from mblock 0
mblock_reserve: 0000000042960000 - 0000000042970000 from mblock 1
mblock_reserve: 0000000042A00000 - 0000000042B00000 from mblock 1
mblock_reserve: 0000000042B00000 - 0000000042C00000 from mblock 2
mblock_reserve: 0000000043000000 - 0000000043200000 from mblock 3
[PLFM] boot to LK by ATAG reason=0 addr=0x42B00000
[PMIC]IsUsbCableIn 1
[DOE_ENV]get_env aee_enable
RAM_CONSOLE_PL aee enable 0
RAM_CONSOLE_PL offset:0xEC0
RAM_CONSOLE sram_plat_dbg_info_addr:0x11D800, sram_plat_dbg_info_size:0x400, sram_log_store_addr:0x11DF00, sram_log_store_size:0x100
RAM_CONSOLE mrdump_addr:0x11E000, mrdump_size:0x2000, dram_addr:0x42980000, dram_size:0x10000
RAM_CONSOLE pstore_addr:0x42880000, pstore_size:0xE0000, pstore_console_size:0x40000, pstore_pmsg_size:0x10000
RAM_CONSOLE mrdump_mini_header_addr:0x42960000, mrdump_mini_header_size:0x10000, magic1:0x61646472, magic2:0x73697A65
[PLFM] boot_tag size = 0x5A90
BOOT_TAG_VERSION: 1
BOOT_REASON: 0
BOOT_MODE: 0
META_COM TYPE: 0
META_COM ID: 0
META_COM PORT: 285220864
META LOG DISABLE: 0
FAST META GPIO: 178
LOG_COM PORT: 285220864
LOG_COM BAUD: 921600
LOG_COM EN: 1
LOG_COM SWITCH: 1
MEM_NUM: 1
MEM_SIZE: 0x23D914
mblock num: 0x9
magic=0xx version=0xx reserve num: 0x99999999
BOOT_TIME: 4727
SEC_INFO: 0x0
SEC_INFO: 0x0
DDR_RESERVE: 0
DDR_RESERVE: 1
DDR_RESERVE: 38146
DRAM_BUF: 481728
EMI dram_type: 6
EMI ch_cnt: 2
EMI rk_cnt: 1
EMI rank0 size: 0x80000000
SRAM start: 0x11B000
SRAM size: 0x15000
PLAT_DBG_INFO key: 0xD8A3
PLAT_DBG_INFO base: 0x11D80C
PLAT_DBG_INFO size: 0x48
PLAT_DBG_INFO key: 0xE31C
PLAT_DBG_INFO base: 0x11D854
PLAT_DBG_INFO size: 0x2C
PLAT_DBG_INFO key: 0xDB45
PLAT_DBG_INFO base: 0x11D880
PLAT_DBG_INFO size: 0x10
is abnormal boot: 0
ram_console info sram_addr: 0x11D000
ram_console info sram_size: 0x800
ram_console info def_type: 0x1
ram_console memory_info_offset: 0xEC0
#T#Boot Argu=22
#T#trustzone post init=0
[BLDR] Others, jump to ATF
[BLDR] jump to 0x44000000
[BLDR] <0x44000000>=0xEA000006
[BLDR] <0x44000004>=0xEA000375
[TZ_SEC_CFG] [B]SRAMROM SEC_ADDR:0x0, SEC_ADDR1:0x0, SEC_ADDR2:0x0
[TZ_SEC_CFG] [B]SRAMROM SEC_CTRL:0x0, SEC_CTRL2:0x0, SEC_CTRL5:0x0, SEC_CTRL6:0x0
[TZ_SEC_CFG] [B]SRAMROM DM_REMAP0:0x0, DM_REMAP1:0x0
[TZ_SEC_CFG] [A]SRAMROM SEC_ADDR:0x9001B000, SEC_ADDR1:0x1B000, SEC_ADDR2:0x1B000
[TZ_SEC_CFG] [A]SRAMROM SEC_CTRL:0xB69, SEC_CTRL2:0xB6D, SEC_CTRL5:0xA000000, SEC_CTRL6:0xB6D0000
[TZ_SEC_CFG] [A]SRAMROM DM_REMAP0:0x0, DM_REMAP1:0x0
NOTICE: [ATF](0)[5.875791][MPU][mpu_svc]origin=0x10 phys=0x42c00000, sz=0x200000, zinf=0x2, req_set=1
ERROR: [ATF](0)[5.876911][MPU][mpu_svc]origin=0x10 entry is not found, id=2
ERROR: [ATF](0)[5.877761]failed to config MPU, ATF zone=2, pa=0x42c00000, sz=0x200000, rc=0x1001
INFO: [ATF](0)[5.879210]DRAM type 6
INFO: [ATF](0)[5.879641]DRAM freq step 0, 3733
INFO: [ATF](0)[5.880190]DRAM freq step 1, 3200
INFO: [ATF](0)[5.880739]DRAM freq step 2, 2400
INFO: [ATF](0)[5.881288]DRAM freq step 3, 1866
INFO: [ATF](0)[5.881837]DRAM freq step 4, 1600
INFO: [ATF](0)[5.882387]DRAM freq step 5, 1200
INFO: [ATF](0)[5.882936]DRAM freq step 6, 800
INFO: [ATF](0)[5.883474]log_enable:1
INFO: [ATF](0)[5.883916]atf_log_port:0x11002000
INFO: [ATF](0)[5.884476]BOOT_REASON: 0
INFO: [ATF](0)[5.884939]IS_ABNORMAL_BOOT: 0
INFO: [ATF](0)[5.885456]CPUxGPT reg(0)
INFO: [ATF](0)[5.885919][systimer] CNTCR_REG(0x81d)
INFO: [ATF](0)[5.886522]Secondary bootloader is AArch32
INFO: [ATF](0)[5.887168]bl31_plat_arch_setup()
INFO: [ATF](0)[5.887718]mmap atf buffer : 0x43e00000, 0x40000
INFO: [ATF](0)[5.888439]mmap ram_console: 0x11d000, 0x800, (pmore:0x1000)
[ATF](0)[5.892358]mmap:
[ATF](0)[5.892619] VA:0x11b000 PA:0x11b000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.893610] VA:0x11d000 PA:0x11d000 size:0x1000 attr:0x18 granularity:0x40000000
[ATF](0)[5.894612] VA:0x8000000 PA:0x8000000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.895624] VA:0xc000000 PA:0xc000000 size:0x600000 attr:0x8 granularity:0x40000000
[ATF](0)[5.896658] VA:0xd0a0000 PA:0xd0a0000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.897670] VA:0xd101000 PA:0xd101000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.898683] VA:0xd108000 PA:0xd108000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.899695] VA:0xd11d000 PA:0xd11d000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.900707] VA:0xd138000 PA:0xd138000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.901720] VA:0xd13a000 PA:0xd13a000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.902732] VA:0xd147000 PA:0xd147000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.903744] VA:0xd153000 PA:0xd153000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.904756] VA:0x10005000 PA:0x10005000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.905790] VA:0x10022000 PA:0x10022000 size:0x4000 attr:0x8 granularity:0x40000000
[ATF](0)[5.906824] VA:0x10006000 PA:0x10006000 size:0x100000 attr:0x8 granularity:0x40000000
[ATF](0)[5.907880] VA:0x1020e000 PA:0x1020e000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.908913] VA:0x10310000 PA:0x10310000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.909947] VA:0x10000000 PA:0x10000000 size:0x400000 attr:0x8 granularity:0x40000000
[ATF](0)[5.911003] VA:0x10400000 PA:0x10400000 size:0x50000 attr:0x8 granularity:0x40000000
[ATF](0)[5.912047] VA:0x10480000 PA:0x10480000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.913081] VA:0x14116000 PA:0x14116000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.914115] VA:0x19021000 PA:0x19021000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.915149] VA:0x190f2000 PA:0x190f2000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.916183] VA:0x190f8000 PA:0x190f8000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.917216] VA:0x11000000 PA:0x11000000 size:0xa110000 attr:0x8 granularity:0x40000000
[ATF](0)[5.918283] VA:0x1f003000 PA:0x1f003000 size:0x2000 attr:0x8 granularity:0x40000000
[ATF](0)[5.919317] VA:0x1f005000 PA:0x1f005000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.920350] VA:0x1f028000 PA:0x1f028000 size:0x4000 attr:0x8 granularity:0x40000000
[ATF](0)[5.921384] VA:0x20000000 PA:0x20000000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.922418] VA:0x20061000 PA:0x20061000 size:0x1000 attr:0x8 granularity:0x40000000
[ATF](0)[5.923452] VA:0x42c01000 PA:0x42c01000 size:0x30000 attr:0x2 granularity:0x40000000
[ATF](0)[5.924496] VA:0x42c00000 PA:0x42c00000 size:0x200000 attr:0xa granularity:0x40000000
[ATF](0)[5.925552] VA:0x43e00000 PA:0x43e00000 size:0x40000 attr:0x18 granularity:0x40000000
[ATF](0)[5.926607]
INFO: [ATF](0)[5.934043]abnormal_boot: 0x0, cflag: 0xffffffff
INFO: [ATF](0)[5.943887]FOOTPRINT_TYPE_MAX: 0x1
INFO: [ATF](0)[5.944501]mt_log_setup
INFO: [ATF](0)[5.944942] -atf_buf_lock: 0x0
INFO: [ATF](0)[5.945459] -mt_log_buf_start: 0x43e00000
INFO: [ATF](0)[5.946095] -mt_log_buf_size: 0x40000
INFO: [ATF](0)[5.946687] -log_addr: 0x43e00200
INFO: [ATF](0)[5.947236] -log_size: 0x13600
INFO: [ATF](0)[5.947753] -write_offset: 0x0
INFO: [ATF](0)[5.948270] -read_offset: 0x0
INFO: [ATF](0)[5.948776] -log_buf_end : 0x43e137ff
INFO: [ATF](0)[5.949368] -ATF_EXCEPT_BUF_SIZE_PER_CPU : 0x1000
INFO: [ATF](0)[5.950090] -ATF_EXCEPT_BUF_SIZE : 0x8000
INFO: [ATF](0)[5.950725] -PLATFORM_CORE_COUNT : 0x8
INFO: [ATF](0)[5.951329] -except_write_pos_per_cpu[0]: 0x43e34000
INFO: [ATF](0)[5.952082] -except_write_pos_per_cpu[1]: 0x43e35000
INFO: [ATF](0)[5.952836] -except_write_pos_per_cpu[2]: 0x43e36000
INFO: [ATF](0)[5.953590] -except_write_pos_per_cpu[3]: 0x43e37000
INFO: [ATF](0)[5.954344] -except_write_pos_per_cpu[4]: 0x43e38000
INFO: [ATF](0)[5.955098] -except_write_pos_per_cpu[5]: 0x43e39000
INFO: [ATF](0)[5.955852] -except_write_pos_per_cpu[6]: 0x43e3a000
INFO: [ATF](0)[5.956606] -except_write_pos_per_cpu[7]: 0x43e3b000
INFO: [ATF](0)[5.957359] -crash_flag : 0x41544641
INFO: [ATF](0)[5.957941] -crash_log_addr : 0x43e14000
INFO: [ATF](0)[5.958566] -crash_log_size : 0x20000
INFO: [ATF](0)[5.959162]ATF log service is registered (0x43e00000, aee:0x43e3c000)
NOTICE: [ATF](0)[5.960098]BL31: v1.6(debug):5c4a8b935-dirty
NOTICE: [ATF](0)[5.960766]BL31: Built : 14:20:14, Nov 1 2021
NOTICE: [ATF](0)[5.961455]BL31_BASE=0x42c01000, BL31_TZRAM_SIZE=0x1ff000
NOTICE: [ATF](0)[5.962263]BL31: v1.6(debug):5c4a8b935-dirty
NOTICE: [ATF](0)[5.962931]BL31: Built : 14:20:14, Nov 1 2021
INFO: [ATF](0)[5.963620]platform_setup_cpu()
INFO: [ATF](0)[5.964147]addr of cci_adb400_dcm_config: 0x0
INFO: [ATF](0)[5.964826]addr of sync_dcm_config: 0x0
INFO: [ATF](0)[5.965440]mp0_spmc: 0x0
INFO: [ATF](0)[5.965892]mp1_spmc: 0x0
INFO: [ATF](0)[5.966368]md_settle = 31200, settle = 31200
INFO: [ATF](0)[5.967035]mt_lp_resource_user_register register by SPM, uid = 0
NOTICE: [ATF](0)[5.967931]call pccif1_hw_init
INFO: [ATF](0)[5.968448]BL31: Initializing runtime services
INFO: [ATF](0)[5.969161]BL31: Preparing for EL3 exit to normal world
INFO: [ATF](0)[5.969947]Entry point address = 0x44000000
INFO: [ATF](0)[5.970604]SPSR = 0x1d3
NOTICE: [ATF](0)[5.971046]NS-SCR_EL3_EFIN=0x4
void mblock_pl_boottag_hook(struct boot_tag *):1244: mblock_pl_boottag_hook init done
void mblock_show_internal(int):114: mblock_magic:0x99999999 mblock_version:0x2
void mblock_show_internal(int):124: mblock[0]->start: 0x40000000, size: 0x2880000
void mblock_show_internal(int):124: mblock[1]->start: 0x42970000, size: 0x90000
void mblock_show_internal(int):124: mblock[2]->start: 0x42c00000, size: 0x0
void mblock_show_internal(int):124: mblock[3]->start: 0x42e00000, size: 0x200000
void mblock_show_internal(int):124: mblock[4]->start: 0x43200000, size: 0xc00000
void mblock_show_internal(int):124: mblock[5]->start: 0x43e40000, size: 0x1c0c0000
void mblock_show_internal(int):124: mblock[6]->start: 0x5ff80000, size: 0x1fe30000
void mblock_show_internal(int):124: mblock[7]->start: 0x7ffb0000, size: 0xf000
void mblock_show_internal(int):124: mblock[8]->start: 0x80000000, size: 0x3ffff000
void mblock_show_internal(int):136: mblock-R[0].start: 0xbffff000, size: 0x1000 map:0 name:dramc-rk0
void mblock_show_internal(int):136: mblock-R[1].start: 0x7ffff000, size: 0x1000 map:0 name:emi_mbist_buf
void mblock_show_internal(int):136: mblock-R[2].start: 0x7ffbf000, size: 0x40000 map:1 name:log_store
void mblock_show_internal(int):136: mblock-R[3].start: 0x42c00000, size: 0x200000 map:0 name:atf-reserved
void mblock_show_internal(int):136: mblock-R[4].start: 0x43e00000, size: 0x40000 map:0 name:atf-log-reserved
void mblock_show_internal(int):136: mblock-R[5].start: 0x7feb0000, size: 0x100000 map:0 name:SSPM-reserved
void mblock_show_internal(int):136: mblock-R[6].start: 0x7fdb0000, size: 0x100000 map:0 name:MCUPM-reserved
void mblock_show_internal(int):136: mblock-R[7].start: 0x5ff00000, size: 0x80000 map:0 name:PICACHU
void mblock_show_internal(int):136: mblock-R[8].start: 0x42880000, size: 0xe0000 map:0 name:pstore
void mblock_show_internal(int):136: mblock-R[9].start: 0x42960000, size: 0x10000 map:0 name:minirdump
void mblock_show_internal(int):136: mblock-R[10].start: 0x42a00000, size: 0x100000 map:1 name:pl-drambuf
void mblock_show_internal(int):136: mblock-R[11].start: 0x42b00000, size: 0x100000 map:1 name:pl-boottag
void mblock_show_internal(int):136: mblock-R[12].start: 0x43000000, size: 0x200000 map:1 name:aee-lk
void mblock_show_internal(int):140: Total DRAM = 0x80000000
[MBOOT_PARAMS] get ddr_reserve_state done
mboot_params_info init hook: 0x11d000, 0x800, 0x1, 0xec0
LOG_STORE_LK:lk log_store_init start.
LOG_STORE_LK:sram 0x4011df00,log 0x0,sig 0x5678ef90,size 0x40000,pl size 0x7ba1@0x20,lk size 0x0@0x20!
LOG_STORE_LK: buff ready.
log_store: init log store addr:0x11df00, size: 0x100!
[MBOOT_PARAMS]. atag(PL2LK): 0x11d000, 0x800, 0x1, 0xec0
[MBOOT_PARAMS]. boot_arg(PL2LK): sram addr va(0x4011d000)
[MBOOT_PARAMS]. start: 0x4011d000, size: 0x800
[PMIC] pmic_key_regs_register: init done!
[PMIC] pmic_psc_regs_register: init done!
[PMIC] pmic_regu_regs_register: init done!
welcome to lk
boot args 0x42b00000 0x0 0x0 0x0
INIT: cpu 0, calling hook 0x8402af4d (vm_preheap) at level 0x3ffff, flags 0x1
initializing heap
calling constructors
INIT: cpu 0, calling hook 0x8402d01f (kcmdline_init) at level 0x40000, flags 0x1
INIT: cpu 0, calling hook 0x8402b089 (vm) at level 0x50000, flags 0x1
initializing mp
initializing threads
initializing timers
initializing ports