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Performance Dashboard Planning #1960
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Awesome; thanks for planning out some of this stuff! Here are just a couple of assorted thoughts:
I think a good "v1.0" goal would be to start with pre-generated Calyx code. This would, of course, simplify the logistics a lot: all the automation could start at the Calyx level and not deal with the N different potential frontend toolchains that could generate Calyx code. (In practice, getting N different frontends going, with all their various dependencies and stuff, has proven to be a huge headache for automation CI. Skipping all that seems great.) At some later version, maybe we can revisit this and go all the way from frontend source code. This would help us compare different toolchains more meaningfully (e.g., Vitis, XLS?). But I think that could very much count as a v2.0 feature!
Indeed, this seems like cool work for the future. We can start with it all being just Calyx-vs.-Calyx, but after that, it makes sense to broaden things out and support other ADL-ish compilers. Having a robust benchmark suite would be a huge contribution to the community.
I guess the main reasons I suggested this are:
But of course, we have spent 0 time optimizing stuff for ASICs, and we collectively have no expertise in running these toolchains. So that would be a good reason not to do this in the near future. |
Definitely, that makes sense like a place to start, especially because our impression is that it could mainly be used to get concrete measurements on how much some optimization to the complier improves real-world performance. In addition to the toolchain comparisons that you mentioned, (and this is me throwing stuff out for the sake of discussion), if we go down the path of feedback-directed optimization, accepting different frontends would help us provide specific optimizations to various users, which would be awesome. Again, super far out, but maybe worth starting to think about now? I don't know exactly what compilation units that frontends produce (and I'm assuming each one produces some different set), but maybe starting to think about a way that we could generalize to any number/type of frontend generations of Calyx files? That said, it's definitely important to set sights on V1 for now :) |
First step / end goals of performance dashboard?
What benchmarks would we use? (needed to test metrics we produce on the dashboard):
How do we generate Calyx designs (as an end goal)?
What are some metrics people care about?
Adrian mentioned targeting ASICs in addition to FPGAs
Future use of the dashboard?
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