diff --git a/fuzz/.gitignore b/fuzz/.gitignore
index 572e03bd..a0925114 100644
--- a/fuzz/.gitignore
+++ b/fuzz/.gitignore
@@ -1,4 +1,3 @@
-
 target
 corpus
 artifacts
diff --git a/fuzz/Cargo.toml b/fuzz/Cargo.toml
index e0eec8da..7a94f2dc 100644
--- a/fuzz/Cargo.toml
+++ b/fuzz/Cargo.toml
@@ -1,4 +1,3 @@
-
 [package]
 name = "regalloc2-fuzz"
 version = "0.0.0"
diff --git a/fuzz/fuzz_targets/domtree.rs b/fuzz/fuzz_targets/domtree.rs
index 5923befb..06885782 100644
--- a/fuzz/fuzz_targets/domtree.rs
+++ b/fuzz/fuzz_targets/domtree.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 #![no_main]
 use libfuzzer_sys::arbitrary::{Arbitrary, Result, Unstructured};
 use libfuzzer_sys::fuzz_target;
diff --git a/fuzz/fuzz_targets/ion.rs b/fuzz/fuzz_targets/ion.rs
index dc4a3423..13349388 100644
--- a/fuzz/fuzz_targets/ion.rs
+++ b/fuzz/fuzz_targets/ion.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 #![no_main]
 use libfuzzer_sys::fuzz_target;
 
diff --git a/fuzz/fuzz_targets/ion_checker.rs b/fuzz/fuzz_targets/ion_checker.rs
index ea6b1bea..da43dbc0 100644
--- a/fuzz/fuzz_targets/ion_checker.rs
+++ b/fuzz/fuzz_targets/ion_checker.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 #![no_main]
 use libfuzzer_sys::fuzz_target;
 use libfuzzer_sys::arbitrary::{Arbitrary, Unstructured, Result};
diff --git a/fuzz/fuzz_targets/moves.rs b/fuzz/fuzz_targets/moves.rs
index a719f7c4..9f685b3c 100644
--- a/fuzz/fuzz_targets/moves.rs
+++ b/fuzz/fuzz_targets/moves.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 #![no_main]
 use libfuzzer_sys::arbitrary::{Arbitrary, Result, Unstructured};
 use libfuzzer_sys::fuzz_target;
diff --git a/fuzz/fuzz_targets/ssagen.rs b/fuzz/fuzz_targets/ssagen.rs
index e69e71a6..c0ff306e 100644
--- a/fuzz/fuzz_targets/ssagen.rs
+++ b/fuzz/fuzz_targets/ssagen.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 #![no_main]
 use libfuzzer_sys::arbitrary::{Arbitrary, Result, Unstructured};
 use libfuzzer_sys::fuzz_target;
@@ -23,6 +28,8 @@ impl Arbitrary for TestCase {
                     control_flow: true,
                     reducible: false,
                     always_local_uses: false,
+                    block_params: true,
+                    reftypes: true,
                 },
             )?,
         })
diff --git a/src/bin/test.rs b/src/bin/test.rs
index 6d7c7de6..c6fd7792 100644
--- a/src/bin/test.rs
+++ b/src/bin/test.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 use arbitrary::{Arbitrary, Unstructured};
 use rand::{Rng, SeedableRng};
 use rand_chacha::ChaCha8Rng;
diff --git a/src/bitvec.rs b/src/bitvec.rs
index af5792e6..4dc727b7 100644
--- a/src/bitvec.rs
+++ b/src/bitvec.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 //! Bit vectors.
 
 use smallvec::{smallvec, SmallVec};
diff --git a/src/cfg.rs b/src/cfg.rs
index 4c838e78..31853f0b 100644
--- a/src/cfg.rs
+++ b/src/cfg.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 //! Lightweight CFG analyses.
 
 use crate::{domtree, postorder, Block, Function, Inst, OperandKind, ProgPoint};
diff --git a/src/fuzzing/func.rs b/src/fuzzing/func.rs
index 67f0dbdb..96efeda6 100644
--- a/src/fuzzing/func.rs
+++ b/src/fuzzing/func.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 use crate::{
     domtree, postorder, Allocation, Block, Function, Inst, InstRange, MachineEnv, Operand,
     OperandKind, OperandPolicy, OperandPos, PReg, RegClass, VReg,
diff --git a/src/fuzzing/mod.rs b/src/fuzzing/mod.rs
index 8aecdabd..ae548d9f 100644
--- a/src/fuzzing/mod.rs
+++ b/src/fuzzing/mod.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 //! Utilities for fuzzing.
 
 pub mod func;
diff --git a/src/lib.rs b/src/lib.rs
index 29202c82..8d1cca08 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -355,6 +355,7 @@ impl Operand {
 
     #[inline(always)]
     pub fn from_bits(bits: u32) -> Self {
+        debug_assert!(bits >> 29 <= 4);
         Operand { bits }
     }
 }
@@ -429,9 +430,9 @@ pub struct Allocation {
     /// `policy` field in `Operand`, and we are careful to use
     /// disjoint ranges of values in this field for each type. We also
     /// leave the def-or-use bit (`kind` for `Operand`) unused here so
-    /// that the client may use it to mark `Allocation`s on
-    /// instructions as read or write when it edits instructions
-    /// (which is sometimes useful for post-allocation analyses).
+    /// that we can use it below in `OperandOrAllocation` to record
+    /// whether `Allocation`s are defs or uses (which is often useful
+    /// to know).
     ///
     /// kind:3 unused:1 index:28
     bits: u32,
@@ -532,6 +533,7 @@ impl Allocation {
 
     #[inline(always)]
     pub fn from_bits(bits: u32) -> Self {
+        debug_assert!(bits >> 29 >= 5);
         Self { bits }
     }
 }
@@ -566,11 +568,13 @@ pub struct OperandOrAllocation {
 
 impl OperandOrAllocation {
     pub fn from_operand(operand: Operand) -> Self {
+        debug_assert!(operand.bits() >> 29 <= 4);
         Self {
             bits: operand.bits(),
         }
     }
     pub fn from_alloc(alloc: Allocation) -> Self {
+        debug_assert!(alloc.bits() >> 29 >= 5);
         Self { bits: alloc.bits() }
     }
     pub fn is_operand(&self) -> bool {
@@ -588,6 +592,10 @@ impl OperandOrAllocation {
     }
     pub fn as_allocation(&self) -> Option<Allocation> {
         if self.is_allocation() {
+            // Remove the def/use bit -- the canonical `Allocation`
+            // does not have this, and we want allocs to continue to
+            // be comparable whether they are used for reads or
+            // writes.
             Some(Allocation::from_bits(self.bits & !(1 << 28)))
         } else {
             None
@@ -612,6 +620,9 @@ impl OperandOrAllocation {
 
 /// A trait defined by the regalloc client to provide access to its
 /// machine-instruction / CFG representation.
+///
+/// (This trait's design is inspired by, and derives heavily from, the
+/// trait of the same name in regalloc.rs.)
 pub trait Function {
     // -------------
     // CFG traversal
@@ -669,10 +680,7 @@ pub trait Function {
     /// Get the clobbers for an instruction.
     fn inst_clobbers(&self, insn: Inst) -> &[PReg];
 
-    /// Get the precise number of `VReg` in use in this function, to allow
-    /// preallocating data structures. This number *must* be a correct
-    /// lower-bound, otherwise invalid index failures may happen; it is of
-    /// course better if it is exact.
+    /// Get the number of `VReg` in use in this function.
     fn num_vregs(&self) -> usize;
 
     /// Get the VRegs that are pointer/reference types. This has the
@@ -724,6 +732,9 @@ pub trait Function {
     /// but we also use them for F32 and F64 values, we may use a different
     /// store-slot size and smaller-operand store/load instructions for an F64
     /// than for a true V128.
+    ///
+    /// (This trait method's design and doc text derives from
+    /// regalloc.rs' trait of the same name.)
     fn spillslot_size(&self, regclass: RegClass, for_vreg: VReg) -> usize;
 
     /// When providing a spillslot number for a multi-slot spillslot,
diff --git a/src/moves.rs b/src/moves.rs
index a5f70be2..8cdd59ab 100644
--- a/src/moves.rs
+++ b/src/moves.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 use crate::Allocation;
 use smallvec::{smallvec, SmallVec};
 
diff --git a/src/postorder.rs b/src/postorder.rs
index b5faf90b..9e6eea86 100644
--- a/src/postorder.rs
+++ b/src/postorder.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 //! Fast postorder computation with no allocations (aside from result).
 
 use crate::Block;
diff --git a/src/ssa.rs b/src/ssa.rs
index 3b0ca143..2d6e6250 100644
--- a/src/ssa.rs
+++ b/src/ssa.rs
@@ -1,3 +1,8 @@
+/*
+ * Released under the terms of the Apache 2.0 license with LLVM
+ * exception. See `LICENSE` for details.
+ */
+
 //! SSA-related utilities.
 
 use crate::cfg::CFGInfo;