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codec.cpp
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/* **********************************************************
* Copyright (c) 2017-2022 Google, Inc. All rights reserved.
* Copyright (c) 2016-2022 ARM Limited. All rights reserved.
* **********************************************************/
/*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of ARM Limited nor the names of its contributors may be
* used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL ARM LIMITED OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/* AArch64 decoder and encoder functions.
* This file is rather large and should perhaps be split up, but there are many
* opportunities for inlining which could be lost if it were split into separate
* translation units, and it is helpful to have the per-operand-type decode/encode
* functions next to each other.
*/
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/types.h>
#include <vector>
#include <string>
#include "codec.h"
/*
#include <LIEF/ELF.hpp>
#include <LIEF/enums.hpp>
#include "BPatch.h"
#include "Symtab.h"
#include "Function.h"
#include "Variable.h"
#include "Module.h"
#include "BPatch_binaryEdit.h"
#include "BPatch_addressSpace.h"
#include "BPatch_function.h"
#include "BPatch_image.h"
#include "BPatch_point.h"
#include "BPatch_process.h"
#include "BPatch_thread.h"
#include "BPatch_type.h"
using namespace LIEF::ELF;
using namespace std;
using namespace Dyninst;
*/
#define STANDALONE_DECODER
/* Decode immediate argument of bitwise operations.
* Returns zero if the encoding is invalid.
*/
static ptr_uint_t
decode_bitmask(uint enc)
{
uint pos = enc >> 6 & 63;
uint len = enc & 63;
ptr_uint_t x;
if (TEST(1U << 12, enc)) {
if (len == 63)
return 0;
x = ((ptr_uint_t)1 << (len + 1)) - 1;
return x >> pos | x << 1 << (63 - pos);
} else {
uint i, t = 32;
while ((t & len) != 0)
t >>= 1;
if (t < 2)
return 0;
x = len & (t - 1);
if (x == t - 1)
return 0;
x = ((ptr_uint_t)1 << (x + 1)) - 1;
pos &= t - 1;
x = x >> pos | x << (t - pos);
for (i = 2; i < 64; i *= 2) {
if (t <= i)
x |= x << i;
}
return x;
}
}
/* Encode immediate argument of bitwise operations.
* Returns -1 if the value cannot be encoded.
*/
static int
encode_bitmask(ptr_uint_t x)
{
int neg, rep, pos, len;
neg = 0;
if ((x & 1) != 0)
neg = 1, x = ~x;
if (x == 0)
return -1;
if (x >> 2 == (x & (((ptr_uint_t)1 << (64 - 2)) - 1)))
rep = 2, x &= ((ptr_uint_t)1 << 2) - 1;
else if (x >> 4 == (x & (((ptr_uint_t)1 << (64 - 4)) - 1)))
rep = 4, x &= ((ptr_uint_t)1 << 4) - 1;
else if (x >> 8 == (x & (((ptr_uint_t)1 << (64 - 8)) - 1)))
rep = 8, x &= ((ptr_uint_t)1 << 8) - 1;
else if (x >> 16 == (x & (((ptr_uint_t)1 << (64 - 16)) - 1)))
rep = 16, x &= ((ptr_uint_t)1 << 16) - 1;
else if (x >> 32 == (x & (((ptr_uint_t)1 << (64 - 32)) - 1)))
rep = 32, x &= ((ptr_uint_t)1 << 32) - 1;
else
rep = 64;
pos = 0;
(x & (((ptr_uint_t)1 << 32) - 1)) != 0 ? 0 : (x >>= 32, pos += 32);
(x & (((ptr_uint_t)1 << 16) - 1)) != 0 ? 0 : (x >>= 16, pos += 16);
(x & (((ptr_uint_t)1 << 8) - 1)) != 0 ? 0 : (x >>= 8, pos += 8);
(x & (((ptr_uint_t)1 << 4) - 1)) != 0 ? 0 : (x >>= 4, pos += 4);
(x & (((ptr_uint_t)1 << 2) - 1)) != 0 ? 0 : (x >>= 2, pos += 2);
(x & (((ptr_uint_t)1 << 1) - 1)) != 0 ? 0 : (x >>= 1, pos += 1);
len = 0;
(~x & (((ptr_uint_t)1 << 32) - 1)) != 0 ? 0 : (x >>= 32, len += 32);
(~x & (((ptr_uint_t)1 << 16) - 1)) != 0 ? 0 : (x >>= 16, len += 16);
(~x & (((ptr_uint_t)1 << 8) - 1)) != 0 ? 0 : (x >>= 8, len += 8);
(~x & (((ptr_uint_t)1 << 4) - 1)) != 0 ? 0 : (x >>= 4, len += 4);
(~x & (((ptr_uint_t)1 << 2) - 1)) != 0 ? 0 : (x >>= 2, len += 2);
(~x & (((ptr_uint_t)1 << 1) - 1)) != 0 ? 0 : (x >>= 1, len += 1);
if (x != 0)
return -1;
if (neg) {
pos = (pos + len) & (rep - 1);
len = rep - len;
}
return (0x1000 & rep << 6) | (((rep - 1) ^ 31) << 1 & 63) |
((rep - pos) & (rep - 1)) << 6 | (len - 1);
}
/* Extract signed integer from subfield of word. */
static inline ptr_int_t
extract_int(uint enc, int pos, int len)
{
uint u = ((enc >> pos & (((uint)1 << (len - 1)) - 1)) -
(enc >> pos & ((uint)1 << (len - 1))));
return u << 1 < u ? -(ptr_int_t)~u - 1 : u;
}
/* Extract unsigned integer from subfield of word. */
static inline ptr_uint_t
extract_uint(uint enc, int pos, int len)
{
/* pos starts at bit 0 and len includes pos bit as part of its length. */
return enc >> pos & (((uint)1 << len) - 1);
}
/* Find the highest bit set in subfield, relative to the starting position. */
static inline uint
highest_bit_set(uint enc, int pos, int len, int *highest_bit)
{
for (int i = pos + len - 1; i >= pos; i--) {
if (enc & (1 << i)) {
*highest_bit = i - pos;
return true;
}
}
return false;
}
/* Find the lowest bit set in subfield, relative to the starting position. */
static inline uint
lowest_bit_set(uint enc, int pos, int len, int *lowest_bit)
{
for (int i = pos; i < pos + len; i++) {
if (enc & (1 << i)) {
*lowest_bit = i - pos;
return true;
}
}
return false;
}
static inline aarch64_reg_offset
get_reg_offset(reg_t reg)
{
if (reg >= DR_REG_Q0 && reg <= DR_REG_Q31)
return QUAD_REG;
else if (reg >= DR_REG_D0 && reg <= DR_REG_D31)
return DOUBLE_REG;
else if (reg >= DR_REG_S0 && reg <= DR_REG_S31)
return SINGLE_REG;
else if (reg >= DR_REG_H0 && reg <= DR_REG_H31)
return HALF_REG;
else if (reg >= DR_REG_B0 && reg <= DR_REG_B31)
return BYTE_REG;
else
return NOT_A_REG;
}
static inline bool
try_encode_int(OUT uint *bits, int len, int scale, ptr_int_t val)
{
/* If any of lowest 'scale' bits are set, or 'val' is out of range, fail. */
if (((ptr_uint_t)val & ((1U << scale) - 1)) != 0 ||
val < -((ptr_int_t)1 << (len + scale - 1)) ||
val >= (ptr_int_t)1 << (len + scale - 1))
return false;
*bits = (ptr_uint_t)val >> scale & ((1U << len) - 1);
return true;
}
static inline bool
try_encode_imm(OUT uint *imm, int bits, opnd_t opnd)
{
ptr_int_t value;
if (!opnd_is_immed_int(opnd))
return false;
value = opnd_get_immed_int(opnd);
if (!(0 <= value && value < (uint)1 << bits))
return false;
*imm = value;
return true;
}
static inline bool
encode_pc_off(OUT uint *poff, int bits, byte *pc, instr_t *instr, opnd_t opnd,
decode_info_t *di)
{
ptr_uint_t off, range;
ASSERT(0 < bits && bits <= 32);
if (opnd.kind == PC_kind)
off = opnd.value.pc - pc;
else if (opnd.kind == INSTR_kind)
off = (byte *)opnd_get_instr(opnd)->note - (byte *)instr->note;
else
return false;
range = (ptr_uint_t)1 << bits;
// printf("~((range - 1) << 2) = %lx, off + (range << 1) = %lx\n", ~((range - 1) << 2), off + (range << 1));
// if (!TEST(~((range - 1) << 2), off + (range << 1))) {
*poff = off >> 2 & (range - 1);
return true;
// }
// printf("off = %lx, di->check_reachable = %d, opnd.kind != PC_kind = %d, ALIGNED(off, 4) = %d\n", off, di->check_reachable, opnd.kind != PC_kind, ALIGNED(off, 4));
/* If !di->check_reachable we do not require correct alignment for instr operands as
* there is a common use case of a label instruction operand whose note value holds
* an identifier used in instrumentation (i#5297). For pc operands, we do require
* correct alignment even if !di->check_reachable.
*/
if (!di->check_reachable && (opnd.kind != PC_kind || ALIGNED(off, 4))) {
*poff = 0;
return true;
}
return false;
}
static inline opnd_t
decode_sysreg(uint imm15)
{
reg_t sysreg;
switch (imm15) {
case 0x5a10: sysreg = DR_REG_NZCV; break;
case 0x5a20: sysreg = DR_REG_FPCR; break;
case 0x5a21: sysreg = DR_REG_FPSR; break;
case 0x1808: sysreg = DR_REG_MDCCSR_EL0; break;
case 0x1820: sysreg = DR_REG_DBGDTR_EL0; break;
case 0x1828: sysreg = DR_REG_DBGDTRRX_EL0; break;
case 0x4208: sysreg = DR_REG_SP_EL0; break;
case 0x4210: sysreg = DR_REG_SPSEL; break;
case 0x4212: sysreg = DR_REG_CURRENTEL; break;
case 0x4213: sysreg = DR_REG_PAN; break;
case 0x4214: sysreg = DR_REG_UAO; break;
case 0x5801: sysreg = DR_REG_CTR_EL0; break;
case 0x5807: sysreg = DR_REG_DCZID_EL0; break;
case 0x5920: sysreg = DR_REG_RNDR; break;
case 0x5921: sysreg = DR_REG_RNDRRS; break;
case 0x5a11: sysreg = DR_REG_DAIF; break;
case 0x5a15: sysreg = DR_REG_DIT; break;
case 0x5a16: sysreg = DR_REG_SSBS; break;
case 0x5a17: sysreg = DR_REG_TCO; break;
case 0x5a28: sysreg = DR_REG_DSPSR_EL0; break;
case 0x5a29: sysreg = DR_REG_DLR_EL0; break;
case 0x5ce0: sysreg = DR_REG_PMCR_EL0; break;
case 0x5ce1: sysreg = DR_REG_PMCNTENSET_EL0; break;
case 0x5ce2: sysreg = DR_REG_PMCNTENCLR_EL0; break;
case 0x5ce3: sysreg = DR_REG_PMOVSCLR_EL0; break;
case 0x5ce4: sysreg = DR_REG_PMSWINC_EL0; break;
case 0x5ce5: sysreg = DR_REG_PMSELR_EL0; break;
case 0x5ce6: sysreg = DR_REG_PMCEID0_EL0; break;
case 0x5ce7: sysreg = DR_REG_PMCEID1_EL0; break;
case 0x5ce8: sysreg = DR_REG_PMCCNTR_EL0; break;
case 0x5ce9: sysreg = DR_REG_PMXEVTYPER_EL0; break;
case 0x5cea: sysreg = DR_REG_PMXEVCNTR_EL0; break;
case 0x5cf0: sysreg = DR_REG_PMUSERENR_EL0; break;
case 0x5cf3: sysreg = DR_REG_PMOVSSET_EL0; break;
case 0x5e82: sysreg = DR_REG_TPIDR_EL0; break;
case 0x5e83: sysreg = DR_REG_TPIDRRO_EL0; break;
case 0x5e87: sysreg = DR_REG_SCXTNUM_EL0; break;
case 0x5f00: sysreg = DR_REG_CNTFRQ_EL0; break;
case 0x5f01: sysreg = DR_REG_CNTPCT_EL0; break;
case 0x5f02: sysreg = DR_REG_CNTVCT_EL0; break;
case 0x5f10: sysreg = DR_REG_CNTP_TVAL_EL0; break;
case 0x5f11: sysreg = DR_REG_CNTP_CTL_EL0; break;
case 0x5f12: sysreg = DR_REG_CNTP_CVAL_EL0; break;
case 0x5f18: sysreg = DR_REG_CNTV_TVAL_EL0; break;
case 0x5f19: sysreg = DR_REG_CNTV_CTL_EL0; break;
case 0x5f1a: sysreg = DR_REG_CNTV_CVAL_EL0; break;
case 0x5f40: sysreg = DR_REG_PMEVCNTR0_EL0; break;
case 0x5f41: sysreg = DR_REG_PMEVCNTR1_EL0; break;
case 0x5f42: sysreg = DR_REG_PMEVCNTR2_EL0; break;
case 0x5f43: sysreg = DR_REG_PMEVCNTR3_EL0; break;
case 0x5f44: sysreg = DR_REG_PMEVCNTR4_EL0; break;
case 0x5f45: sysreg = DR_REG_PMEVCNTR5_EL0; break;
case 0x5f46: sysreg = DR_REG_PMEVCNTR6_EL0; break;
case 0x5f47: sysreg = DR_REG_PMEVCNTR7_EL0; break;
case 0x5f48: sysreg = DR_REG_PMEVCNTR8_EL0; break;
case 0x5f49: sysreg = DR_REG_PMEVCNTR9_EL0; break;
case 0x5f4a: sysreg = DR_REG_PMEVCNTR10_EL0; break;
case 0x5f4b: sysreg = DR_REG_PMEVCNTR11_EL0; break;
case 0x5f4c: sysreg = DR_REG_PMEVCNTR12_EL0; break;
case 0x5f4d: sysreg = DR_REG_PMEVCNTR13_EL0; break;
case 0x5f4e: sysreg = DR_REG_PMEVCNTR14_EL0; break;
case 0x5f4f: sysreg = DR_REG_PMEVCNTR15_EL0; break;
case 0x5f50: sysreg = DR_REG_PMEVCNTR16_EL0; break;
case 0x5f51: sysreg = DR_REG_PMEVCNTR17_EL0; break;
case 0x5f52: sysreg = DR_REG_PMEVCNTR18_EL0; break;
case 0x5f53: sysreg = DR_REG_PMEVCNTR19_EL0; break;
case 0x5f54: sysreg = DR_REG_PMEVCNTR20_EL0; break;
case 0x5f55: sysreg = DR_REG_PMEVCNTR21_EL0; break;
case 0x5f56: sysreg = DR_REG_PMEVCNTR22_EL0; break;
case 0x5f57: sysreg = DR_REG_PMEVCNTR23_EL0; break;
case 0x5f58: sysreg = DR_REG_PMEVCNTR24_EL0; break;
case 0x5f59: sysreg = DR_REG_PMEVCNTR25_EL0; break;
case 0x5f5a: sysreg = DR_REG_PMEVCNTR26_EL0; break;
case 0x5f5b: sysreg = DR_REG_PMEVCNTR27_EL0; break;
case 0x5f5c: sysreg = DR_REG_PMEVCNTR28_EL0; break;
case 0x5f5d: sysreg = DR_REG_PMEVCNTR29_EL0; break;
case 0x5f5e: sysreg = DR_REG_PMEVCNTR30_EL0; break;
case 0x5f60: sysreg = DR_REG_PMEVTYPER0_EL0; break;
case 0x5f61: sysreg = DR_REG_PMEVTYPER1_EL0; break;
case 0x5f62: sysreg = DR_REG_PMEVTYPER2_EL0; break;
case 0x5f63: sysreg = DR_REG_PMEVTYPER3_EL0; break;
case 0x5f64: sysreg = DR_REG_PMEVTYPER4_EL0; break;
case 0x5f65: sysreg = DR_REG_PMEVTYPER5_EL0; break;
case 0x5f66: sysreg = DR_REG_PMEVTYPER6_EL0; break;
case 0x5f67: sysreg = DR_REG_PMEVTYPER7_EL0; break;
case 0x5f68: sysreg = DR_REG_PMEVTYPER8_EL0; break;
case 0x5f69: sysreg = DR_REG_PMEVTYPER9_EL0; break;
case 0x5f6a: sysreg = DR_REG_PMEVTYPER10_EL0; break;
case 0x5f6b: sysreg = DR_REG_PMEVTYPER11_EL0; break;
case 0x5f6c: sysreg = DR_REG_PMEVTYPER12_EL0; break;
case 0x5f6d: sysreg = DR_REG_PMEVTYPER13_EL0; break;
case 0x5f6e: sysreg = DR_REG_PMEVTYPER14_EL0; break;
case 0x5f6f: sysreg = DR_REG_PMEVTYPER15_EL0; break;
case 0x5f70: sysreg = DR_REG_PMEVTYPER16_EL0; break;
case 0x5f71: sysreg = DR_REG_PMEVTYPER17_EL0; break;
case 0x5f72: sysreg = DR_REG_PMEVTYPER18_EL0; break;
case 0x5f73: sysreg = DR_REG_PMEVTYPER19_EL0; break;
case 0x5f74: sysreg = DR_REG_PMEVTYPER20_EL0; break;
case 0x5f75: sysreg = DR_REG_PMEVTYPER21_EL0; break;
case 0x5f76: sysreg = DR_REG_PMEVTYPER22_EL0; break;
case 0x5f77: sysreg = DR_REG_PMEVTYPER23_EL0; break;
case 0x5f78: sysreg = DR_REG_PMEVTYPER24_EL0; break;
case 0x5f79: sysreg = DR_REG_PMEVTYPER25_EL0; break;
case 0x5f7a: sysreg = DR_REG_PMEVTYPER26_EL0; break;
case 0x5f7b: sysreg = DR_REG_PMEVTYPER27_EL0; break;
case 0x5f7c: sysreg = DR_REG_PMEVTYPER28_EL0; break;
case 0x5f7d: sysreg = DR_REG_PMEVTYPER29_EL0; break;
case 0x5f7e: sysreg = DR_REG_PMEVTYPER30_EL0; break;
case 0x5f7f: sysreg = DR_REG_PMCCFILTR_EL0; break;
case 0x6218: sysreg = DR_REG_SPSR_IRQ; break;
case 0x6219: sysreg = DR_REG_SPSR_ABT; break;
case 0x621a: sysreg = DR_REG_SPSR_UND; break;
case 0x621b: sysreg = DR_REG_SPSR_FIQ; break;
default: return opnd_create_immed_uint(imm15, OPSZ_2);
}
return opnd_create_reg(sysreg);
}
static inline bool
encode_sysreg(OUT uint *imm15, opnd_t opnd)
{
if (opnd_is_reg(opnd)) {
switch (opnd_get_reg(opnd)) {
case DR_REG_NZCV: *imm15 = 0x5a10; break;
case DR_REG_FPCR: *imm15 = 0x5a20; break;
case DR_REG_FPSR: *imm15 = 0x5a21; break;
case DR_REG_MDCCSR_EL0: *imm15 = 0x1808; break;
case DR_REG_DBGDTR_EL0: *imm15 = 0x1820; break;
case DR_REG_DBGDTRRX_EL0: *imm15 = 0x1828; break;
case DR_REG_SP_EL0: *imm15 = 0x4208; break;
case DR_REG_SPSEL: *imm15 = 0x4210; break;
case DR_REG_CURRENTEL: *imm15 = 0x4212; break;
case DR_REG_PAN: *imm15 = 0x4213; break;
case DR_REG_UAO: *imm15 = 0x4214; break;
case DR_REG_CTR_EL0: *imm15 = 0x5801; break;
case DR_REG_DCZID_EL0: *imm15 = 0x5807; break;
case DR_REG_RNDR: *imm15 = 0x5920; break;
case DR_REG_RNDRRS: *imm15 = 0x5921; break;
case DR_REG_DAIF: *imm15 = 0x5a11; break;
case DR_REG_DIT: *imm15 = 0x5a15; break;
case DR_REG_SSBS: *imm15 = 0x5a16; break;
case DR_REG_TCO: *imm15 = 0x5a17; break;
case DR_REG_DSPSR_EL0: *imm15 = 0x5a28; break;
case DR_REG_DLR_EL0: *imm15 = 0x5a29; break;
case DR_REG_PMCR_EL0: *imm15 = 0x5ce0; break;
case DR_REG_PMCNTENSET_EL0: *imm15 = 0x5ce1; break;
case DR_REG_PMCNTENCLR_EL0: *imm15 = 0x5ce2; break;
case DR_REG_PMOVSCLR_EL0: *imm15 = 0x5ce3; break;
case DR_REG_PMSWINC_EL0: *imm15 = 0x5ce4; break;
case DR_REG_PMSELR_EL0: *imm15 = 0x5ce5; break;
case DR_REG_PMCEID0_EL0: *imm15 = 0x5ce6; break;
case DR_REG_PMCEID1_EL0: *imm15 = 0x5ce7; break;
case DR_REG_PMCCNTR_EL0: *imm15 = 0x5ce8; break;
case DR_REG_PMXEVTYPER_EL0: *imm15 = 0x5ce9; break;
case DR_REG_PMXEVCNTR_EL0: *imm15 = 0x5cea; break;
case DR_REG_PMUSERENR_EL0: *imm15 = 0x5cf0; break;
case DR_REG_PMOVSSET_EL0: *imm15 = 0x5cf3; break;
case DR_REG_TPIDR_EL0: *imm15 = 0x5e82; break;
case DR_REG_TPIDRRO_EL0: *imm15 = 0x5e83; break;
case DR_REG_SCXTNUM_EL0: *imm15 = 0x5e87; break;
case DR_REG_CNTFRQ_EL0: *imm15 = 0x5f00; break;
case DR_REG_CNTPCT_EL0: *imm15 = 0x5f01; break;
case DR_REG_CNTVCT_EL0: *imm15 = 0x5f02; break;
case DR_REG_CNTP_TVAL_EL0: *imm15 = 0x5f10; break;
case DR_REG_CNTP_CTL_EL0: *imm15 = 0x5f11; break;
case DR_REG_CNTP_CVAL_EL0: *imm15 = 0x5f12; break;
case DR_REG_CNTV_TVAL_EL0: *imm15 = 0x5f18; break;
case DR_REG_CNTV_CTL_EL0: *imm15 = 0x5f19; break;
case DR_REG_CNTV_CVAL_EL0: *imm15 = 0x5f1a; break;
case DR_REG_PMEVCNTR0_EL0: *imm15 = 0x5f40; break;
case DR_REG_PMEVCNTR1_EL0: *imm15 = 0x5f41; break;
case DR_REG_PMEVCNTR2_EL0: *imm15 = 0x5f42; break;
case DR_REG_PMEVCNTR3_EL0: *imm15 = 0x5f43; break;
case DR_REG_PMEVCNTR4_EL0: *imm15 = 0x5f44; break;
case DR_REG_PMEVCNTR5_EL0: *imm15 = 0x5f45; break;
case DR_REG_PMEVCNTR6_EL0: *imm15 = 0x5f46; break;
case DR_REG_PMEVCNTR7_EL0: *imm15 = 0x5f47; break;
case DR_REG_PMEVCNTR8_EL0: *imm15 = 0x5f48; break;
case DR_REG_PMEVCNTR9_EL0: *imm15 = 0x5f49; break;
case DR_REG_PMEVCNTR10_EL0: *imm15 = 0x5f4a; break;
case DR_REG_PMEVCNTR11_EL0: *imm15 = 0x5f4b; break;
case DR_REG_PMEVCNTR12_EL0: *imm15 = 0x5f4c; break;
case DR_REG_PMEVCNTR13_EL0: *imm15 = 0x5f4d; break;
case DR_REG_PMEVCNTR14_EL0: *imm15 = 0x5f4e; break;
case DR_REG_PMEVCNTR15_EL0: *imm15 = 0x5f4f; break;
case DR_REG_PMEVCNTR16_EL0: *imm15 = 0x5f50; break;
case DR_REG_PMEVCNTR17_EL0: *imm15 = 0x5f51; break;
case DR_REG_PMEVCNTR18_EL0: *imm15 = 0x5f52; break;
case DR_REG_PMEVCNTR19_EL0: *imm15 = 0x5f53; break;
case DR_REG_PMEVCNTR20_EL0: *imm15 = 0x5f54; break;
case DR_REG_PMEVCNTR21_EL0: *imm15 = 0x5f55; break;
case DR_REG_PMEVCNTR22_EL0: *imm15 = 0x5f56; break;
case DR_REG_PMEVCNTR23_EL0: *imm15 = 0x5f57; break;
case DR_REG_PMEVCNTR24_EL0: *imm15 = 0x5f58; break;
case DR_REG_PMEVCNTR25_EL0: *imm15 = 0x5f59; break;
case DR_REG_PMEVCNTR26_EL0: *imm15 = 0x5f5a; break;
case DR_REG_PMEVCNTR27_EL0: *imm15 = 0x5f5b; break;
case DR_REG_PMEVCNTR28_EL0: *imm15 = 0x5f5c; break;
case DR_REG_PMEVCNTR29_EL0: *imm15 = 0x5f5d; break;
case DR_REG_PMEVCNTR30_EL0: *imm15 = 0x5f5e; break;
case DR_REG_PMEVTYPER0_EL0: *imm15 = 0x5f60; break;
case DR_REG_PMEVTYPER1_EL0: *imm15 = 0x5f61; break;
case DR_REG_PMEVTYPER2_EL0: *imm15 = 0x5f62; break;
case DR_REG_PMEVTYPER3_EL0: *imm15 = 0x5f63; break;
case DR_REG_PMEVTYPER4_EL0: *imm15 = 0x5f64; break;
case DR_REG_PMEVTYPER5_EL0: *imm15 = 0x5f65; break;
case DR_REG_PMEVTYPER6_EL0: *imm15 = 0x5f66; break;
case DR_REG_PMEVTYPER7_EL0: *imm15 = 0x5f67; break;
case DR_REG_PMEVTYPER8_EL0: *imm15 = 0x5f68; break;
case DR_REG_PMEVTYPER9_EL0: *imm15 = 0x5f69; break;
case DR_REG_PMEVTYPER10_EL0: *imm15 = 0x5f6a; break;
case DR_REG_PMEVTYPER11_EL0: *imm15 = 0x5f6b; break;
case DR_REG_PMEVTYPER12_EL0: *imm15 = 0x5f6c; break;
case DR_REG_PMEVTYPER13_EL0: *imm15 = 0x5f6d; break;
case DR_REG_PMEVTYPER14_EL0: *imm15 = 0x5f6e; break;
case DR_REG_PMEVTYPER15_EL0: *imm15 = 0x5f6f; break;
case DR_REG_PMEVTYPER16_EL0: *imm15 = 0x5f70; break;
case DR_REG_PMEVTYPER17_EL0: *imm15 = 0x5f71; break;
case DR_REG_PMEVTYPER18_EL0: *imm15 = 0x5f72; break;
case DR_REG_PMEVTYPER19_EL0: *imm15 = 0x5f73; break;
case DR_REG_PMEVTYPER20_EL0: *imm15 = 0x5f74; break;
case DR_REG_PMEVTYPER21_EL0: *imm15 = 0x5f75; break;
case DR_REG_PMEVTYPER22_EL0: *imm15 = 0x5f76; break;
case DR_REG_PMEVTYPER23_EL0: *imm15 = 0x5f77; break;
case DR_REG_PMEVTYPER24_EL0: *imm15 = 0x5f78; break;
case DR_REG_PMEVTYPER25_EL0: *imm15 = 0x5f79; break;
case DR_REG_PMEVTYPER26_EL0: *imm15 = 0x5f7a; break;
case DR_REG_PMEVTYPER27_EL0: *imm15 = 0x5f7b; break;
case DR_REG_PMEVTYPER28_EL0: *imm15 = 0x5f7c; break;
case DR_REG_PMEVTYPER29_EL0: *imm15 = 0x5f7d; break;
case DR_REG_PMEVTYPER30_EL0: *imm15 = 0x5f7e; break;
case DR_REG_PMCCFILTR_EL0: *imm15 = 0x5f7f; break;
case DR_REG_SPSR_IRQ: *imm15 = 0x6218; break;
case DR_REG_SPSR_ABT: *imm15 = 0x6219; break;
case DR_REG_SPSR_UND: *imm15 = 0x621a; break;
case DR_REG_SPSR_FIQ: *imm15 = 0x621b; break;
default: return false;
}
return true;
}
if (opnd_is_immed_int(opnd)) {
uint imm;
if (try_encode_imm(&imm, 15, opnd) && !opnd_is_reg(decode_sysreg(imm))) {
*imm15 = imm;
return true;
}
return false;
}
return false;
}
/* Decode integer register. Input 'n' is number from 0 to 31, where
* 31 can mean stack pointer or zero register, depending on 'is_sp'.
*/
static inline reg_id_t
decode_reg(uint n, bool is_x, bool is_sp)
{
return (n < 31 ? (is_x ? DR_REG_X0 : DR_REG_W0) + n
: is_sp ? (is_x ? DR_REG_XSP : DR_REG_WSP)
: (is_x ? DR_REG_XZR : DR_REG_WZR));
}
/* Encode integer register. */
static inline bool
encode_reg(OUT uint *num, OUT bool *is_x, reg_id_t reg, bool is_sp)
{
if (DR_REG_X0 <= reg && reg <= DR_REG_X30) {
*num = reg - DR_REG_X0;
*is_x = true;
return true;
}
if (DR_REG_W0 <= reg && reg <= DR_REG_W30) {
*num = reg - DR_REG_W0;
*is_x = false;
return true;
}
if (is_sp && (reg == DR_REG_XSP || reg == DR_REG_WSP)) {
*num = 31;
*is_x = (reg == DR_REG_XSP);
return true;
}
if (!is_sp && (reg == DR_REG_XZR || reg == DR_REG_WZR)) {
*num = 31;
*is_x = (reg == DR_REG_XZR);
return true;
}
return false;
}
/* Decode SIMD/FP register. */
static inline opnd_t
decode_vreg(uint scale, uint n)
{
reg_id_t reg = DR_REG_NULL;
ASSERT(n < 32 && scale < 5);
switch (scale) {
case 0: reg = DR_REG_B0 + n; break;
case 1: reg = DR_REG_H0 + n; break;
case 2: reg = DR_REG_S0 + n; break;
case 3: reg = DR_REG_D0 + n; break;
case 4: reg = DR_REG_Q0 + n; break;
}
return opnd_create_reg(reg);
}
/* Encode SIMD/FP register. */
static inline bool
encode_vreg(INOUT opnd_size_t *x, OUT uint *r, opnd_t opnd)
{
reg_id_t reg;
opnd_size_t sz;
uint n;
if (!opnd_is_reg(opnd))
return false;
reg = opnd_get_reg(opnd);
if ((uint)(reg - DR_REG_B0) < 32) {
n = reg - DR_REG_B0;
sz = OPSZ_1;
} else if ((uint)(reg - DR_REG_H0) < 32) {
n = reg - DR_REG_H0;
sz = OPSZ_2;
} else if ((uint)(reg - DR_REG_S0) < 32) {
n = reg - DR_REG_S0;
sz = OPSZ_4;
} else if ((uint)(reg - DR_REG_D0) < 32) {
n = reg - DR_REG_D0;
sz = OPSZ_8;
} else if ((uint)(reg - DR_REG_Q0) < 32) {
n = reg - DR_REG_Q0;
sz = OPSZ_16;
} else
return false;
if (*x == OPSZ_NA)
*x = sz;
else if (*x != sz)
return false;
*r = n;
return true;
}
static opnd_t
create_base_imm(uint enc, int disp, int bytes)
{
/* The base register number comes from bits 5 to 9. It may be SP. */
return opnd_create_base_disp(decode_reg(extract_uint(enc, 5, 5), true, true),
DR_REG_NULL, 0, disp, opnd_size_from_bytes(bytes));
}
static bool
is_base_imm(opnd_t opnd, OUT uint *regnum)
{
uint n;
bool is_x;
if (!opnd_is_base_disp(opnd) || opnd_get_index(opnd) != DR_REG_NULL ||
!encode_reg(&n, &is_x, opnd_get_base(opnd), true) || !is_x)
return false;
*regnum = n;
return true;
}
/* Used for mem7* operand types, which have a 7-bit offset and are used by
* load/store (pair) instructions. Returns the scale (log base 2 of number
* of bytes) of the memory argument, a function of bits 26, 30 and 31.
*/
static int
mem7_scale(uint enc)
{
return 2 +
(TEST(1U << 26, enc) ? extract_uint(enc, 30, 2) : extract_uint(enc, 31, 1));
}
/* Used for memlit operand type, used by load (literal). Returns the size
* of the memory operand, a function of bits 26, 30 and 31.
*/
static opnd_size_t
memlit_size(uint enc)
{
opnd_size_t size = OPSZ_0;
switch (extract_uint(enc, 30, 2)) {
case 0: size = OPSZ_4; break;
case 1: size = OPSZ_8; break;
case 2: size = TEST(1U << 26, enc) ? OPSZ_16 : OPSZ_4;
}
return size;
}
/* Returns the number of registers accessed by SIMD load structure and replicate,
* a function of bits 13 and 21.
*/
static int
memvr_regcount(uint enc)
{
return ((enc >> 13 & 1) << 1 | (enc >> 21 & 1)) + 1;
}
/* Used for memvs operand type, used by SIMD load/store single structure.
* Returns the number of bytes read or written, which is a function of
* bits 10, 11, 13, 14, 15 and 21.
*/
static int
memvs_size(uint enc)
{
int scale = extract_uint(enc, 14, 2);
/* Number of elements in structure, 1 to 4. */
int elems = memvr_regcount(enc);
int size = extract_uint(enc, 10, 2);
if (scale == 2 && size == 1)
scale = 3;
return elems * (1 << scale);
}
/* Returns the number of registers accessed by SIMD load/store multiple structures,
* a function of bits 12-15.
*/
static int
multistruct_regcount(uint enc)
{
switch (extract_uint(enc, 12, 4)) {
case 0: return 4;
case 2: return 4;
case 4: return 3;
case 6: return 3;
case 7: return 1;
case 8: return 2;
case 10: return 2;
}
ASSERT(false);
return 0;
}
/*******************************************************************************
* Pairs of functions for decoding and encoding a generalised type of operand.
*/
/* adr_page: used for adr, adrp */
static bool
decode_opnd_adr_page(int scale, uint enc, byte *pc, OUT opnd_t *opnd)
{
uint bits = (enc >> 3 & 0x1ffffc) | (enc >> 29 & 3);
byte *addr = ((byte *)((ptr_uint_t)pc >> scale << scale) +
extract_int(bits, 0, 21) * ((ptr_int_t)1 << scale));
*opnd = opnd_create_rel_addr(addr, OPSZ_0);
return true;
}
static bool
encode_opnd_adr_page(int scale, byte *pc, opnd_t opnd, OUT uint *enc_out, instr_t *instr,
decode_info_t *di)
{
ptr_int_t offset;
uint bits;
if (opnd_is_rel_addr(opnd)) {
offset = (ptr_int_t)opnd_get_addr(opnd) -
(ptr_int_t)((ptr_uint_t)pc >> scale << scale);
} else if (opnd_is_instr(opnd)) {
offset = (ptr_int_t)((byte *)opnd_get_instr(opnd)->note - (byte *)instr->note);
} else
return false;
if (try_encode_int(&bits, 21, scale, offset)) {
*enc_out = (bits & 3) << 29 | (bits & 0x1ffffc) << 3;
return true;
}
/* If !di->check_reachable we still require correct alignment. */
if (!di->check_reachable && ALIGNED(offset, 1ULL << scale)) {
*enc_out = 0;
return true;
}
return false;
}
/* dq_plus: used for dq0, dq5, dq16, dq0p1, dq0p2, dq0p3 */
static inline bool
decode_opnd_dq_plus(int add, int rpos, int qpos, uint enc, OUT opnd_t *opnd)
{
*opnd = opnd_create_reg((TEST(1U << qpos, enc) ? DR_REG_Q0 : DR_REG_D0) +
(extract_uint(enc, rpos, rpos + 5) + add) % 32);
return true;
}
static inline bool
encode_opnd_dq_plus(int add, int rpos, int qpos, opnd_t opnd, OUT uint *enc_out)
{
uint num;
bool q;
if (!opnd_is_reg(opnd))
return false;
q = (uint)(opnd_get_reg(opnd) - DR_REG_Q0) < 32;
num = opnd_get_reg(opnd) - (q ? DR_REG_Q0 : DR_REG_D0);
if (num >= 32)
return false;
*enc_out = ((num - add) % 32) << rpos | (uint)q << qpos;
return true;
}
/* index: used for opnd_index0, ..., opnd_index3 */
static bool
decode_opnd_index(int n, uint enc, OUT opnd_t *opnd)
{
uint bits = (enc >> 30 & 1) << 3 | (enc >> 10 & 7);
*opnd = opnd_create_immed_int(bits >> n, OPSZ_4b);
return true;
}
static bool
encode_opnd_index(int n, opnd_t opnd, OUT uint *enc_out)
{
ptr_int_t val;
uint bits;
if (!opnd_is_immed_int(opnd))
return false;
val = opnd_get_immed_int(opnd);
if (val < 0 || val >= 16 >> n)
return false;
bits = val << n;
*enc_out = (bits >> 3 & 1) << 30 | (bits & 7) << 10;
return true;
}
/* int: used for almost every operand type that is an immediate integer */
static bool
decode_opnd_int(int pos, int len, bool signd, int scale, opnd_size_t size,
dr_opnd_flags_t flags, uint enc, OUT opnd_t *opnd)
{
ptr_int_t val = signd ? extract_int(enc, pos, len) : extract_uint(enc, pos, len);
*opnd =
opnd_add_flags(opnd_create_immed_int(val * ((ptr_int_t)1 << scale), size), flags);
return true;
}
static bool
encode_opnd_int(int pos, int len, bool signd, int scale, dr_opnd_flags_t flags,
opnd_t opnd, OUT uint *enc_out)
{
ptr_uint_t val;
if (!opnd_is_immed_int(opnd) || (opnd_get_flags(opnd) & flags) != flags)
return false;
val = opnd_get_immed_int(opnd);
if ((val & (((ptr_uint_t)1 << scale) - 1)) != 0)
return false;
if ((val + (signd ? ((ptr_uint_t)1 << (len + scale - 1)) : 0)) >> (len + scale) != 0)
return false;
*enc_out = (val >> scale & (((ptr_uint_t)1 << (len - 1)) * 2 - 1)) << pos;
return true;
}
/* imm_bf: used for bitfield immediate operands */
static bool
decode_opnd_imm_bf(int pos, uint enc, OUT opnd_t *opnd)
{
if (!TEST(1U << 31, enc) && extract_uint(enc, pos, 6) >= 32)
return false;
return decode_opnd_int(pos, 6, false, 0, OPSZ_6b, 0, enc, opnd);
}
static bool
encode_opnd_imm_bf(int pos, uint enc, opnd_t opnd, uint *enc_out)
{
if (!TEST(1U << 31, enc) && extract_uint(enc, pos, 6) >= 32)
return false;
return encode_opnd_int(pos, 6, false, 0, 0, opnd, enc_out);
}
/* mem0_scale: used for mem0, mem0p */
static inline bool
decode_opnd_mem0_scale(int scale, uint enc, OUT opnd_t *opnd)
{
*opnd = create_base_imm(enc, 0, 1 << scale);
return true;
}
static inline bool
encode_opnd_mem0_scale(int scale, opnd_t opnd, OUT uint *enc_out)
{
uint xn;
if (!is_base_imm(opnd, &xn) ||
opnd_get_size(opnd) != opnd_size_from_bytes(1 << scale) ||
opnd_get_disp(opnd) != 0)
return false;
*enc_out = xn << 5;
return true;
}
/* mem12_scale: used for mem12, mem12q, prf12 */
static inline bool
decode_opnd_mem12_scale(int scale, bool prfm, uint enc, OUT opnd_t *opnd)
{
*opnd =
create_base_imm(enc, extract_uint(enc, 10, 12) << scale, prfm ? 0 : 1 << scale);
return true;
}
static inline bool
encode_opnd_mem12_scale(int scale, bool prfm, opnd_t opnd, OUT uint *enc_out)
{
int disp;
uint xn;
if (!is_base_imm(opnd, &xn) ||
opnd_get_size(opnd) != (prfm ? OPSZ_0 : opnd_size_from_bytes(1 << scale)))
return false;
disp = opnd_get_disp(opnd);
if (disp < 0 || disp >> scale > 0xfff || disp >> scale << scale != disp)
return false;
*enc_out = xn << 5 | (uint)disp >> scale << 10;
return true;
}
/* mem7_postindex: used for mem7, mem7post */
static inline bool
decode_opnd_mem7_postindex(bool post, uint enc, OUT opnd_t *opnd)
{
int scale = mem7_scale(enc);
*opnd = create_base_imm(enc, post ? 0 : extract_int(enc, 15, 7) * (1 << scale),
2 << scale);
opnd->value.base_disp.pre_index = !post;
return true;
}
static inline bool
encode_opnd_mem7_postindex(bool post, uint enc, opnd_t opnd, OUT uint *enc_out)
{
int scale = mem7_scale(enc);
int disp;
uint xn;
if (!is_base_imm(opnd, &xn) ||
opnd_get_size(opnd) != opnd_size_from_bytes(2 << scale))
return false;
disp = opnd_get_disp(opnd);
if (disp == 0 && opnd.value.base_disp.pre_index == post)
return false;
if (post ? disp != 0
: ((uint)disp & ((1 << scale) - 1)) != 0 ||
(uint)disp + (0x40 << scale) >= (0x80 << scale))
return false;
*enc_out = xn << 5 | ((uint)disp >> scale & 0x7f) << 15;
return true;
}
/* mem9_bytes: used for mem9, mem9post, mem9q, mem9qpost, prf9 */
static inline bool
decode_opnd_mem9_bytes(int bytes, bool post, uint enc, OUT opnd_t *opnd)
{
*opnd = create_base_imm(enc, post ? 0 : extract_int(enc, 12, 9), bytes);
opnd->value.base_disp.pre_index = !post;
return true;
}
static inline bool
encode_opnd_mem9_bytes(int bytes, bool post, opnd_t opnd, OUT uint *enc_out)
{
int disp;
uint xn;
if (!is_base_imm(opnd, &xn) || opnd_get_size(opnd) != opnd_size_from_bytes(bytes))
return false;
disp = opnd_get_disp(opnd);
if (disp == 0 && opnd.value.base_disp.pre_index == post)
return false;
if (post ? (disp != 0) : (disp < -256 || disp > 255))
return false;
*enc_out = xn << 5 | ((uint)disp & 0x1ff) << 12;
return true;
}
/* memreg_size: used for memreg, memregq, prfreg */
static inline bool
decode_opnd_memreg_size(opnd_size_t size, uint enc, OUT opnd_t *opnd)
{
if (!TEST(1U << 14, enc))
return false;
dr_extend_type_t extend;
switch (enc >> 13 & 7) {
case 0b010: extend = DR_EXTEND_UXTW; break;
// Alias for LSL. LSL preferred in disassembly.
case 0b011: extend = DR_EXTEND_UXTX; break;
case 0b110: extend = DR_EXTEND_SXTW; break;
case 0b111: extend = DR_EXTEND_SXTX; break;
default: return false;
}
*opnd = opnd_create_base_disp_aarch64(
decode_reg(enc >> 5 & 31, true, true),
decode_reg(enc >> 16 & 31, TEST(1U << 13, enc), false), extend,
TEST(1U << 12, enc), 0, 0, size);
return true;
}
static inline bool
encode_opnd_memreg_size(opnd_size_t size, opnd_t opnd, OUT uint *enc_out)
{
uint rn, rm, option;
bool xn, xm, scaled;
if (!opnd_is_base_disp(opnd) || opnd_get_size(opnd) != size ||
opnd_get_disp(opnd) != 0)
return false;
option = opnd_get_index_extend(opnd, &scaled, NULL);
if (!TEST(2, option))
return false;
if (!encode_reg(&rn, &xn, opnd_get_base(opnd), true) || !xn ||
!encode_reg(&rm, &xm, opnd_get_index(opnd), false) || (!xm && (option & 1) != 0))
return false;
*enc_out = rn << 5 | rm << 16 | option << 13 | (uint)scaled << 12;
return true;
}