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Enhancement Request: Support for languages like verilog using begin/end pair. #8

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shankarpdy opened this issue Jan 12, 2015 · 2 comments
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@shankarpdy
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Hi boyw,
It is a extremely nice and useful plugin.
I have started using it everywhere. The hl-paran-mode is the most useful one.

Is it possible to support other parens also - like begin/end pair in verilog/vhdl.
Can we define all the parenthesis pairs using a variable that can be highlighted.

@tcw165
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tcw165 commented Jan 12, 2015

Good point! Sure it is possible. I'm working on it. BTW, what is the postfix of verilog/vhdl file?

Maybe I could refer to backward-up-list, backward-sexp or smartparen.

@shankarpdy
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for verilog - it is *.v or *.sv
for vdhl it is *.vhd

@tcw165 tcw165 self-assigned this Oct 13, 2015
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