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To my eyes this should be equivalent to what I had before. A bit wasteful, perhaps, in such a simple project, but to me this looks like it should work.
But it doesn't:
$ make
make: *** No rule to make target 'bmakelib.dict.set(LIBCONF,lib-objs,hello_impl.o)', needed by 'lib-config'. Stop.
And at this point I'm stuck. I'm positive that what I want to do is possible but I have no idea how to do it. The examples given in the documentation for dict don't really cover doing a build this way (the accessing of the dict values is only in the body of a rule, not the head) and no amount of tinkering has got me something that works.
So ...
A few, well-commented examples with simplicity roughly equivalent to the above needs to be added to the documentation. Where the possible "gotchas" are (because of Make's broken syntax) need to be pointed out so that these dicts can be an asset to a Makefile.
The text was updated successfully, but these errors were encountered:
Mind that the correct syntax for calling get is $(call bmakelib.dict.get,DICT,KEY). The reason that it's not defined as a target, like eg put, is that it is supposed to evaluate to a value and there's not way to do so with a target.
Why it doesn't work as a prerequisite?
Make executes all prerequisites of a target in parallel. In your case define and put are run in parallel to get which unfortunately means the dict entry wouldn't be initialised by the time get is called. That's why get works in the recipe when all the prerequisites have been run.
Sadly I haven't been able to work around this limitation. Let me know if you can come up with something that works.
Mind you that you can always invoke put and define like $(call bmakelib.define,DICT) and $(call bmakelib.dict.put,KEY,VALUE) respectively.
It helps, but it REALLY needs to be better-documented, complete with your explanation above and a detailed example that illustrates the points. (The bug was about the documentation, after all. ;) )
Using dicts comes in two flavours, and seemingly because of the really weird syntax of Makefiles using them is sometimes inobvious.
The following bit me and I still haven't actually figured out how to get around it.
So let's assume some simple files:
A quick sanity check at the command line:
Now let's make a conventional Makefile
This works fine:
If I convert this to an attempt to use a dict for managing settings , however:
To my eyes this should be equivalent to what I had before. A bit wasteful, perhaps, in such a simple project, but to me this looks like it should work.
But it doesn't:
And at this point I'm stuck. I'm positive that what I want to do is possible but I have no idea how to do it. The examples given in the documentation for dict don't really cover doing a build this way (the accessing of the dict values is only in the body of a rule, not the head) and no amount of tinkering has got me something that works.
So ...
A few, well-commented examples with simplicity roughly equivalent to the above needs to be added to the documentation. Where the possible "gotchas" are (because of Make's broken syntax) need to be pointed out so that these dicts can be an asset to a Makefile.
The text was updated successfully, but these errors were encountered: