rebase commits from rk-6.1-rk1 to rk-6.1-rkr3

.github/workflows/compile.yaml

@@ -0,0 +1,56 @@
+name: Build Kernels at PR
+
+on:
+  workflow_dispatch:
+  pull_request:
+    types: [opened, reopened, edited, synchronize]
+
+jobs:
+
+  Build:
+    name: Compile kernel
+    runs-on: rockchip
+    if: ${{ github.repository_owner == 'armbian' }}
+    env:
+      OCI_TARGET_BASE: "ghcr.io/${{ github.repository }}/" # This is picked up by the Docker launcher automatically
+    steps:
+
+      # Login to ghcr.io, for later uploading rootfs to ghcr.io
+      - name: Docker Login to GitHub Container Registry
+        uses: docker/login-action@v2
+        with:
+          registry: ghcr.io
+          username: ${{ github.actor }} # GitHub username or org
+          password: ${{ secrets.GITHUB_TOKEN }}    # GitHub actions builtin token. repo has to have pkg access.
+
+      - name: Checkout build repo
+        uses: actions/checkout@v3
+        with:
+          repository: armbian/build
+          ref:  main
+          fetch-depth: 1
+          clean: false
+
+      - name: Build Kernel at ${{ github.event.pull_request.head.sha }}
+        id: kernel
+        run: |
+
+          rm -rf output/debs/*
+          mkdir -p userpatches/extensions/
+          cat <<- EOF > userpatches/extensions/pull-request.sh
+          function post_family_config__force_commit_for_rk3588() {
+              KERNELBRANCH="commit:${{ github.event.pull_request.head.sha }}"
+          }
+          EOF
+          bash ./compile.sh kernel \
+          SHARE_LOG=yes \
+          BOARD=orangepi5 \
+          BRANCH=vendor \
+          ENABLE_EXTENSIONS="pull-request"
+
+      - name: Upload Artifact
+        uses: actions/upload-artifact@v3
+        with:
+          name: linux-rockchip-vendor
+          path: output/debs/*.deb
+          retention-days: 5

.gitignore

@@ -10,7 +10,6 @@
 #
 # Normal rules (sorted alphabetically)
 #
-.*
 *.a
 *.asn1.[ch]
 *.bin

Documentation/ABI/testing/sysfs-device-mali

@@ -1,6 +1,6 @@
 /*
  *
- * (C) COPYRIGHT 2023 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2020 ARM Limited. All rights reserved.
  *
  * This program is free software and is provided to you under the terms of the
  * GNU General Public License version 2 as published by the Free Software
@@ -68,16 +68,6 @@ Description:
 		is supported or is powered down after suspending command
 		stream groups.
 
-What:		/sys/class/misc/mali%u/device/idle_hysteresis_time_ns
-Description:
-		This attribute is available only with mali platform
-		device-driver that supports a CSF GPU. This attribute is
-		used to configure the timeout value in nanoseconds for the
-		GPU idle handling. If GPU has been idle for this timeout
-		period, then it is put to sleep for GPUs where sleep feature
-		is supported or is powered down after suspending command
-		stream groups.
-
 What:		/sys/class/misc/mali%u/device/js_ctx_scheduling_mode
 Description:
 		This attribute is available only with platform device that
@@ -242,23 +232,6 @@ Description:
 		If we set the value to zero then MCU-controlled shader/tiler
 		power management will be disabled.
 
-What:       /sys/class/misc/mali%u/device/mcu_shader_pwroff_timeout_ns
-Description:
-		This attribute is available only with mali platform
-		device-driver that supports a CSF GPU. The duration value unit
-		is in nanoseconds and is used for configuring MCU shader Core power-off
-		timer. The configured MCU shader Core power-off timer will only have
-		effect when the host driver has delegated the shader cores
-		power management to MCU. The supplied value will be
-		recorded internally without any change. But the actual field
-		value will be subject to core power-off timer source frequency
-		scaling and maximum value limiting. The default source will be
-		SYSTEM_TIMESTAMP counter. But in case the platform is not able
-		to supply it, the GPU CYCLE_COUNTER source will be used as an
-		alternative.
-
-		If we set the value to zero then MCU-controlled shader/tiler
-		power management will be disabled.
 
 What:           /sys/class/misc/mali%u/device/csg_scheduling_period
 Description:

Documentation/ABI/testing/sysfs-device-mali-coresight-source

@@ -1,6 +1,6 @@
 /*
  *
- * (C) COPYRIGHT 2023 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2022 ARM Limited. All rights reserved.
  *
  * This program is free software and is provided to you under the terms of the
  * GNU General Public License version 2 as published by the Free Software
@@ -71,10 +71,6 @@ Description:
             [11:10] = 1, Generate TS request approx every 128 cycles
             [22:16] = 1, Trace bus ID
 
-What:		/sys/bus/coresight/devices/mali-source-ela/reset_regs
-Description:
-        Attribute used to reset registers to zero.
-
 What:		/sys/bus/coresight/devices/mali-source-ela/enable_source
 Description:
         Attribute used to enable Coresight Source ELA.
@@ -83,121 +79,35 @@ What:		/sys/bus/coresight/devices/mali-source-ela/is_enabled
 Description:
         Attribute used to check if Coresight Source ELA is enabled.
 
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/TIMECTRL
-Description:
-        Coresight Source ELA TIMECTRL register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/TSSR
-Description:
-        Coresight Source ELA TSR register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/ATBCTRL
-Description:
-        Coresight Source ELA ATBCTRL register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/PTACTION
-Description:
-        Coresight Source ELA PTACTION register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/AUXCTRL
-Description:
-        Coresight Source ELA AUXCTRL register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/CNTSEL
-Description:
-        Coresight Source ELA CNTSEL register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/SIGSELn
-Description:
-        Coresight Source ELA SIGSELn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/TRIGCTRLn
-Description:
-        Coresight Source ELA TRIGCTRLn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/NEXTSTATEn
-Description:
-        Coresight Source ELA NEXTSTATEn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/ACTIONn
+What:		/sys/bus/coresight/devices/mali-source-ela/select
 Description:
-        Coresight Source ELA ACTIONn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/ALTNEXTSTATEn
-Description:
-        Coresight Source ELA ALTNEXTSTATEn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/ALTACTIONn
-Description:
-        Coresight Source ELA ALTACTIONn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/COMPCTRLn
-Description:
-        Coresight Source ELA COMPCTRLn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/ALTCOMPCTRLn
-Description:
-        Coresight Source ELA ALTCOMPCTRLn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/COUNTCOMPn
-Description:
-        Coresight Source ELA COUNTCOMPn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/TWBSELn
-Description:
-        Coresight Source ELA TWBSELn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/EXTMASKn
-Description:
-        Coresight Source ELA EXTMASKn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/EXTCOMPn
-Description:
-        Coresight Source ELA EXTCOMPn register set/get.
-        Refer to specification for more details.
-
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/QUALMASKn
-Description:
-        Coresight Source ELA QUALMASKn register set/get.
-        Refer to specification for more details.
+        Coresight Source ELA select trace mode:
+            [0], NONE
+            [1], JCN
+            [2], CEU_EXEC
+            [3], CEU_CMDS
+            [4], MCU_AHBP
+            [5], HOST_AXI
+            [6], NR_TRACEMODE
 
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/QUALCOMPn
-        Coresight Source ELA QUALCOMPn register set/get.
         Refer to specification for more details.
 
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/SIGMASKn_0-7
+What:		/sys/bus/coresight/devices/mali-source-ela/sigmask0
 Description:
-        Coresight Source ELA SIGMASKn_0-7 register set/get.
+        Coresight Source ELA SIGMASK0 register set/get.
         Refer to specification for more details.
 
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/SIGCOMPn_0-7
+What:		/sys/bus/coresight/devices/mali-source-ela/sigmask4
 Description:
-        Coresight Source ELA SIGCOMPn_0-7 register set/get.
+        Coresight Source ELA SIGMASK4 register set/get.
         Refer to specification for more details.
 
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/SIGSELn_0-7
+What:		/sys/bus/coresight/devices/mali-source-ela/sigcomp0
 Description:
-        Coresight Source ELA SIGSELn_0-7 register set/get.
+        Coresight Source ELA SIGCOMP0 register set/get.
         Refer to specification for more details.
 
-What:		/sys/bus/coresight/devices/mali-source-ela/regs/SIGMASKn_0-7
+What:		/sys/bus/coresight/devices/mali-source-ela/sigcomp4
 Description:
-        Coresight Source ELA SIGMASKn_0-7 register set/get.
+        Coresight Source ELA SIGCOMP4 register set/get.
         Refer to specification for more details.

Documentation/csf_sync_state_dump.txt

@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
 #
-# (C) COPYRIGHT 2022-2023 ARM Limited. All rights reserved.
+# (C) COPYRIGHT 2022 ARM Limited. All rights reserved.
 #
 # This program is free software and is provided to you under the terms of the
 # GNU General Public License version 2 as published by the Free Software
@@ -109,65 +109,3 @@ surpass the arg value.
 ===============================================================================================================================
 queue:KCPU-0-1 exec:S cmd:CQS_WAIT_OPERATION obj:0x0000007fbf6f2ff8 live_value:0x0000000000000000 | op:gt arg_value: 0x00000000
 ===============================================================================================================================
-
-CSF Sync State Dump For Fence Signal Timeouts
----------------------------------------------
-
-Summary
--------
-A timer has been added to the KCPU queues which is checked to ensure
-the queues have not "timed out" between the enqueuing of a fence signal command
-and it's eventual execution. If this timeout happens then the CSF sync state
-of all KCPU queues of the offending context is dumped. This feature is enabled
-by default, but can be disabled/enabled later.
-
-Explanation
-------------
-This new timer is created and destroyed alongside the creation and destruction
-of each KCPU queue. It is started when a fence signal is enqueued, and cancelled
-when the fence signal command has been processed. The timer times out after
-10 seconds (at 100 MHz) if the execution of that fence signal event was never
-processed. If this timeout occurs then the timer callback function identifies
-the KCPU queue which the timer belongs to and invokes the CSF synchronisation
-state dump mechanism, writing the sync state for the context of the queue
-causing the timeout is dump to dmesg.
-
-Fence Timeouts Controls
------------------------
-Disable/Enable Feature
-----------------------
-This feature is enabled by default, but can be disabled/ re-enabled via DebugFS
-controls. The 'fence_signal_timeout_enable' debugfs entry is a global flag
-which is written to, to turn this feature on and off.
-
-Example:
---------
-when writing to fence_signal_timeout_enable entry:
-echo 1 > /sys/kernel/debug/mali0/fence_signal_timeout_enable -> feature is enabled.
-echo 0 > /sys/kernel/debug/mali0/fence_signal_timeout_enable -> feature is disabled.
-
-It is also possible to read from this file to check if the feature is currently
-enabled or not checking the return value of fence_signal_timeout_enable.
-
-Example:
---------
-when reading from fence_signal_timeout_enable entry, if:
-cat /sys/kernel/debug/mali0/fence_signal_timeout_enable returns 1 -> feature is enabled.
-cat /sys/kernel/debug/mali0/fence_signal_timeout_enable returns 0 -> feature is disabled.
-
-Update Timer Duration
----------------------
-The timeout duration can be accessed through the 'fence_signal_timeout_ms'
-debugfs entry. This can be read from to retrieve the current time in
-milliseconds.
-
-Example:
---------
-cat /sys/kernel/debug/mali0/fence_signal_timeout_ms
-
-The 'fence_signal_timeout_ms' debugfs entry can also be written to, to update
-the time in milliseconds.
-
-Example:
---------
-echo 10000 > /sys/kernel/debug/mali0/fence_signal_timeout_ms