diff --git a/config/bootenv/rk356x.txt b/config/bootenv/rk35xx.txt similarity index 100% rename from config/bootenv/rk356x.txt rename to config/bootenv/rk35xx.txt diff --git a/config/kernel/linux-rockchip64-current.config b/config/kernel/linux-rockchip64-current.config index e7db6f5d8fa9..4c2380b9b52a 100644 --- a/config/kernel/linux-rockchip64-current.config +++ b/config/kernel/linux-rockchip64-current.config @@ -1,21 +1,21 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.6.57 Kernel Configuration +# Linux/arm64 6.12.4 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0" +CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (Ubuntu 13.2.0-23ubuntu4) 13.2.0" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=110400 +CONFIG_GCC_VERSION=130200 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y -CONFIG_AS_VERSION=23800 +CONFIG_AS_VERSION=24200 CONFIG_LD_IS_BFD=y -CONFIG_LD_VERSION=23800 +CONFIG_LD_VERSION=24200 CONFIG_LLD_VERSION=0 +CONFIG_RUSTC_VERSION=107500 +CONFIG_RUSTC_LLVM_VERSION=170006 CONFIG_CC_CAN_LINK=y CONFIG_CC_CAN_LINK_STATIC=y -CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y -CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GCC_ASM_GOTO_OUTPUT_BROKEN=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y CONFIG_PAHOLE_VERSION=125 @@ -101,7 +101,6 @@ CONFIG_BPF_JIT=y # CONFIG_BPF_JIT_ALWAYS_ON is not set CONFIG_BPF_JIT_DEFAULT_ON=y # CONFIG_BPF_UNPRIV_DEFAULT_OFF is not set -CONFIG_USERMODE_DRIVER=y # CONFIG_BPF_PRELOAD is not set CONFIG_BPF_LSM=y # end of BPF subsystem @@ -110,17 +109,20 @@ CONFIG_PREEMPT_BUILD=y # CONFIG_PREEMPT_NONE is not set # CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y +# CONFIG_PREEMPT_RT is not set CONFIG_PREEMPT_COUNT=y CONFIG_PREEMPTION=y # CONFIG_PREEMPT_DYNAMIC is not set +CONFIG_SCHED_CORE=y # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -# CONFIG_IRQ_TIME_ACCOUNTING is not set -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y +CONFIG_SCHED_HW_PRESSURE=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -141,6 +143,7 @@ CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y @@ -150,7 +153,7 @@ CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_IKHEADERS=m -CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_BUF_SHIFT=18 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 # CONFIG_PRINTK_INDEX is not set CONFIG_GENERIC_SCHED_CLOCK=y @@ -167,17 +170,21 @@ CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_NUMA_BALANCING=y CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y CONFIG_RT_GROUP_SCHED=y @@ -187,12 +194,13 @@ CONFIG_CGROUP_RDMA=y CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_HUGETLB=y CONFIG_CPUSETS=y +# CONFIG_CPUSETS_V1 is not set CONFIG_PROC_PID_CPUSET=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y CONFIG_CGROUP_BPF=y -# CONFIG_CGROUP_MISC is not set +CONFIG_CGROUP_MISC=y # CONFIG_CGROUP_DEBUG is not set CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y @@ -202,7 +210,7 @@ CONFIG_IPC_NS=y CONFIG_USER_NS=y CONFIG_PID_NS=y CONFIG_NET_NS=y -# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_CHECKPOINT_RESTORE=y CONFIG_SCHED_AUTOGROUP=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y @@ -235,7 +243,7 @@ CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y +# CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -247,18 +255,17 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_CACHESTAT_SYSCALL=y +# CONFIG_PC104 is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set # CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_KCMP=y -CONFIG_RSEQ=y -CONFIG_CACHESTAT_SYSCALL=y -# CONFIG_DEBUG_RSEQ is not set CONFIG_HAVE_PERF_EVENTS=y CONFIG_GUEST_PERF_EVENTS=y -# CONFIG_PC104 is not set # # Kernel Performance Events And Counters @@ -274,19 +281,21 @@ CONFIG_TRACEPOINTS=y # # Kexec and crash features # -CONFIG_CRASH_CORE=y +CONFIG_CRASH_RESERVE=y +CONFIG_VMCORE_INFO=y CONFIG_KEXEC_CORE=y CONFIG_KEXEC=y -# CONFIG_KEXEC_FILE is not set +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set CONFIG_CRASH_DUMP=y # end of Kexec and crash features # end of General setup CONFIG_ARM64=y +CONFIG_RUSTC_SUPPORTS_ARM64=y CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_64BIT=y CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_PTE_SHIFT=4 CONFIG_ARM64_CONT_PMD_SHIFT=4 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 @@ -313,6 +322,7 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # Platform selection # # CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AIROHA is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_APPLE is not set @@ -331,6 +341,7 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # CONFIG_ARCH_NXP is not set # CONFIG_ARCH_MA35 is not set # CONFIG_ARCH_NPCM is not set +# CONFIG_ARCH_PENSANDO is not set # CONFIG_ARCH_QCOM is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_RENESAS is not set @@ -416,14 +427,15 @@ CONFIG_ARM64_4K_PAGES=y # CONFIG_ARM64_64K_PAGES is not set # CONFIG_ARM64_VA_BITS_39 is not set CONFIG_ARM64_VA_BITS_48=y +# CONFIG_ARM64_VA_BITS_52 is not set CONFIG_ARM64_VA_BITS=48 CONFIG_ARM64_PA_BITS_48=y CONFIG_ARM64_PA_BITS=48 # CONFIG_CPU_BIG_ENDIAN is not set CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_SCHED_MC=y -# CONFIG_SCHED_CLUSTER is not set -# CONFIG_SCHED_SMT is not set +CONFIG_SCHED_CLUSTER=y +CONFIG_SCHED_SMT=y CONFIG_NR_CPUS=256 CONFIG_HOTPLUG_CPU=y CONFIG_NUMA=y @@ -436,14 +448,18 @@ CONFIG_HZ=250 CONFIG_SCHED_HRTICK=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HW_PERF_EVENTS=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y CONFIG_PARAVIRT=y -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_PARAVIRT_TIME_ACCOUNTING=y CONFIG_ARCH_SUPPORTS_KEXEC=y CONFIG_ARCH_SUPPORTS_KEXEC_FILE=y +CONFIG_ARCH_SELECTS_KEXEC_FILE=y CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y +CONFIG_ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION=y CONFIG_TRANS_TABLE=y CONFIG_XEN_DOM0=y CONFIG_XEN=y @@ -518,14 +534,21 @@ CONFIG_ARM64_MTE=y CONFIG_ARM64_EPAN=y # end of ARMv8.7 architectural features +# +# ARMv8.9 architectural features +# +CONFIG_ARM64_POE=y +CONFIG_ARCH_PKEY_BITS=3 +# end of ARMv8.9 architectural features + CONFIG_ARM64_SVE=y -CONFIG_ARM64_SME=y # CONFIG_ARM64_PSEUDO_NMI is not set CONFIG_RELOCATABLE=y CONFIG_RANDOMIZE_BASE=y # CONFIG_RANDOMIZE_MODULE_REGION_FULL is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y +CONFIG_ARM64_CONTPTE=y # end of Kernel Features # @@ -534,6 +557,7 @@ CONFIG_STACKPROTECTOR_PER_TASK=y CONFIG_CMDLINE="" CONFIG_EFI_STUB=y CONFIG_EFI=y +# CONFIG_COMPRESSED_INSTALL is not set CONFIG_DMI=y # end of Boot options @@ -546,6 +570,9 @@ CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_HIBERNATION_COMP_LZO=y +# CONFIG_HIBERNATION_COMP_LZ4 is not set +CONFIG_HIBERNATION_DEF_COMP="lzo" CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y @@ -621,17 +648,15 @@ CONFIG_ARM_SCPI_CPUFREQ=y CONFIG_ARCH_SUPPORTS_ACPI=y # CONFIG_ACPI is not set -CONFIG_IRQ_BYPASS_MANAGER=y -CONFIG_HAVE_KVM=y +CONFIG_KVM_COMMON=y CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM_IRQFD=y CONFIG_HAVE_KVM_IRQ_ROUTING=y CONFIG_HAVE_KVM_DIRTY_RING=y CONFIG_HAVE_KVM_DIRTY_RING_ACQ_REL=y CONFIG_NEED_KVM_DIRTY_RING_WITH_BITMAP=y -CONFIG_HAVE_KVM_EVENTFD=y CONFIG_KVM_MMIO=y CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_READONLY_MEM=y CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y CONFIG_KVM_VFIO=y CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y @@ -639,10 +664,13 @@ CONFIG_HAVE_KVM_IRQ_BYPASS=y CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y CONFIG_KVM_XFER_TO_GUEST_WORK=y CONFIG_KVM_GENERIC_HARDWARE_ENABLING=y +CONFIG_KVM_GENERIC_MMU_NOTIFIER=y CONFIG_VIRTUALIZATION=y CONFIG_KVM=y # CONFIG_NVHE_EL2_DEBUG is not set +# CONFIG_PTDUMP_STAGE2_DEBUGFS is not set CONFIG_CPU_MITIGATIONS=y +CONFIG_ARCH_HAS_DMA_OPS=y # # General architecture-dependent options @@ -677,6 +705,7 @@ CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y @@ -701,6 +730,8 @@ CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_SHADOW_CALL_STACK=y +# CONFIG_SHADOW_CALL_STACK is not set CONFIG_ARCH_SUPPORTS_LTO_CLANG=y CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y CONFIG_LTO_NONE=y @@ -717,6 +748,7 @@ CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_PMD_MKWRITE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_WANTS_EXECMEM_LATE=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y @@ -724,13 +756,17 @@ CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y +CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y @@ -745,12 +781,15 @@ CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_RELR=y +CONFIG_ARCH_HAS_MEM_ENCRYPT=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y +CONFIG_ARCH_HAS_HW_PTE_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y # # GCOV-based kernel profiling @@ -765,7 +804,6 @@ CONFIG_FUNCTION_ALIGNMENT=4 # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -775,10 +813,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set -CONFIG_MODULE_COMPRESS_NONE=y -# CONFIG_MODULE_COMPRESS_GZIP is not set -# CONFIG_MODULE_COMPRESS_XZ is not set -# CONFIG_MODULE_COMPRESS_ZSTD is not set +# CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set @@ -791,18 +826,16 @@ CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_ICQ=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_WRITE_MOUNTED=y CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set CONFIG_BLK_WBT=y CONFIG_BLK_WBT_MQ=y -# CONFIG_BLK_CGROUP_IOLATENCY is not set +CONFIG_BLK_CGROUP_IOLATENCY=y # CONFIG_BLK_CGROUP_FC_APPID is not set # CONFIG_BLK_CGROUP_IOCOST is not set # CONFIG_BLK_CGROUP_IOPRIO is not set CONFIG_BLK_DEBUG_FS=y -CONFIG_BLK_DEBUG_FS_ZONED=y # CONFIG_BLK_SED_OPAL is not set # CONFIG_BLK_INLINE_ENCRYPTION is not set @@ -869,7 +902,7 @@ CONFIG_ZPOOL=y CONFIG_SWAP=y CONFIG_ZSWAP=y CONFIG_ZSWAP_DEFAULT_ON=y -# CONFIG_ZSWAP_EXCLUSIVE_LOADS_DEFAULT_ON is not set +# CONFIG_ZSWAP_SHRINKER_DEFAULT_ON is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set @@ -877,29 +910,30 @@ CONFIG_ZSWAP_DEFAULT_ON=y # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD=y CONFIG_ZSWAP_COMPRESSOR_DEFAULT="zstd" -CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y -# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD_DEPRECATED is not set +# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD is not set +CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD_DEPRECATED=y # CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set -CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" +CONFIG_ZSWAP_ZPOOL_DEFAULT="z3fold" CONFIG_ZBUD=y -# CONFIG_Z3FOLD_DEPRECATED is not set +CONFIG_Z3FOLD_DEPRECATED=y +CONFIG_Z3FOLD=y CONFIG_ZSMALLOC=y # CONFIG_ZSMALLOC_STAT is not set CONFIG_ZSMALLOC_CHAIN_SIZE=8 # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y # CONFIG_SLUB_TINY is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SLAB_BUCKETS is not set # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set @@ -907,16 +941,18 @@ CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y +CONFIG_HAVE_GUP_FAST=y CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_NUMA_KEEP_MEMINFO=y CONFIG_MEMORY_ISOLATION=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y -CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SPLIT_PMD_PTLOCKS=y CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y @@ -937,14 +973,17 @@ CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_TRANSPARENT_HUGEPAGE=y # CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set CONFIG_THP_SWAP=y # CONFIG_READ_ONLY_THP_FOR_FS is not set +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP=y +CONFIG_ARCH_SUPPORTS_PMD_PFNMAP=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_USE_PERCPU_NUMA_NODE_ID=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=7 @@ -958,8 +997,11 @@ CONFIG_ARCH_HAS_ZONE_DMA_SET=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y CONFIG_GET_FREE_REGION=y +CONFIG_VMAP_PFN=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y -CONFIG_ARCH_USES_PG_ARCH_X=y +CONFIG_ARCH_HAS_PKEYS=y +CONFIG_ARCH_USES_PG_ARCH_2=y +CONFIG_ARCH_USES_PG_ARCH_3=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set @@ -973,9 +1015,14 @@ CONFIG_ANON_VMA_NAME=y CONFIG_LRU_GEN=y CONFIG_LRU_GEN_ENABLED=y # CONFIG_LRU_GEN_STATS is not set +CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_IOMMU_MM_DATA=y +CONFIG_EXECMEM=y +CONFIG_NUMA_MEMBLKS=y +# CONFIG_NUMA_EMU is not set # # Data Access Monitoring @@ -990,7 +1037,9 @@ CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_NET_REDIRECT=y +CONFIG_SKB_DECRYPTED=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -998,7 +1047,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y CONFIG_PACKET_DIAG=m CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y CONFIG_UNIX_DIAG=m CONFIG_TLS=m @@ -1081,6 +1129,8 @@ CONFIG_TCP_CONG_BBR=m # CONFIG_DEFAULT_CUBIC is not set CONFIG_DEFAULT_RENO=y CONFIG_DEFAULT_TCP_CONG="reno" +CONFIG_TCP_SIGPOOL=y +# CONFIG_TCP_AO is not set CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y CONFIG_IPV6_ROUTER_PREF=y @@ -1376,6 +1426,7 @@ CONFIG_IP_VS_PE_SIP=m # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m CONFIG_NF_SOCKET_IPV4=m CONFIG_NF_TPROXY_IPV4=m CONFIG_NF_TABLES_IPV4=y @@ -1408,6 +1459,7 @@ CONFIG_IP_NF_TARGET_TTL=m CONFIG_IP_NF_RAW=m CONFIG_IP_NF_SECURITY=m CONFIG_IP_NF_ARPTABLES=m +CONFIG_NFT_COMPAT_ARP=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m # end of IP: Netfilter Configuration @@ -1415,6 +1467,7 @@ CONFIG_IP_NF_ARP_MANGLE=m # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m CONFIG_NF_SOCKET_IPV6=m CONFIG_NF_TPROXY_IPV6=m CONFIG_NF_TABLES_IPV6=y @@ -1452,6 +1505,7 @@ CONFIG_NF_TABLES_BRIDGE=m CONFIG_NFT_BRIDGE_META=m CONFIG_NFT_BRIDGE_REJECT=m CONFIG_NF_CONNTRACK_BRIDGE=m +CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m CONFIG_BRIDGE_NF_EBTABLES=m CONFIG_BRIDGE_EBT_BROUTE=m CONFIG_BRIDGE_EBT_T_FILTER=m @@ -1473,8 +1527,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m CONFIG_BRIDGE_EBT_NFLOG=m -CONFIG_BPFILTER=y -CONFIG_BPFILTER_UMH=m # CONFIG_IP_DCCP is not set CONFIG_IP_SCTP=m CONFIG_SCTP_DBG_OBJCNT=y @@ -1534,6 +1586,7 @@ CONFIG_NET_DSA_TAG_RTL8_4=m CONFIG_NET_DSA_TAG_LAN9303=m CONFIG_NET_DSA_TAG_SJA1105=m CONFIG_NET_DSA_TAG_TRAILER=m +CONFIG_NET_DSA_TAG_VSC73XX_8021Q=m CONFIG_NET_DSA_TAG_XRS700X=m CONFIG_VLAN_8021Q=y CONFIG_VLAN_8021Q_GVRP=y @@ -1541,9 +1594,6 @@ CONFIG_VLAN_8021Q_MVRP=y CONFIG_LLC=y CONFIG_LLC2=m CONFIG_ATALK=m -CONFIG_DEV_APPLETALK=m -CONFIG_IPDDP=m -CONFIG_IPDDP_ENCAP=y CONFIG_X25=m CONFIG_LAPB=m CONFIG_PHONET=m @@ -1643,7 +1693,6 @@ CONFIG_NET_ACT_GACT=m CONFIG_GACT_PROB=y CONFIG_NET_ACT_MIRRED=m CONFIG_NET_ACT_SAMPLE=m -CONFIG_NET_ACT_IPT=m CONFIG_NET_ACT_NAT=m CONFIG_NET_ACT_PEDIT=m CONFIG_NET_ACT_SIMP=m @@ -1714,7 +1763,7 @@ CONFIG_NET_FLOW_LIMIT=y # Network testing # CONFIG_NET_PKTGEN=m -CONFIG_NET_DROP_MONITOR=y +CONFIG_NET_DROP_MONITOR=m # end of Network testing # end of Networking options @@ -1791,6 +1840,7 @@ CONFIG_BT_HCIUART_RTL=y CONFIG_BT_HCIUART_QCA=y CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIUART_MRVL=y +# CONFIG_BT_HCIUART_AML is not set CONFIG_BT_HCIBCM203X=m # CONFIG_BT_HCIBCM4377 is not set CONFIG_BT_HCIBPA10X=m @@ -1804,6 +1854,7 @@ CONFIG_BT_MTKUART=m CONFIG_BT_HCIRSI=m CONFIG_BT_VIRTIO=m # CONFIG_BT_NXPUART is not set +# CONFIG_BT_INTEL_PCIE is not set # end of Bluetooth device drivers CONFIG_AF_RXRPC=m @@ -1833,6 +1884,7 @@ CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y # CONFIG_CFG80211_DEBUGFS is not set CONFIG_CFG80211_CRDA_SUPPORT=y CONFIG_CFG80211_WEXT=y +# CONFIG_CFG80211_KUNIT_TEST is not set CONFIG_LIB80211=m CONFIG_LIB80211_CRYPT_WEP=m CONFIG_LIB80211_CRYPT_CCMP=m @@ -1843,9 +1895,9 @@ CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" +# CONFIG_MAC80211_KUNIT_TEST is not set CONFIG_MAC80211_MESH=y CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 @@ -1857,6 +1909,7 @@ CONFIG_NET_9P=m CONFIG_NET_9P_FD=m CONFIG_NET_9P_VIRTIO=m CONFIG_NET_9P_XEN=m +# CONFIG_NET_9P_USBG is not set # CONFIG_NET_9P_DEBUG is not set # CONFIG_CAIF is not set CONFIG_CEPH_LIB=m @@ -1912,6 +1965,7 @@ CONFIG_LWTUNNEL_BPF=y CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y CONFIG_SOCK_VALIDATE_XMIT=y +CONFIG_NET_IEEE8021Q_HELPERS=y CONFIG_NET_SELFTESTS=y CONFIG_NET_SOCK_MSG=y CONFIG_NET_DEVLINK=y @@ -1920,12 +1974,14 @@ CONFIG_PAGE_POOL=y CONFIG_FAILOVER=m CONFIG_ETHTOOL_NETLINK=y CONFIG_NETDEV_ADDR_LIST_TEST=m +# CONFIG_NET_TEST is not set # # Device Drivers # CONFIG_ARM_AMBA=y CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y @@ -1953,6 +2009,7 @@ CONFIG_PCI_ATS=y CONFIG_PCI_DOE=y CONFIG_PCI_ECAM=y CONFIG_PCI_IOV=y +# CONFIG_PCI_NPEM is not set # CONFIG_PCI_PRI is not set # CONFIG_PCI_PASID is not set CONFIG_PCI_LABEL=y @@ -1977,7 +2034,6 @@ CONFIG_HOTPLUG_PCI=y # CONFIG_PCI_FTPCI100 is not set CONFIG_PCI_HOST_COMMON=y CONFIG_PCI_HOST_GENERIC=y -# CONFIG_PCIE_MICROCHIP_HOST is not set CONFIG_PCIE_ROCKCHIP=y CONFIG_PCIE_ROCKCHIP_HOST=y CONFIG_PCIE_ROCKCHIP_EP=y @@ -1989,8 +2045,6 @@ CONFIG_PCIE_ROCKCHIP_EP=y # # CONFIG_PCIE_CADENCE_PLAT_HOST is not set # CONFIG_PCIE_CADENCE_PLAT_EP is not set -# CONFIG_PCI_J721E_HOST is not set -# CONFIG_PCI_J721E_EP is not set # end of Cadence-based PCIe controllers # @@ -1998,19 +2052,29 @@ CONFIG_PCIE_ROCKCHIP_EP=y # CONFIG_PCIE_DW=y CONFIG_PCIE_DW_HOST=y +CONFIG_PCIE_DW_EP=y # CONFIG_PCIE_AL is not set # CONFIG_PCI_MESON is not set # CONFIG_PCI_HISI is not set # CONFIG_PCIE_KIRIN is not set -# CONFIG_PCIE_DW_PLAT_HOST is not set -# CONFIG_PCIE_DW_PLAT_EP is not set +CONFIG_PCIE_DW_PLAT=y +CONFIG_PCIE_DW_PLAT_HOST=y +CONFIG_PCIE_DW_PLAT_EP=y +CONFIG_PCIE_ROCKCHIP_DW=y CONFIG_PCIE_ROCKCHIP_DW_HOST=y +CONFIG_PCIE_ROCKCHIP_DW_EP=y # end of DesignWare-based PCIe controllers # # Mobiveil-based PCIe controllers # # end of Mobiveil-based PCIe controllers + +# +# PLDA-based PCIe controllers +# +# CONFIG_PCIE_MICROCHIP_HOST is not set +# end of PLDA-based PCIe controllers # end of PCI controller drivers # @@ -2034,7 +2098,6 @@ CONFIG_CXL_BUS=m CONFIG_CXL_PORT=m CONFIG_CXL_REGION=y # CONFIG_CXL_REGION_INVALIDATION_TEST is not set -# CONFIG_CXL_PMU is not set # CONFIG_PCCARD is not set # CONFIG_RAPIDIO is not set @@ -2072,7 +2135,9 @@ CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set # CONFIG_DM_KUNIT_TEST is not set +# CONFIG_DRIVER_PE_KUNIT_TEST is not set CONFIG_SYS_HYPERVISOR=y +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y @@ -2097,7 +2162,6 @@ CONFIG_GENERIC_ARCH_NUMA=y # Bus devices # CONFIG_ARM_CCI=y -CONFIG_BRCMSTB_GISB_ARB=y # CONFIG_MOXTET is not set CONFIG_VEXPRESS_CONFIG=y CONFIG_MHI_BUS=m @@ -2122,18 +2186,30 @@ CONFIG_CONNECTOR=m # CONFIG_ARM_SCMI_PROTOCOL=y # CONFIG_ARM_SCMI_RAW_MODE_SUPPORT is not set +# CONFIG_ARM_SCMI_DEBUG_COUNTERS is not set + +# +# SCMI Transport Drivers +# CONFIG_ARM_SCMI_HAVE_TRANSPORT=y CONFIG_ARM_SCMI_HAVE_SHMEM=y CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y CONFIG_ARM_SCMI_TRANSPORT_SMC=y # CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set # CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set -CONFIG_ARM_SCMI_POWER_DOMAIN=y +# end of SCMI Transport Drivers + +# +# ARM SCMI NXP i.MX Vendor Protocols +# +# CONFIG_IMX_SCMI_BBM_EXT is not set +# CONFIG_IMX_SCMI_MISC_EXT is not set +# end of ARM SCMI NXP i.MX Vendor Protocols + # CONFIG_ARM_SCMI_POWER_CONTROL is not set # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y # CONFIG_FIRMWARE_MEMMAP is not set CONFIG_DMIID=y # CONFIG_DMI_SYSFS is not set @@ -2156,7 +2232,7 @@ CONFIG_EFI_GENERIC_STUB=y # CONFIG_EFI_ZBOOT is not set CONFIG_EFI_ARMSTUB_DTB_LOADER=y # CONFIG_EFI_BOOTLOADER_CONTROL is not set -CONFIG_EFI_CAPSULE_LOADER=y +CONFIG_EFI_CAPSULE_LOADER=m # CONFIG_EFI_TEST is not set # CONFIG_RESET_ATTACK_MITIGATION is not set # CONFIG_EFI_DISABLE_PCI_DMA is not set @@ -2167,6 +2243,12 @@ CONFIG_EFI_EARLYCON=y CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y CONFIG_ARM_SMCCC_SOC_ID=y @@ -2189,7 +2271,6 @@ CONFIG_MTD=y # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -2243,7 +2324,6 @@ CONFIG_MTD_CFI_UTIL=m CONFIG_MTD_COMPLEX_MAPPINGS=y # CONFIG_MTD_PHYSMAP is not set # CONFIG_MTD_PCI is not set -# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access @@ -2298,6 +2378,7 @@ CONFIG_MTD_HYPERBUS=m CONFIG_DTC=y CONFIG_OF=y # CONFIG_OF_UNITTEST is not set +# CONFIG_OF_KUNIT_TEST is not set CONFIG_OF_FLATTREE=y CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_KOBJ=y @@ -2307,6 +2388,7 @@ CONFIG_OF_IRQ=y CONFIG_OF_RESERVED_MEM=y CONFIG_OF_RESOLVE=y CONFIG_OF_OVERLAY=y +# CONFIG_OF_OVERLAY_KUNIT_TEST is not set CONFIG_OF_NUMA=y CONFIG_OF_CONFIGFS=y # CONFIG_PARPORT is not set @@ -2315,14 +2397,18 @@ CONFIG_BLK_DEV=y CONFIG_CDROM=m # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set CONFIG_ZRAM=m +# CONFIG_ZRAM_BACKEND_LZ4 is not set +# CONFIG_ZRAM_BACKEND_LZ4HC is not set +# CONFIG_ZRAM_BACKEND_ZSTD is not set +# CONFIG_ZRAM_BACKEND_DEFLATE is not set +# CONFIG_ZRAM_BACKEND_842 is not set +CONFIG_ZRAM_BACKEND_FORCE_LZO=y +CONFIG_ZRAM_BACKEND_LZO=y CONFIG_ZRAM_DEF_COMP_LZORLE=y -# CONFIG_ZRAM_DEF_COMP_ZSTD is not set -# CONFIG_ZRAM_DEF_COMP_LZ4 is not set # CONFIG_ZRAM_DEF_COMP_LZO is not set -# CONFIG_ZRAM_DEF_COMP_LZ4HC is not set -# CONFIG_ZRAM_DEF_COMP_842 is not set CONFIG_ZRAM_DEF_COMP="lzo-rle" CONFIG_ZRAM_WRITEBACK=y +CONFIG_ZRAM_TRACK_ENTRY_ACTIME=y # CONFIG_ZRAM_MEMORY_TRACKING is not set CONFIG_ZRAM_MULTI_COMP=y CONFIG_BLK_DEV_LOOP=y @@ -2335,7 +2421,7 @@ CONFIG_BLK_DEV_RAM_COUNT=8 CONFIG_BLK_DEV_RAM_SIZE=4096 # CONFIG_CDROM_PKTCDVD is not set CONFIG_ATA_OVER_ETH=m -CONFIG_XEN_BLKDEV_FRONTEND=y +CONFIG_XEN_BLKDEV_FRONTEND=m CONFIG_XEN_BLKDEV_BACKEND=m CONFIG_VIRTIO_BLK=y CONFIG_BLK_DEV_RBD=m @@ -2344,7 +2430,8 @@ CONFIG_BLK_DEV_RBD=m # # NVME Support # -CONFIG_NVME_COMMON=y +CONFIG_NVME_KEYRING=y +CONFIG_NVME_AUTH=y CONFIG_NVME_CORE=y CONFIG_BLK_DEV_NVME=y CONFIG_NVME_MULTIPATH=y @@ -2353,13 +2440,16 @@ CONFIG_NVME_HWMON=y CONFIG_NVME_FABRICS=m CONFIG_NVME_FC=m CONFIG_NVME_TCP=m -CONFIG_NVME_AUTH=y +CONFIG_NVME_TCP_TLS=y +CONFIG_NVME_HOST_AUTH=y CONFIG_NVME_TARGET=m +# CONFIG_NVME_TARGET_DEBUGFS is not set CONFIG_NVME_TARGET_PASSTHRU=y CONFIG_NVME_TARGET_LOOP=m CONFIG_NVME_TARGET_FC=m CONFIG_NVME_TARGET_FCLOOP=m CONFIG_NVME_TARGET_TCP=m +CONFIG_NVME_TARGET_TCP_TLS=y CONFIG_NVME_TARGET_AUTH=y # end of NVME Support @@ -2369,6 +2459,7 @@ CONFIG_NVME_TARGET_AUTH=y # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set CONFIG_PHANTOM=m +# CONFIG_RPMB is not set CONFIG_TIFM_CORE=m CONFIG_TIFM_7XX1=m # CONFIG_ICS932S401 is not set @@ -2392,6 +2483,7 @@ CONFIG_MISC_RTSX=m # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set # CONFIG_VCPU_STALL_DETECTOR is not set +# CONFIG_NSM is not set # CONFIG_C2PORT is not set # @@ -2399,7 +2491,6 @@ CONFIG_MISC_RTSX=m # CONFIG_EEPROM_AT24=m CONFIG_EEPROM_AT25=m -CONFIG_EEPROM_LEGACY=m # CONFIG_EEPROM_MAX6875 is not set CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_93XX46 is not set @@ -2432,6 +2523,7 @@ CONFIG_MISC_RTSX_USB=m # CONFIG_UACCE is not set # CONFIG_PVPANIC is not set # CONFIG_GP_PCI1XXXX is not set +# CONFIG_KEBA_CP500 is not set # end of Misc devices # @@ -2443,6 +2535,7 @@ CONFIG_SCSI_COMMON=y CONFIG_SCSI=y CONFIG_SCSI_DMA=y # CONFIG_SCSI_PROC_FS is not set +# CONFIG_SCSI_LIB_KUNIT_TEST is not set # # SCSI support type (disk, tape, CD-ROM) @@ -2456,6 +2549,7 @@ CONFIG_BLK_DEV_BSG=y # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_SCAN_ASYNC is not set +# CONFIG_SCSI_PROTO_TEST is not set # # SCSI Transports @@ -2627,17 +2721,13 @@ CONFIG_PATA_OF_PLATFORM=y CONFIG_MD=y CONFIG_BLK_DEV_MD=m CONFIG_MD_BITMAP_FILE=y -CONFIG_MD_LINEAR=m CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m -CONFIG_MD_FAULTY=m CONFIG_MD_CLUSTER=m -CONFIG_BCACHE=y +CONFIG_BCACHE=m # CONFIG_BCACHE_DEBUG is not set -# CONFIG_BCACHE_CLOSURES_DEBUG is not set # CONFIG_BCACHE_ASYNC_REGISTRATION is not set CONFIG_BLK_DEV_DM_BUILTIN=y CONFIG_BLK_DEV_DM=m @@ -2677,6 +2767,7 @@ CONFIG_DM_LOG_WRITES=m CONFIG_DM_INTEGRITY=m CONFIG_DM_ZONED=m CONFIG_DM_AUDIT=y +# CONFIG_DM_VDO is not set CONFIG_TARGET_CORE=m CONFIG_TCM_IBLOCK=m CONFIG_TCM_FILEIO=m @@ -2719,6 +2810,7 @@ CONFIG_VXLAN=m CONFIG_GENEVE=m # CONFIG_BAREUDP is not set CONFIG_GTP=m +# CONFIG_PFCP is not set CONFIG_AMT=m CONFIG_MACSEC=m CONFIG_NETCONSOLE=m @@ -2726,13 +2818,15 @@ CONFIG_NETCONSOLE_DYNAMIC=y # CONFIG_NETCONSOLE_EXTENDED_LOG is not set CONFIG_NETPOLL=y CONFIG_NET_POLL_CONTROLLER=y -CONFIG_TUN=y +CONFIG_TUN=m CONFIG_TAP=m CONFIG_TUN_VNET_CROSS_LE=y CONFIG_VETH=m CONFIG_VIRTIO_NET=m CONFIG_NLMON=m +# CONFIG_NETKIT is not set CONFIG_NET_VRF=m +# CONFIG_VSOCKMON is not set CONFIG_MHI_NET=m # CONFIG_ARCNET is not set CONFIG_ATM_DRIVERS=y @@ -2794,8 +2888,8 @@ CONFIG_NET_DSA_XRS700X=m CONFIG_NET_DSA_XRS700X_I2C=m CONFIG_NET_DSA_XRS700X_MDIO=m CONFIG_NET_DSA_REALTEK=m -# CONFIG_NET_DSA_REALTEK_RTL8365MB is not set -# CONFIG_NET_DSA_REALTEK_RTL8366RB is not set +# CONFIG_NET_DSA_REALTEK_MDIO is not set +# CONFIG_NET_DSA_REALTEK_SMI is not set CONFIG_NET_DSA_SMSC_LAN9303=m CONFIG_NET_DSA_SMSC_LAN9303_I2C=m CONFIG_NET_DSA_SMSC_LAN9303_MDIO=m @@ -2823,7 +2917,7 @@ CONFIG_NET_VENDOR_AMAZON=y CONFIG_NET_VENDOR_AMD=y # CONFIG_AMD8111_ETH is not set # CONFIG_PCNET32 is not set -CONFIG_AMD_XGBE=y +CONFIG_AMD_XGBE=m # CONFIG_AMD_XGBE_DCB is not set # CONFIG_PDS_CORE is not set CONFIG_NET_VENDOR_AQUANTIA=y @@ -2912,10 +3006,10 @@ CONFIG_NET_VENDOR_I825XX=y CONFIG_NET_VENDOR_INTEL=y # CONFIG_E100 is not set # CONFIG_E1000 is not set -CONFIG_E1000E=y -CONFIG_IGB=y +CONFIG_E1000E=m +CONFIG_IGB=m CONFIG_IGB_HWMON=y -CONFIG_IGBVF=y +CONFIG_IGBVF=m CONFIG_IXGBE=m CONFIG_IXGBE_HWMON=y # CONFIG_IXGBE_DCB is not set @@ -2926,27 +3020,30 @@ CONFIG_IXGBE_IPSEC=y # CONFIG_ICE is not set # CONFIG_FM10K is not set # CONFIG_IGC is not set +# CONFIG_IDPF is not set # CONFIG_JME is not set CONFIG_NET_VENDOR_ADI=y # CONFIG_ADIN1110 is not set CONFIG_NET_VENDOR_LITEX=y CONFIG_LITEX_LITEETH=m CONFIG_NET_VENDOR_MARVELL=y -CONFIG_MVMDIO=y +CONFIG_MVMDIO=m # CONFIG_SKGE is not set -CONFIG_SKY2=y +CONFIG_SKY2=m # CONFIG_SKY2_DEBUG is not set CONFIG_OCTEONTX2_MBOX=m # CONFIG_OCTEONTX2_AF is not set CONFIG_OCTEONTX2_PF=m CONFIG_OCTEONTX2_VF=m CONFIG_OCTEON_EP=m +# CONFIG_OCTEON_EP_VF is not set # CONFIG_PRESTERA is not set CONFIG_NET_VENDOR_MELLANOX=y # CONFIG_MLX4_EN is not set # CONFIG_MLX5_CORE is not set # CONFIG_MLXSW_CORE is not set # CONFIG_MLXFW is not set +CONFIG_NET_VENDOR_META=y CONFIG_NET_VENDOR_MICREL=y # CONFIG_KS8842 is not set # CONFIG_KS8851 is not set @@ -2957,9 +3054,11 @@ CONFIG_ENC28J60=m CONFIG_ENC28J60_WRITEVERIFY=y # CONFIG_ENCX24J600 is not set # CONFIG_LAN743X is not set +# CONFIG_LAN865X is not set CONFIG_LAN966X_SWITCH=m # CONFIG_LAN966X_DCB is not set CONFIG_VCAP=y +CONFIG_FDMA=y CONFIG_NET_VENDOR_MICROSEMI=y CONFIG_MSCC_OCELOT_SWITCH_LIB=m CONFIG_MSCC_OCELOT_SWITCH=m @@ -2982,6 +3081,7 @@ CONFIG_NET_VENDOR_NVIDIA=y # CONFIG_FORCEDETH is not set CONFIG_NET_VENDOR_OKI=y # CONFIG_ETHOC is not set +# CONFIG_OA_TC6 is not set CONFIG_NET_VENDOR_PACKET_ENGINES=y # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set @@ -3006,6 +3106,8 @@ CONFIG_NET_VENDOR_REALTEK=y # CONFIG_8139CP is not set # CONFIG_8139TOO is not set CONFIG_R8169=m +CONFIG_R8169_LEDS=y +# CONFIG_RTASE is not set CONFIG_NET_VENDOR_RENESAS=y CONFIG_NET_VENDOR_ROCKER=y CONFIG_ROCKER=m @@ -3049,6 +3151,7 @@ CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set CONFIG_NET_VENDOR_TEHUTI=y # CONFIG_TEHUTI is not set +# CONFIG_TEHUTI_TN40 is not set CONFIG_NET_VENDOR_TI=y # CONFIG_TI_CPSW_PHY_SEL is not set # CONFIG_TLAN is not set @@ -3065,7 +3168,6 @@ CONFIG_NET_VENDOR_WIZNET=y # CONFIG_WIZNET_W5300 is not set CONFIG_NET_VENDOR_XILINX=y CONFIG_XILINX_EMACLITE=m -CONFIG_XILINX_AXI_EMAC=m CONFIG_XILINX_LL_TEMAC=m # CONFIG_FDDI is not set # CONFIG_HIPPI is not set @@ -3080,6 +3182,7 @@ CONFIG_SFP=m # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set CONFIG_AMD_PHY=m CONFIG_ADIN_PHY=m CONFIG_ADIN1100_PHY=m @@ -3117,7 +3220,11 @@ CONFIG_NATIONAL_PHY=m CONFIG_NXP_C45_TJA11XX_PHY=m # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set +CONFIG_QCOM_NET_PHYLIB=m CONFIG_AT803X_PHY=m +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set CONFIG_QSEMI_PHY=m CONFIG_REALTEK_PHY=m # CONFIG_RENESAS_PHY is not set @@ -3131,6 +3238,7 @@ CONFIG_DP83848_PHY=m # CONFIG_DP83867_PHY is not set CONFIG_DP83869_PHY=m CONFIG_DP83TD510_PHY=m +# CONFIG_DP83TG720_PHY is not set CONFIG_VITESSE_PHY=m # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -3151,17 +3259,19 @@ CONFIG_CAN_C_CAN=m CONFIG_CAN_C_CAN_PLATFORM=m CONFIG_CAN_C_CAN_PCI=m CONFIG_CAN_CC770=m -CONFIG_CAN_CC770_ISA=m +# CONFIG_CAN_CC770_ISA is not set CONFIG_CAN_CC770_PLATFORM=m CONFIG_CAN_CTUCANFD=m CONFIG_CAN_CTUCANFD_PCI=m CONFIG_CAN_CTUCANFD_PLATFORM=m +# CONFIG_CAN_ESD_402_PCI is not set # CONFIG_CAN_IFI_CANFD is not set CONFIG_CAN_M_CAN=m CONFIG_CAN_M_CAN_PCI=m CONFIG_CAN_M_CAN_PLATFORM=m CONFIG_CAN_M_CAN_TCAN4X5X=m CONFIG_CAN_PEAK_PCIEFD=m +# CONFIG_CAN_ROCKCHIP_CANFD is not set CONFIG_CAN_SJA1000=m CONFIG_CAN_EMS_PCI=m CONFIG_CAN_F81601=m @@ -3169,7 +3279,7 @@ CONFIG_CAN_KVASER_PCI=m CONFIG_CAN_PEAK_PCI=m CONFIG_CAN_PEAK_PCIEC=y CONFIG_CAN_PLX_PCI=m -CONFIG_CAN_SJA1000_ISA=m +# CONFIG_CAN_SJA1000_ISA is not set CONFIG_CAN_SJA1000_PLATFORM=m CONFIG_CAN_SOFTING=m @@ -3312,16 +3422,15 @@ CONFIG_ATH9K_BTCOEX_SUPPORT=y CONFIG_ATH9K=m CONFIG_ATH9K_PCI=y CONFIG_ATH9K_AHB=y -# CONFIG_ATH9K_DEBUGFS is not set CONFIG_ATH9K_DYNACK=y CONFIG_ATH9K_WOW=y CONFIG_ATH9K_RFKILL=y -# CONFIG_ATH9K_CHANNEL_CONTEXT is not set +CONFIG_ATH9K_CHANNEL_CONTEXT=y CONFIG_ATH9K_PCOEM=y CONFIG_ATH9K_PCI_NO_EEPROM=m CONFIG_ATH9K_HTC=m # CONFIG_ATH9K_HTC_DEBUGFS is not set -# CONFIG_ATH9K_HWRNG is not set +CONFIG_ATH9K_HWRNG=y CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y @@ -3344,6 +3453,7 @@ CONFIG_ATH10K_SDIO=m CONFIG_ATH10K_USB=m # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set +CONFIG_ATH10K_LEDS=y # CONFIG_ATH10K_TRACING is not set # CONFIG_WCN36XX is not set CONFIG_ATH11K=m @@ -3352,8 +3462,6 @@ CONFIG_ATH11K_PCI=m # CONFIG_ATH11K_TRACING is not set # CONFIG_ATH12K is not set CONFIG_WLAN_VENDOR_ATMEL=y -CONFIG_ATMEL=m -CONFIG_PCI_ATMEL=m CONFIG_AT76C50X_USB=m CONFIG_WLAN_VENDOR_BROADCOM=y CONFIG_B43=m @@ -3395,8 +3503,6 @@ CONFIG_BRCMFMAC_USB=y CONFIG_BRCMFMAC_PCIE=y CONFIG_BRCM_TRACING=y CONFIG_BRCMDBG=y -CONFIG_WLAN_VENDOR_CISCO=y -# CONFIG_AIRO is not set CONFIG_WLAN_VENDOR_INTEL=y CONFIG_IPW2100=m # CONFIG_IPW2100_MONITOR is not set @@ -3420,8 +3526,6 @@ CONFIG_IWLWIFI_OPMODE_MODULAR=y # end of Debugging Options CONFIG_WLAN_VENDOR_INTERSIL=y -# CONFIG_HOSTAP is not set -# CONFIG_HERMES is not set # CONFIG_P54_COMMON is not set CONFIG_WLAN_VENDOR_MARVELL=y # CONFIG_LIBERTAS is not set @@ -3450,14 +3554,18 @@ CONFIG_MT76x2U=m CONFIG_MT7603E=m CONFIG_MT7615_COMMON=m CONFIG_MT7615E=m -# CONFIG_MT7663U is not set -# CONFIG_MT7663S is not set +CONFIG_MT7663_USB_SDIO_COMMON=m +CONFIG_MT7663U=m +CONFIG_MT7663S=m CONFIG_MT7915E=m CONFIG_MT7921_COMMON=m CONFIG_MT7921E=m CONFIG_MT7921S=m CONFIG_MT7921U=m -# CONFIG_MT7996E is not set +CONFIG_MT7996E=m +CONFIG_MT7925_COMMON=m +CONFIG_MT7925E=m +CONFIG_MT7925U=m CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set @@ -3506,11 +3614,13 @@ CONFIG_RTL8188EE=m CONFIG_RTL8192EE=m CONFIG_RTL8821AE=m CONFIG_RTL8192CU=m +# CONFIG_RTL8192DU is not set CONFIG_RTLWIFI=m CONFIG_RTLWIFI_PCI=m CONFIG_RTLWIFI_USB=m # CONFIG_RTLWIFI_DEBUG is not set CONFIG_RTL8192C_COMMON=m +CONFIG_RTL8192D_COMMON=m CONFIG_RTL8723_COMMON=m CONFIG_RTLBTCOEXIST=m CONFIG_RTL8XXXU=m @@ -3522,23 +3632,42 @@ CONFIG_RTW88_SDIO=m CONFIG_RTW88_USB=m CONFIG_RTW88_8822B=m CONFIG_RTW88_8822C=m +CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m -# CONFIG_RTW88_8822BE is not set +CONFIG_RTW88_8822BE=m CONFIG_RTW88_8822BS=m CONFIG_RTW88_8822BU=m CONFIG_RTW88_8822CE=m CONFIG_RTW88_8822CS=m CONFIG_RTW88_8822CU=m -# CONFIG_RTW88_8723DE is not set +CONFIG_RTW88_8723DE=m # CONFIG_RTW88_8723DS is not set +# CONFIG_RTW88_8723CS is not set CONFIG_RTW88_8723DU=m -# CONFIG_RTW88_8821CE is not set +CONFIG_RTW88_8821CE=m CONFIG_RTW88_8821CS=m CONFIG_RTW88_8821CU=m # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set -# CONFIG_RTW89 is not set +CONFIG_RTW89=m +CONFIG_RTW89_CORE=m +CONFIG_RTW89_PCI=m +CONFIG_RTW89_8851B=m +CONFIG_RTW89_8852A=m +CONFIG_RTW89_8852B_COMMON=m +CONFIG_RTW89_8852B=m +CONFIG_RTW89_8852BT=m +CONFIG_RTW89_8852C=m +CONFIG_RTW89_8922A=m +CONFIG_RTW89_8851BE=m +CONFIG_RTW89_8852AE=m +CONFIG_RTW89_8852BE=m +CONFIG_RTW89_8852BTE=m +CONFIG_RTW89_8852CE=m +CONFIG_RTW89_8922AE=m +# CONFIG_RTW89_DEBUGMSG is not set +# CONFIG_RTW89_DEBUGFS is not set CONFIG_WLAN_VENDOR_RSI=y CONFIG_RSI_91X=m # CONFIG_RSI_DEBUGFS is not set @@ -3560,16 +3689,14 @@ CONFIG_WL18XX=m CONFIG_WLCORE=m CONFIG_WLCORE_SPI=m CONFIG_WLCORE_SDIO=m -# CONFIG_RTL8723DU is not set CONFIG_RTL8723DS=m # CONFIG_RTL8822BU is not set # CONFIG_RTL8821CU is not set # CONFIG_88XXAU is not set CONFIG_RTL8192EU=m -CONFIG_RTL8189FS=m +# CONFIG_RTL8189FS is not set CONFIG_RTL8189ES=m CONFIG_WLAN_VENDOR_ZYDAS=y -CONFIG_USB_ZD1201=m CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set CONFIG_WLAN_VENDOR_QUANTENNA=y @@ -3592,7 +3719,6 @@ CONFIG_WLAN_UWE5622=m CONFIG_SPRDWL_NG=m CONFIG_UNISOC_WIFI_PS=y CONFIG_TTY_OVERY_SDIO=m -CONFIG_USB_NET_RNDIS_WLAN=m CONFIG_MAC80211_HWSIM=m CONFIG_VIRT_WIFI=m # CONFIG_WAN is not set @@ -3671,7 +3797,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -3683,7 +3808,6 @@ CONFIG_KEYBOARD_IQS62X=m # CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set # CONFIG_KEYBOARD_XTKBD is not set -CONFIG_KEYBOARD_CROS_EC=y # CONFIG_KEYBOARD_CAP11XX is not set # CONFIG_KEYBOARD_BCM is not set CONFIG_KEYBOARD_CYPRESS_SF=m @@ -3743,6 +3867,7 @@ CONFIG_JOYSTICK_XPAD_LEDS=y CONFIG_JOYSTICK_QWIIC=m # CONFIG_JOYSTICK_FSIA6B is not set CONFIG_JOYSTICK_SENSEHAT=m +# CONFIG_JOYSTICK_SEESAW is not set # CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_ADS7846=m @@ -3763,9 +3888,6 @@ CONFIG_TOUCHSCREEN_CY8CTMG110=m CONFIG_TOUCHSCREEN_CYTTSP_CORE=m CONFIG_TOUCHSCREEN_CYTTSP_I2C=m CONFIG_TOUCHSCREEN_CYTTSP_SPI=m -CONFIG_TOUCHSCREEN_CYTTSP4_CORE=m -CONFIG_TOUCHSCREEN_CYTTSP4_I2C=m -CONFIG_TOUCHSCREEN_CYTTSP4_SPI=m # CONFIG_TOUCHSCREEN_CYTTSP5 is not set CONFIG_TOUCHSCREEN_DYNAPRO=m CONFIG_TOUCHSCREEN_HAMPSHIRE=m @@ -3775,6 +3897,8 @@ CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m CONFIG_TOUCHSCREEN_EXC3000=m CONFIG_TOUCHSCREEN_FUJITSU=m CONFIG_TOUCHSCREEN_GOODIX=m +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_I2C is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_SPI is not set CONFIG_TOUCHSCREEN_HIDEEP=m CONFIG_TOUCHSCREEN_HYCON_HY46XX=m # CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set @@ -3788,7 +3912,6 @@ CONFIG_TOUCHSCREEN_ELO=m CONFIG_TOUCHSCREEN_WACOM_W8001=m CONFIG_TOUCHSCREEN_WACOM_I2C=m CONFIG_TOUCHSCREEN_MAX11801=m -CONFIG_TOUCHSCREEN_MCS5000=m CONFIG_TOUCHSCREEN_MMS114=m CONFIG_TOUCHSCREEN_MELFAS_MIP4=m CONFIG_TOUCHSCREEN_MSG2638=m @@ -3872,7 +3995,7 @@ CONFIG_INPUT_UINPUT=m # CONFIG_INPUT_PCF8574 is not set # CONFIG_INPUT_PWM_BEEPER is not set # CONFIG_INPUT_PWM_VIBRA is not set -CONFIG_INPUT_RK805_PWRKEY=y +CONFIG_INPUT_RK805_PWRKEY=m # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set CONFIG_INPUT_DA7280_HAPTICS=m # CONFIG_INPUT_ADXL34X is not set @@ -3929,7 +4052,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y @@ -3978,10 +4100,9 @@ CONFIG_SERIAL_JSM=m CONFIG_SERIAL_SIFIVE=m CONFIG_SERIAL_SCCNXP=y CONFIG_SERIAL_SCCNXP_CONSOLE=y -CONFIG_SERIAL_SC16IS7XX_CORE=m CONFIG_SERIAL_SC16IS7XX=m -CONFIG_SERIAL_SC16IS7XX_I2C=y -CONFIG_SERIAL_SC16IS7XX_SPI=y +CONFIG_SERIAL_SC16IS7XX_I2C=m +CONFIG_SERIAL_SC16IS7XX_SPI=m CONFIG_SERIAL_ALTERA_JTAGUART=m CONFIG_SERIAL_ALTERA_UART=m CONFIG_SERIAL_ALTERA_UART_MAXPORTS=4 @@ -4024,11 +4145,11 @@ CONFIG_HW_RANDOM=m # CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_HW_RANDOM_BA431 is not set # CONFIG_HW_RANDOM_VIRTIO is not set -CONFIG_HW_RANDOM_ROCKCHIP=m # CONFIG_HW_RANDOM_CCTRNG is not set # CONFIG_HW_RANDOM_XIPHERA is not set CONFIG_HW_RANDOM_ARM_SMCCC_TRNG=m CONFIG_HW_RANDOM_CN10K=m +CONFIG_HW_RANDOM_ROCKCHIP=m # CONFIG_APPLICOM is not set CONFIG_DEVMEM=y CONFIG_DEVPORT=y @@ -4043,7 +4164,6 @@ CONFIG_XILLYUSB=m # CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=m @@ -4060,11 +4180,12 @@ CONFIG_I2C_MUX_PINCTRL=m CONFIG_I2C_MUX_REG=m CONFIG_I2C_DEMUX_PINCTRL=m CONFIG_I2C_MUX_MLXCPLD=m +# CONFIG_I2C_MUX_MULE is not set # end of Multiplexer I2C Chip support CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_SMBUS=m -CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_ALGOBIT=m # # I2C Hardware Bus support @@ -4099,7 +4220,7 @@ CONFIG_I2C_DESIGNWARE_CORE=y CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_EMEV2 is not set -CONFIG_I2C_GPIO=y +CONFIG_I2C_GPIO=m # CONFIG_I2C_GPIO_FAULT_INJECTOR is not set # CONFIG_I2C_HISI is not set # CONFIG_I2C_NOMADIK is not set @@ -4124,7 +4245,6 @@ CONFIG_I2C_TINY_USB=m # # Other I2C/SMBus bus drivers # -CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_VIRTIO=m # end of I2C Hardware Bus support @@ -4157,6 +4277,7 @@ CONFIG_SPI_BITBANG=m CONFIG_SPI_CADENCE=m # CONFIG_SPI_CADENCE_QUADSPI is not set CONFIG_SPI_CADENCE_XSPI=m +CONFIG_SPI_CH341=m CONFIG_SPI_DESIGNWARE=m # CONFIG_SPI_DW_DMA is not set CONFIG_SPI_DW_PCI=m @@ -4170,7 +4291,6 @@ CONFIG_SPI_FSL_SPI=m CONFIG_SPI_OC_TINY=m # CONFIG_SPI_PCI1XXXX is not set CONFIG_SPI_PL022=y -# CONFIG_SPI_PXA2XX is not set CONFIG_SPI_ROCKCHIP=y CONFIG_SPI_ROCKCHIP_SFC=m # CONFIG_SPI_SC18IS602 is not set @@ -4225,6 +4345,7 @@ CONFIG_PTP_1588_CLOCK_INES=m CONFIG_PTP_1588_CLOCK_KVM=m CONFIG_PTP_1588_CLOCK_IDT82P33=m CONFIG_PTP_1588_CLOCK_IDTCM=m +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set CONFIG_PTP_1588_CLOCK_OCP=m # end of PTP clock support @@ -4237,16 +4358,19 @@ CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AS3722=m +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set CONFIG_PINCTRL_MAX77620=y # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set # CONFIG_PINCTRL_OCELOT is not set -CONFIG_PINCTRL_RK805=y +CONFIG_PINCTRL_RK805=m CONFIG_PINCTRL_ROCKCHIP=y +# CONFIG_PINCTRL_SCMI is not set CONFIG_PINCTRL_SINGLE=y CONFIG_PINCTRL_STMFX=m CONFIG_PINCTRL_SX150X=y +# CONFIG_PINCTRL_IMX_SCMI is not set # # Renesas pinctrl drivers @@ -4323,7 +4447,7 @@ CONFIG_GPIO_TQMX86=m # # PCI GPIO expanders # -CONFIG_GPIO_BT8XX=m +# CONFIG_GPIO_BT8XX is not set CONFIG_GPIO_PCI_IDIO_16=m CONFIG_GPIO_PCIE_IDIO_24=m CONFIG_GPIO_RDC321X=m @@ -4355,17 +4479,26 @@ CONFIG_GPIO_VIRTIO=m CONFIG_GPIO_SIM=m # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER is not set +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + CONFIG_W1=m CONFIG_W1_CON=y # # 1-wire Bus Masters # +# CONFIG_W1_MASTER_AMD_AXI is not set CONFIG_W1_MASTER_MATROX=m CONFIG_W1_MASTER_DS2490=m CONFIG_W1_MASTER_DS2482=m CONFIG_W1_MASTER_GPIO=m CONFIG_W1_MASTER_SGI=m +# CONFIG_W1_MASTER_UART is not set # end of 1-wire Bus Masters # @@ -4395,18 +4528,19 @@ CONFIG_W1_SLAVE_DS28E17=m CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_AS3722 is not set CONFIG_POWER_RESET_ATC260X=m -CONFIG_POWER_RESET_BRCMSTB=y -# CONFIG_POWER_RESET_GPIO is not set -# CONFIG_POWER_RESET_GPIO_RESTART is not set +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y # CONFIG_POWER_RESET_LTC2952 is not set -# CONFIG_POWER_RESET_REGULATOR is not set -# CONFIG_POWER_RESET_RESTART is not set +CONFIG_POWER_RESET_REGULATOR=y +CONFIG_POWER_RESET_RESTART=y CONFIG_POWER_RESET_VEXPRESS=y CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_SYSCON=y -# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set -# CONFIG_SYSCON_REBOOT_MODE is not set +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y # CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -4429,6 +4563,7 @@ CONFIG_BATTERY_BQ27XXX_HDQ=m # CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set CONFIG_BATTERY_MAX17040=m CONFIG_BATTERY_MAX17042=m +# CONFIG_BATTERY_MAX1720X is not set CONFIG_BATTERY_MAX1721X=m CONFIG_CHARGER_ISP1704=m # CONFIG_CHARGER_MAX8903 is not set @@ -4457,12 +4592,11 @@ CONFIG_BATTERY_RT5033=m # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_RT9467 is not set # CONFIG_CHARGER_RT9471 is not set -# CONFIG_CHARGER_CROS_USBPD is not set -CONFIG_CHARGER_CROS_PCHG=m CONFIG_CHARGER_UCS1002=m # CONFIG_CHARGER_BD99954 is not set # CONFIG_RN5T618_POWER is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y CONFIG_HWMON_VID=m # CONFIG_HWMON_DEBUG_CHIP is not set @@ -4490,10 +4624,12 @@ CONFIG_SENSORS_AHT10=m CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m CONFIG_SENSORS_AS370=m CONFIG_SENSORS_ASC7621=m +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set CONFIG_SENSORS_AXI_FAN_CONTROL=m # CONFIG_SENSORS_ARM_SCMI is not set CONFIG_SENSORS_ARM_SCPI=m CONFIG_SENSORS_ATXP1=m +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set CONFIG_SENSORS_CORSAIR_PSU=m CONFIG_SENSORS_DRIVETEMP=m @@ -4504,6 +4640,7 @@ CONFIG_SENSORS_F71805F=m CONFIG_SENSORS_F71882FG=m CONFIG_SENSORS_F75375S=m CONFIG_SENSORS_FTSTEUTATES=m +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set CONFIG_SENSORS_GL518SM=m CONFIG_SENSORS_GL520SM=m CONFIG_SENSORS_G760A=m @@ -4514,6 +4651,7 @@ CONFIG_SENSORS_HIH6130=m CONFIG_SENSORS_IIO_HWMON=m CONFIG_SENSORS_IT87=m CONFIG_SENSORS_JC42=m +# CONFIG_SENSORS_POWERZ is not set CONFIG_SENSORS_POWR1220=m CONFIG_SENSORS_LINEAGE=m CONFIG_SENSORS_LTC2945=m @@ -4521,6 +4659,7 @@ CONFIG_SENSORS_LTC2947=m CONFIG_SENSORS_LTC2947_I2C=m CONFIG_SENSORS_LTC2947_SPI=m CONFIG_SENSORS_LTC2990=m +# CONFIG_SENSORS_LTC2991 is not set CONFIG_SENSORS_LTC2992=m CONFIG_SENSORS_LTC4151=m CONFIG_SENSORS_LTC4215=m @@ -4528,6 +4667,7 @@ CONFIG_SENSORS_LTC4222=m CONFIG_SENSORS_LTC4245=m CONFIG_SENSORS_LTC4260=m CONFIG_SENSORS_LTC4261=m +# CONFIG_SENSORS_LTC4282 is not set CONFIG_SENSORS_MAX1111=m CONFIG_SENSORS_MAX127=m CONFIG_SENSORS_MAX16065=m @@ -4577,6 +4717,7 @@ CONFIG_SENSORS_NCT7802=m CONFIG_SENSORS_NCT7904=m CONFIG_SENSORS_NPCM7XX=m CONFIG_SENSORS_NZXT_KRAKEN2=m +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set CONFIG_SENSORS_NZXT_SMART2=m CONFIG_SENSORS_OCC_P8_I2C=m CONFIG_SENSORS_OCC=m @@ -4586,6 +4727,7 @@ CONFIG_SENSORS_PMBUS=m # CONFIG_SENSORS_ACBEL_FSG032 is not set # CONFIG_SENSORS_ADM1266 is not set CONFIG_SENSORS_ADM1275=m +# CONFIG_SENSORS_ADP1050 is not set CONFIG_SENSORS_BEL_PFE=m CONFIG_SENSORS_BPA_RS600=m CONFIG_SENSORS_DELTA_AHE50DC_FAN=m @@ -4605,6 +4747,7 @@ CONFIG_SENSORS_LM25066=m CONFIG_SENSORS_LTC2978=m CONFIG_SENSORS_LTC2978_REGULATOR=y CONFIG_SENSORS_LTC3815=m +# CONFIG_SENSORS_LTC4286 is not set CONFIG_SENSORS_MAX15301=m CONFIG_SENSORS_MAX16064=m # CONFIG_SENSORS_MAX16601 is not set @@ -4613,10 +4756,17 @@ CONFIG_SENSORS_MAX20751=m CONFIG_SENSORS_MAX31785=m CONFIG_SENSORS_MAX34440=m CONFIG_SENSORS_MAX8688=m +# CONFIG_SENSORS_MP2856 is not set CONFIG_SENSORS_MP2888=m +# CONFIG_SENSORS_MP2891 is not set # CONFIG_SENSORS_MP2975 is not set +# CONFIG_SENSORS_MP2993 is not set CONFIG_SENSORS_MP5023=m +# CONFIG_SENSORS_MP5920 is not set +# CONFIG_SENSORS_MP5990 is not set +# CONFIG_SENSORS_MP9941 is not set # CONFIG_SENSORS_MPQ7932 is not set +# CONFIG_SENSORS_MPQ8785 is not set CONFIG_SENSORS_PIM4328=m # CONFIG_SENSORS_PLI1209BC is not set CONFIG_SENSORS_PM6764TR=m @@ -4629,10 +4779,12 @@ CONFIG_SENSORS_TPS53679=m # CONFIG_SENSORS_TPS546D24 is not set CONFIG_SENSORS_UCD9000=m CONFIG_SENSORS_UCD9200=m +# CONFIG_SENSORS_XDP710 is not set CONFIG_SENSORS_XDPE152=m CONFIG_SENSORS_XDPE122=m # CONFIG_SENSORS_XDPE122_REGULATOR is not set CONFIG_SENSORS_ZL6100=m +# CONFIG_SENSORS_PT5161L is not set CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_SBTSI=m CONFIG_SENSORS_SBRMI=m @@ -4662,6 +4814,7 @@ CONFIG_SENSORS_INA209=m CONFIG_SENSORS_INA2XX=m CONFIG_SENSORS_INA238=m CONFIG_SENSORS_INA3221=m +# CONFIG_SENSORS_SPD5118 is not set CONFIG_SENSORS_TC74=m CONFIG_SENSORS_THMC50=m CONFIG_SENSORS_TMP102=m @@ -4689,10 +4842,11 @@ CONFIG_SENSORS_W83627EHF=m CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set CONFIG_THERMAL_STATISTICS=y +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -4709,6 +4863,7 @@ CONFIG_THERMAL_MMIO=m # CONFIG_MAX77620_THERMAL is not set CONFIG_ROCKCHIP_THERMAL=y # CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_KHADAS_MCU_FAN_THERMAL=m CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y # CONFIG_WATCHDOG_NOWAYOUT is not set @@ -4727,7 +4882,7 @@ CONFIG_WATCHDOG_SYSFS=y # CONFIG_SOFT_WATCHDOG=m CONFIG_BD957XMUF_WATCHDOG=m -# CONFIG_GPIO_WATCHDOG is not set +CONFIG_GPIO_WATCHDOG=m # CONFIG_XILINX_WATCHDOG is not set # CONFIG_XILINX_WINDOW_WATCHDOG is not set # CONFIG_ZIIRAVE_WATCHDOG is not set @@ -4783,6 +4938,7 @@ CONFIG_BCMA_DRIVER_PCI=y # Multifunction device drivers # CONFIG_MFD_CORE=y +# CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set CONFIG_MFD_AS3711=y # CONFIG_MFD_SMPRO is not set @@ -4794,7 +4950,6 @@ CONFIG_MFD_AAT2870_CORE=y # CONFIG_MFD_BCM590XX is not set # CONFIG_MFD_BD9571MWV is not set # CONFIG_MFD_AXP20X_I2C is not set -CONFIG_MFD_CROS_EC_DEV=y # CONFIG_MFD_CS42L43_I2C is not set # CONFIG_MFD_MADERA is not set # CONFIG_MFD_MAX5970 is not set @@ -4820,6 +4975,7 @@ CONFIG_MFD_IQS62X=m # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set CONFIG_MFD_MAX77620=y @@ -4898,12 +5054,15 @@ CONFIG_MFD_VX855=m # CONFIG_MFD_ROHM_BD718XX is not set CONFIG_MFD_ROHM_BD71828=m CONFIG_MFD_ROHM_BD957XMUF=m +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set CONFIG_MFD_STMFX=m CONFIG_MFD_ATC260X=m CONFIG_MFD_ATC260X_I2C=m -# CONFIG_MFD_KHADAS_MCU is not set +CONFIG_MFD_KHADAS_MCU=m CONFIG_MFD_QCOM_PM8008=m +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set CONFIG_MFD_VEXPRESS_SYSREG=y CONFIG_RAVE_SP_CORE=m # CONFIG_MFD_INTEL_M10_BMC_SPI is not set @@ -4916,8 +5075,9 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set CONFIG_REGULATOR_88PG86X=m -# CONFIG_REGULATOR_ACT8865 is not set +CONFIG_REGULATOR_ACT8865=y # CONFIG_REGULATOR_AD5398 is not set CONFIG_REGULATOR_AAT2870=m # CONFIG_REGULATOR_ARM_SCMI is not set @@ -4928,7 +5088,6 @@ CONFIG_REGULATOR_ATC260X=m CONFIG_REGULATOR_BD71815=m CONFIG_REGULATOR_BD71828=m CONFIG_REGULATOR_BD957XMUF=m -# CONFIG_REGULATOR_CROS_EC is not set CONFIG_REGULATOR_DA9121=m # CONFIG_REGULATOR_DA9210 is not set # CONFIG_REGULATOR_DA9211 is not set @@ -4945,6 +5104,7 @@ CONFIG_REGULATOR_GPIO=y # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_MAX77650=m # CONFIG_REGULATOR_MAX77857 is not set @@ -4970,6 +5130,7 @@ CONFIG_REGULATOR_PF8X00=m # CONFIG_REGULATOR_PV88080 is not set # CONFIG_REGULATOR_PV88090 is not set CONFIG_REGULATOR_PWM=y +# CONFIG_REGULATOR_QCOM_PM8008 is not set CONFIG_REGULATOR_QCOM_SPMI=y # CONFIG_REGULATOR_QCOM_USB_VBUS is not set # CONFIG_REGULATOR_RAA215300 is not set @@ -5045,16 +5206,17 @@ CONFIG_IR_TTUSBIR=m CONFIG_RC_ATI_REMOTE=m CONFIG_RC_LOOPBACK=m CONFIG_RC_XBOX_DVD=m -CONFIG_CEC_CORE=y +CONFIG_CEC_CORE=m CONFIG_CEC_NOTIFIER=y # # CEC support # +# CONFIG_MEDIA_CEC_RC is not set CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set -# CONFIG_CEC_CROS_EC is not set # CONFIG_CEC_GPIO is not set +# CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set CONFIG_USB_PULSE8_CEC=m CONFIG_USB_RAINSHADOW_CEC=m # end of CEC support @@ -5091,6 +5253,7 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set CONFIG_VIDEO_FIXED_MINOR_RANGES=y CONFIG_VIDEO_TUNER=m +CONFIG_V4L2_JPEG_HELPER=m CONFIG_V4L2_H264=m CONFIG_V4L2_VP9=m CONFIG_V4L2_MEM2MEM_DEV=m @@ -5104,7 +5267,6 @@ CONFIG_V4L2_CCI_I2C=m # Media controller options # CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y # end of Media controller options # @@ -5285,6 +5447,7 @@ CONFIG_MEDIA_PCI_SUPPORT=y # # Media capture support # +# CONFIG_VIDEO_MGB4 is not set # CONFIG_VIDEO_SOLO6X10 is not set # CONFIG_VIDEO_TW5864 is not set # CONFIG_VIDEO_TW68 is not set @@ -5351,7 +5514,7 @@ CONFIG_MEDIA_PLATFORM_DRIVERS=y CONFIG_SDR_PLATFORM_DRIVERS=y CONFIG_DVB_PLATFORM_DRIVERS=y CONFIG_V4L_MEM2MEM_DRIVERS=y -# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m # # Allegro DVT media platform drivers @@ -5399,6 +5562,10 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -5411,6 +5578,10 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# + # # Renesas media platform drivers # @@ -5431,6 +5602,8 @@ CONFIG_VIDEO_ROCKCHIP_RGA=m # # Sunxi media platform drivers # +CONFIG_VIDEO_SYNOPSYS_HDMIRX=m +CONFIG_HDMIRX_LOAD_DEFAULT_EDID=y # # Texas Instruments drivers @@ -5440,6 +5613,7 @@ CONFIG_VIDEO_ROCKCHIP_RGA=m # Verisilicon media platform drivers # CONFIG_VIDEO_HANTRO=m +# CONFIG_VIDEO_HANTRO_HEVC_RFC is not set CONFIG_VIDEO_HANTRO_ROCKCHIP=y # @@ -5490,7 +5664,12 @@ CONFIG_VIDEO_IR_I2C=m CONFIG_VIDEO_CAMERA_SENSOR=y CONFIG_VIDEO_APTINA_PLL=m CONFIG_VIDEO_CCS_PLL=m +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set CONFIG_VIDEO_HI556=m CONFIG_VIDEO_HI846=m # CONFIG_VIDEO_HI847 is not set @@ -5499,6 +5678,7 @@ CONFIG_VIDEO_IMX214=m CONFIG_VIDEO_IMX219=m CONFIG_VIDEO_IMX258=m CONFIG_VIDEO_IMX274=m +# CONFIG_VIDEO_IMX283 is not set CONFIG_VIDEO_IMX290=m # CONFIG_VIDEO_IMX296 is not set CONFIG_VIDEO_IMX319=m @@ -5510,6 +5690,7 @@ CONFIG_VIDEO_IMX412=m CONFIG_VIDEO_MAX9271_LIB=m CONFIG_VIDEO_MT9M001=m CONFIG_VIDEO_MT9M111=m +# CONFIG_VIDEO_MT9M114 is not set CONFIG_VIDEO_MT9P031=m CONFIG_VIDEO_MT9T112=m CONFIG_VIDEO_MT9V011=m @@ -5535,6 +5716,7 @@ CONFIG_VIDEO_OV5670=m CONFIG_VIDEO_OV5675=m CONFIG_VIDEO_OV5693=m CONFIG_VIDEO_OV5695=m +# CONFIG_VIDEO_OV64A40 is not set CONFIG_VIDEO_OV6650=m CONFIG_VIDEO_OV7251=m CONFIG_VIDEO_OV7640=m @@ -5553,10 +5735,16 @@ CONFIG_VIDEO_RJ54N1=m CONFIG_VIDEO_S5C73M3=m CONFIG_VIDEO_S5K5BAF=m CONFIG_VIDEO_S5K6A3=m -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set CONFIG_VIDEO_CCS=m CONFIG_VIDEO_ET8EK8=m +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -5626,6 +5814,7 @@ CONFIG_VIDEO_SAA711X=m CONFIG_VIDEO_TVP5150=m # CONFIG_VIDEO_TVP7002 is not set CONFIG_VIDEO_TW2804=m +# CONFIG_VIDEO_TW9900 is not set CONFIG_VIDEO_TW9903=m CONFIG_VIDEO_TW9906=m # CONFIG_VIDEO_TW9910 is not set @@ -5685,6 +5874,8 @@ CONFIG_VIDEO_CX25840=m # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -5913,39 +6104,45 @@ CONFIG_DVB_DUMMY_FE=m # Graphics support # CONFIG_APERTURE_HELPERS=y -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_VIDEO=y CONFIG_AUXDISPLAY=y # CONFIG_HD44780 is not set -# CONFIG_IMG_ASCII_LCD is not set -# CONFIG_HT16K33 is not set CONFIG_TM16XX=m # CONFIG_LCD2S is not set CONFIG_CHARLCD_BL_OFF=y # CONFIG_CHARLCD_BL_ON is not set # CONFIG_CHARLCD_BL_FLASH is not set -CONFIG_DRM=y +# CONFIG_IMG_ASCII_LCD is not set +# CONFIG_HT16K33 is not set +# CONFIG_MAX6959 is not set +# CONFIG_SEG_LED_GPIO is not set +CONFIG_DRM=m CONFIG_DRM_MIPI_DBI=m CONFIG_DRM_MIPI_DSI=y # CONFIG_DRM_DEBUG_MM is not set # CONFIG_DRM_KUNIT_TEST is not set -CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_HELPER=m +# CONFIG_DRM_PANIC is not set # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set # CONFIG_DRM_DEBUG_MODESET_LOCK is not set CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -CONFIG_DRM_DP_AUX_BUS=m -CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_DISPLAY_DP_AUX_BUS=m +CONFIG_DRM_DISPLAY_HELPER=m +CONFIG_DRM_BRIDGE_CONNECTOR=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -CONFIG_DRM_DP_CEC=y +CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y CONFIG_DRM_TTM=m +CONFIG_DRM_EXEC=m +CONFIG_DRM_GPUVM=m CONFIG_DRM_VRAM_HELPER=m CONFIG_DRM_TTM_HELPER=m -CONFIG_DRM_GEM_DMA_HELPER=y +CONFIG_DRM_GEM_DMA_HELPER=m CONFIG_DRM_GEM_SHMEM_HELPER=m CONFIG_DRM_SCHED=m @@ -5969,14 +6166,16 @@ CONFIG_DRM_KOMEDA=m # CONFIG_DRM_RADEON is not set # CONFIG_DRM_AMDGPU is not set # CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_XE is not set # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set -CONFIG_DRM_ROCKCHIP=y +CONFIG_DRM_ROCKCHIP=m CONFIG_ROCKCHIP_VOP=y CONFIG_ROCKCHIP_VOP2=y CONFIG_ROCKCHIP_ANALOGIX_DP=y CONFIG_ROCKCHIP_CDN_DP=y CONFIG_ROCKCHIP_DW_HDMI=y +CONFIG_ROCKCHIP_DW_HDMI_QP=y CONFIG_ROCKCHIP_DW_MIPI_DSI=y CONFIG_ROCKCHIP_INNO_HDMI=y CONFIG_ROCKCHIP_LVDS=y @@ -6000,32 +6199,40 @@ CONFIG_DRM_PANEL_ARM_VERSATILE=m # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0=m CONFIG_DRM_PANEL_BOE_HIMAX8279D=m +# CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A is not set CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m -CONFIG_DRM_PANEL_DSI_CM=m -CONFIG_DRM_PANEL_LVDS=m -CONFIG_DRM_PANEL_SIMPLE=m -CONFIG_DRM_PANEL_EDP=m +# CONFIG_DRM_PANEL_BOE_TV101WUM_LL2 is not set # CONFIG_DRM_PANEL_EBBG_FT8719 is not set CONFIG_DRM_PANEL_ELIDA_KD35T133=m CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m +CONFIG_DRM_PANEL_DSI_CM=m +CONFIG_DRM_PANEL_LVDS=m +# CONFIG_DRM_PANEL_HIMAX_HX83102 is not set +# CONFIG_DRM_PANEL_HIMAX_HX83112A is not set # CONFIG_DRM_PANEL_HIMAX_HX8394 is not set CONFIG_DRM_PANEL_ILITEK_IL9322=m CONFIG_DRM_PANEL_ILITEK_ILI9341=m +# CONFIG_DRM_PANEL_ILITEK_ILI9805 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set CONFIG_DRM_PANEL_ILITEK_ILI9881C=m +# CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set CONFIG_DRM_PANEL_INNOLUX_EJ030NA=m CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m # CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set +# CONFIG_DRM_PANEL_JDI_LPM102A188A is not set CONFIG_DRM_PANEL_JDI_LT070ME05000=m CONFIG_DRM_PANEL_JDI_R63452=m CONFIG_DRM_PANEL_KHADAS_TS050=m CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04=m # CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829=m -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LINCOLNTECH_LCD197 is not set CONFIG_DRM_PANEL_LG_LB035Q02=m # CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_LG_SW43408 is not set # CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966 is not set +# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set CONFIG_DRM_PANEL_NEC_NL8048HL11=m # CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set CONFIG_DRM_PANEL_NEWVISION_NV3052C=m @@ -6034,8 +6241,8 @@ CONFIG_DRM_PANEL_NOVATEK_NT35510=m CONFIG_DRM_PANEL_NOVATEK_NT35950=m # CONFIG_DRM_PANEL_NOVATEK_NT36523 is not set CONFIG_DRM_PANEL_NOVATEK_NT36672A=m +# CONFIG_DRM_PANEL_NOVATEK_NT36672E is not set CONFIG_DRM_PANEL_NOVATEK_NT39016=m -# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=m # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set CONFIG_DRM_PANEL_ORISETECH_OTM8009A=m @@ -6044,16 +6251,20 @@ CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m CONFIG_DRM_PANEL_RAYDIUM_RM67191=m CONFIG_DRM_PANEL_RAYDIUM_RM68200=m +# CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set CONFIG_DRM_PANEL_RONBO_RB070D30=m +CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01=m CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=m CONFIG_DRM_PANEL_SAMSUNG_DB7430=m +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3FA7 is not set CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=m CONFIG_DRM_PANEL_SAMSUNG_S6D27A1=m # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01=m # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set CONFIG_DRM_PANEL_SAMSUNG_SOFEF00=m CONFIG_DRM_PANEL_SEIKO_43WVF1G=m @@ -6068,14 +6279,17 @@ CONFIG_DRM_PANEL_SONY_ACX565AKM=m # CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521=m # CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set +CONFIG_DRM_PANEL_EDP=m +CONFIG_DRM_PANEL_SIMPLE=m +# CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set CONFIG_DRM_PANEL_TDO_TL070WSH30=m CONFIG_DRM_PANEL_TPO_TD028TTEC1=m CONFIG_DRM_PANEL_TPO_TD043MTEA1=m CONFIG_DRM_PANEL_TPO_TPG110=m CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m +# CONFIG_DRM_PANEL_VISIONOX_R66451 is not set # CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set # CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set -# CONFIG_DRM_PANEL_VISIONOX_R66451 is not set CONFIG_DRM_PANEL_WIDECHIPS_WS2401=m CONFIG_DRM_PANEL_XINPENG_XPP055C272=m # end of Display Panels @@ -6088,7 +6302,6 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHIPONE_ICN6211=m # CONFIG_DRM_CHRONTEL_CH7033 is not set -CONFIG_DRM_CROS_EC_ANX7688=m CONFIG_DRM_DISPLAY_CONNECTOR=m # CONFIG_DRM_ITE_IT6505 is not set CONFIG_DRM_LONTIUM_LT8912B=m @@ -6106,7 +6319,7 @@ CONFIG_DRM_PARADE_PS8640=m # CONFIG_DRM_SIL_SII8620 is not set # CONFIG_DRM_SII902X is not set CONFIG_DRM_SII9234=m -# CONFIG_DRM_SIMPLE_BRIDGE is not set +CONFIG_DRM_SIMPLE_BRIDGE=m CONFIG_DRM_THINE_THC63LVD1024=m # CONFIG_DRM_TOSHIBA_TC358762 is not set CONFIG_DRM_TOSHIBA_TC358764=m @@ -6120,7 +6333,7 @@ CONFIG_DRM_TI_SN65DSI83=m CONFIG_DRM_TI_TPD12S015=m CONFIG_DRM_ANALOGIX_ANX6345=m CONFIG_DRM_ANALOGIX_ANX78XX=m -CONFIG_DRM_ANALOGIX_DP=y +CONFIG_DRM_ANALOGIX_DP=m # CONFIG_DRM_ANALOGIX_ANX7625 is not set CONFIG_DRM_I2C_ADV7511=m # CONFIG_DRM_I2C_ADV7511_AUDIO is not set @@ -6128,19 +6341,19 @@ CONFIG_DRM_I2C_ADV7511_CEC=y CONFIG_DRM_CDNS_DSI=m # CONFIG_DRM_CDNS_DSI_J721E is not set # CONFIG_DRM_CDNS_MHDP8546 is not set -CONFIG_DRM_DW_HDMI=y -# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI=m +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m CONFIG_DRM_DW_HDMI_I2S_AUDIO=m CONFIG_DRM_DW_HDMI_GP_AUDIO=m CONFIG_DRM_DW_HDMI_CEC=m -CONFIG_DRM_DW_MIPI_DSI=y +CONFIG_DRM_DW_HDMI_QP=m +CONFIG_DRM_DW_MIPI_DSI=m # end of Display Interface Bridges -# CONFIG_DRM_LOONGSON is not set CONFIG_DRM_ETNAVIV=m CONFIG_DRM_ETNAVIV_THERMAL=y # CONFIG_DRM_HISI_HIBMC is not set -CONFIG_DRM_HISI_KIRIN=m +# CONFIG_DRM_HISI_KIRIN is not set # CONFIG_DRM_LOGICVC is not set # CONFIG_DRM_ARCPGU is not set CONFIG_DRM_BOCHS=m @@ -6162,11 +6375,13 @@ CONFIG_DRM_XEN=y CONFIG_DRM_XEN_FRONTEND=m CONFIG_DRM_LIMA=m CONFIG_DRM_PANFROST=m +CONFIG_DRM_PANTHOR=m CONFIG_DRM_TIDSS=m CONFIG_DRM_GUD=m # CONFIG_DRM_SSD130X is not set -CONFIG_DRM_LEGACY=y -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +# CONFIG_DRM_POWERVR is not set +# CONFIG_DRM_WERROR is not set +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=m # # Frame buffer Devices @@ -6174,7 +6389,6 @@ CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y CONFIG_FB=y # CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set -CONFIG_FB_ARMCLCD=y # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set @@ -6222,9 +6436,10 @@ CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y +CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_IOMEM_FOPS=y CONFIG_FB_IOMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS=y @@ -6252,6 +6467,7 @@ CONFIG_LCD_CLASS_DEVICE=m CONFIG_LCD_OTM3225A=m CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set CONFIG_BACKLIGHT_LM3533=m CONFIG_BACKLIGHT_PWM=m @@ -6261,9 +6477,11 @@ CONFIG_BACKLIGHT_ADP5520=m # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set CONFIG_BACKLIGHT_AAT2870=m +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set CONFIG_BACKLIGHT_LP855X=y +# CONFIG_BACKLIGHT_MP3309C is not set CONFIG_BACKLIGHT_AS3711=m CONFIG_BACKLIGHT_GPIO=m # CONFIG_BACKLIGHT_LV5207LP is not set @@ -6306,6 +6524,7 @@ CONFIG_SND_DMAENGINE_PCM=m CONFIG_SND_HWDEP=m CONFIG_SND_SEQ_DEVICE=m CONFIG_SND_RAWMIDI=m +# CONFIG_SND_CORE_TEST is not set CONFIG_SND_COMPRESS_OFFLOAD=m CONFIG_SND_JACK=y CONFIG_SND_JACK_INPUT_DEV=y @@ -6316,10 +6535,10 @@ CONFIG_SND_PCM_TIMER=y # CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set +# CONFIG_SND_UTIMER is not set CONFIG_SND_VMASTER=y CONFIG_SND_SEQUENCER=m CONFIG_SND_SEQ_DUMMY=m @@ -6438,6 +6657,7 @@ CONFIG_SND_SOC=m CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y CONFIG_SND_SOC_COMPRESS=y # CONFIG_SND_SOC_TOPOLOGY_BUILD is not set +# CONFIG_SND_SOC_CARD_KUNIT_TEST is not set CONFIG_SND_SOC_UTILS_KUNIT_TEST=m CONFIG_SND_SOC_ADI=m CONFIG_SND_SOC_ADI_AXI_I2S=m @@ -6517,6 +6737,7 @@ CONFIG_SND_SOC_AK4375=m CONFIG_SND_SOC_AK4458=m CONFIG_SND_SOC_AK4554=m CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4619 is not set CONFIG_SND_SOC_AK4642=m CONFIG_SND_SOC_AK5386=m CONFIG_SND_SOC_AK5558=m @@ -6525,10 +6746,12 @@ CONFIG_SND_SOC_ALC5623=m # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set CONFIG_SND_SOC_BD28623=m # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set -CONFIG_SND_SOC_CROS_EC_CODEC=m +# CONFIG_SND_SOC_CS_AMP_LIB_TEST is not set # CONFIG_SND_SOC_CS35L32 is not set # CONFIG_SND_SOC_CS35L33 is not set # CONFIG_SND_SOC_CS35L34 is not set @@ -6559,6 +6782,7 @@ CONFIG_SND_SOC_CS43130=m CONFIG_SND_SOC_CS4341=m # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set CONFIG_SND_SOC_DA7213=m CONFIG_SND_SOC_DA7219=m @@ -6566,8 +6790,9 @@ CONFIG_SND_SOC_DMIC=m CONFIG_SND_SOC_HDMI_CODEC=m CONFIG_SND_SOC_ES7134=m CONFIG_SND_SOC_ES7241=m +# CONFIG_SND_SOC_ES8311 is not set CONFIG_SND_SOC_ES8316=m -# CONFIG_SND_SOC_ES8326 is not set +CONFIG_SND_SOC_ES8326=m CONFIG_SND_SOC_ES8328=m CONFIG_SND_SOC_ES8328_I2C=m CONFIG_SND_SOC_ES8328_SPI=m @@ -6608,6 +6833,7 @@ CONFIG_SND_SOC_PCM5102A=m CONFIG_SND_SOC_PCM512x=m CONFIG_SND_SOC_PCM512x_I2C=m CONFIG_SND_SOC_PCM512x_SPI=m +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set CONFIG_SND_SOC_RK3308=m CONFIG_SND_SOC_RK3328=m @@ -6622,6 +6848,7 @@ CONFIG_SND_SOC_RT5645=m CONFIG_SND_SOC_RT5651=m CONFIG_SND_SOC_RT5659=m CONFIG_SND_SOC_RT9120=m +# CONFIG_SND_SOC_RTQ9128 is not set CONFIG_SND_SOC_SGTL5000=m CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m CONFIG_SND_SOC_SIMPLE_MUX=m @@ -6699,6 +6926,7 @@ CONFIG_SND_SOC_WM8985=m # CONFIG_SND_SOC_ZL38060 is not set CONFIG_SND_SOC_MAX9759=m CONFIG_SND_SOC_MT6351=m +# CONFIG_SND_SOC_MT6357 is not set CONFIG_SND_SOC_MT6358=m CONFIG_SND_SOC_MT6660=m CONFIG_SND_SOC_NAU8315=m @@ -6770,8 +6998,7 @@ CONFIG_HID_GFRM=m CONFIG_HID_GLORIOUS=m CONFIG_HID_HOLTEK=m CONFIG_HOLTEK_FF=y -CONFIG_HID_VIVALDI_COMMON=m -CONFIG_HID_GOOGLE_HAMMER=m +# CONFIG_HID_GOODIX_SPI is not set # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set CONFIG_HID_GT683R=m @@ -6855,6 +7082,7 @@ CONFIG_HID_UDRAW_PS3=m CONFIG_HID_U2FZERO=m CONFIG_HID_WACOM=m CONFIG_HID_WIIMOTE=m +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=m CONFIG_HID_ZEROPLUS=m CONFIG_ZEROPLUS_FF=y @@ -6894,6 +7122,7 @@ CONFIG_USB_CONN_GPIO=m CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y +# CONFIG_USB_PCI_AMD is not set CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # @@ -6908,6 +7137,7 @@ CONFIG_USB_OTG=y CONFIG_USB_OTG_FSM=m CONFIG_USB_LEDS_TRIGGER_USBPORT=y CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 CONFIG_USB_MON=m # @@ -6992,7 +7222,7 @@ CONFIG_USB_CDNS_SUPPORT=m # CONFIG_USB_CDNS3 is not set # CONFIG_USB_MUSB_HDRC is not set CONFIG_USB_DWC3=y -# CONFIG_USB_DWC3_ULPI is not set +CONFIG_USB_DWC3_ULPI=y # CONFIG_USB_DWC3_HOST is not set # CONFIG_USB_DWC3_GADGET is not set CONFIG_USB_DWC3_DUAL_ROLE=y @@ -7018,6 +7248,7 @@ CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_PCI=y CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_NPCM=y CONFIG_USB_CHIPIDEA_IMX=y CONFIG_USB_CHIPIDEA_GENERIC=y CONFIG_USB_CHIPIDEA_TEGRA=y @@ -7115,7 +7346,7 @@ CONFIG_USB_HSIC_USB3503=y # CONFIG_USB_HSIC_USB4604 is not set CONFIG_USB_LINK_LAYER_TEST=m CONFIG_USB_CHAOSKEY=m -# CONFIG_USB_ONBOARD_HUB is not set +# CONFIG_USB_ONBOARD_DEV is not set CONFIG_USB_ATM=m CONFIG_USB_SPEEDTOUCH=m CONFIG_USB_CXACRU=m @@ -7264,7 +7495,10 @@ CONFIG_TYPEC_HD3SS3220=m CONFIG_TYPEC_MUX_FSA4480=m # CONFIG_TYPEC_MUX_GPIO_SBU is not set CONFIG_TYPEC_MUX_PI3USB30532=m +# CONFIG_TYPEC_MUX_IT5205 is not set # CONFIG_TYPEC_MUX_NB7VPQ904M is not set +# CONFIG_TYPEC_MUX_PTN36502 is not set +# CONFIG_TYPEC_MUX_WCD939X_USBSS is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support # @@ -7310,6 +7544,7 @@ CONFIG_MMC_DW_PLTFM=y # CONFIG_MMC_DW_BLUEFIELD is not set CONFIG_MMC_DW_EXYNOS=y CONFIG_MMC_DW_HI3798CV200=m +# CONFIG_MMC_DW_HI3798MV200 is not set CONFIG_MMC_DW_K3=y # CONFIG_MMC_DW_PCI is not set CONFIG_MMC_DW_ROCKCHIP=y @@ -7351,8 +7586,6 @@ CONFIG_LEDS_LM3692X=m CONFIG_LEDS_GPIO=y # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP50XX is not set -# CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set @@ -7393,7 +7626,7 @@ CONFIG_LEDS_USER=y # LED Triggers # CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_TIMER=m CONFIG_LEDS_TRIGGER_ONESHOT=m CONFIG_LEDS_TRIGGER_DISK=y CONFIG_LEDS_TRIGGER_MTD=y @@ -7401,6 +7634,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LEDS_TRIGGER_BACKLIGHT=m CONFIG_LEDS_TRIGGER_CPU=y CONFIG_LEDS_TRIGGER_ACTIVITY=y +CONFIG_LEDS_TRIGGER_GPIO=m CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # @@ -7411,8 +7645,8 @@ CONFIG_LEDS_TRIGGER_CAMERA=m CONFIG_LEDS_TRIGGER_PANIC=y CONFIG_LEDS_TRIGGER_NETDEV=m CONFIG_LEDS_TRIGGER_PATTERN=m -CONFIG_LEDS_TRIGGER_AUDIO=m CONFIG_LEDS_TRIGGER_TTY=m +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # # Simple LED drivers @@ -7458,9 +7692,10 @@ CONFIG_RTC_DRV_DS1307=y # CONFIG_RTC_DRV_DS1672 is not set CONFIG_RTC_DRV_HYM8563=y # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_NCT3018Y is not set -CONFIG_RTC_DRV_RK808=y +CONFIG_RTC_DRV_RK808=m # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set @@ -7480,6 +7715,7 @@ CONFIG_RTC_DRV_RC5T619=m CONFIG_RTC_DRV_S35390A=m CONFIG_RTC_DRV_FM3130=m CONFIG_RTC_DRV_RX8010=m +# CONFIG_RTC_DRV_RX8111 is not set CONFIG_RTC_DRV_RX8581=m CONFIG_RTC_DRV_RX8025=m CONFIG_RTC_DRV_EM3027=m @@ -7487,6 +7723,7 @@ CONFIG_RTC_DRV_RV3028=m # CONFIG_RTC_DRV_RV3032 is not set CONFIG_RTC_DRV_RV8803=m CONFIG_RTC_DRV_S5M=m +# CONFIG_RTC_DRV_SD2405AL is not set CONFIG_RTC_DRV_SD3078=m # @@ -7535,7 +7772,6 @@ CONFIG_RTC_DRV_EFI=y # CONFIG_RTC_DRV_MSM6242 is not set # CONFIG_RTC_DRV_RP5C01 is not set # CONFIG_RTC_DRV_ZYNQMP is not set -# CONFIG_RTC_DRV_CROS_EC is not set CONFIG_RTC_DRV_NTXEC=m # @@ -7576,10 +7812,12 @@ CONFIG_PLX_DMA=m # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set +# CONFIG_AMD_QDMA is not set CONFIG_QCOM_HIDMA_MGMT=y CONFIG_QCOM_HIDMA=y -# CONFIG_DW_DMAC is not set -# CONFIG_DW_DMAC_PCI is not set +CONFIG_DW_DMAC_CORE=m +CONFIG_DW_DMAC=m +CONFIG_DW_DMAC_PCI=m CONFIG_DW_EDMA=m CONFIG_DW_EDMA_PCIE=m CONFIG_SF_PDMA=m @@ -7587,7 +7825,7 @@ CONFIG_SF_PDMA=m # # DMA Clients # -# CONFIG_ASYNC_TX_DMA is not set +CONFIG_ASYNC_TX_DMA=y # CONFIG_DMATEST is not set CONFIG_DMA_ENGINE_RAID=y @@ -7596,12 +7834,14 @@ CONFIG_DMA_ENGINE_RAID=y # CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set -# CONFIG_UDMABUF is not set +CONFIG_UDMABUF=y # CONFIG_DMABUF_MOVE_NOTIFY is not set # CONFIG_DMABUF_DEBUG is not set CONFIG_DMABUF_SELFTESTS=m -# CONFIG_DMABUF_HEAPS is not set -# CONFIG_DMABUF_SYSFS_STATS is not set +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_SYSFS_STATS=y +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_DMABUF_HEAPS_CMA=y # end of DMABUF options CONFIG_UIO=m @@ -7612,12 +7852,12 @@ CONFIG_UIO=m # CONFIG_UIO_SERCOS3 is not set # CONFIG_UIO_PCI_GENERIC is not set # CONFIG_UIO_NETX is not set -# CONFIG_UIO_PRUSS is not set # CONFIG_UIO_MF624 is not set CONFIG_VFIO=m CONFIG_VFIO_DEVICE_CDEV=y # CONFIG_VFIO_GROUP is not set CONFIG_VFIO_VIRQFD=y +# CONFIG_VFIO_DEBUGFS is not set # # VFIO support for PCI devices @@ -7626,6 +7866,7 @@ CONFIG_VFIO_PCI_CORE=m CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_INTX=y CONFIG_VFIO_PCI=m +# CONFIG_NVGRACE_GPU_VFIO_PCI is not set # end of VFIO support for PCI devices # @@ -7635,8 +7876,11 @@ CONFIG_VFIO_PCI=m # CONFIG_VFIO_AMBA is not set # end of VFIO support for platform devices +CONFIG_IRQ_BYPASS_MANAGER=y CONFIG_VIRT_DRIVERS=y +CONFIG_VMGENID=y CONFIG_NITRO_ENCLAVES=m +# CONFIG_ARM_PKVM_GUEST is not set CONFIG_VIRTIO_ANCHOR=y CONFIG_VIRTIO=y CONFIG_VIRTIO_PCI_LIB=y @@ -7650,6 +7894,7 @@ CONFIG_VIRTIO_INPUT=m CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set CONFIG_VIRTIO_DMA_SHARED_BUFFER=m +# CONFIG_VIRTIO_DEBUG is not set CONFIG_VDPA=m CONFIG_VDPA_SIM=m CONFIG_VDPA_SIM_NET=m @@ -7659,6 +7904,7 @@ CONFIG_IFCVF=m # CONFIG_MLX5_VDPA_STEERING_DEBUG is not set CONFIG_VP_VDPA=m # CONFIG_SNET_VDPA is not set +# CONFIG_OCTEONEP_VDPA is not set CONFIG_VHOST_IOTLB=m CONFIG_VHOST_RING=m CONFIG_VHOST_TASK=y @@ -7705,8 +7951,6 @@ CONFIG_XEN_FRONT_PGDIR_SHBUF=m # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -CONFIG_RTL8192U=m CONFIG_RTLLIB=m CONFIG_RTLLIB_CRYPTO_CCMP=m CONFIG_RTLLIB_CRYPTO_TKIP=m @@ -7753,12 +7997,6 @@ CONFIG_AD9834=m # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters # end of IIO staging drivers CONFIG_FB_SM750=m @@ -7766,8 +8004,12 @@ CONFIG_STAGING_MEDIA=y # CONFIG_DVB_AV7110 is not set # CONFIG_VIDEO_MAX96712 is not set CONFIG_VIDEO_ROCKCHIP_VDEC=m +CONFIG_VIDEO_ROCKCHIP_VDEC2=m + +# +# StarFive media platform drivers +# # CONFIG_STAGING_MEDIA_DEPRECATED is not set -# CONFIG_STAGING_BOARD is not set # CONFIG_LTE_GDM724X is not set CONFIG_FB_TFT=m CONFIG_FB_TFT_AGM1264K_FL=m @@ -7782,6 +8024,7 @@ CONFIG_FB_TFT_ILI9325=m CONFIG_FB_TFT_ILI9340=m CONFIG_FB_TFT_ILI9341=m CONFIG_FB_TFT_ILI9481=m +CONFIG_FB_TFT_ST7796=m CONFIG_FB_TFT_ILI9486=m CONFIG_FB_TFT_PCD8544=m CONFIG_FB_TFT_RA8875=m @@ -7796,42 +8039,25 @@ CONFIG_FB_TFT_SSD1331=m CONFIG_FB_TFT_SSD1351=m CONFIG_FB_TFT_ST7735R=m CONFIG_FB_TFT_ST7789V=m -CONFIG_FB_TFT_ST7796=m CONFIG_FB_TFT_TINYLCD=m CONFIG_FB_TFT_TLS8204=m CONFIG_FB_TFT_UC1611=m CONFIG_FB_TFT_UC1701=m CONFIG_FB_TFT_UPD161704=m # CONFIG_MOST_COMPONENTS is not set -# CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set CONFIG_FIELDBUS_DEV=m CONFIG_HMS_ANYBUSS_BUS=m # CONFIG_ARCX_ANYBUS_CONTROLLER is not set # CONFIG_HMS_PROFINET is not set -# CONFIG_QLGE is not set # CONFIG_VME_BUS is not set # CONFIG_RTL8723CS is not set # CONFIG_GOLDFISH is not set -CONFIG_CHROME_PLATFORMS=y -CONFIG_CROS_EC=y -# CONFIG_CROS_EC_I2C is not set -# CONFIG_CROS_EC_SPI is not set -CONFIG_CROS_EC_PROTO=y -# CONFIG_CROS_KBD_LED_BACKLIGHT is not set -CONFIG_CROS_EC_CHARDEV=y -CONFIG_CROS_EC_LIGHTBAR=y -CONFIG_CROS_EC_VBC=y -CONFIG_CROS_EC_DEBUGFS=y -CONFIG_CROS_EC_SENSORHUB=y -CONFIG_CROS_EC_SYSFS=y -CONFIG_CROS_EC_TYPEC=m -# CONFIG_CROS_HPS_I2C is not set -CONFIG_CROS_USBPD_NOTIFY=y -# CONFIG_CROS_KUNIT is not set +# CONFIG_CHROME_PLATFORMS is not set +# CONFIG_CZNIC_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set CONFIG_SURFACE_PLATFORMS=y +CONFIG_ARM64_PLATFORM_DEVICES=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y @@ -7876,11 +8102,14 @@ CONFIG_CLK_RK3328=y CONFIG_CLK_RK3368=y CONFIG_CLK_RK3399=y CONFIG_CLK_RK3568=y +CONFIG_CLK_RK3576=y CONFIG_CLK_RK3588=y # CONFIG_XILINX_VCU is not set CONFIG_COMMON_CLK_XLNX_CLKWZRD=m # CONFIG_CLK_KUNIT_TEST is not set +# CONFIG_CLK_FIXED_RATE_KUNIT_TEST is not set # CONFIG_CLK_GATE_KUNIT_TEST is not set +# CONFIG_CLK_FD_KUNIT_TEST is not set # CONFIG_HWSPINLOCK is not set # @@ -7896,11 +8125,13 @@ CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y CONFIG_FSL_ERRATUM_A008585=y CONFIG_HISILICON_ERRATUM_161010101=y CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_ARM_TIMER_SP804 is not set # end of Clock Source drivers CONFIG_MAILBOX=y CONFIG_ARM_MHU=y CONFIG_ARM_MHU_V2=m +CONFIG_ARM_MHU_V3=m CONFIG_PLATFORM_MHU=y # CONFIG_PL320_MBOX is not set CONFIG_ROCKCHIP_MBOX=y @@ -7908,6 +8139,7 @@ CONFIG_ROCKCHIP_MBOX=y # CONFIG_MAILBOX_TEST is not set CONFIG_IOMMU_IOVA=y CONFIG_IOMMU_API=y +CONFIG_IOMMUFD_DRIVER=y CONFIG_IOMMU_SUPPORT=y # @@ -7926,14 +8158,17 @@ CONFIG_IOMMU_DEFAULT_DMA_STRICT=y # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_IOMMU_DMA=y +CONFIG_IOMMU_SVA=y +CONFIG_IOMMU_IOPF=y CONFIG_IOMMUFD=m CONFIG_ROCKCHIP_IOMMU=y CONFIG_ARM_SMMU=y # CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y CONFIG_ARM_SMMU_V3=y -# CONFIG_ARM_SMMU_V3_SVA is not set -# CONFIG_VIRTIO_IOMMU is not set +CONFIG_ARM_SMMU_V3_SVA=y +# CONFIG_ARM_SMMU_V3_KUNIT_TEST is not set +CONFIG_VIRTIO_IOMMU=m # # Remoteproc drivers @@ -7962,7 +8197,6 @@ CONFIG_ARM_SMMU_V3=y # # Broadcom SoC drivers # -CONFIG_SOC_BRCMSTB=y # end of Broadcom SoC drivers # @@ -7995,11 +8229,11 @@ CONFIG_LITEX_SOC_CONTROLLER=m # Qualcomm SoC drivers # CONFIG_QCOM_QMI_HELPERS=m +# CONFIG_QCOM_PBS is not set # end of Qualcomm SoC drivers CONFIG_ROCKCHIP_GRF=y CONFIG_ROCKCHIP_IODOMAIN=y -CONFIG_ROCKCHIP_PM_DOMAINS=y # CONFIG_SOC_TI is not set # @@ -8008,6 +8242,37 @@ CONFIG_ROCKCHIP_PM_DOMAINS=y # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +CONFIG_ARM_SCMI_PERF_DOMAIN=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains + +CONFIG_ROCKCHIP_PM_DOMAINS=y +# end of PM Domains + CONFIG_PM_DEVFREQ=y # @@ -8033,13 +8298,13 @@ CONFIG_EXTCON=y # # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set -# CONFIG_EXTCON_GPIO is not set +CONFIG_EXTCON_GPIO=y +# CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set CONFIG_EXTCON_PTN5150=m # CONFIG_EXTCON_RT8973A is not set # CONFIG_EXTCON_SM5502 is not set CONFIG_EXTCON_USB_GPIO=y -# CONFIG_EXTCON_USBC_CROS_EC is not set CONFIG_EXTCON_USBC_TUSB320=m CONFIG_EXTCON_USBC_VIRTUAL_PD=m # CONFIG_MEMORY is not set @@ -8077,6 +8342,8 @@ CONFIG_ADXL355_SPI=m CONFIG_ADXL372=m CONFIG_ADXL372_SPI=m CONFIG_ADXL372_I2C=m +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set CONFIG_BMA180=m CONFIG_BMA220=m CONFIG_BMA400=m @@ -8086,6 +8353,7 @@ CONFIG_BMC150_ACCEL=m CONFIG_BMC150_ACCEL_I2C=m CONFIG_BMC150_ACCEL_SPI=m CONFIG_BMI088_ACCEL=m +CONFIG_BMI088_ACCEL_I2C=m CONFIG_BMI088_ACCEL_SPI=m CONFIG_DA280=m CONFIG_DA311=m @@ -8127,15 +8395,21 @@ CONFIG_STK8BA50=m # Analog to digital converters # CONFIG_AD_SIGMA_DELTA=m +# CONFIG_AD4000 is not set # CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set +CONFIG_AD7091R=m CONFIG_AD7091R5=m +# CONFIG_AD7091R8 is not set CONFIG_AD7124=m +# CONFIG_AD7173 is not set # CONFIG_AD7192 is not set CONFIG_AD7266=m # CONFIG_AD7280 is not set CONFIG_AD7291=m CONFIG_AD7292=m CONFIG_AD7298=m +# CONFIG_AD7380 is not set CONFIG_AD7476=m CONFIG_AD7606=m CONFIG_AD7606_IFACE_PARALLEL=m @@ -8147,16 +8421,17 @@ CONFIG_AD7791=m CONFIG_AD7793=m CONFIG_AD7887=m CONFIG_AD7923=m +# CONFIG_AD7944 is not set CONFIG_AD7949=m CONFIG_AD799X=m # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set # CONFIG_CC10001_ADC is not set CONFIG_DLN2_ADC=m # CONFIG_ENVELOPE_DETECTOR is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set CONFIG_LTC2496=m @@ -8168,11 +8443,15 @@ CONFIG_LTC2496=m # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set # CONFIG_QCOM_SPMI_IADC is not set # CONFIG_QCOM_SPMI_VADC is not set # CONFIG_QCOM_SPMI_ADC5 is not set @@ -8188,8 +8467,10 @@ CONFIG_TI_ADC108S102=m CONFIG_TI_ADC128S052=m CONFIG_TI_ADC161S626=m CONFIG_TI_ADS1015=m +# CONFIG_TI_ADS1119 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set CONFIG_TI_ADS7950=m CONFIG_TI_ADS8344=m CONFIG_TI_ADS8688=m @@ -8233,12 +8514,14 @@ CONFIG_HMC425=m # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set CONFIG_BME680=m CONFIG_BME680_I2C=m CONFIG_BME680_SPI=m # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set CONFIG_PMS7003=m # CONFIG_SCD30_CORE is not set @@ -8252,8 +8535,6 @@ CONFIG_SENSEAIR_SUNRISE_CO2=m # CONFIG_VZ89X is not set # end of Chemical Sensors -# CONFIG_IIO_CROS_EC_SENSORS_CORE is not set - # # Hid Sensor IIO Common # @@ -8293,6 +8574,7 @@ CONFIG_AD3552R=m # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set CONFIG_AD5686=m CONFIG_AD5686_SPI=m @@ -8311,12 +8593,14 @@ CONFIG_AD7293=m # CONFIG_DS4424 is not set CONFIG_LTC1660=m # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set CONFIG_TI_DAC5571=m @@ -8355,6 +8639,7 @@ CONFIG_ADMV8818=m # CONFIG_ADF4350 is not set CONFIG_ADF4371=m # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set CONFIG_ADMV1013=m # CONFIG_ADMV1014 is not set # CONFIG_ADMV4420 is not set @@ -8405,8 +8690,10 @@ CONFIG_ITG3200=m # CONFIG_AM2315=m CONFIG_DHT11=m +# CONFIG_ENS210 is not set CONFIG_HDC100X=m # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set CONFIG_HID_SENSOR_HUMIDITY=m CONFIG_HTS221=m CONFIG_HTS221_I2C=m @@ -8425,6 +8712,8 @@ CONFIG_ADIS16460=m # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set CONFIG_FXOS8700=m @@ -8452,8 +8741,10 @@ CONFIG_ADUX1020=m CONFIG_AL3010=m CONFIG_AL3320A=m CONFIG_APDS9300=m +# CONFIG_APDS9306 is not set CONFIG_APDS9960=m # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set CONFIG_BH1750=m CONFIG_BH1780=m CONFIG_CM32181=m @@ -8467,6 +8758,7 @@ CONFIG_IQS621_ALS=m CONFIG_SENSORS_ISL29018=m CONFIG_SENSORS_ISL29028=m CONFIG_ISL29125=m +# CONFIG_ISL76682 is not set CONFIG_HID_SENSOR_ALS=m CONFIG_HID_SENSOR_PROX=m CONFIG_JSA1212=m @@ -8474,6 +8766,7 @@ CONFIG_JSA1212=m # CONFIG_ROHM_BU27034 is not set CONFIG_RPR0521=m CONFIG_SENSORS_LM3533=m +# CONFIG_LTR390 is not set CONFIG_LTR501=m # CONFIG_LTRF216A is not set CONFIG_LV0104CS=m @@ -8500,7 +8793,9 @@ CONFIG_US5182D=m CONFIG_VCNL4000=m CONFIG_VCNL4035=m CONFIG_VEML6030=m +# CONFIG_VEML6040 is not set CONFIG_VEML6070=m +# CONFIG_VEML6075 is not set CONFIG_VL6180=m CONFIG_ZOPT2201=m # end of Light sensors @@ -8508,6 +8803,7 @@ CONFIG_ZOPT2201=m # # Magnetometer sensors # +# CONFIG_AF8133J is not set CONFIG_AK8974=m CONFIG_AK8975=m CONFIG_AK09911=m @@ -8543,6 +8839,7 @@ CONFIG_HID_SENSOR_INCLINOMETER_3D=m CONFIG_HID_SENSOR_DEVICE_ROTATION=m # end of Inclinometer sensors +# CONFIG_IIO_GTS_KUNIT_TEST is not set # CONFIG_IIO_FORMAT_KUNIT_TEST is not set # @@ -8588,6 +8885,7 @@ CONFIG_MCP41010=m # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set CONFIG_BMP280=m CONFIG_BMP280_I2C=m CONFIG_BMP280_SPI=m @@ -8595,6 +8893,7 @@ CONFIG_DLHL60D=m CONFIG_DPS310=m CONFIG_HID_SENSOR_PRESS=m # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set CONFIG_ICP10100=m # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -8602,6 +8901,7 @@ CONFIG_ICP10100=m # CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -8617,7 +8917,7 @@ CONFIG_ICP10100=m # # Proximity and distance sensors # -CONFIG_CROS_EC_MKBP_PROXIMITY=m +# CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set CONFIG_ISL29501=m # CONFIG_LIDAR_LITE_V2 is not set @@ -8632,6 +8932,7 @@ CONFIG_PING=m # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set CONFIG_VL53L0X_I2C=m +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -8639,6 +8940,7 @@ CONFIG_VL53L0X_I2C=m # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -8650,6 +8952,7 @@ CONFIG_MAXIM_THERMOCOUPLE=m CONFIG_HID_SENSOR_TEMP=m CONFIG_MLX90614=m CONFIG_MLX90632=m +# CONFIG_MLX90635 is not set CONFIG_TMP006=m CONFIG_TMP007=m CONFIG_TMP117=m @@ -8658,17 +8961,18 @@ CONFIG_TSYS02D=m # CONFIG_MAX30208 is not set CONFIG_MAX31856=m CONFIG_MAX31865=m +# CONFIG_MCP9600 is not set # end of Temperature sensors # CONFIG_NTB is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set CONFIG_PWM_ATMEL_TCB=m -# CONFIG_PWM_CLK is not set -CONFIG_PWM_CROS_EC=m +CONFIG_PWM_CLK=m +CONFIG_PWM_DWC_CORE=m CONFIG_PWM_DWC=m # CONFIG_PWM_FSL_FTM is not set +CONFIG_PWM_GPIO=m # CONFIG_PWM_IQS620A is not set CONFIG_PWM_NTXEC=m # CONFIG_PWM_PCA9685 is not set @@ -8684,8 +8988,9 @@ CONFIG_ARM_GIC_MAX_NR=1 CONFIG_ARM_GIC_V2M=y CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_IRQ_MSI_LIB=y # CONFIG_AL_FIC is not set +# CONFIG_LAN966X_OIC is not set # CONFIG_XILINX_INTC is not set CONFIG_PARTITION_PERCPU=y # end of IRQ chip support @@ -8693,6 +8998,7 @@ CONFIG_PARTITION_PERCPU=y # CONFIG_IPACK_BUS is not set CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_GPIO is not set CONFIG_RESET_SCMI=y # CONFIG_RESET_SIMPLE is not set # CONFIG_RESET_TI_SYSCON is not set @@ -8733,9 +9039,11 @@ CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY=m CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=m CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y CONFIG_PHY_ROCKCHIP_PCIE=y -CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y +CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=m +CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=m CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PHY_ROCKCHIP_USB=y +CONFIG_PHY_ROCKCHIP_USBDP=m CONFIG_PHY_SAMSUNG_USB2=y # CONFIG_PHY_TUSB1210 is not set # end of PHY Subsystem @@ -8751,14 +9059,17 @@ CONFIG_ARM_CCI_PMU=m # CONFIG_ARM_CCI5xx_PMU is not set # CONFIG_ARM_CCN is not set # CONFIG_ARM_CMN is not set +# CONFIG_ARM_NI is not set CONFIG_ARM_PMU=y -# CONFIG_ARM_SMMU_V3_PMU is not set +CONFIG_ARM_SMMU_V3_PMU=m CONFIG_ARM_PMUV3=y # CONFIG_ARM_DSU_PMU is not set # CONFIG_ARM_SPE_PMU is not set CONFIG_HISI_PCIE_PMU=m # CONFIG_HNS3_PMU is not set +CONFIG_DWC_PCIE_PMU=y # CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set +# CONFIG_CXL_PMU is not set # end of Performance monitor support CONFIG_RAS=y @@ -8779,20 +9090,22 @@ CONFIG_DEV_DAX=m CONFIG_DEV_DAX_CXL=m CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=m # end of Layout Types # CONFIG_NVMEM_RAVE_SP_EEPROM is not set CONFIG_NVMEM_RMEM=m -CONFIG_NVMEM_ROCKCHIP_EFUSE=y -CONFIG_NVMEM_ROCKCHIP_OTP=y +CONFIG_NVMEM_ROCKCHIP_EFUSE=m +CONFIG_NVMEM_ROCKCHIP_OTP=m CONFIG_NVMEM_SPMI_SDAM=m -CONFIG_NVMEM_U_BOOT_ENV=y +CONFIG_NVMEM_U_BOOT_ENV=m # # HW tracing support @@ -8829,6 +9142,7 @@ CONFIG_MOST_SND=m # CONFIG_PECI is not set # CONFIG_HTE is not set # CONFIG_CDX_BUS is not set +CONFIG_DPLL=y # end of Device Drivers # @@ -8837,6 +9151,7 @@ CONFIG_MOST_SND=m CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y CONFIG_EXT2_FS=y @@ -8884,7 +9199,6 @@ CONFIG_OCFS2_DEBUG_MASKLOG=y # CONFIG_OCFS2_DEBUG_FS is not set CONFIG_BTRFS_FS=y CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set @@ -8905,6 +9219,17 @@ CONFIG_F2FS_FS_LZ4HC=y CONFIG_F2FS_FS_ZSTD=y CONFIG_F2FS_IOSTAT=y # CONFIG_F2FS_UNFAIR_RWSEM is not set +CONFIG_BCACHEFS_FS=m +CONFIG_BCACHEFS_QUOTA=y +CONFIG_BCACHEFS_ERASURE_CODING=y +CONFIG_BCACHEFS_POSIX_ACL=y +# CONFIG_BCACHEFS_DEBUG is not set +# CONFIG_BCACHEFS_TESTS is not set +# CONFIG_BCACHEFS_LOCK_TIME_STATS is not set +# CONFIG_BCACHEFS_NO_LATENCY_ACCT is not set +CONFIG_BCACHEFS_SIX_OPTIMISTIC_SPIN=y +# CONFIG_BCACHEFS_PATH_TRACEPOINTS is not set +# CONFIG_MEAN_AND_VARIANCE_UNIT_TEST is not set CONFIG_ZONEFS_FS=m CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y @@ -8930,6 +9255,7 @@ CONFIG_AUTOFS_FS=m CONFIG_FUSE_FS=y CONFIG_CUSE=m CONFIG_VIRTIO_FS=m +CONFIG_FUSE_PASSTHROUGH=y CONFIG_OVERLAY_FS=y # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -8943,13 +9269,13 @@ CONFIG_OVERLAY_FS_XINO_AUTO=y # CONFIG_NETFS_SUPPORT=m CONFIG_NETFS_STATS=y -CONFIG_FSCACHE=m +# CONFIG_NETFS_DEBUG is not set +CONFIG_FSCACHE=y CONFIG_FSCACHE_STATS=y -# CONFIG_FSCACHE_DEBUG is not set CONFIG_CACHEFILES=m # CONFIG_CACHEFILES_DEBUG is not set # CONFIG_CACHEFILES_ERROR_INJECTION is not set -# CONFIG_CACHEFILES_ONDEMAND is not set +CONFIG_CACHEFILES_ONDEMAND=y # end of Caches # @@ -8973,11 +9299,11 @@ CONFIG_FAT_DEFAULT_UTF8=y CONFIG_FAT_KUNIT_TEST=m CONFIG_EXFAT_FS=m CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" -# CONFIG_NTFS_FS is not set CONFIG_NTFS3_FS=m # CONFIG_NTFS3_64BIT_CLUSTER is not set CONFIG_NTFS3_LZX_XPRESS=y CONFIG_NTFS3_FS_POSIX_ACL=y +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -9000,6 +9326,7 @@ CONFIG_TMPFS_XATTR=y CONFIG_ARCH_SUPPORTS_HUGETLBFS=y CONFIG_HUGETLBFS=y CONFIG_HUGETLB_PAGE=y +CONFIG_HUGETLB_PMD_PAGE_TABLE_SHARING=y CONFIG_ARCH_HAS_GIGANTIC_PAGE=y CONFIG_CONFIGFS_FS=y CONFIG_EFIVAR_FS=m @@ -9087,7 +9414,9 @@ CONFIG_EROFS_FS=m CONFIG_EROFS_FS_XATTR=y CONFIG_EROFS_FS_POSIX_ACL=y CONFIG_EROFS_FS_SECURITY=y +CONFIG_EROFS_FS_BACKED_BY_FILE=y # CONFIG_EROFS_FS_ZIP is not set +CONFIG_EROFS_FS_ONDEMAND=y CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=m CONFIG_NFS_V2=m @@ -9119,11 +9448,13 @@ CONFIG_NFSD_SCSILAYOUT=y CONFIG_NFSD_FLEXFILELAYOUT=y # CONFIG_NFSD_V4_2_INTER_SSC is not set CONFIG_NFSD_V4_SECURITY_LABEL=y +# CONFIG_NFSD_LEGACY_CLIENT_TRACKING is not set CONFIG_GRACE_PERIOD=m CONFIG_LOCKD=m CONFIG_LOCKD_V4=y CONFIG_NFS_ACL_SUPPORT=m CONFIG_NFS_COMMON=y +# CONFIG_NFS_LOCALIO is not set CONFIG_NFS_V4_2_SSC_HELPER=y CONFIG_SUNRPC=m CONFIG_SUNRPC_GSS=m @@ -9151,6 +9482,7 @@ CONFIG_CIFS_DEBUG=y CONFIG_CIFS_DFS_UPCALL=y # CONFIG_CIFS_SWN_UPCALL is not set CONFIG_CIFS_FSCACHE=y +# CONFIG_CIFS_COMPRESSION is not set CONFIG_SMB_SERVER=m CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y CONFIG_SMB_SERVER_KERBEROS5=y @@ -9281,6 +9613,7 @@ CONFIG_SECURITY_YAMA=y CONFIG_SECURITY_SAFESETID=y # CONFIG_SECURITY_LOCKDOWN_LSM is not set # CONFIG_SECURITY_LANDLOCK is not set +# CONFIG_SECURITY_IPE is not set CONFIG_INTEGRITY=y CONFIG_INTEGRITY_SIGNATURE=y CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y @@ -9306,7 +9639,12 @@ CONFIG_LSM="lockdown,yama,integrity,apparmor" # # Memory initialization # +CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y CONFIG_INIT_STACK_NONE=y +# CONFIG_INIT_STACK_ALL_PATTERN is not set +# CONFIG_INIT_STACK_ALL_ZERO is not set CONFIG_INIT_ON_ALLOC_DEFAULT_ON=y # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y @@ -9378,7 +9716,6 @@ CONFIG_CRYPTO_ECC=y CONFIG_CRYPTO_ECDH=y CONFIG_CRYPTO_ECDSA=m CONFIG_CRYPTO_ECRDSA=m -# CONFIG_CRYPTO_SM2 is not set CONFIG_CRYPTO_CURVE25519=m # end of Public-key cryptography @@ -9386,25 +9723,25 @@ CONFIG_CRYPTO_CURVE25519=m # Block ciphers # CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_AES_TI=y -CONFIG_CRYPTO_ANUBIS=y +CONFIG_CRYPTO_AES_TI=m +CONFIG_CRYPTO_ANUBIS=m # CONFIG_CRYPTO_ARIA is not set -CONFIG_CRYPTO_BLOWFISH=y -CONFIG_CRYPTO_BLOWFISH_COMMON=y -CONFIG_CRYPTO_CAMELLIA=y -CONFIG_CRYPTO_CAST_COMMON=y -CONFIG_CRYPTO_CAST5=y -CONFIG_CRYPTO_CAST6=y +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_BLOWFISH_COMMON=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST_COMMON=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=y -CONFIG_CRYPTO_KHAZAD=y -CONFIG_CRYPTO_SEED=y -CONFIG_CRYPTO_SERPENT=y +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_SM4=m CONFIG_CRYPTO_SM4_GENERIC=m -CONFIG_CRYPTO_TEA=y -CONFIG_CRYPTO_TWOFISH=y -CONFIG_CRYPTO_TWOFISH_COMMON=y +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m # end of Block ciphers # @@ -9414,14 +9751,12 @@ CONFIG_CRYPTO_ADIANTUM=m CONFIG_CRYPTO_ARC4=m CONFIG_CRYPTO_CHACHA20=y CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CFB=m CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=y CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_OFB=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_XTS=y CONFIG_CRYPTO_NHPOLY1305=m @@ -9448,11 +9783,11 @@ CONFIG_CRYPTO_BLAKE2B=y CONFIG_CRYPTO_CMAC=y CONFIG_CRYPTO_GHASH=y CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=y CONFIG_CRYPTO_POLY1305=y -CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y @@ -9460,9 +9795,9 @@ CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SM3=m CONFIG_CRYPTO_SM3_GENERIC=m CONFIG_CRYPTO_STREEBOG=m -CONFIG_CRYPTO_VMAC=y -CONFIG_CRYPTO_WP512=y -CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XXHASH=y # end of Hashes, digests, and MACs @@ -9496,7 +9831,9 @@ CONFIG_CRYPTO_DRBG_HASH=y CONFIG_CRYPTO_DRBG_CTR=y CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation @@ -9510,7 +9847,6 @@ CONFIG_CRYPTO_USER_API_RNG=m # CONFIG_CRYPTO_USER_API_RNG_CAVP is not set CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y -CONFIG_CRYPTO_STATS=y # end of Userspace interface CONFIG_CRYPTO_HASH_INFO=y @@ -9526,7 +9862,7 @@ CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA256_ARM64=y CONFIG_CRYPTO_SHA2_ARM64_CE=y CONFIG_CRYPTO_SHA512_ARM64=y -# CONFIG_CRYPTO_SHA512_ARM64_CE is not set +CONFIG_CRYPTO_SHA512_ARM64_CE=m CONFIG_CRYPTO_SHA3_ARM64=m CONFIG_CRYPTO_SM3_NEON=m CONFIG_CRYPTO_SM3_ARM64_CE=m @@ -9542,7 +9878,7 @@ CONFIG_CRYPTO_SM4_ARM64_NEON_BLK=m CONFIG_CRYPTO_AES_ARM64_CE_CCM=y # CONFIG_CRYPTO_SM4_ARM64_CE_CCM is not set # CONFIG_CRYPTO_SM4_ARM64_CE_GCM is not set -# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m # end of Accelerated Cryptographic Algorithms for CPU (arm64) CONFIG_CRYPTO_HW=y @@ -9556,6 +9892,7 @@ CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set # CONFIG_CRYPTO_DEV_QAT_C62X is not set # CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_420XX is not set # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set @@ -9588,6 +9925,7 @@ CONFIG_SYSTEM_TRUSTED_KEYS="" CONFIG_SYSTEM_EXTRA_CERTIFICATE=y CONFIG_SYSTEM_EXTRA_CERTIFICATE_SIZE=4096 CONFIG_SECONDARY_TRUSTED_KEYRING=y +# CONFIG_SECONDARY_TRUSTED_KEYRING_SIGNED_BY_BUILTIN is not set CONFIG_SYSTEM_BLACKLIST_KEYRING=y CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" # CONFIG_SYSTEM_REVOCATION_LIST is not set @@ -9611,7 +9949,6 @@ CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y @@ -9677,11 +10014,12 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y -# CONFIG_XZ_DEC_MICROLZMA is not set +CONFIG_XZ_DEC_RISCV=y +CONFIG_XZ_DEC_MICROLZMA=y CONFIG_XZ_DEC_BCJ=y CONFIG_XZ_DEC_TEST=m CONFIG_DECOMPRESS_GZIP=y @@ -9705,25 +10043,26 @@ CONFIG_INTERVAL_TREE=y CONFIG_INTERVAL_TREE_SPAN_ITER=y CONFIG_XARRAY_MULTI=y CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_CLOSURES=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y -# CONFIG_DMA_RESTRICTED_POOL is not set +CONFIG_DMA_NEED_SYNC=y +CONFIG_DMA_RESTRICTED_POOL=y CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_DIRECT_REMAP=y @@ -9759,6 +10098,7 @@ CONFIG_UCS2_STRING=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_VDSO_GETRANDOM=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y @@ -9779,12 +10119,15 @@ CONFIG_SG_POOL=y CONFIG_MEMREGION=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y CONFIG_POLYNOMIAL=m +CONFIG_FIRMWARE_TABLE=y # # Kernel hacking @@ -9812,7 +10155,7 @@ CONFIG_DEBUG_MISC=y # # Compile-time checks and compiler options # -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y CONFIG_DEBUG_INFO_NONE=y # CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -9843,7 +10186,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y CONFIG_HAVE_KCSAN_COMPILER=y @@ -9888,6 +10231,7 @@ CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_HAVE_ARCH_KASAN_HW_TAGS=y @@ -9960,6 +10304,7 @@ CONFIG_STACKTRACE=y # CONFIG_DEBUG_PLIST is not set # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CLOSURES is not set # CONFIG_DEBUG_MAPLE_TREE is not set # end of Debug kernel data structures @@ -9980,6 +10325,7 @@ CONFIG_RCU_TRACE=y # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set # CONFIG_DEBUG_CGROUP_REF is not set +CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_NOP_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y @@ -10057,6 +10403,7 @@ CONFIG_FUNCTION_ERROR_INJECTION=y # CONFIG_FAULT_INJECTION is not set CONFIG_ARCH_HAS_KCOV=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y +# CONFIG_KCOV is not set CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_DHRY is not set # CONFIG_LKDTM is not set @@ -10065,6 +10412,7 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_SORT is not set CONFIG_TEST_DIV64=m +# CONFIG_TEST_MULDIV64 is not set # CONFIG_TEST_IOV_ITER is not set # CONFIG_KPROBES_SANITY_TEST is not set # CONFIG_BACKTRACE_SELF_TEST is not set @@ -10076,8 +10424,8 @@ CONFIG_REED_SOLOMON_TEST=m # CONFIG_ATOMIC64_SELFTEST is not set CONFIG_ASYNC_RAID6_TEST=m # CONFIG_TEST_HEXDUMP is not set -# CONFIG_STRING_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_STRING_KUNIT_TEST is not set +# CONFIG_STRING_HELPERS_KUNIT_TEST is not set # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_PRINTF is not set CONFIG_TEST_SCANF=m @@ -10090,7 +10438,6 @@ CONFIG_TEST_XARRAY=m # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set CONFIG_TEST_VMALLOC=m -# CONFIG_TEST_USER_COPY is not set CONFIG_TEST_BPF=m CONFIG_TEST_BLACKHOLE_DEV=m # CONFIG_FIND_BIT_BENCHMARK is not set @@ -10109,14 +10456,12 @@ CONFIG_CMDLINE_KUNIT_TEST=m CONFIG_SLUB_KUNIT_TEST=m CONFIG_RATIONAL_KUNIT_TEST=m CONFIG_MEMCPY_KUNIT_TEST=m -# CONFIG_MEMCPY_SLOW_KUNIT_TEST is not set # CONFIG_IS_SIGNED_TYPE_KUNIT_TEST is not set # CONFIG_OVERFLOW_KUNIT_TEST is not set # CONFIG_STACKINIT_KUNIT_TEST is not set # CONFIG_FORTIFY_KUNIT_TEST is not set -# CONFIG_STRCAT_KUNIT_TEST is not set -# CONFIG_STRSCPY_KUNIT_TEST is not set # CONFIG_SIPHASH_KUNIT_TEST is not set +# CONFIG_USERCOPY_KUNIT_TEST is not set # CONFIG_TEST_UDELAY is not set # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_DYNAMIC_DEBUG is not set @@ -10124,6 +10469,8 @@ CONFIG_MEMCPY_KUNIT_TEST=m CONFIG_TEST_MEMCAT_P=m # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set +# CONFIG_TEST_FPU is not set +# CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y CONFIG_MEMTEST=y # end of Kernel Testing and Coverage @@ -10133,3 +10480,5 @@ CONFIG_MEMTEST=y # # end of Rust hacking # end of Kernel hacking + +# CONFIG_INT_POW_TEST is not set diff --git a/config/kernel/linux-rockchip64-edge.config b/config/kernel/linux-rockchip64-edge.config index 4eaae942d505..4c2380b9b52a 100644 --- a/config/kernel/linux-rockchip64-edge.config +++ b/config/kernel/linux-rockchip64-edge.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.12.1 Kernel Configuration +# Linux/arm64 6.12.4 Kernel Configuration # CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (Ubuntu 13.2.0-23ubuntu4) 13.2.0" CONFIG_CC_IS_GCC=y @@ -11,8 +11,8 @@ CONFIG_AS_VERSION=24200 CONFIG_LD_IS_BFD=y CONFIG_LD_VERSION=24200 CONFIG_LLD_VERSION=0 -CONFIG_RUSTC_VERSION=0 -CONFIG_RUSTC_LLVM_VERSION=0 +CONFIG_RUSTC_VERSION=107500 +CONFIG_RUSTC_LLVM_VERSION=170006 CONFIG_CC_CAN_LINK=y CONFIG_CC_CAN_LINK_STATIC=y CONFIG_GCC_ASM_GOTO_OUTPUT_BROKEN=y @@ -113,13 +113,15 @@ CONFIG_PREEMPT=y CONFIG_PREEMPT_COUNT=y CONFIG_PREEMPTION=y # CONFIG_PREEMPT_DYNAMIC is not set +CONFIG_SCHED_CORE=y # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -# CONFIG_IRQ_TIME_ACCOUNTING is not set +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_SCHED_AVG_IRQ=y CONFIG_SCHED_HW_PRESSURE=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y @@ -151,7 +153,7 @@ CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_IKHEADERS=m -CONFIG_LOG_BUF_SHIFT=17 +CONFIG_LOG_BUF_SHIFT=18 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 # CONFIG_PRINTK_INDEX is not set CONFIG_GENERIC_SCHED_CLOCK=y @@ -198,7 +200,7 @@ CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y CONFIG_CGROUP_BPF=y -# CONFIG_CGROUP_MISC is not set +CONFIG_CGROUP_MISC=y # CONFIG_CGROUP_DEBUG is not set CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y @@ -208,7 +210,7 @@ CONFIG_IPC_NS=y CONFIG_USER_NS=y CONFIG_PID_NS=y CONFIG_NET_NS=y -# CONFIG_CHECKPOINT_RESTORE is not set +CONFIG_CHECKPOINT_RESTORE=y CONFIG_SCHED_AUTOGROUP=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y @@ -283,7 +285,8 @@ CONFIG_CRASH_RESERVE=y CONFIG_VMCORE_INFO=y CONFIG_KEXEC_CORE=y CONFIG_KEXEC=y -# CONFIG_KEXEC_FILE is not set +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set CONFIG_CRASH_DUMP=y # end of Kexec and crash features # end of General setup @@ -431,8 +434,8 @@ CONFIG_ARM64_PA_BITS=48 # CONFIG_CPU_BIG_ENDIAN is not set CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_SCHED_MC=y -# CONFIG_SCHED_CLUSTER is not set -# CONFIG_SCHED_SMT is not set +CONFIG_SCHED_CLUSTER=y +CONFIG_SCHED_SMT=y CONFIG_NR_CPUS=256 CONFIG_HOTPLUG_CPU=y CONFIG_NUMA=y @@ -447,9 +450,10 @@ CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_HW_PERF_EVENTS=y CONFIG_CC_HAVE_SHADOW_CALL_STACK=y CONFIG_PARAVIRT=y -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set +CONFIG_PARAVIRT_TIME_ACCOUNTING=y CONFIG_ARCH_SUPPORTS_KEXEC=y CONFIG_ARCH_SUPPORTS_KEXEC_FILE=y +CONFIG_ARCH_SELECTS_KEXEC_FILE=y CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y @@ -827,7 +831,7 @@ CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_THROTTLING=y CONFIG_BLK_WBT=y CONFIG_BLK_WBT_MQ=y -# CONFIG_BLK_CGROUP_IOLATENCY is not set +CONFIG_BLK_CGROUP_IOLATENCY=y # CONFIG_BLK_CGROUP_FC_APPID is not set # CONFIG_BLK_CGROUP_IOCOST is not set # CONFIG_BLK_CGROUP_IOPRIO is not set @@ -993,6 +997,7 @@ CONFIG_ARCH_HAS_ZONE_DMA_SET=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y CONFIG_GET_FREE_REGION=y +CONFIG_VMAP_PFN=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y CONFIG_ARCH_HAS_PKEYS=y CONFIG_ARCH_USES_PG_ARCH_2=y @@ -1014,6 +1019,7 @@ CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_IOMMU_MM_DATA=y CONFIG_EXECMEM=y CONFIG_NUMA_MEMBLKS=y # CONFIG_NUMA_EMU is not set @@ -1757,7 +1763,7 @@ CONFIG_NET_FLOW_LIMIT=y # Network testing # CONFIG_NET_PKTGEN=m -CONFIG_NET_DROP_MONITOR=y +CONFIG_NET_DROP_MONITOR=m # end of Network testing # end of Networking options @@ -2051,8 +2057,9 @@ CONFIG_PCIE_DW_EP=y # CONFIG_PCI_MESON is not set # CONFIG_PCI_HISI is not set # CONFIG_PCIE_KIRIN is not set -# CONFIG_PCIE_DW_PLAT_HOST is not set -# CONFIG_PCIE_DW_PLAT_EP is not set +CONFIG_PCIE_DW_PLAT=y +CONFIG_PCIE_DW_PLAT_HOST=y +CONFIG_PCIE_DW_PLAT_EP=y CONFIG_PCIE_ROCKCHIP_DW=y CONFIG_PCIE_ROCKCHIP_DW_HOST=y CONFIG_PCIE_ROCKCHIP_DW_EP=y @@ -2225,7 +2232,7 @@ CONFIG_EFI_GENERIC_STUB=y # CONFIG_EFI_ZBOOT is not set CONFIG_EFI_ARMSTUB_DTB_LOADER=y # CONFIG_EFI_BOOTLOADER_CONTROL is not set -CONFIG_EFI_CAPSULE_LOADER=y +CONFIG_EFI_CAPSULE_LOADER=m # CONFIG_EFI_TEST is not set # CONFIG_RESET_ATTACK_MITIGATION is not set # CONFIG_EFI_DISABLE_PCI_DMA is not set @@ -2414,7 +2421,7 @@ CONFIG_BLK_DEV_RAM_COUNT=8 CONFIG_BLK_DEV_RAM_SIZE=4096 # CONFIG_CDROM_PKTCDVD is not set CONFIG_ATA_OVER_ETH=m -CONFIG_XEN_BLKDEV_FRONTEND=y +CONFIG_XEN_BLKDEV_FRONTEND=m CONFIG_XEN_BLKDEV_BACKEND=m CONFIG_VIRTIO_BLK=y CONFIG_BLK_DEV_RBD=m @@ -2719,7 +2726,7 @@ CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m CONFIG_MD_CLUSTER=m -CONFIG_BCACHE=y +CONFIG_BCACHE=m # CONFIG_BCACHE_DEBUG is not set # CONFIG_BCACHE_ASYNC_REGISTRATION is not set CONFIG_BLK_DEV_DM_BUILTIN=y @@ -2811,7 +2818,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y # CONFIG_NETCONSOLE_EXTENDED_LOG is not set CONFIG_NETPOLL=y CONFIG_NET_POLL_CONTROLLER=y -CONFIG_TUN=y +CONFIG_TUN=m CONFIG_TAP=m CONFIG_TUN_VNET_CROSS_LE=y CONFIG_VETH=m @@ -2819,6 +2826,7 @@ CONFIG_VIRTIO_NET=m CONFIG_NLMON=m # CONFIG_NETKIT is not set CONFIG_NET_VRF=m +# CONFIG_VSOCKMON is not set CONFIG_MHI_NET=m # CONFIG_ARCNET is not set CONFIG_ATM_DRIVERS=y @@ -2909,7 +2917,7 @@ CONFIG_NET_VENDOR_AMAZON=y CONFIG_NET_VENDOR_AMD=y # CONFIG_AMD8111_ETH is not set # CONFIG_PCNET32 is not set -CONFIG_AMD_XGBE=y +CONFIG_AMD_XGBE=m # CONFIG_AMD_XGBE_DCB is not set # CONFIG_PDS_CORE is not set CONFIG_NET_VENDOR_AQUANTIA=y @@ -2998,10 +3006,10 @@ CONFIG_NET_VENDOR_I825XX=y CONFIG_NET_VENDOR_INTEL=y # CONFIG_E100 is not set # CONFIG_E1000 is not set -CONFIG_E1000E=y -CONFIG_IGB=y +CONFIG_E1000E=m +CONFIG_IGB=m CONFIG_IGB_HWMON=y -CONFIG_IGBVF=y +CONFIG_IGBVF=m CONFIG_IXGBE=m CONFIG_IXGBE_HWMON=y # CONFIG_IXGBE_DCB is not set @@ -3019,9 +3027,9 @@ CONFIG_NET_VENDOR_ADI=y CONFIG_NET_VENDOR_LITEX=y CONFIG_LITEX_LITEETH=m CONFIG_NET_VENDOR_MARVELL=y -CONFIG_MVMDIO=y +CONFIG_MVMDIO=m # CONFIG_SKGE is not set -CONFIG_SKY2=y +CONFIG_SKY2=m # CONFIG_SKY2_DEBUG is not set CONFIG_OCTEONTX2_MBOX=m # CONFIG_OCTEONTX2_AF is not set @@ -3417,12 +3425,12 @@ CONFIG_ATH9K_AHB=y CONFIG_ATH9K_DYNACK=y CONFIG_ATH9K_WOW=y CONFIG_ATH9K_RFKILL=y -# CONFIG_ATH9K_CHANNEL_CONTEXT is not set +CONFIG_ATH9K_CHANNEL_CONTEXT=y CONFIG_ATH9K_PCOEM=y CONFIG_ATH9K_PCI_NO_EEPROM=m CONFIG_ATH9K_HTC=m # CONFIG_ATH9K_HTC_DEBUGFS is not set -# CONFIG_ATH9K_HWRNG is not set +CONFIG_ATH9K_HWRNG=y CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_WPC=y @@ -3546,14 +3554,15 @@ CONFIG_MT76x2U=m CONFIG_MT7603E=m CONFIG_MT7615_COMMON=m CONFIG_MT7615E=m -# CONFIG_MT7663U is not set -# CONFIG_MT7663S is not set +CONFIG_MT7663_USB_SDIO_COMMON=m +CONFIG_MT7663U=m +CONFIG_MT7663S=m CONFIG_MT7915E=m CONFIG_MT7921_COMMON=m CONFIG_MT7921E=m CONFIG_MT7921S=m CONFIG_MT7921U=m -# CONFIG_MT7996E is not set +CONFIG_MT7996E=m CONFIG_MT7925_COMMON=m CONFIG_MT7925E=m CONFIG_MT7925U=m @@ -3626,7 +3635,7 @@ CONFIG_RTW88_8822C=m CONFIG_RTW88_8723X=m CONFIG_RTW88_8723D=m CONFIG_RTW88_8821C=m -# CONFIG_RTW88_8822BE is not set +CONFIG_RTW88_8822BE=m CONFIG_RTW88_8822BS=m CONFIG_RTW88_8822BU=m CONFIG_RTW88_8822CE=m @@ -3799,7 +3808,6 @@ CONFIG_KEYBOARD_IQS62X=m # CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set # CONFIG_KEYBOARD_XTKBD is not set -CONFIG_KEYBOARD_CROS_EC=y # CONFIG_KEYBOARD_CAP11XX is not set # CONFIG_KEYBOARD_BCM is not set CONFIG_KEYBOARD_CYPRESS_SF=m @@ -3987,7 +3995,7 @@ CONFIG_INPUT_UINPUT=m # CONFIG_INPUT_PCF8574 is not set # CONFIG_INPUT_PWM_BEEPER is not set # CONFIG_INPUT_PWM_VIBRA is not set -CONFIG_INPUT_RK805_PWRKEY=y +CONFIG_INPUT_RK805_PWRKEY=m # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set CONFIG_INPUT_DA7280_HAPTICS=m # CONFIG_INPUT_ADXL34X is not set @@ -4177,7 +4185,7 @@ CONFIG_I2C_MUX_MLXCPLD=m CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_SMBUS=m -CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_ALGOBIT=m # # I2C Hardware Bus support @@ -4212,7 +4220,7 @@ CONFIG_I2C_DESIGNWARE_CORE=y CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_EMEV2 is not set -CONFIG_I2C_GPIO=y +CONFIG_I2C_GPIO=m # CONFIG_I2C_GPIO_FAULT_INJECTOR is not set # CONFIG_I2C_HISI is not set # CONFIG_I2C_NOMADIK is not set @@ -4237,7 +4245,6 @@ CONFIG_I2C_TINY_USB=m # # Other I2C/SMBus bus drivers # -CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_VIRTIO=m # end of I2C Hardware Bus support @@ -4357,7 +4364,7 @@ CONFIG_PINCTRL_MAX77620=y # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set # CONFIG_PINCTRL_OCELOT is not set -CONFIG_PINCTRL_RK805=y +CONFIG_PINCTRL_RK805=m CONFIG_PINCTRL_ROCKCHIP=y # CONFIG_PINCTRL_SCMI is not set CONFIG_PINCTRL_SINGLE=y @@ -4430,7 +4437,6 @@ CONFIG_GPIO_TPIC2810=m CONFIG_GPIO_ADP5520=m CONFIG_GPIO_BD71815=m CONFIG_GPIO_BD71828=m -# CONFIG_GPIO_CROS_EC is not set CONFIG_GPIO_DLN2=m CONFIG_GPIO_MAX77620=y CONFIG_GPIO_MAX77650=m @@ -4441,7 +4447,7 @@ CONFIG_GPIO_TQMX86=m # # PCI GPIO expanders # -CONFIG_GPIO_BT8XX=m +# CONFIG_GPIO_BT8XX is not set CONFIG_GPIO_PCI_IDIO_16=m CONFIG_GPIO_PCIE_IDIO_24=m CONFIG_GPIO_RDC321X=m @@ -4522,16 +4528,17 @@ CONFIG_W1_SLAVE_DS28E17=m CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_AS3722 is not set CONFIG_POWER_RESET_ATC260X=m -# CONFIG_POWER_RESET_GPIO is not set -# CONFIG_POWER_RESET_GPIO_RESTART is not set +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y # CONFIG_POWER_RESET_LTC2952 is not set -# CONFIG_POWER_RESET_REGULATOR is not set -# CONFIG_POWER_RESET_RESTART is not set +CONFIG_POWER_RESET_REGULATOR=y +CONFIG_POWER_RESET_RESTART=y CONFIG_POWER_RESET_VEXPRESS=y CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_SYSCON=y -# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set -# CONFIG_SYSCON_REBOOT_MODE is not set +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_REBOOT_MODE=y +CONFIG_SYSCON_REBOOT_MODE=y # CONFIG_NVMEM_REBOOT_MODE is not set # CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y @@ -4585,8 +4592,6 @@ CONFIG_BATTERY_RT5033=m # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_RT9467 is not set # CONFIG_CHARGER_RT9471 is not set -# CONFIG_CHARGER_CROS_USBPD is not set -CONFIG_CHARGER_CROS_PCHG=m CONFIG_CHARGER_UCS1002=m # CONFIG_CHARGER_BD99954 is not set # CONFIG_RN5T618_POWER is not set @@ -4627,7 +4632,6 @@ CONFIG_SENSORS_ATXP1=m # CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set CONFIG_SENSORS_CORSAIR_PSU=m -CONFIG_SENSORS_CROS_EC=y CONFIG_SENSORS_DRIVETEMP=m CONFIG_SENSORS_DS620=m CONFIG_SENSORS_DS1621=m @@ -4859,6 +4863,7 @@ CONFIG_THERMAL_MMIO=m # CONFIG_MAX77620_THERMAL is not set CONFIG_ROCKCHIP_THERMAL=y # CONFIG_GENERIC_ADC_THERMAL is not set +CONFIG_KHADAS_MCU_FAN_THERMAL=m CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y # CONFIG_WATCHDOG_NOWAYOUT is not set @@ -4877,8 +4882,7 @@ CONFIG_WATCHDOG_SYSFS=y # CONFIG_SOFT_WATCHDOG=m CONFIG_BD957XMUF_WATCHDOG=m -# CONFIG_CROS_EC_WATCHDOG is not set -# CONFIG_GPIO_WATCHDOG is not set +CONFIG_GPIO_WATCHDOG=m # CONFIG_XILINX_WATCHDOG is not set # CONFIG_XILINX_WINDOW_WATCHDOG is not set # CONFIG_ZIIRAVE_WATCHDOG is not set @@ -4946,7 +4950,6 @@ CONFIG_MFD_AAT2870_CORE=y # CONFIG_MFD_BCM590XX is not set # CONFIG_MFD_BD9571MWV is not set # CONFIG_MFD_AXP20X_I2C is not set -CONFIG_MFD_CROS_EC_DEV=y # CONFIG_MFD_CS42L43_I2C is not set # CONFIG_MFD_MADERA is not set # CONFIG_MFD_MAX5970 is not set @@ -5056,7 +5059,7 @@ CONFIG_MFD_ROHM_BD957XMUF=m CONFIG_MFD_STMFX=m CONFIG_MFD_ATC260X=m CONFIG_MFD_ATC260X_I2C=m -# CONFIG_MFD_KHADAS_MCU is not set +CONFIG_MFD_KHADAS_MCU=m CONFIG_MFD_QCOM_PM8008=m # CONFIG_MFD_CS40L50_I2C is not set # CONFIG_MFD_CS40L50_SPI is not set @@ -5074,7 +5077,7 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set # CONFIG_REGULATOR_NETLINK_EVENTS is not set CONFIG_REGULATOR_88PG86X=m -# CONFIG_REGULATOR_ACT8865 is not set +CONFIG_REGULATOR_ACT8865=y # CONFIG_REGULATOR_AD5398 is not set CONFIG_REGULATOR_AAT2870=m # CONFIG_REGULATOR_ARM_SCMI is not set @@ -5085,7 +5088,6 @@ CONFIG_REGULATOR_ATC260X=m CONFIG_REGULATOR_BD71815=m CONFIG_REGULATOR_BD71828=m CONFIG_REGULATOR_BD957XMUF=m -# CONFIG_REGULATOR_CROS_EC is not set CONFIG_REGULATOR_DA9121=m # CONFIG_REGULATOR_DA9210 is not set # CONFIG_REGULATOR_DA9211 is not set @@ -5204,15 +5206,15 @@ CONFIG_IR_TTUSBIR=m CONFIG_RC_ATI_REMOTE=m CONFIG_RC_LOOPBACK=m CONFIG_RC_XBOX_DVD=m -CONFIG_CEC_CORE=y +CONFIG_CEC_CORE=m CONFIG_CEC_NOTIFIER=y # # CEC support # +# CONFIG_MEDIA_CEC_RC is not set CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set -# CONFIG_CEC_CROS_EC is not set # CONFIG_CEC_GPIO is not set # CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set CONFIG_USB_PULSE8_CEC=m @@ -5512,7 +5514,7 @@ CONFIG_MEDIA_PLATFORM_DRIVERS=y CONFIG_SDR_PLATFORM_DRIVERS=y CONFIG_DVB_PLATFORM_DRIVERS=y CONFIG_V4L_MEM2MEM_DRIVERS=y -# CONFIG_VIDEO_MEM2MEM_DEINTERLACE is not set +CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m # # Allegro DVT media platform drivers @@ -5600,6 +5602,8 @@ CONFIG_VIDEO_ROCKCHIP_RGA=m # # Sunxi media platform drivers # +CONFIG_VIDEO_SYNOPSYS_HDMIRX=m +CONFIG_HDMIRX_LOAD_DEFAULT_EDID=y # # Texas Instruments drivers @@ -6112,21 +6116,21 @@ CONFIG_CHARLCD_BL_OFF=y # CONFIG_HT16K33 is not set # CONFIG_MAX6959 is not set # CONFIG_SEG_LED_GPIO is not set -CONFIG_DRM=y +CONFIG_DRM=m CONFIG_DRM_MIPI_DBI=m CONFIG_DRM_MIPI_DSI=y # CONFIG_DRM_DEBUG_MM is not set # CONFIG_DRM_KUNIT_TEST is not set -CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_KMS_HELPER=m # CONFIG_DRM_PANIC is not set # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set # CONFIG_DRM_DEBUG_MODESET_LOCK is not set CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set -# CONFIG_DRM_LOAD_EDID_FIRMWARE is not set +CONFIG_DRM_LOAD_EDID_FIRMWARE=y CONFIG_DRM_DISPLAY_DP_AUX_BUS=m -CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_DISPLAY_HELPER=m CONFIG_DRM_BRIDGE_CONNECTOR=y # CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set # CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set @@ -6134,9 +6138,11 @@ CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y CONFIG_DRM_TTM=m +CONFIG_DRM_EXEC=m +CONFIG_DRM_GPUVM=m CONFIG_DRM_VRAM_HELPER=m CONFIG_DRM_TTM_HELPER=m -CONFIG_DRM_GEM_DMA_HELPER=y +CONFIG_DRM_GEM_DMA_HELPER=m CONFIG_DRM_GEM_SHMEM_HELPER=m CONFIG_DRM_SCHED=m @@ -6163,12 +6169,13 @@ CONFIG_DRM_KOMEDA=m # CONFIG_DRM_XE is not set # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set -CONFIG_DRM_ROCKCHIP=y +CONFIG_DRM_ROCKCHIP=m CONFIG_ROCKCHIP_VOP=y CONFIG_ROCKCHIP_VOP2=y CONFIG_ROCKCHIP_ANALOGIX_DP=y CONFIG_ROCKCHIP_CDN_DP=y CONFIG_ROCKCHIP_DW_HDMI=y +CONFIG_ROCKCHIP_DW_HDMI_QP=y CONFIG_ROCKCHIP_DW_MIPI_DSI=y CONFIG_ROCKCHIP_INNO_HDMI=y CONFIG_ROCKCHIP_LVDS=y @@ -6295,7 +6302,6 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_CHIPONE_ICN6211=m # CONFIG_DRM_CHRONTEL_CH7033 is not set -CONFIG_DRM_CROS_EC_ANX7688=m CONFIG_DRM_DISPLAY_CONNECTOR=m # CONFIG_DRM_ITE_IT6505 is not set CONFIG_DRM_LONTIUM_LT8912B=m @@ -6313,7 +6319,7 @@ CONFIG_DRM_PARADE_PS8640=m # CONFIG_DRM_SIL_SII8620 is not set # CONFIG_DRM_SII902X is not set CONFIG_DRM_SII9234=m -# CONFIG_DRM_SIMPLE_BRIDGE is not set +CONFIG_DRM_SIMPLE_BRIDGE=m CONFIG_DRM_THINE_THC63LVD1024=m # CONFIG_DRM_TOSHIBA_TC358762 is not set CONFIG_DRM_TOSHIBA_TC358764=m @@ -6327,7 +6333,7 @@ CONFIG_DRM_TI_SN65DSI83=m CONFIG_DRM_TI_TPD12S015=m CONFIG_DRM_ANALOGIX_ANX6345=m CONFIG_DRM_ANALOGIX_ANX78XX=m -CONFIG_DRM_ANALOGIX_DP=y +CONFIG_DRM_ANALOGIX_DP=m # CONFIG_DRM_ANALOGIX_ANX7625 is not set CONFIG_DRM_I2C_ADV7511=m # CONFIG_DRM_I2C_ADV7511_AUDIO is not set @@ -6335,18 +6341,19 @@ CONFIG_DRM_I2C_ADV7511_CEC=y CONFIG_DRM_CDNS_DSI=m # CONFIG_DRM_CDNS_DSI_J721E is not set # CONFIG_DRM_CDNS_MHDP8546 is not set -CONFIG_DRM_DW_HDMI=y -# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI=m +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m CONFIG_DRM_DW_HDMI_I2S_AUDIO=m CONFIG_DRM_DW_HDMI_GP_AUDIO=m CONFIG_DRM_DW_HDMI_CEC=m -CONFIG_DRM_DW_MIPI_DSI=y +CONFIG_DRM_DW_HDMI_QP=m +CONFIG_DRM_DW_MIPI_DSI=m # end of Display Interface Bridges CONFIG_DRM_ETNAVIV=m CONFIG_DRM_ETNAVIV_THERMAL=y # CONFIG_DRM_HISI_HIBMC is not set -CONFIG_DRM_HISI_KIRIN=m +# CONFIG_DRM_HISI_KIRIN is not set # CONFIG_DRM_LOGICVC is not set # CONFIG_DRM_ARCPGU is not set CONFIG_DRM_BOCHS=m @@ -6368,13 +6375,13 @@ CONFIG_DRM_XEN=y CONFIG_DRM_XEN_FRONTEND=m CONFIG_DRM_LIMA=m CONFIG_DRM_PANFROST=m -# CONFIG_DRM_PANTHOR is not set +CONFIG_DRM_PANTHOR=m CONFIG_DRM_TIDSS=m CONFIG_DRM_GUD=m # CONFIG_DRM_SSD130X is not set # CONFIG_DRM_POWERVR is not set # CONFIG_DRM_WERROR is not set -CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=m # # Frame buffer Devices @@ -6432,6 +6439,7 @@ CONFIG_FB_SYS_IMAGEBLIT=y CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y +CONFIG_FB_DMAMEM_HELPERS_DEFERRED=y CONFIG_FB_IOMEM_FOPS=y CONFIG_FB_IOMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS=y @@ -6743,7 +6751,6 @@ CONFIG_SND_SOC_ALC5623=m CONFIG_SND_SOC_BD28623=m # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set -CONFIG_SND_SOC_CROS_EC_CODEC=m # CONFIG_SND_SOC_CS_AMP_LIB_TEST is not set # CONFIG_SND_SOC_CS35L32 is not set # CONFIG_SND_SOC_CS35L33 is not set @@ -6785,7 +6792,7 @@ CONFIG_SND_SOC_ES7134=m CONFIG_SND_SOC_ES7241=m # CONFIG_SND_SOC_ES8311 is not set CONFIG_SND_SOC_ES8316=m -# CONFIG_SND_SOC_ES8326 is not set +CONFIG_SND_SOC_ES8326=m CONFIG_SND_SOC_ES8328=m CONFIG_SND_SOC_ES8328_I2C=m CONFIG_SND_SOC_ES8328_SPI=m @@ -6991,9 +6998,7 @@ CONFIG_HID_GFRM=m CONFIG_HID_GLORIOUS=m CONFIG_HID_HOLTEK=m CONFIG_HOLTEK_FF=y -CONFIG_HID_VIVALDI_COMMON=m # CONFIG_HID_GOODIX_SPI is not set -CONFIG_HID_GOOGLE_HAMMER=m # CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set CONFIG_HID_GT683R=m @@ -7217,7 +7222,7 @@ CONFIG_USB_CDNS_SUPPORT=m # CONFIG_USB_CDNS3 is not set # CONFIG_USB_MUSB_HDRC is not set CONFIG_USB_DWC3=y -# CONFIG_USB_DWC3_ULPI is not set +CONFIG_USB_DWC3_ULPI=y # CONFIG_USB_DWC3_HOST is not set # CONFIG_USB_DWC3_GADGET is not set CONFIG_USB_DWC3_DUAL_ROLE=y @@ -7621,7 +7626,7 @@ CONFIG_LEDS_USER=y # LED Triggers # CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_TIMER=m CONFIG_LEDS_TRIGGER_ONESHOT=m CONFIG_LEDS_TRIGGER_DISK=y CONFIG_LEDS_TRIGGER_MTD=y @@ -7690,7 +7695,7 @@ CONFIG_RTC_DRV_HYM8563=y # CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_NCT3018Y is not set -CONFIG_RTC_DRV_RK808=y +CONFIG_RTC_DRV_RK808=m # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set @@ -7767,7 +7772,6 @@ CONFIG_RTC_DRV_EFI=y # CONFIG_RTC_DRV_MSM6242 is not set # CONFIG_RTC_DRV_RP5C01 is not set # CONFIG_RTC_DRV_ZYNQMP is not set -# CONFIG_RTC_DRV_CROS_EC is not set CONFIG_RTC_DRV_NTXEC=m # @@ -7811,8 +7815,9 @@ CONFIG_PLX_DMA=m # CONFIG_AMD_QDMA is not set CONFIG_QCOM_HIDMA_MGMT=y CONFIG_QCOM_HIDMA=y -# CONFIG_DW_DMAC is not set -# CONFIG_DW_DMAC_PCI is not set +CONFIG_DW_DMAC_CORE=m +CONFIG_DW_DMAC=m +CONFIG_DW_DMAC_PCI=m CONFIG_DW_EDMA=m CONFIG_DW_EDMA_PCIE=m CONFIG_SF_PDMA=m @@ -7820,7 +7825,7 @@ CONFIG_SF_PDMA=m # # DMA Clients # -# CONFIG_ASYNC_TX_DMA is not set +CONFIG_ASYNC_TX_DMA=y # CONFIG_DMATEST is not set CONFIG_DMA_ENGINE_RAID=y @@ -7829,12 +7834,14 @@ CONFIG_DMA_ENGINE_RAID=y # CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set -# CONFIG_UDMABUF is not set +CONFIG_UDMABUF=y # CONFIG_DMABUF_MOVE_NOTIFY is not set # CONFIG_DMABUF_DEBUG is not set CONFIG_DMABUF_SELFTESTS=m -# CONFIG_DMABUF_HEAPS is not set -# CONFIG_DMABUF_SYSFS_STATS is not set +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_SYSFS_STATS=y +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_DMABUF_HEAPS_CMA=y # end of DMABUF options CONFIG_UIO=m @@ -8017,6 +8024,7 @@ CONFIG_FB_TFT_ILI9325=m CONFIG_FB_TFT_ILI9340=m CONFIG_FB_TFT_ILI9341=m CONFIG_FB_TFT_ILI9481=m +CONFIG_FB_TFT_ST7796=m CONFIG_FB_TFT_ILI9486=m CONFIG_FB_TFT_PCD8544=m CONFIG_FB_TFT_RA8875=m @@ -8031,7 +8039,6 @@ CONFIG_FB_TFT_SSD1331=m CONFIG_FB_TFT_SSD1351=m CONFIG_FB_TFT_ST7735R=m CONFIG_FB_TFT_ST7789V=m -CONFIG_FB_TFT_ST7796=m CONFIG_FB_TFT_TINYLCD=m CONFIG_FB_TFT_TLS8204=m CONFIG_FB_TFT_UC1611=m @@ -8046,22 +8053,7 @@ CONFIG_HMS_ANYBUSS_BUS=m # CONFIG_VME_BUS is not set # CONFIG_RTL8723CS is not set # CONFIG_GOLDFISH is not set -CONFIG_CHROME_PLATFORMS=y -CONFIG_CROS_EC=y -# CONFIG_CROS_EC_I2C is not set -# CONFIG_CROS_EC_SPI is not set -CONFIG_CROS_EC_PROTO=y -# CONFIG_CROS_KBD_LED_BACKLIGHT is not set -CONFIG_CROS_EC_CHARDEV=y -CONFIG_CROS_EC_LIGHTBAR=y -CONFIG_CROS_EC_VBC=y -CONFIG_CROS_EC_DEBUGFS=y -CONFIG_CROS_EC_SENSORHUB=y -CONFIG_CROS_EC_SYSFS=y -CONFIG_CROS_EC_TYPEC=m -# CONFIG_CROS_HPS_I2C is not set -CONFIG_CROS_USBPD_NOTIFY=y -# CONFIG_CROS_KUNIT_EC_PROTO_TEST is not set +# CONFIG_CHROME_PLATFORMS is not set # CONFIG_CZNIC_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set CONFIG_SURFACE_PLATFORMS=y @@ -8133,6 +8125,7 @@ CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y CONFIG_FSL_ERRATUM_A008585=y CONFIG_HISILICON_ERRATUM_161010101=y CONFIG_ARM64_ERRATUM_858921=y +# CONFIG_ARM_TIMER_SP804 is not set # end of Clock Source drivers CONFIG_MAILBOX=y @@ -8165,14 +8158,17 @@ CONFIG_IOMMU_DEFAULT_DMA_STRICT=y # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_IOMMU_DMA=y +CONFIG_IOMMU_SVA=y +CONFIG_IOMMU_IOPF=y CONFIG_IOMMUFD=m CONFIG_ROCKCHIP_IOMMU=y CONFIG_ARM_SMMU=y # CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y CONFIG_ARM_SMMU_V3=y -# CONFIG_ARM_SMMU_V3_SVA is not set -# CONFIG_VIRTIO_IOMMU is not set +CONFIG_ARM_SMMU_V3_SVA=y +# CONFIG_ARM_SMMU_V3_KUNIT_TEST is not set +CONFIG_VIRTIO_IOMMU=m # # Remoteproc drivers @@ -8302,14 +8298,13 @@ CONFIG_EXTCON=y # # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set -# CONFIG_EXTCON_GPIO is not set +CONFIG_EXTCON_GPIO=y # CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set CONFIG_EXTCON_PTN5150=m # CONFIG_EXTCON_RT8973A is not set # CONFIG_EXTCON_SM5502 is not set CONFIG_EXTCON_USB_GPIO=y -# CONFIG_EXTCON_USBC_CROS_EC is not set CONFIG_EXTCON_USBC_TUSB320=m CONFIG_EXTCON_USBC_VIRTUAL_PD=m # CONFIG_MEMORY is not set @@ -8540,8 +8535,6 @@ CONFIG_SENSEAIR_SUNRISE_CO2=m # CONFIG_VZ89X is not set # end of Chemical Sensors -# CONFIG_IIO_CROS_EC_SENSORS_CORE is not set - # # Hid Sensor IIO Common # @@ -8924,7 +8917,6 @@ CONFIG_ICP10100=m # # Proximity and distance sensors # -CONFIG_CROS_EC_MKBP_PROXIMITY=m # CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set CONFIG_ISL29501=m @@ -8976,8 +8968,7 @@ CONFIG_MAX31865=m CONFIG_PWM=y # CONFIG_PWM_DEBUG is not set CONFIG_PWM_ATMEL_TCB=m -# CONFIG_PWM_CLK is not set -CONFIG_PWM_CROS_EC=m +CONFIG_PWM_CLK=m CONFIG_PWM_DWC_CORE=m CONFIG_PWM_DWC=m # CONFIG_PWM_FSL_FTM is not set @@ -9048,8 +9039,8 @@ CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY=m CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=m CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y CONFIG_PHY_ROCKCHIP_PCIE=y -# CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX is not set -CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y +CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=m +CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=m CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PHY_ROCKCHIP_USB=y CONFIG_PHY_ROCKCHIP_USBDP=m @@ -9070,7 +9061,7 @@ CONFIG_ARM_CCI_PMU=m # CONFIG_ARM_CMN is not set # CONFIG_ARM_NI is not set CONFIG_ARM_PMU=y -# CONFIG_ARM_SMMU_V3_PMU is not set +CONFIG_ARM_SMMU_V3_PMU=m CONFIG_ARM_PMUV3=y # CONFIG_ARM_DSU_PMU is not set # CONFIG_ARM_SPE_PMU is not set @@ -9106,15 +9097,15 @@ CONFIG_NVMEM_LAYOUTS=y # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set -CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=y +CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=m # end of Layout Types # CONFIG_NVMEM_RAVE_SP_EEPROM is not set CONFIG_NVMEM_RMEM=m -CONFIG_NVMEM_ROCKCHIP_EFUSE=y -CONFIG_NVMEM_ROCKCHIP_OTP=y +CONFIG_NVMEM_ROCKCHIP_EFUSE=m +CONFIG_NVMEM_ROCKCHIP_OTP=m CONFIG_NVMEM_SPMI_SDAM=m -CONFIG_NVMEM_U_BOOT_ENV=y +CONFIG_NVMEM_U_BOOT_ENV=m # # HW tracing support @@ -9732,25 +9723,25 @@ CONFIG_CRYPTO_CURVE25519=m # Block ciphers # CONFIG_CRYPTO_AES=y -CONFIG_CRYPTO_AES_TI=y -CONFIG_CRYPTO_ANUBIS=y +CONFIG_CRYPTO_AES_TI=m +CONFIG_CRYPTO_ANUBIS=m # CONFIG_CRYPTO_ARIA is not set -CONFIG_CRYPTO_BLOWFISH=y -CONFIG_CRYPTO_BLOWFISH_COMMON=y -CONFIG_CRYPTO_CAMELLIA=y -CONFIG_CRYPTO_CAST_COMMON=y -CONFIG_CRYPTO_CAST5=y -CONFIG_CRYPTO_CAST6=y +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_BLOWFISH_COMMON=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST_COMMON=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_FCRYPT=y -CONFIG_CRYPTO_KHAZAD=y -CONFIG_CRYPTO_SEED=y -CONFIG_CRYPTO_SERPENT=y +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_SM4=m CONFIG_CRYPTO_SM4_GENERIC=m -CONFIG_CRYPTO_TEA=y -CONFIG_CRYPTO_TWOFISH=y -CONFIG_CRYPTO_TWOFISH_COMMON=y +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m # end of Block ciphers # @@ -9792,11 +9783,11 @@ CONFIG_CRYPTO_BLAKE2B=y CONFIG_CRYPTO_CMAC=y CONFIG_CRYPTO_GHASH=y CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=y CONFIG_CRYPTO_POLY1305=y -CONFIG_CRYPTO_RMD160=y +CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y @@ -9804,9 +9795,9 @@ CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SM3=m CONFIG_CRYPTO_SM3_GENERIC=m CONFIG_CRYPTO_STREEBOG=m -CONFIG_CRYPTO_VMAC=y -CONFIG_CRYPTO_WP512=y -CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XXHASH=y # end of Hashes, digests, and MACs @@ -9871,7 +9862,7 @@ CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA256_ARM64=y CONFIG_CRYPTO_SHA2_ARM64_CE=y CONFIG_CRYPTO_SHA512_ARM64=y -# CONFIG_CRYPTO_SHA512_ARM64_CE is not set +CONFIG_CRYPTO_SHA512_ARM64_CE=m CONFIG_CRYPTO_SHA3_ARM64=m CONFIG_CRYPTO_SM3_NEON=m CONFIG_CRYPTO_SM3_ARM64_CE=m @@ -9887,7 +9878,7 @@ CONFIG_CRYPTO_SM4_ARM64_NEON_BLK=m CONFIG_CRYPTO_AES_ARM64_CE_CCM=y # CONFIG_CRYPTO_SM4_ARM64_CE_CCM is not set # CONFIG_CRYPTO_SM4_ARM64_CE_GCM is not set -# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m # end of Accelerated Cryptographic Algorithms for CPU (arm64) CONFIG_CRYPTO_HW=y @@ -10028,7 +10019,7 @@ CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y CONFIG_XZ_DEC_RISCV=y -# CONFIG_XZ_DEC_MICROLZMA is not set +CONFIG_XZ_DEC_MICROLZMA=y CONFIG_XZ_DEC_BCJ=y CONFIG_XZ_DEC_TEST=m CONFIG_DECOMPRESS_GZIP=y @@ -10071,7 +10062,7 @@ CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y CONFIG_DMA_NEED_SYNC=y -# CONFIG_DMA_RESTRICTED_POOL is not set +CONFIG_DMA_RESTRICTED_POOL=y CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_COHERENT_POOL=y CONFIG_DMA_DIRECT_REMAP=y diff --git a/config/sources/families/include/rockchip64_common.inc b/config/sources/families/include/rockchip64_common.inc index 5e18f422f676..a2635c53fad9 100644 --- a/config/sources/families/include/rockchip64_common.inc +++ b/config/sources/families/include/rockchip64_common.inc @@ -27,7 +27,7 @@ RKBIN_DIR="$SRC/cache/sources/rkbin-tools" case $BRANCH in current) - declare -g KERNEL_MAJOR_MINOR="6.6" + declare -g KERNEL_MAJOR_MINOR="6.12" declare -g LINUXFAMILY=rockchip64 declare -g LINUXCONFIG='linux-rockchip64-'$BRANCH ;; @@ -122,7 +122,7 @@ case "$BOOT_SOC" in # ROCKUSB_BLOB is used to flash a board with rkdeveloptool (Linux, can use 'rkdevflash' extension) or RKDevTool (Windows) in MASKROM mode ROCKUSB_BLOB="rk35/rk356x_spl_loader_v1.21.113.bin" BOOT_SOC_MKIMAGE="rk3568" # mkimage does not know about rk3566, and rk3568 works. - BOOTENV_FILE='rk356x.txt' + BOOTENV_FILE='rk35xx.txt' ;; rk3568) @@ -132,7 +132,7 @@ case "$BOOT_SOC" in BL31_BLOB="${BL31_BLOB:-"rk35/rk3568_bl31_v1.44.elf"}" # ROCKUSB_BLOB is used to flash a board with rkdeveloptool (Linux, can use 'rkdevflash' extension) or RKDevTool (Windows) in MASKROM mode ROCKUSB_BLOB="rk35/rk356x_spl_loader_v1.21.113.bin" - BOOTENV_FILE='rk356x.txt' + BOOTENV_FILE='rk35xx.txt' ;; rk3576) @@ -148,6 +148,7 @@ case "$BOOT_SOC" in BL31_BLOB="${BL31_BLOB:-"rk35/rk3588_bl31_v1.45.elf"}" # ROCKUSB_BLOB is used to flash a board with rkdeveloptool (Linux, can use 'rkdevflash' extension) or RKDevTool (Windows) in MASKROM mode ROCKUSB_BLOB="rk35/rk3588_spl_loader_v1.16.113.bin" + BOOTENV_FILE='rk35xx.txt' ;; esac diff --git a/config/sources/families/rockchip-rk3588.conf b/config/sources/families/rockchip-rk3588.conf index 2b589ab0c718..442364b4338a 100644 --- a/config/sources/families/rockchip-rk3588.conf +++ b/config/sources/families/rockchip-rk3588.conf @@ -39,22 +39,6 @@ case $BRANCH in LINUXFAMILY=rk35xx ;; - current) - # Branch based on a stable kernel release (will stay on the next LTS kernel release once released, 6.12? LTS) - LINUXFAMILY=rockchip-rk3588 - KERNEL_MAJOR_MINOR="6.12" # Major and minor versions of this kernel. - LINUXCONFIG="linux-rockchip-rk3588-${BRANCH}" - # No need to set KERNELPATCHDIR, since default is: KERNELPATCHDIR='archive/rockchip-rk3588-${KERNEL_MAJOR_MINOR}' - ;; - - edge) - # Branch based on the latest kernel release including RC releases, to benefit from the latest RK3588 mainline advancements. Might be unstable! - LINUXFAMILY=rockchip-rk3588 - KERNEL_MAJOR_MINOR="6.12" # Major and minor versions of this kernel. - LINUXCONFIG="linux-rockchip-rk3588-${BRANCH}" - # No need to set KERNELPATCHDIR, since default is: KERNELPATCHDIR='archive/rockchip-rk3588-${KERNEL_MAJOR_MINOR}' - ;; - collabora) # Collabora's rk3588, where the action is these days LINUXFAMILY=rockchip-rk3588 diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/0000.patching_config.yaml b/patch/kernel/archive/rockchip-rk3588-6.12/0000.patching_config.yaml deleted file mode 100644 index 2a2b52cbc6ca..000000000000 --- a/patch/kernel/archive/rockchip-rk3588-6.12/0000.patching_config.yaml +++ /dev/null @@ -1,47 +0,0 @@ -config: # This is file 'patch/kernel/rockchip-rk3588-edge/0000.patching_config.yaml' - - # PATCH NUMBERING INFO - # - # Patches should be ordered in such a way that general kernel patches are applied first, then SoC-related patches and at last board-specific patches - # - # Patch numbers in this folder are sorted by category: - # - # 000* for general patches - # 01** for GPU/HDMI related patches - # 08** for wireless patches - # 1*** for board specific patches: - # 101* for Rock-5B, 102* for Rock-5A and so on - - # Just some info stuff; not used by the patching scripts - name: rockchip-rk3588-edge - kind: kernel - type: mainline # or: vendor - branch: linux-6.11.y - last-known-good-tag: v6.11-rc1 - maintainers: - - { github: rpardini, name: Ricardo Pardini, email: ricardo@pardini.net, armbian-forum: rpardini } - - # .dts files in these directories will be copied as-is to the build tree; later ones overwrite earlier ones. - # This is meant to provide a way to "add a board DTS" without having to null-patch them in. - dts-directories: - - { source: "dt", target: "arch/arm64/boot/dts/rockchip" } - - # every file in these directories will be copied as-is to the build tree; later ones overwrite earlier ones - # This is meant as a way to have overlays, bare, in a directory, without having to null-patch them in. - # @TODO need a solution to auto-Makefile the overlays as well - overlay-directories: - - { source: "overlay", target: "arch/arm64/boot/dts/rockchip/overlay" } - - # the Makefile in each of these directories will be magically patched to include the dts files copied - # or patched-in; overlay subdir will be included "-y" if it exists. - # No more Makefile patching needed, yay! - auto-patch-dt-makefile: - - { directory: "arch/arm64/boot/dts/rockchip", config-var: "CONFIG_ARCH_ROCKCHIP" } - - # configuration for when applying patches to git / auto-rewriting patches (development cycle helpers) - patches-to-git: - do-not-commit-files: - - "MAINTAINERS" # constant churn, drop them. sorry. - - "Documentation/devicetree/bindings/arm/rockchip.yaml" # constant churn, conflicts on every bump, drop it. sorry. - do-not-commit-regexes: # Python-style regexes - - "^arch/([a-zA-Z0-9]+)/boot/dts/([a-zA-Z0-9]+)/Makefile$" # ignore DT Makefile patches, we've an auto-patcher now diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/0001-general-add-overlay-support.patch b/patch/kernel/archive/rockchip-rk3588-6.12/0001-general-add-overlay-support.patch deleted file mode 100644 index 267fd37eb3de..000000000000 --- a/patch/kernel/archive/rockchip-rk3588-6.12/0001-general-add-overlay-support.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Paolo Sabatino -Date: Wed, 2 Oct 2024 19:30:34 +0300 -Subject: compile .scr and install overlays in right path - ---- - scripts/Makefile.dtbinst | 13 +++++++++- - scripts/Makefile.dtbs | 8 +++++- - 2 files changed, 19 insertions(+), 2 deletions(-) - -diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst -index 111111111111..222222222222 100644 ---- a/scripts/Makefile.dtbinst -+++ b/scripts/Makefile.dtbinst -@@ -33,7 +33,18 @@ endef - - $(foreach d, $(sort $(dir $(dtbs))), $(eval $(call gen_install_rules,$(d)))) - --dtbs := $(notdir $(dtbs)) -+# Very convoluted way to flatten all the device tree -+# directories, but keep the "/overlay/" directory -+ -+# topmost directory (ie: from rockchip/overlay/rk322x-emmc.dtbo extracts rockchip) -+topmost_dir = $(firstword $(subst /, ,$(dtbs))) -+# collect dtbs entries which starts with "$topmost_dir/overlay/", then remove "$topmost_dir" -+dtbs_overlays = $(subst $(topmost_dir)/,,$(filter $(topmost_dir)/overlay/%, $(dtbs))) -+# collect the non-overlay dtbs -+dtbs_regular = $(filter-out $(topmost_dir)/overlay/%, $(dtbs)) -+# compose the dtbs variable flattening all the non-overlays entries -+# and appending the overlays entries -+dtbs := $(notdir $(dtbs_regular)) $(dtbs_overlays) - - endif # CONFIG_ARCH_WANT_FLAT_DTB_INSTALL - -diff --git a/scripts/Makefile.dtbs b/scripts/Makefile.dtbs -index 111111111111..222222222222 100644 ---- a/scripts/Makefile.dtbs -+++ b/scripts/Makefile.dtbs -@@ -122,17 +122,23 @@ dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp) - quiet_cmd_dtc = DTC $(quiet_dtb_check_tag) $@ - cmd_dtc = \ - $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \ -- $(DTC) -o $@ -b 0 $(addprefix -i,$(dir $<) $(DTC_INCLUDE)) \ -+ $(DTC) -@ -o $@ -b 0 $(addprefix -i,$(dir $<) $(DTC_INCLUDE)) \ - $(DTC_FLAGS) -d $(depfile).dtc.tmp $(dtc-tmp) ; \ - cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile) \ - $(cmd_dtb_check) - -+quiet_cmd_scr = MKIMAGE $@ -+cmd_scr = mkimage -C none -A $(ARCH) -T script -d $< $@ -+ - $(obj)/%.dtb: $(obj)/%.dts $(DTC) $(DT_TMP_SCHEMA) FORCE - $(call if_changed_dep,dtc) - - $(obj)/%.dtbo: $(src)/%.dtso $(DTC) FORCE - $(call if_changed_dep,dtc) - -+$(obj)/%.scr: $(src)/%.scr-cmd FORCE -+ $(call if_changed,scr) -+ - # targets - # --------------------------------------------------------------------------- - --- -Armbian - diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/0002-tools-disable-sched_ext_clean.patch b/patch/kernel/archive/rockchip-rk3588-6.12/0002-tools-disable-sched_ext_clean.patch deleted file mode 120000 index 0d64596d7763..000000000000 --- a/patch/kernel/archive/rockchip-rk3588-6.12/0002-tools-disable-sched_ext_clean.patch +++ /dev/null @@ -1 +0,0 @@ -../rockchip64-6.12/0001-tools-disable-sched_ext_clean.patch \ No newline at end of file diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/0024-RK3588-Add-Crypto-Support.patch b/patch/kernel/archive/rockchip-rk3588-6.12/0024-RK3588-Add-Crypto-Support.patch deleted file mode 100644 index 79a15e17a272..000000000000 --- a/patch/kernel/archive/rockchip-rk3588-6.12/0024-RK3588-Add-Crypto-Support.patch +++ /dev/null @@ -1,2322 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Corentin Labbe -Date: Tue, 7 Nov 2023 15:55:27 +0000 -Subject: dt-bindings: crypto: add support for rockchip,crypto-rk3588 - -Add device tree binding documentation for the Rockchip cryptographic -offloader V2. - -Signed-off-by: Corentin Labbe ---- - Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml | 65 ++++++++++ - 1 file changed, 65 insertions(+) - -diff --git a/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml b/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml -new file mode 100644 -index 000000000000..111111111111 ---- /dev/null -+++ b/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml -@@ -0,0 +1,65 @@ -+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/crypto/rockchip,rk3588-crypto.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Rockchip cryptographic offloader V2 -+ -+maintainers: -+ - Corentin Labbe -+ -+properties: -+ compatible: -+ enum: -+ - rockchip,rk3568-crypto -+ - rockchip,rk3588-crypto -+ -+ reg: -+ maxItems: 1 -+ -+ interrupts: -+ maxItems: 1 -+ -+ clocks: -+ minItems: 3 -+ -+ clock-names: -+ items: -+ - const: core -+ - const: a -+ - const: h -+ -+ resets: -+ minItems: 1 -+ -+ reset-names: -+ items: -+ - const: core -+ -+required: -+ - compatible -+ - reg -+ - interrupts -+ - clocks -+ - clock-names -+ - resets -+ - reset-names -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ #include -+ crypto@fe370000 { -+ compatible = "rockchip,rk3588-crypto"; -+ reg = <0xfe370000 0x4000>; -+ interrupts = ; -+ clocks = <&scmi_clk SCMI_CRYPTO_CORE>, <&scmi_clk SCMI_ACLK_SECURE_NS>, -+ <&scmi_clk SCMI_HCLK_SECURE_NS>; -+ clock-names = "core", "a", "h"; -+ resets = <&scmi_reset SRST_CRYPTO_CORE>; -+ reset-names = "core"; -+ }; --- -Armbian - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Corentin Labbe -Date: Tue, 7 Nov 2023 15:55:30 +0000 -Subject: ARM64: dts: rk356x: add crypto node - -Both RK3566 and RK3568 have a crypto IP handled by the rk3588 crypto driver so adds a -node for it. - -Tested-by: Ricardo Pardini -Signed-off-by: Corentin Labbe ---- - arch/arm64/boot/dts/rockchip/rk356x.dtsi | 12 ++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -index 111111111111..222222222222 100644 ---- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi -@@ -1122,6 +1122,18 @@ rng: rng@fe388000 { - status = "disabled"; - }; - -+ crypto: crypto@fe380000 { -+ compatible = "rockchip,rk3568-crypto"; -+ reg = <0x0 0xfe380000 0x0 0x2000>; -+ interrupts = ; -+ clocks = <&cru ACLK_CRYPTO_NS>, <&cru HCLK_CRYPTO_NS>, -+ <&cru CLK_CRYPTO_NS_CORE>; -+ clock-names = "aclk", "hclk", "core"; -+ resets = <&cru SRST_CRYPTO_NS_CORE>; -+ reset-names = "core"; -+ status = "okay"; -+ }; -+ - i2s0_8ch: i2s@fe400000 { - compatible = "rockchip,rk3568-i2s-tdm"; - reg = <0x0 0xfe400000 0x0 0x1000>; --- -Armbian - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Muhammed Efe Cetin -Date: Fri, 2 Aug 2024 00:05:59 +0300 -Subject: arm64: dts: rockchip: rk3588: enable crypto node - ---- - arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 11 ++++++++++ - 1 file changed, 11 insertions(+) - -diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi -index 111111111111..222222222222 100644 ---- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi -@@ -1879,6 +1879,17 @@ sdhci: mmc@fe2e0000 { - status = "disabled"; - }; - -+ crypto: crypto@fe370000 { -+ compatible = "rockchip,rk3588-crypto"; -+ reg = <0x0 0xfe370000 0x0 0x2000>; -+ interrupts = ; -+ clocks = <&scmi_clk SCMI_CRYPTO_CORE>, <&scmi_clk SCMI_ACLK_SECURE_NS>, -+ <&scmi_clk SCMI_HCLK_SECURE_NS>; -+ clock-names = "core", "aclk", "hclk"; -+ resets = <&scmi_reset SRST_CRYPTO_CORE>; -+ reset-names = "core"; -+ }; -+ - i2s0_8ch: i2s@fe470000 { - compatible = "rockchip,rk3588-i2s-tdm"; - reg = <0x0 0xfe470000 0x0 0x1000>; --- -Armbian - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Corentin Labbe -Date: Tue, 7 Nov 2023 15:55:31 +0000 -Subject: reset: rockchip: secure reset must be used by SCMI - -While working on the rk3588 crypto driver, I loose lot of time -understanding why resetting the IP failed. -This is due to RK3588_SECURECRU_RESET_OFFSET being in the secure world, -so impossible to operate on it from the kernel. -All resets in this block must be handled via SCMI call. - -Signed-off-by: Corentin Labbe ---- - drivers/clk/rockchip/rst-rk3588.c | 42 ------ - include/dt-bindings/reset/rockchip,rk3588-cru.h | 68 +++++----- - 2 files changed, 34 insertions(+), 76 deletions(-) - -diff --git a/drivers/clk/rockchip/rst-rk3588.c b/drivers/clk/rockchip/rst-rk3588.c -index 111111111111..222222222222 100644 ---- a/drivers/clk/rockchip/rst-rk3588.c -+++ b/drivers/clk/rockchip/rst-rk3588.c -@@ -16,9 +16,6 @@ - /* 0xFD7C8000 + 0x0A00 */ - #define RK3588_PHPTOPCRU_RESET_OFFSET(id, reg, bit) [id] = (0x8000*4 + reg * 16 + bit) - --/* 0xFD7D0000 + 0x0A00 */ --#define RK3588_SECURECRU_RESET_OFFSET(id, reg, bit) [id] = (0x10000*4 + reg * 16 + bit) -- - /* 0xFD7F0000 + 0x0A00 */ - #define RK3588_PMU1CRU_RESET_OFFSET(id, reg, bit) [id] = (0x30000*4 + reg * 16 + bit) - -@@ -807,45 +804,6 @@ static const int rk3588_register_offset[] = { - RK3588_PMU1CRU_RESET_OFFSET(SRST_P_PMU0IOC, 5, 4), - RK3588_PMU1CRU_RESET_OFFSET(SRST_P_GPIO0, 5, 5), - RK3588_PMU1CRU_RESET_OFFSET(SRST_GPIO0, 5, 6), -- -- /* SECURECRU_SOFTRST_CON00 */ -- RK3588_SECURECRU_RESET_OFFSET(SRST_A_SECURE_NS_BIU, 0, 10), -- RK3588_SECURECRU_RESET_OFFSET(SRST_H_SECURE_NS_BIU, 0, 11), -- RK3588_SECURECRU_RESET_OFFSET(SRST_A_SECURE_S_BIU, 0, 12), -- RK3588_SECURECRU_RESET_OFFSET(SRST_H_SECURE_S_BIU, 0, 13), -- RK3588_SECURECRU_RESET_OFFSET(SRST_P_SECURE_S_BIU, 0, 14), -- RK3588_SECURECRU_RESET_OFFSET(SRST_CRYPTO_CORE, 0, 15), -- -- /* SECURECRU_SOFTRST_CON01 */ -- RK3588_SECURECRU_RESET_OFFSET(SRST_CRYPTO_PKA, 1, 0), -- RK3588_SECURECRU_RESET_OFFSET(SRST_CRYPTO_RNG, 1, 1), -- RK3588_SECURECRU_RESET_OFFSET(SRST_A_CRYPTO, 1, 2), -- RK3588_SECURECRU_RESET_OFFSET(SRST_H_CRYPTO, 1, 3), -- RK3588_SECURECRU_RESET_OFFSET(SRST_KEYLADDER_CORE, 1, 9), -- RK3588_SECURECRU_RESET_OFFSET(SRST_KEYLADDER_RNG, 1, 10), -- RK3588_SECURECRU_RESET_OFFSET(SRST_A_KEYLADDER, 1, 11), -- RK3588_SECURECRU_RESET_OFFSET(SRST_H_KEYLADDER, 1, 12), -- RK3588_SECURECRU_RESET_OFFSET(SRST_P_OTPC_S, 1, 13), -- RK3588_SECURECRU_RESET_OFFSET(SRST_OTPC_S, 1, 14), -- RK3588_SECURECRU_RESET_OFFSET(SRST_WDT_S, 1, 15), -- -- /* SECURECRU_SOFTRST_CON02 */ -- RK3588_SECURECRU_RESET_OFFSET(SRST_T_WDT_S, 2, 0), -- RK3588_SECURECRU_RESET_OFFSET(SRST_H_BOOTROM, 2, 1), -- RK3588_SECURECRU_RESET_OFFSET(SRST_A_DCF, 2, 2), -- RK3588_SECURECRU_RESET_OFFSET(SRST_P_DCF, 2, 3), -- RK3588_SECURECRU_RESET_OFFSET(SRST_H_BOOTROM_NS, 2, 5), -- RK3588_SECURECRU_RESET_OFFSET(SRST_P_KEYLADDER, 2, 14), -- RK3588_SECURECRU_RESET_OFFSET(SRST_H_TRNG_S, 2, 15), -- -- /* SECURECRU_SOFTRST_CON03 */ -- RK3588_SECURECRU_RESET_OFFSET(SRST_H_TRNG_NS, 3, 0), -- RK3588_SECURECRU_RESET_OFFSET(SRST_D_SDMMC_BUFFER, 3, 1), -- RK3588_SECURECRU_RESET_OFFSET(SRST_H_SDMMC, 3, 2), -- RK3588_SECURECRU_RESET_OFFSET(SRST_H_SDMMC_BUFFER, 3, 3), -- RK3588_SECURECRU_RESET_OFFSET(SRST_SDMMC, 3, 4), -- RK3588_SECURECRU_RESET_OFFSET(SRST_P_TRNG_CHK, 3, 5), -- RK3588_SECURECRU_RESET_OFFSET(SRST_TRNG_S, 3, 6), - }; - - void rk3588_rst_init(struct device_node *np, void __iomem *reg_base) -diff --git a/include/dt-bindings/reset/rockchip,rk3588-cru.h b/include/dt-bindings/reset/rockchip,rk3588-cru.h -index 111111111111..222222222222 100644 ---- a/include/dt-bindings/reset/rockchip,rk3588-cru.h -+++ b/include/dt-bindings/reset/rockchip,rk3588-cru.h -@@ -716,40 +716,40 @@ - #define SRST_P_GPIO0 627 - #define SRST_GPIO0 628 - --#define SRST_A_SECURE_NS_BIU 629 --#define SRST_H_SECURE_NS_BIU 630 --#define SRST_A_SECURE_S_BIU 631 --#define SRST_H_SECURE_S_BIU 632 --#define SRST_P_SECURE_S_BIU 633 --#define SRST_CRYPTO_CORE 634 -- --#define SRST_CRYPTO_PKA 635 --#define SRST_CRYPTO_RNG 636 --#define SRST_A_CRYPTO 637 --#define SRST_H_CRYPTO 638 --#define SRST_KEYLADDER_CORE 639 --#define SRST_KEYLADDER_RNG 640 --#define SRST_A_KEYLADDER 641 --#define SRST_H_KEYLADDER 642 --#define SRST_P_OTPC_S 643 --#define SRST_OTPC_S 644 --#define SRST_WDT_S 645 -- --#define SRST_T_WDT_S 646 --#define SRST_H_BOOTROM 647 --#define SRST_A_DCF 648 --#define SRST_P_DCF 649 --#define SRST_H_BOOTROM_NS 650 --#define SRST_P_KEYLADDER 651 --#define SRST_H_TRNG_S 652 -- --#define SRST_H_TRNG_NS 653 --#define SRST_D_SDMMC_BUFFER 654 --#define SRST_H_SDMMC 655 --#define SRST_H_SDMMC_BUFFER 656 --#define SRST_SDMMC 657 --#define SRST_P_TRNG_CHK 658 --#define SRST_TRNG_S 659 -+#define SRST_A_SECURE_NS_BIU 10 -+#define SRST_H_SECURE_NS_BIU 11 -+#define SRST_A_SECURE_S_BIU 12 -+#define SRST_H_SECURE_S_BIU 13 -+#define SRST_P_SECURE_S_BIU 14 -+#define SRST_CRYPTO_CORE 15 -+ -+#define SRST_CRYPTO_PKA 16 -+#define SRST_CRYPTO_RNG 17 -+#define SRST_A_CRYPTO 18 -+#define SRST_H_CRYPTO 19 -+#define SRST_KEYLADDER_CORE 25 -+#define SRST_KEYLADDER_RNG 26 -+#define SRST_A_KEYLADDER 27 -+#define SRST_H_KEYLADDER 28 -+#define SRST_P_OTPC_S 29 -+#define SRST_OTPC_S 30 -+#define SRST_WDT_S 31 -+ -+#define SRST_T_WDT_S 32 -+#define SRST_H_BOOTROM 33 -+#define SRST_A_DCF 34 -+#define SRST_P_DCF 35 -+#define SRST_H_BOOTROM_NS 37 -+#define SRST_P_KEYLADDER 46 -+#define SRST_H_TRNG_S 47 -+ -+#define SRST_H_TRNG_NS 48 -+#define SRST_D_SDMMC_BUFFER 49 -+#define SRST_H_SDMMC 50 -+#define SRST_H_SDMMC_BUFFER 51 -+#define SRST_SDMMC 52 -+#define SRST_P_TRNG_CHK 53 -+#define SRST_TRNG_S 54 - - #define SRST_A_HDMIRX_BIU 660 - --- -Armbian - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Corentin Labbe -Date: Tue, 7 Nov 2023 15:55:32 +0000 -Subject: crypto: rockchip: add rk3588 driver - -RK3588 have a new crypto IP, this patch adds basic support for it. -Only hashes and cipher are handled for the moment. - -Signed-off-by: Corentin Labbe ---- - drivers/crypto/Kconfig | 29 + - drivers/crypto/rockchip/Makefile | 5 + - drivers/crypto/rockchip/rk2_crypto.c | 738 ++++++++++ - drivers/crypto/rockchip/rk2_crypto.h | 246 ++++ - drivers/crypto/rockchip/rk2_crypto_ahash.c | 344 +++++ - drivers/crypto/rockchip/rk2_crypto_skcipher.c | 576 ++++++++ - 6 files changed, 1938 insertions(+) - -diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig -index 111111111111..222222222222 100644 ---- a/drivers/crypto/Kconfig -+++ b/drivers/crypto/Kconfig -@@ -714,6 +714,35 @@ config CRYPTO_DEV_TEGRA - Select this to enable Tegra Security Engine which accelerates various - AES encryption/decryption and HASH algorithms. - -+config CRYPTO_DEV_ROCKCHIP2 -+ tristate "Rockchip's cryptographic offloader V2" -+ depends on OF && ARCH_ROCKCHIP -+ depends on PM -+ select CRYPTO_ECB -+ select CRYPTO_CBC -+ select CRYPTO_AES -+ select CRYPTO_MD5 -+ select CRYPTO_SHA1 -+ select CRYPTO_SHA256 -+ select CRYPTO_SHA512 -+ select CRYPTO_SM3_GENERIC -+ select CRYPTO_HASH -+ select CRYPTO_SKCIPHER -+ select CRYPTO_ENGINE -+ -+ help -+ This driver interfaces with the hardware crypto offloader present -+ on RK3566, RK3568 and RK3588. -+ -+config CRYPTO_DEV_ROCKCHIP2_DEBUG -+ bool "Enable Rockchip V2 crypto stats" -+ depends on CRYPTO_DEV_ROCKCHIP2 -+ depends on DEBUG_FS -+ help -+ Say y to enable Rockchip crypto debug stats. -+ This will create /sys/kernel/debug/rk3588_crypto/stats for displaying -+ the number of requests per algorithm and other internal stats. -+ - config CRYPTO_DEV_ZYNQMP_AES - tristate "Support for Xilinx ZynqMP AES hw accelerator" - depends on ZYNQMP_FIRMWARE || COMPILE_TEST -diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile -index 111111111111..222222222222 100644 ---- a/drivers/crypto/rockchip/Makefile -+++ b/drivers/crypto/rockchip/Makefile -@@ -3,3 +3,8 @@ obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o - rk_crypto-objs := rk3288_crypto.o \ - rk3288_crypto_skcipher.o \ - rk3288_crypto_ahash.o -+ -+obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP2) += rk_crypto2.o -+rk_crypto2-objs := rk2_crypto.o \ -+ rk2_crypto_skcipher.o \ -+ rk2_crypto_ahash.o -diff --git a/drivers/crypto/rockchip/rk2_crypto.c b/drivers/crypto/rockchip/rk2_crypto.c -new file mode 100644 -index 000000000000..111111111111 ---- /dev/null -+++ b/drivers/crypto/rockchip/rk2_crypto.c -@@ -0,0 +1,738 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * hardware cryptographic offloader for RK3568/RK3588 SoC -+ * -+ * Copyright (c) 2022-2023, Corentin Labbe -+ */ -+ -+#include "rk2_crypto.h" -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct rockchip_ip rocklist = { -+ .dev_list = LIST_HEAD_INIT(rocklist.dev_list), -+ .lock = __SPIN_LOCK_UNLOCKED(rocklist.lock), -+}; -+ -+struct rk2_crypto_dev *get_rk2_crypto(void) -+{ -+ struct rk2_crypto_dev *first; -+ -+ spin_lock(&rocklist.lock); -+ first = list_first_entry_or_null(&rocklist.dev_list, -+ struct rk2_crypto_dev, list); -+ list_rotate_left(&rocklist.dev_list); -+ spin_unlock(&rocklist.lock); -+ return first; -+} -+ -+static const struct rk2_variant rk3568_variant = { -+ .num_clks = 3, -+}; -+ -+static const struct rk2_variant rk3588_variant = { -+ .num_clks = 3, -+}; -+ -+static int rk2_crypto_get_clks(struct rk2_crypto_dev *dev) -+{ -+ int i, j, err; -+ unsigned long cr; -+ -+ dev->num_clks = devm_clk_bulk_get_all(dev->dev, &dev->clks); -+ if (dev->num_clks < dev->variant->num_clks) { -+ dev_err(dev->dev, "Missing clocks, got %d instead of %d\n", -+ dev->num_clks, dev->variant->num_clks); -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < dev->num_clks; i++) { -+ cr = clk_get_rate(dev->clks[i].clk); -+ for (j = 0; j < ARRAY_SIZE(dev->variant->rkclks); j++) { -+ if (dev->variant->rkclks[j].max == 0) -+ continue; -+ if (strcmp(dev->variant->rkclks[j].name, dev->clks[i].id)) -+ continue; -+ if (cr > dev->variant->rkclks[j].max) { -+ err = clk_set_rate(dev->clks[i].clk, -+ dev->variant->rkclks[j].max); -+ if (err) -+ dev_err(dev->dev, "Fail downclocking %s from %lu to %lu\n", -+ dev->variant->rkclks[j].name, cr, -+ dev->variant->rkclks[j].max); -+ else -+ dev_info(dev->dev, "Downclocking %s from %lu to %lu\n", -+ dev->variant->rkclks[j].name, cr, -+ dev->variant->rkclks[j].max); -+ } -+ } -+ } -+ return 0; -+} -+ -+static int rk2_crypto_enable_clk(struct rk2_crypto_dev *dev) -+{ -+ int err; -+ -+ err = clk_bulk_prepare_enable(dev->num_clks, dev->clks); -+ if (err) -+ dev_err(dev->dev, "Could not enable clock clks\n"); -+ -+ return err; -+} -+ -+static void rk2_crypto_disable_clk(struct rk2_crypto_dev *dev) -+{ -+ clk_bulk_disable_unprepare(dev->num_clks, dev->clks); -+} -+ -+/* -+ * Power management strategy: The device is suspended until a request -+ * is handled. For avoiding suspend/resume yoyo, the autosuspend is set to 2s. -+ */ -+static int rk2_crypto_pm_suspend(struct device *dev) -+{ -+ struct rk2_crypto_dev *rkdev = dev_get_drvdata(dev); -+ -+ rk2_crypto_disable_clk(rkdev); -+ reset_control_assert(rkdev->rst); -+ -+ return 0; -+} -+ -+static int rk2_crypto_pm_resume(struct device *dev) -+{ -+ struct rk2_crypto_dev *rkdev = dev_get_drvdata(dev); -+ int ret; -+ -+ ret = rk2_crypto_enable_clk(rkdev); -+ if (ret) -+ return ret; -+ -+ reset_control_deassert(rkdev->rst); -+ return 0; -+} -+ -+static const struct dev_pm_ops rk2_crypto_pm_ops = { -+ SET_RUNTIME_PM_OPS(rk2_crypto_pm_suspend, rk2_crypto_pm_resume, NULL) -+}; -+ -+static int rk2_crypto_pm_init(struct rk2_crypto_dev *rkdev) -+{ -+ int err; -+ -+ pm_runtime_use_autosuspend(rkdev->dev); -+ pm_runtime_set_autosuspend_delay(rkdev->dev, 2000); -+ -+ err = pm_runtime_set_suspended(rkdev->dev); -+ if (err) -+ return err; -+ pm_runtime_enable(rkdev->dev); -+ return err; -+} -+ -+static void rk2_crypto_pm_exit(struct rk2_crypto_dev *rkdev) -+{ -+ pm_runtime_disable(rkdev->dev); -+} -+ -+static irqreturn_t rk2_crypto_irq_handle(int irq, void *dev_id) -+{ -+ struct rk2_crypto_dev *rkc = platform_get_drvdata(dev_id); -+ u32 v; -+ -+ v = readl(rkc->reg + RK2_CRYPTO_DMA_INT_ST); -+ writel(v, rkc->reg + RK2_CRYPTO_DMA_INT_ST); -+ -+ rkc->status = 1; -+ if (v & 0xF8) { -+ dev_warn(rkc->dev, "DMA Error\n"); -+ rkc->status = 0; -+ } -+ complete(&rkc->complete); -+ -+ return IRQ_HANDLED; -+} -+ -+static struct rk2_crypto_template rk2_crypto_algs[] = { -+ { -+ .type = CRYPTO_ALG_TYPE_SKCIPHER, -+ .rk2_mode = RK2_CRYPTO_AES_ECB, -+ .alg.skcipher.base = { -+ .base.cra_name = "ecb(aes)", -+ .base.cra_driver_name = "ecb-aes-rk2", -+ .base.cra_priority = 300, -+ .base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, -+ .base.cra_blocksize = AES_BLOCK_SIZE, -+ .base.cra_ctxsize = sizeof(struct rk2_cipher_ctx), -+ .base.cra_alignmask = 0x0f, -+ .base.cra_module = THIS_MODULE, -+ -+ .init = rk2_cipher_tfm_init, -+ .exit = rk2_cipher_tfm_exit, -+ .min_keysize = AES_MIN_KEY_SIZE, -+ .max_keysize = AES_MAX_KEY_SIZE, -+ .setkey = rk2_aes_setkey, -+ .encrypt = rk2_skcipher_encrypt, -+ .decrypt = rk2_skcipher_decrypt, -+ }, -+ .alg.skcipher.op = { -+ .do_one_request = rk2_cipher_run, -+ }, -+ }, -+ { -+ .type = CRYPTO_ALG_TYPE_SKCIPHER, -+ .rk2_mode = RK2_CRYPTO_AES_CBC, -+ .alg.skcipher.base = { -+ .base.cra_name = "cbc(aes)", -+ .base.cra_driver_name = "cbc-aes-rk2", -+ .base.cra_priority = 300, -+ .base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, -+ .base.cra_blocksize = AES_BLOCK_SIZE, -+ .base.cra_ctxsize = sizeof(struct rk2_cipher_ctx), -+ .base.cra_alignmask = 0x0f, -+ .base.cra_module = THIS_MODULE, -+ -+ .init = rk2_cipher_tfm_init, -+ .exit = rk2_cipher_tfm_exit, -+ .min_keysize = AES_MIN_KEY_SIZE, -+ .max_keysize = AES_MAX_KEY_SIZE, -+ .ivsize = AES_BLOCK_SIZE, -+ .setkey = rk2_aes_setkey, -+ .encrypt = rk2_skcipher_encrypt, -+ .decrypt = rk2_skcipher_decrypt, -+ }, -+ .alg.skcipher.op = { -+ .do_one_request = rk2_cipher_run, -+ }, -+ }, -+ { -+ .type = CRYPTO_ALG_TYPE_SKCIPHER, -+ .rk2_mode = RK2_CRYPTO_AES_XTS, -+ .is_xts = true, -+ .alg.skcipher.base = { -+ .base.cra_name = "xts(aes)", -+ .base.cra_driver_name = "xts-aes-rk2", -+ .base.cra_priority = 300, -+ .base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK, -+ .base.cra_blocksize = AES_BLOCK_SIZE, -+ .base.cra_ctxsize = sizeof(struct rk2_cipher_ctx), -+ .base.cra_alignmask = 0x0f, -+ .base.cra_module = THIS_MODULE, -+ -+ .init = rk2_cipher_tfm_init, -+ .exit = rk2_cipher_tfm_exit, -+ .min_keysize = AES_MIN_KEY_SIZE * 2, -+ .max_keysize = AES_MAX_KEY_SIZE * 2, -+ .ivsize = AES_BLOCK_SIZE, -+ .setkey = rk2_aes_xts_setkey, -+ .encrypt = rk2_skcipher_encrypt, -+ .decrypt = rk2_skcipher_decrypt, -+ }, -+ .alg.skcipher.op = { -+ .do_one_request = rk2_cipher_run, -+ }, -+ }, -+ { -+ .type = CRYPTO_ALG_TYPE_AHASH, -+ .rk2_mode = RK2_CRYPTO_MD5, -+ .alg.hash.base = { -+ .init = rk2_ahash_init, -+ .update = rk2_ahash_update, -+ .final = rk2_ahash_final, -+ .finup = rk2_ahash_finup, -+ .export = rk2_ahash_export, -+ .import = rk2_ahash_import, -+ .digest = rk2_ahash_digest, -+ .init_tfm = rk2_hash_init_tfm, -+ .exit_tfm = rk2_hash_exit_tfm, -+ .halg = { -+ .digestsize = MD5_DIGEST_SIZE, -+ .statesize = sizeof(struct md5_state), -+ .base = { -+ .cra_name = "md5", -+ .cra_driver_name = "rk2-md5", -+ .cra_priority = 300, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_NEED_FALLBACK, -+ .cra_blocksize = MD5_HMAC_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct rk2_ahash_ctx), -+ .cra_module = THIS_MODULE, -+ } -+ } -+ }, -+ .alg.hash.op = { -+ .do_one_request = rk2_hash_run, -+ }, -+ -+ }, -+ { -+ .type = CRYPTO_ALG_TYPE_AHASH, -+ .rk2_mode = RK2_CRYPTO_SHA1, -+ .alg.hash.base = { -+ .init = rk2_ahash_init, -+ .update = rk2_ahash_update, -+ .final = rk2_ahash_final, -+ .finup = rk2_ahash_finup, -+ .export = rk2_ahash_export, -+ .import = rk2_ahash_import, -+ .digest = rk2_ahash_digest, -+ .init_tfm = rk2_hash_init_tfm, -+ .exit_tfm = rk2_hash_exit_tfm, -+ .halg = { -+ .digestsize = SHA1_DIGEST_SIZE, -+ .statesize = sizeof(struct sha1_state), -+ .base = { -+ .cra_name = "sha1", -+ .cra_driver_name = "rk2-sha1", -+ .cra_priority = 300, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_NEED_FALLBACK, -+ .cra_blocksize = SHA1_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct rk2_ahash_ctx), -+ .cra_module = THIS_MODULE, -+ } -+ } -+ }, -+ .alg.hash.op = { -+ .do_one_request = rk2_hash_run, -+ }, -+ }, -+ { -+ .type = CRYPTO_ALG_TYPE_AHASH, -+ .rk2_mode = RK2_CRYPTO_SHA256, -+ .alg.hash.base = { -+ .init = rk2_ahash_init, -+ .update = rk2_ahash_update, -+ .final = rk2_ahash_final, -+ .finup = rk2_ahash_finup, -+ .export = rk2_ahash_export, -+ .import = rk2_ahash_import, -+ .digest = rk2_ahash_digest, -+ .init_tfm = rk2_hash_init_tfm, -+ .exit_tfm = rk2_hash_exit_tfm, -+ .halg = { -+ .digestsize = SHA256_DIGEST_SIZE, -+ .statesize = sizeof(struct sha256_state), -+ .base = { -+ .cra_name = "sha256", -+ .cra_driver_name = "rk2-sha256", -+ .cra_priority = 300, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_NEED_FALLBACK, -+ .cra_blocksize = SHA256_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct rk2_ahash_ctx), -+ .cra_module = THIS_MODULE, -+ } -+ } -+ }, -+ .alg.hash.op = { -+ .do_one_request = rk2_hash_run, -+ }, -+ }, -+ { -+ .type = CRYPTO_ALG_TYPE_AHASH, -+ .rk2_mode = RK2_CRYPTO_SHA384, -+ .alg.hash.base = { -+ .init = rk2_ahash_init, -+ .update = rk2_ahash_update, -+ .final = rk2_ahash_final, -+ .finup = rk2_ahash_finup, -+ .export = rk2_ahash_export, -+ .import = rk2_ahash_import, -+ .digest = rk2_ahash_digest, -+ .init_tfm = rk2_hash_init_tfm, -+ .exit_tfm = rk2_hash_exit_tfm, -+ .halg = { -+ .digestsize = SHA384_DIGEST_SIZE, -+ .statesize = sizeof(struct sha512_state), -+ .base = { -+ .cra_name = "sha384", -+ .cra_driver_name = "rk2-sha384", -+ .cra_priority = 300, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_NEED_FALLBACK, -+ .cra_blocksize = SHA384_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct rk2_ahash_ctx), -+ .cra_module = THIS_MODULE, -+ } -+ } -+ }, -+ .alg.hash.op = { -+ .do_one_request = rk2_hash_run, -+ }, -+ }, -+ { -+ .type = CRYPTO_ALG_TYPE_AHASH, -+ .rk2_mode = RK2_CRYPTO_SHA512, -+ .alg.hash.base = { -+ .init = rk2_ahash_init, -+ .update = rk2_ahash_update, -+ .final = rk2_ahash_final, -+ .finup = rk2_ahash_finup, -+ .export = rk2_ahash_export, -+ .import = rk2_ahash_import, -+ .digest = rk2_ahash_digest, -+ .init_tfm = rk2_hash_init_tfm, -+ .exit_tfm = rk2_hash_exit_tfm, -+ .halg = { -+ .digestsize = SHA512_DIGEST_SIZE, -+ .statesize = sizeof(struct sha512_state), -+ .base = { -+ .cra_name = "sha512", -+ .cra_driver_name = "rk2-sha512", -+ .cra_priority = 300, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_NEED_FALLBACK, -+ .cra_blocksize = SHA512_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct rk2_ahash_ctx), -+ .cra_module = THIS_MODULE, -+ } -+ } -+ }, -+ .alg.hash.op = { -+ .do_one_request = rk2_hash_run, -+ }, -+ }, -+ { -+ .type = CRYPTO_ALG_TYPE_AHASH, -+ .rk2_mode = RK2_CRYPTO_SM3, -+ .alg.hash.base = { -+ .init = rk2_ahash_init, -+ .update = rk2_ahash_update, -+ .final = rk2_ahash_final, -+ .finup = rk2_ahash_finup, -+ .export = rk2_ahash_export, -+ .import = rk2_ahash_import, -+ .digest = rk2_ahash_digest, -+ .init_tfm = rk2_hash_init_tfm, -+ .exit_tfm = rk2_hash_exit_tfm, -+ .halg = { -+ .digestsize = SM3_DIGEST_SIZE, -+ .statesize = sizeof(struct sm3_state), -+ .base = { -+ .cra_name = "sm3", -+ .cra_driver_name = "rk2-sm3", -+ .cra_priority = 300, -+ .cra_flags = CRYPTO_ALG_ASYNC | -+ CRYPTO_ALG_NEED_FALLBACK, -+ .cra_blocksize = SM3_BLOCK_SIZE, -+ .cra_ctxsize = sizeof(struct rk2_ahash_ctx), -+ .cra_module = THIS_MODULE, -+ } -+ } -+ }, -+ .alg.hash.op = { -+ .do_one_request = rk2_hash_run, -+ }, -+ }, -+}; -+ -+#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP2_DEBUG -+static int rk2_crypto_debugfs_stats_show(struct seq_file *seq, void *v) -+{ -+ struct rk2_crypto_dev *rkc; -+ unsigned int i; -+ -+ spin_lock(&rocklist.lock); -+ list_for_each_entry(rkc, &rocklist.dev_list, list) { -+ seq_printf(seq, "%s %s requests: %lu\n", -+ dev_driver_string(rkc->dev), dev_name(rkc->dev), -+ rkc->nreq); -+ } -+ spin_unlock(&rocklist.lock); -+ -+ for (i = 0; i < ARRAY_SIZE(rk2_crypto_algs); i++) { -+ if (!rk2_crypto_algs[i].dev) -+ continue; -+ switch (rk2_crypto_algs[i].type) { -+ case CRYPTO_ALG_TYPE_SKCIPHER: -+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", -+ rk2_crypto_algs[i].alg.skcipher.base.base.cra_driver_name, -+ rk2_crypto_algs[i].alg.skcipher.base.base.cra_name, -+ rk2_crypto_algs[i].stat_req, rk2_crypto_algs[i].stat_fb); -+ seq_printf(seq, "\tfallback due to length: %lu\n", -+ rk2_crypto_algs[i].stat_fb_len); -+ seq_printf(seq, "\tfallback due to alignment: %lu\n", -+ rk2_crypto_algs[i].stat_fb_align); -+ seq_printf(seq, "\tfallback due to SGs: %lu\n", -+ rk2_crypto_algs[i].stat_fb_sgdiff); -+ break; -+ case CRYPTO_ALG_TYPE_AHASH: -+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n", -+ rk2_crypto_algs[i].alg.hash.base.halg.base.cra_driver_name, -+ rk2_crypto_algs[i].alg.hash.base.halg.base.cra_name, -+ rk2_crypto_algs[i].stat_req, rk2_crypto_algs[i].stat_fb); -+ break; -+ } -+ } -+ return 0; -+} -+ -+static int rk2_crypto_debugfs_info_show(struct seq_file *seq, void *d) -+{ -+ struct rk2_crypto_dev *rkc; -+ u32 v; -+ -+ spin_lock(&rocklist.lock); -+ list_for_each_entry(rkc, &rocklist.dev_list, list) { -+ v = readl(rkc->reg + RK2_CRYPTO_CLK_CTL); -+ seq_printf(seq, "CRYPTO_CLK_CTL %x\n", v); -+ v = readl(rkc->reg + RK2_CRYPTO_RST_CTL); -+ seq_printf(seq, "CRYPTO_RST_CTL %x\n", v); -+ -+ v = readl(rkc->reg + CRYPTO_AES_VERSION); -+ seq_printf(seq, "CRYPTO_AES_VERSION %x\n", v); -+ if (v & BIT(17)) -+ seq_puts(seq, "AES 192\n"); -+ -+ v = readl(rkc->reg + CRYPTO_DES_VERSION); -+ seq_printf(seq, "CRYPTO_DES_VERSION %x\n", v); -+ v = readl(rkc->reg + CRYPTO_SM4_VERSION); -+ seq_printf(seq, "CRYPTO_SM4_VERSION %x\n", v); -+ v = readl(rkc->reg + CRYPTO_HASH_VERSION); -+ seq_printf(seq, "CRYPTO_HASH_VERSION %x\n", v); -+ v = readl(rkc->reg + CRYPTO_HMAC_VERSION); -+ seq_printf(seq, "CRYPTO_HMAC_VERSION %x\n", v); -+ v = readl(rkc->reg + CRYPTO_RNG_VERSION); -+ seq_printf(seq, "CRYPTO_RNG_VERSION %x\n", v); -+ v = readl(rkc->reg + CRYPTO_PKA_VERSION); -+ seq_printf(seq, "CRYPTO_PKA_VERSION %x\n", v); -+ v = readl(rkc->reg + CRYPTO_CRYPTO_VERSION); -+ seq_printf(seq, "CRYPTO_CRYPTO_VERSION %x\n", v); -+ } -+ spin_unlock(&rocklist.lock); -+ -+ return 0; -+} -+ -+DEFINE_SHOW_ATTRIBUTE(rk2_crypto_debugfs_stats); -+DEFINE_SHOW_ATTRIBUTE(rk2_crypto_debugfs_info); -+ -+#endif -+ -+static void register_debugfs(struct rk2_crypto_dev *crypto_dev) -+{ -+#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP2_DEBUG -+ /* Ignore error of debugfs */ -+ rocklist.dbgfs_dir = debugfs_create_dir("rk2_crypto", NULL); -+ rocklist.dbgfs_stats = debugfs_create_file("stats", 0440, -+ rocklist.dbgfs_dir, -+ &rocklist, -+ &rk2_crypto_debugfs_stats_fops); -+ rocklist.dbgfs_stats = debugfs_create_file("info", 0440, -+ rocklist.dbgfs_dir, -+ &rocklist, -+ &rk2_crypto_debugfs_info_fops); -+#endif -+} -+ -+static int rk2_crypto_register(struct rk2_crypto_dev *rkc) -+{ -+ unsigned int i, k; -+ int err = 0; -+ -+ for (i = 0; i < ARRAY_SIZE(rk2_crypto_algs); i++) { -+ rk2_crypto_algs[i].dev = rkc; -+ switch (rk2_crypto_algs[i].type) { -+ case CRYPTO_ALG_TYPE_SKCIPHER: -+ dev_info(rkc->dev, "Register %s as %s\n", -+ rk2_crypto_algs[i].alg.skcipher.base.base.cra_name, -+ rk2_crypto_algs[i].alg.skcipher.base.base.cra_driver_name); -+ err = crypto_engine_register_skcipher(&rk2_crypto_algs[i].alg.skcipher); -+ break; -+ case CRYPTO_ALG_TYPE_AHASH: -+ dev_info(rkc->dev, "Register %s as %s %d\n", -+ rk2_crypto_algs[i].alg.hash.base.halg.base.cra_name, -+ rk2_crypto_algs[i].alg.hash.base.halg.base.cra_driver_name, i); -+ err = crypto_engine_register_ahash(&rk2_crypto_algs[i].alg.hash); -+ break; -+ default: -+ dev_err(rkc->dev, "unknown algorithm\n"); -+ } -+ if (err) -+ goto err_cipher_algs; -+ } -+ return 0; -+ -+err_cipher_algs: -+ for (k = 0; k < i; k++) { -+ if (rk2_crypto_algs[k].type == CRYPTO_ALG_TYPE_SKCIPHER) -+ crypto_engine_unregister_skcipher(&rk2_crypto_algs[k].alg.skcipher); -+ else -+ crypto_engine_unregister_ahash(&rk2_crypto_algs[k].alg.hash); -+ } -+ return err; -+} -+ -+static void rk2_crypto_unregister(void) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(rk2_crypto_algs); i++) { -+ if (rk2_crypto_algs[i].type == CRYPTO_ALG_TYPE_SKCIPHER) -+ crypto_engine_unregister_skcipher(&rk2_crypto_algs[i].alg.skcipher); -+ else -+ crypto_engine_unregister_ahash(&rk2_crypto_algs[i].alg.hash); -+ } -+} -+ -+static const struct of_device_id crypto_of_id_table[] = { -+ { .compatible = "rockchip,rk3568-crypto", -+ .data = &rk3568_variant, -+ }, -+ { .compatible = "rockchip,rk3588-crypto", -+ .data = &rk3588_variant, -+ }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, crypto_of_id_table); -+ -+static int rk2_crypto_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct rk2_crypto_dev *rkc, *first; -+ int err = 0; -+ -+ rkc = devm_kzalloc(&pdev->dev, sizeof(*rkc), GFP_KERNEL); -+ if (!rkc) { -+ err = -ENOMEM; -+ goto err_crypto; -+ } -+ -+ rkc->dev = &pdev->dev; -+ platform_set_drvdata(pdev, rkc); -+ -+ rkc->variant = of_device_get_match_data(&pdev->dev); -+ if (!rkc->variant) { -+ dev_err(&pdev->dev, "Missing variant\n"); -+ return -EINVAL; -+ } -+ -+ rkc->rst = devm_reset_control_array_get_exclusive(dev); -+ if (IS_ERR(rkc->rst)) { -+ err = PTR_ERR(rkc->rst); -+ dev_err(&pdev->dev, "Fail to get resets err=%d\n", err); -+ goto err_crypto; -+ } -+ -+ rkc->tl = dma_alloc_coherent(rkc->dev, -+ sizeof(struct rk2_crypto_lli) * MAX_LLI, -+ &rkc->t_phy, GFP_KERNEL); -+ if (!rkc->tl) { -+ dev_err(rkc->dev, "Cannot get DMA memory for task\n"); -+ err = -ENOMEM; -+ goto err_crypto; -+ } -+ -+ reset_control_assert(rkc->rst); -+ usleep_range(10, 20); -+ reset_control_deassert(rkc->rst); -+ -+ rkc->reg = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(rkc->reg)) { -+ err = PTR_ERR(rkc->reg); -+ dev_err(&pdev->dev, "Fail to get resources\n"); -+ goto err_crypto; -+ } -+ -+ err = rk2_crypto_get_clks(rkc); -+ if (err) -+ goto err_crypto; -+ -+ rkc->irq = platform_get_irq(pdev, 0); -+ if (rkc->irq < 0) { -+ dev_err(&pdev->dev, "control Interrupt is not available.\n"); -+ err = rkc->irq; -+ goto err_crypto; -+ } -+ -+ err = devm_request_irq(&pdev->dev, rkc->irq, -+ rk2_crypto_irq_handle, IRQF_SHARED, -+ "rk-crypto", pdev); -+ -+ if (err) { -+ dev_err(&pdev->dev, "irq request failed.\n"); -+ goto err_crypto; -+ } -+ -+ rkc->engine = crypto_engine_alloc_init(&pdev->dev, true); -+ crypto_engine_start(rkc->engine); -+ init_completion(&rkc->complete); -+ -+ err = rk2_crypto_pm_init(rkc); -+ if (err) -+ goto err_pm; -+ -+ err = pm_runtime_resume_and_get(&pdev->dev); -+ -+ spin_lock(&rocklist.lock); -+ first = list_first_entry_or_null(&rocklist.dev_list, -+ struct rk2_crypto_dev, list); -+ list_add_tail(&rkc->list, &rocklist.dev_list); -+ spin_unlock(&rocklist.lock); -+ -+ if (!first) { -+ dev_info(dev, "Registers crypto algos\n"); -+ err = rk2_crypto_register(rkc); -+ if (err) { -+ dev_err(dev, "Fail to register crypto algorithms"); -+ goto err_register_alg; -+ } -+ -+ register_debugfs(rkc); -+ } -+ -+ return 0; -+ -+err_register_alg: -+ rk2_crypto_pm_exit(rkc); -+err_pm: -+ crypto_engine_exit(rkc->engine); -+err_crypto: -+ dev_err(dev, "Crypto Accelerator not successfully registered\n"); -+ return err; -+} -+ -+static void rk2_crypto_remove(struct platform_device *pdev) -+{ -+ struct rk2_crypto_dev *rkc = platform_get_drvdata(pdev); -+ struct rk2_crypto_dev *first; -+ -+ spin_lock_bh(&rocklist.lock); -+ list_del(&rkc->list); -+ first = list_first_entry_or_null(&rocklist.dev_list, -+ struct rk2_crypto_dev, list); -+ spin_unlock_bh(&rocklist.lock); -+ -+ if (!first) { -+#ifdef CONFIG_CRYPTO_DEV_ROCKCHIP2_DEBUG -+ debugfs_remove_recursive(rocklist.dbgfs_dir); -+#endif -+ rk2_crypto_unregister(); -+ } -+ rk2_crypto_pm_exit(rkc); -+ crypto_engine_exit(rkc->engine); -+} -+ -+static struct platform_driver crypto_driver = { -+ .probe = rk2_crypto_probe, -+ .remove = rk2_crypto_remove, -+ .driver = { -+ .name = "rk2-crypto", -+ .pm = &rk2_crypto_pm_ops, -+ .of_match_table = crypto_of_id_table, -+ }, -+}; -+ -+module_platform_driver(crypto_driver); -+ -+MODULE_DESCRIPTION("Rockchip Crypto Engine cryptographic offloader"); -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Corentin Labbe "); -diff --git a/drivers/crypto/rockchip/rk2_crypto.h b/drivers/crypto/rockchip/rk2_crypto.h -new file mode 100644 -index 000000000000..111111111111 ---- /dev/null -+++ b/drivers/crypto/rockchip/rk2_crypto.h -@@ -0,0 +1,246 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define RK2_CRYPTO_CLK_CTL 0x0000 -+#define RK2_CRYPTO_RST_CTL 0x0004 -+ -+#define RK2_CRYPTO_DMA_INT_EN 0x0008 -+/* values for RK2_CRYPTO_DMA_INT_EN */ -+#define RK2_CRYPTO_DMA_INT_LISTDONE BIT(0) -+ -+#define RK2_CRYPTO_DMA_INT_ST 0x000C -+/* values in RK2_CRYPTO_DMA_INT_ST are the same than in RK2_CRYPTO_DMA_INT_EN */ -+ -+#define RK2_CRYPTO_DMA_CTL 0x0010 -+#define RK2_CRYPTO_DMA_CTL_START BIT(0) -+ -+#define RK2_CRYPTO_DMA_LLI_ADDR 0x0014 -+#define RK2_CRYPTO_DMA_ST 0x0018 -+#define RK2_CRYPTO_DMA_STATE 0x001C -+#define RK2_CRYPTO_DMA_LLI_RADDR 0x0020 -+#define RK2_CRYPTO_DMA_SRC_RADDR 0x0024 -+#define RK2_CRYPTO_DMA_DST_WADDR 0x0028 -+#define RK2_CRYPTO_DMA_ITEM_ID 0x002C -+ -+#define RK2_CRYPTO_FIFO_CTL 0x0040 -+ -+#define RK2_CRYPTO_BC_CTL 0x0044 -+#define RK2_CRYPTO_AES (0 << 8) -+#define RK2_CRYPTO_MODE_ECB (0 << 4) -+#define RK2_CRYPTO_MODE_CBC (1 << 4) -+#define RK2_CRYPTO_XTS (6 << 4) -+ -+#define RK2_CRYPTO_HASH_CTL 0x0048 -+#define RK2_CRYPTO_HW_PAD BIT(2) -+#define RK2_CRYPTO_SHA1 (0 << 4) -+#define RK2_CRYPTO_MD5 (1 << 4) -+#define RK2_CRYPTO_SHA224 (3 << 4) -+#define RK2_CRYPTO_SHA256 (2 << 4) -+#define RK2_CRYPTO_SHA384 (9 << 4) -+#define RK2_CRYPTO_SHA512 (8 << 4) -+#define RK2_CRYPTO_SM3 (4 << 4) -+ -+#define RK2_CRYPTO_AES_ECB (RK2_CRYPTO_AES | RK2_CRYPTO_MODE_ECB) -+#define RK2_CRYPTO_AES_CBC (RK2_CRYPTO_AES | RK2_CRYPTO_MODE_CBC) -+#define RK2_CRYPTO_AES_XTS (RK2_CRYPTO_AES | RK2_CRYPTO_XTS) -+#define RK2_CRYPTO_AES_CTR_MODE 3 -+#define RK2_CRYPTO_AES_128BIT_key (0 << 2) -+#define RK2_CRYPTO_AES_192BIT_key (1 << 2) -+#define RK2_CRYPTO_AES_256BIT_key (2 << 2) -+ -+#define RK2_CRYPTO_DEC BIT(1) -+#define RK2_CRYPTO_ENABLE BIT(0) -+ -+#define RK2_CRYPTO_CIPHER_ST 0x004C -+#define RK2_CRYPTO_CIPHER_STATE 0x0050 -+ -+#define RK2_CRYPTO_CH0_IV_0 0x0100 -+ -+#define RK2_CRYPTO_KEY0 0x0180 -+#define RK2_CRYPTO_KEY1 0x0184 -+#define RK2_CRYPTO_KEY2 0x0188 -+#define RK2_CRYPTO_KEY3 0x018C -+#define RK2_CRYPTO_KEY4 0x0190 -+#define RK2_CRYPTO_KEY5 0x0194 -+#define RK2_CRYPTO_KEY6 0x0198 -+#define RK2_CRYPTO_KEY7 0x019C -+#define RK2_CRYPTO_CH4_KEY0 0x01c0 -+ -+#define RK2_CRYPTO_CH0_PC_LEN_0 0x0280 -+ -+#define RK2_CRYPTO_CH0_IV_LEN 0x0300 -+ -+#define RK2_CRYPTO_HASH_DOUT_0 0x03A0 -+#define RK2_CRYPTO_HASH_VALID 0x03E4 -+ -+#define RK2_CRYPTO_TRNG_CTL 0x0400 -+#define RK2_CRYPTO_TRNG_START BIT(0) -+#define RK2_CRYPTO_TRNG_ENABLE BIT(1) -+#define RK2_CRYPTO_TRNG_256 (0x3 << 4) -+#define RK2_CRYPTO_TRNG_SAMPLE_CNT 0x0404 -+#define RK2_CRYPTO_TRNG_DOUT 0x0410 -+ -+#define CRYPTO_AES_VERSION 0x0680 -+#define CRYPTO_DES_VERSION 0x0684 -+#define CRYPTO_SM4_VERSION 0x0688 -+#define CRYPTO_HASH_VERSION 0x068C -+#define CRYPTO_HMAC_VERSION 0x0690 -+#define CRYPTO_RNG_VERSION 0x0694 -+#define CRYPTO_PKA_VERSION 0x0698 -+#define CRYPTO_CRYPTO_VERSION 0x06F0 -+ -+#define RK2_LLI_DMA_CTRL_SRC_INT BIT(10) -+#define RK2_LLI_DMA_CTRL_DST_INT BIT(9) -+#define RK2_LLI_DMA_CTRL_LIST_INT BIT(8) -+#define RK2_LLI_DMA_CTRL_LAST BIT(0) -+ -+#define RK2_LLI_STRING_LAST BIT(2) -+#define RK2_LLI_STRING_FIRST BIT(1) -+#define RK2_LLI_CIPHER_START BIT(0) -+ -+#define RK2_MAX_CLKS 4 -+ -+#define MAX_LLI 20 -+ -+struct rk2_crypto_lli { -+ __le32 src_addr; -+ __le32 src_len; -+ __le32 dst_addr; -+ __le32 dst_len; -+ __le32 user; -+ __le32 iv; -+ __le32 dma_ctrl; -+ __le32 next; -+}; -+ -+/* -+ * struct rockchip_ip - struct for managing a list of RK crypto instance -+ * @dev_list: Used for doing a list of rk2_crypto_dev -+ * @lock: Control access to dev_list -+ * @dbgfs_dir: Debugfs dentry for statistic directory -+ * @dbgfs_stats: Debugfs dentry for statistic counters -+ */ -+struct rockchip_ip { -+ struct list_head dev_list; -+ spinlock_t lock; /* Control access to dev_list */ -+ struct dentry *dbgfs_dir; -+ struct dentry *dbgfs_stats; -+}; -+ -+struct rk2_clks { -+ const char *name; -+ unsigned long max; -+}; -+ -+struct rk2_variant { -+ int num_clks; -+ struct rk2_clks rkclks[RK2_MAX_CLKS]; -+}; -+ -+struct rk2_crypto_dev { -+ struct list_head list; -+ struct device *dev; -+ struct clk_bulk_data *clks; -+ int num_clks; -+ struct reset_control *rst; -+ void __iomem *reg; -+ int irq; -+ const struct rk2_variant *variant; -+ unsigned long nreq; -+ struct crypto_engine *engine; -+ struct completion complete; -+ int status; -+ struct rk2_crypto_lli *tl; -+ dma_addr_t t_phy; -+}; -+ -+/* the private variable of hash */ -+struct rk2_ahash_ctx { -+ /* for fallback */ -+ struct crypto_ahash *fallback_tfm; -+}; -+ -+/* the private variable of hash for fallback */ -+struct rk2_ahash_rctx { -+ struct rk2_crypto_dev *dev; -+ struct ahash_request fallback_req; -+ u32 mode; -+ int nrsgs; -+}; -+ -+/* the private variable of cipher */ -+struct rk2_cipher_ctx { -+ unsigned int keylen; -+ u8 key[AES_MAX_KEY_SIZE * 2]; -+ u8 iv[AES_BLOCK_SIZE]; -+ struct crypto_skcipher *fallback_tfm; -+}; -+ -+struct rk2_cipher_rctx { -+ struct rk2_crypto_dev *dev; -+ u8 backup_iv[AES_BLOCK_SIZE]; -+ u32 mode; -+ struct skcipher_request fallback_req; // keep at the end -+}; -+ -+struct rk2_crypto_template { -+ u32 type; -+ u32 rk2_mode; -+ bool is_xts; -+ struct rk2_crypto_dev *dev; -+ union { -+ struct skcipher_engine_alg skcipher; -+ struct ahash_engine_alg hash; -+ } alg; -+ unsigned long stat_req; -+ unsigned long stat_fb; -+ unsigned long stat_fb_len; -+ unsigned long stat_fb_sglen; -+ unsigned long stat_fb_align; -+ unsigned long stat_fb_sgdiff; -+}; -+ -+struct rk2_crypto_dev *get_rk2_crypto(void); -+int rk2_cipher_run(struct crypto_engine *engine, void *async_req); -+int rk2_hash_run(struct crypto_engine *engine, void *breq); -+ -+int rk2_cipher_tfm_init(struct crypto_skcipher *tfm); -+void rk2_cipher_tfm_exit(struct crypto_skcipher *tfm); -+int rk2_aes_setkey(struct crypto_skcipher *cipher, const u8 *key, -+ unsigned int keylen); -+int rk2_aes_xts_setkey(struct crypto_skcipher *cipher, const u8 *key, -+ unsigned int keylen); -+int rk2_skcipher_encrypt(struct skcipher_request *req); -+int rk2_skcipher_decrypt(struct skcipher_request *req); -+int rk2_aes_ecb_encrypt(struct skcipher_request *req); -+int rk2_aes_ecb_decrypt(struct skcipher_request *req); -+int rk2_aes_cbc_encrypt(struct skcipher_request *req); -+int rk2_aes_cbc_decrypt(struct skcipher_request *req); -+ -+int rk2_ahash_init(struct ahash_request *req); -+int rk2_ahash_update(struct ahash_request *req); -+int rk2_ahash_final(struct ahash_request *req); -+int rk2_ahash_finup(struct ahash_request *req); -+int rk2_ahash_import(struct ahash_request *req, const void *in); -+int rk2_ahash_export(struct ahash_request *req, void *out); -+int rk2_ahash_digest(struct ahash_request *req); -+int rk2_hash_init_tfm(struct crypto_ahash *tfm); -+void rk2_hash_exit_tfm(struct crypto_ahash *tfm); -diff --git a/drivers/crypto/rockchip/rk2_crypto_ahash.c b/drivers/crypto/rockchip/rk2_crypto_ahash.c -new file mode 100644 -index 000000000000..111111111111 ---- /dev/null -+++ b/drivers/crypto/rockchip/rk2_crypto_ahash.c -@@ -0,0 +1,344 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+/* -+ * Crypto offloader support for Rockchip RK3568/RK3588 -+ * -+ * Copyright (c) 2022-2023 Corentin Labbe -+ */ -+#include -+#include -+#include "rk2_crypto.h" -+ -+static bool rk2_ahash_need_fallback(struct ahash_request *areq) -+{ -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); -+ struct ahash_alg *alg = crypto_ahash_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.hash.base); -+ struct scatterlist *sg; -+ -+ sg = areq->src; -+ while (sg) { -+ if (!IS_ALIGNED(sg->offset, sizeof(u32))) { -+ algt->stat_fb_align++; -+ return true; -+ } -+ if (sg->length % 4) { -+ algt->stat_fb_sglen++; -+ return true; -+ } -+ sg = sg_next(sg); -+ } -+ return false; -+} -+ -+static int rk2_ahash_digest_fb(struct ahash_request *areq) -+{ -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(areq); -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); -+ struct rk2_ahash_ctx *tfmctx = crypto_ahash_ctx(tfm); -+ struct ahash_alg *alg = crypto_ahash_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.hash.base); -+ -+ algt->stat_fb++; -+ -+ ahash_request_set_tfm(&rctx->fallback_req, tfmctx->fallback_tfm); -+ rctx->fallback_req.base.flags = areq->base.flags & -+ CRYPTO_TFM_REQ_MAY_SLEEP; -+ -+ rctx->fallback_req.nbytes = areq->nbytes; -+ rctx->fallback_req.src = areq->src; -+ rctx->fallback_req.result = areq->result; -+ -+ return crypto_ahash_digest(&rctx->fallback_req); -+} -+ -+static int zero_message_process(struct ahash_request *req) -+{ -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); -+ struct ahash_alg *alg = crypto_ahash_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.hash.base); -+ int digestsize = crypto_ahash_digestsize(tfm); -+ -+ switch (algt->rk2_mode) { -+ case RK2_CRYPTO_SHA1: -+ memcpy(req->result, sha1_zero_message_hash, digestsize); -+ break; -+ case RK2_CRYPTO_SHA256: -+ memcpy(req->result, sha256_zero_message_hash, digestsize); -+ break; -+ case RK2_CRYPTO_SHA384: -+ memcpy(req->result, sha384_zero_message_hash, digestsize); -+ break; -+ case RK2_CRYPTO_SHA512: -+ memcpy(req->result, sha512_zero_message_hash, digestsize); -+ break; -+ case RK2_CRYPTO_MD5: -+ memcpy(req->result, md5_zero_message_hash, digestsize); -+ break; -+ case RK2_CRYPTO_SM3: -+ memcpy(req->result, sm3_zero_message_hash, digestsize); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+int rk2_ahash_init(struct ahash_request *req) -+{ -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(req); -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); -+ struct rk2_ahash_ctx *ctx = crypto_ahash_ctx(tfm); -+ -+ ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm); -+ rctx->fallback_req.base.flags = req->base.flags & -+ CRYPTO_TFM_REQ_MAY_SLEEP; -+ -+ return crypto_ahash_init(&rctx->fallback_req); -+} -+ -+int rk2_ahash_update(struct ahash_request *req) -+{ -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(req); -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); -+ struct rk2_ahash_ctx *ctx = crypto_ahash_ctx(tfm); -+ -+ ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm); -+ rctx->fallback_req.base.flags = req->base.flags & -+ CRYPTO_TFM_REQ_MAY_SLEEP; -+ rctx->fallback_req.nbytes = req->nbytes; -+ rctx->fallback_req.src = req->src; -+ -+ return crypto_ahash_update(&rctx->fallback_req); -+} -+ -+int rk2_ahash_final(struct ahash_request *req) -+{ -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(req); -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); -+ struct rk2_ahash_ctx *ctx = crypto_ahash_ctx(tfm); -+ -+ ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm); -+ rctx->fallback_req.base.flags = req->base.flags & -+ CRYPTO_TFM_REQ_MAY_SLEEP; -+ rctx->fallback_req.result = req->result; -+ -+ return crypto_ahash_final(&rctx->fallback_req); -+} -+ -+int rk2_ahash_finup(struct ahash_request *req) -+{ -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(req); -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); -+ struct rk2_ahash_ctx *ctx = crypto_ahash_ctx(tfm); -+ -+ ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm); -+ rctx->fallback_req.base.flags = req->base.flags & -+ CRYPTO_TFM_REQ_MAY_SLEEP; -+ -+ rctx->fallback_req.nbytes = req->nbytes; -+ rctx->fallback_req.src = req->src; -+ rctx->fallback_req.result = req->result; -+ -+ return crypto_ahash_finup(&rctx->fallback_req); -+} -+ -+int rk2_ahash_import(struct ahash_request *req, const void *in) -+{ -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(req); -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); -+ struct rk2_ahash_ctx *ctx = crypto_ahash_ctx(tfm); -+ -+ ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm); -+ rctx->fallback_req.base.flags = req->base.flags & -+ CRYPTO_TFM_REQ_MAY_SLEEP; -+ -+ return crypto_ahash_import(&rctx->fallback_req, in); -+} -+ -+int rk2_ahash_export(struct ahash_request *req, void *out) -+{ -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(req); -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); -+ struct rk2_ahash_ctx *ctx = crypto_ahash_ctx(tfm); -+ -+ ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm); -+ rctx->fallback_req.base.flags = req->base.flags & -+ CRYPTO_TFM_REQ_MAY_SLEEP; -+ -+ return crypto_ahash_export(&rctx->fallback_req, out); -+} -+ -+int rk2_ahash_digest(struct ahash_request *req) -+{ -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(req); -+ struct rk2_crypto_dev *dev; -+ struct crypto_engine *engine; -+ -+ if (rk2_ahash_need_fallback(req)) -+ return rk2_ahash_digest_fb(req); -+ -+ if (!req->nbytes) -+ return zero_message_process(req); -+ -+ dev = get_rk2_crypto(); -+ -+ rctx->dev = dev; -+ engine = dev->engine; -+ -+ return crypto_transfer_hash_request_to_engine(engine, req); -+} -+ -+static int rk2_hash_prepare(struct crypto_engine *engine, void *breq) -+{ -+ struct ahash_request *areq = container_of(breq, struct ahash_request, base); -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(areq); -+ struct rk2_crypto_dev *rkc = rctx->dev; -+ int ret; -+ -+ ret = dma_map_sg(rkc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); -+ if (ret <= 0) -+ return -EINVAL; -+ -+ rctx->nrsgs = ret; -+ -+ return 0; -+} -+ -+static void rk2_hash_unprepare(struct crypto_engine *engine, void *breq) -+{ -+ struct ahash_request *areq = container_of(breq, struct ahash_request, base); -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(areq); -+ struct rk2_crypto_dev *rkc = rctx->dev; -+ -+ dma_unmap_sg(rkc->dev, areq->src, rctx->nrsgs, DMA_TO_DEVICE); -+} -+ -+int rk2_hash_run(struct crypto_engine *engine, void *breq) -+{ -+ struct ahash_request *areq = container_of(breq, struct ahash_request, base); -+ struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq); -+ struct rk2_ahash_rctx *rctx = ahash_request_ctx(areq); -+ struct ahash_alg *alg = crypto_ahash_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.hash.base); -+ struct scatterlist *sgs = areq->src; -+ struct rk2_crypto_dev *rkc = rctx->dev; -+ struct rk2_crypto_lli *dd = &rkc->tl[0]; -+ int ddi = 0; -+ int err = 0; -+ unsigned int len = areq->nbytes; -+ unsigned int todo; -+ u32 v; -+ int i; -+ -+ err = rk2_hash_prepare(engine, breq); -+ -+ err = pm_runtime_resume_and_get(rkc->dev); -+ if (err) -+ return err; -+ -+ dev_dbg(rkc->dev, "%s %s len=%d\n", __func__, -+ crypto_tfm_alg_name(areq->base.tfm), areq->nbytes); -+ -+ algt->stat_req++; -+ rkc->nreq++; -+ -+ rctx->mode = algt->rk2_mode; -+ rctx->mode |= 0xffff0000; -+ rctx->mode |= RK2_CRYPTO_ENABLE | RK2_CRYPTO_HW_PAD; -+ writel(rctx->mode, rkc->reg + RK2_CRYPTO_HASH_CTL); -+ -+ while (sgs && len > 0) { -+ dd = &rkc->tl[ddi]; -+ -+ todo = min(sg_dma_len(sgs), len); -+ dd->src_addr = sg_dma_address(sgs); -+ dd->src_len = todo; -+ dd->dst_addr = 0; -+ dd->dst_len = 0; -+ dd->dma_ctrl = ddi << 24; -+ dd->iv = 0; -+ dd->next = rkc->t_phy + sizeof(struct rk2_crypto_lli) * (ddi + 1); -+ -+ if (ddi == 0) -+ dd->user = RK2_LLI_CIPHER_START | RK2_LLI_STRING_FIRST; -+ else -+ dd->user = 0; -+ -+ len -= todo; -+ dd->dma_ctrl |= RK2_LLI_DMA_CTRL_SRC_INT; -+ if (len == 0) { -+ dd->user |= RK2_LLI_STRING_LAST; -+ dd->dma_ctrl |= RK2_LLI_DMA_CTRL_LAST; -+ } -+ dev_dbg(rkc->dev, "HASH SG %d sglen=%d user=%x dma=%x mode=%x len=%d todo=%d phy=%llx\n", -+ ddi, sgs->length, dd->user, dd->dma_ctrl, rctx->mode, len, todo, rkc->t_phy); -+ -+ sgs = sg_next(sgs); -+ ddi++; -+ } -+ dd->next = 1; -+ writel(RK2_CRYPTO_DMA_INT_LISTDONE | 0x7F, rkc->reg + RK2_CRYPTO_DMA_INT_EN); -+ -+ writel(rkc->t_phy, rkc->reg + RK2_CRYPTO_DMA_LLI_ADDR); -+ -+ reinit_completion(&rkc->complete); -+ rkc->status = 0; -+ -+ writel(RK2_CRYPTO_DMA_CTL_START | RK2_CRYPTO_DMA_CTL_START << 16, rkc->reg + RK2_CRYPTO_DMA_CTL); -+ -+ wait_for_completion_interruptible_timeout(&rkc->complete, -+ msecs_to_jiffies(2000)); -+ if (!rkc->status) { -+ dev_err(rkc->dev, "DMA timeout\n"); -+ err = -EFAULT; -+ goto theend; -+ } -+ -+ readl_poll_timeout_atomic(rkc->reg + RK2_CRYPTO_HASH_VALID, v, v == 1, -+ 10, 1000); -+ -+ for (i = 0; i < crypto_ahash_digestsize(tfm) / 4; i++) { -+ v = readl(rkc->reg + RK2_CRYPTO_HASH_DOUT_0 + i * 4); -+ put_unaligned_le32(be32_to_cpu(v), areq->result + i * 4); -+ } -+ -+theend: -+ pm_runtime_put_autosuspend(rkc->dev); -+ -+ rk2_hash_unprepare(engine, breq); -+ -+ local_bh_disable(); -+ crypto_finalize_hash_request(engine, breq, err); -+ local_bh_enable(); -+ -+ return 0; -+} -+ -+int rk2_hash_init_tfm(struct crypto_ahash *tfm) -+{ -+ struct rk2_ahash_ctx *tctx = crypto_ahash_ctx(tfm); -+ const char *alg_name = crypto_ahash_alg_name(tfm); -+ struct ahash_alg *alg = crypto_ahash_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.hash.base); -+ -+ /* for fallback */ -+ tctx->fallback_tfm = crypto_alloc_ahash(alg_name, 0, -+ CRYPTO_ALG_NEED_FALLBACK); -+ if (IS_ERR(tctx->fallback_tfm)) { -+ dev_err(algt->dev->dev, "Could not load fallback driver.\n"); -+ return PTR_ERR(tctx->fallback_tfm); -+ } -+ -+ crypto_ahash_set_reqsize(tfm, -+ sizeof(struct rk2_ahash_rctx) + -+ crypto_ahash_reqsize(tctx->fallback_tfm)); -+ return 0; -+} -+ -+void rk2_hash_exit_tfm(struct crypto_ahash *tfm) -+{ -+ struct rk2_ahash_ctx *tctx = crypto_ahash_ctx(tfm); -+ -+ crypto_free_ahash(tctx->fallback_tfm); -+} -diff --git a/drivers/crypto/rockchip/rk2_crypto_skcipher.c b/drivers/crypto/rockchip/rk2_crypto_skcipher.c -new file mode 100644 -index 000000000000..111111111111 ---- /dev/null -+++ b/drivers/crypto/rockchip/rk2_crypto_skcipher.c -@@ -0,0 +1,576 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * hardware cryptographic offloader for RK3568/RK3588 SoC -+ * -+ * Copyright (c) 2022-2023 Corentin Labbe -+ */ -+#include -+#include "rk2_crypto.h" -+ -+static void rk2_print(struct rk2_crypto_dev *rkc) -+{ -+ u32 v; -+ -+ v = readl(rkc->reg + RK2_CRYPTO_DMA_ST); -+ dev_info(rkc->dev, "DMA_ST %x\n", v); -+ switch (v) { -+ case 0: -+ dev_info(rkc->dev, "DMA_ST: DMA IDLE\n"); -+ break; -+ case 1: -+ dev_info(rkc->dev, "DMA_ST: DMA BUSY\n"); -+ break; -+ default: -+ dev_err(rkc->dev, "DMA_ST: invalid value\n"); -+ } -+ -+ v = readl(rkc->reg + RK2_CRYPTO_DMA_STATE); -+ dev_info(rkc->dev, "DMA_STATE %x\n", v); -+ -+ switch (v & 0x3) { -+ case 0: -+ dev_info(rkc->dev, "DMA_STATE: DMA DST IDLE\n"); -+ break; -+ case 1: -+ dev_info(rkc->dev, "DMA_STATE: DMA DST LOAD\n"); -+ break; -+ case 2: -+ dev_info(rkc->dev, "DMA_STATE: DMA DST WORK\n"); -+ break; -+ default: -+ dev_err(rkc->dev, "DMA DST invalid\n"); -+ break; -+ } -+ switch (v & 0xC) { -+ case 0: -+ dev_info(rkc->dev, "DMA_STATE: DMA SRC IDLE\n"); -+ break; -+ case 1: -+ dev_info(rkc->dev, "DMA_STATE: DMA SRC LOAD\n"); -+ break; -+ case 2: -+ dev_info(rkc->dev, "DMA_STATE: DMA SRC WORK\n"); -+ break; -+ default: -+ dev_err(rkc->dev, "DMA_STATE: DMA SRC invalid\n"); -+ break; -+ } -+ switch (v & 0x30) { -+ case 0: -+ dev_info(rkc->dev, "DMA_STATE: DMA LLI IDLE\n"); -+ break; -+ case 1: -+ dev_info(rkc->dev, "DMA_STATE: DMA LLI LOAD\n"); -+ break; -+ case 2: -+ dev_info(rkc->dev, "DMA LLI WORK\n"); -+ break; -+ default: -+ dev_err(rkc->dev, "DMA LLI invalid\n"); -+ break; -+ } -+ -+ v = readl(rkc->reg + RK2_CRYPTO_DMA_LLI_RADDR); -+ dev_info(rkc->dev, "DMA_LLI_RADDR %x\n", v); -+ v = readl(rkc->reg + RK2_CRYPTO_DMA_SRC_RADDR); -+ dev_info(rkc->dev, "DMA_SRC_RADDR %x\n", v); -+ v = readl(rkc->reg + RK2_CRYPTO_DMA_DST_WADDR); -+ dev_info(rkc->dev, "DMA_LLI_WADDR %x\n", v); -+ v = readl(rkc->reg + RK2_CRYPTO_DMA_ITEM_ID); -+ dev_info(rkc->dev, "DMA_LLI_ITEMID %x\n", v); -+ -+ v = readl(rkc->reg + RK2_CRYPTO_CIPHER_ST); -+ dev_info(rkc->dev, "CIPHER_ST %x\n", v); -+ if (v & BIT(0)) -+ dev_info(rkc->dev, "CIPHER_ST: BLOCK CIPHER BUSY\n"); -+ else -+ dev_info(rkc->dev, "CIPHER_ST: BLOCK CIPHER IDLE\n"); -+ if (v & BIT(2)) -+ dev_info(rkc->dev, "CIPHER_ST: HASH BUSY\n"); -+ else -+ dev_info(rkc->dev, "CIPHER_ST: HASH IDLE\n"); -+ if (v & BIT(2)) -+ dev_info(rkc->dev, "CIPHER_ST: OTP KEY VALID\n"); -+ else -+ dev_info(rkc->dev, "CIPHER_ST: OTP KEY INVALID\n"); -+ -+ v = readl(rkc->reg + RK2_CRYPTO_CIPHER_STATE); -+ dev_info(rkc->dev, "CIPHER_STATE %x\n", v); -+ switch (v & 0x3) { -+ case 0: -+ dev_info(rkc->dev, "serial: IDLE state\n"); -+ break; -+ case 1: -+ dev_info(rkc->dev, "serial: PRE state\n"); -+ break; -+ case 2: -+ dev_info(rkc->dev, "serial: BULK state\n"); -+ break; -+ default: -+ dev_info(rkc->dev, "serial: reserved state\n"); -+ break; -+ } -+ switch (v & 0xC) { -+ case 0: -+ dev_info(rkc->dev, "mac_state: IDLE state\n"); -+ break; -+ case 1: -+ dev_info(rkc->dev, "mac_state: PRE state\n"); -+ break; -+ case 2: -+ dev_info(rkc->dev, "mac_state: BULK state\n"); -+ break; -+ default: -+ dev_info(rkc->dev, "mac_state: reserved state\n"); -+ break; -+ } -+ switch (v & 0x30) { -+ case 0: -+ dev_info(rkc->dev, "parallel_state: IDLE state\n"); -+ break; -+ case 1: -+ dev_info(rkc->dev, "parallel_state: PRE state\n"); -+ break; -+ case 2: -+ dev_info(rkc->dev, "parallel_state: BULK state\n"); -+ break; -+ default: -+ dev_info(rkc->dev, "parallel_state: reserved state\n"); -+ break; -+ } -+ switch (v & 0xC0) { -+ case 0: -+ dev_info(rkc->dev, "ccm_state: IDLE state\n"); -+ break; -+ case 1: -+ dev_info(rkc->dev, "ccm_state: PRE state\n"); -+ break; -+ case 2: -+ dev_info(rkc->dev, "ccm_state: NA state\n"); -+ break; -+ default: -+ dev_info(rkc->dev, "ccm_state: reserved state\n"); -+ break; -+ } -+ switch (v & 0xF00) { -+ case 0: -+ dev_info(rkc->dev, "gcm_state: IDLE state\n"); -+ break; -+ case 1: -+ dev_info(rkc->dev, "gcm_state: PRE state\n"); -+ break; -+ case 2: -+ dev_info(rkc->dev, "gcm_state: NA state\n"); -+ break; -+ case 3: -+ dev_info(rkc->dev, "gcm_state: PC state\n"); -+ break; -+ } -+ switch (v & 0xC00) { -+ case 0x1: -+ dev_info(rkc->dev, "hash_state: IDLE state\n"); -+ break; -+ case 0x2: -+ dev_info(rkc->dev, "hash_state: IPAD state\n"); -+ break; -+ case 0x4: -+ dev_info(rkc->dev, "hash_state: TEXT state\n"); -+ break; -+ case 0x8: -+ dev_info(rkc->dev, "hash_state: OPAD state\n"); -+ break; -+ case 0x10: -+ dev_info(rkc->dev, "hash_state: OPAD EXT state\n"); -+ break; -+ default: -+ dev_info(rkc->dev, "hash_state: invalid state\n"); -+ break; -+ } -+ -+ v = readl(rkc->reg + RK2_CRYPTO_DMA_INT_ST); -+ dev_info(rkc->dev, "RK2_CRYPTO_DMA_INT_ST %x\n", v); -+} -+ -+static int rk2_cipher_need_fallback(struct skcipher_request *req) -+{ -+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.skcipher.base); -+ struct scatterlist *sgs, *sgd; -+ unsigned int stodo, dtodo, len; -+ unsigned int bs = crypto_skcipher_blocksize(tfm); -+ -+ if (!req->cryptlen) -+ return true; -+ -+ if (algt->is_xts) { -+ if (sg_nents_for_len(req->src, req->cryptlen) > 1) -+ return true; -+ if (sg_nents_for_len(req->dst, req->cryptlen) > 1) -+ return true; -+ } -+ -+ len = req->cryptlen; -+ sgs = req->src; -+ sgd = req->dst; -+ while (sgs && sgd) { -+ if (!IS_ALIGNED(sgs->offset, sizeof(u32))) { -+ algt->stat_fb_align++; -+ return true; -+ } -+ if (!IS_ALIGNED(sgd->offset, sizeof(u32))) { -+ algt->stat_fb_align++; -+ return true; -+ } -+ stodo = min(len, sgs->length); -+ if (stodo % bs) { -+ algt->stat_fb_len++; -+ return true; -+ } -+ dtodo = min(len, sgd->length); -+ if (dtodo % bs) { -+ algt->stat_fb_len++; -+ return true; -+ } -+ if (stodo != dtodo) { -+ algt->stat_fb_sgdiff++; -+ return true; -+ } -+ len -= stodo; -+ sgs = sg_next(sgs); -+ sgd = sg_next(sgd); -+ } -+ return false; -+} -+ -+static int rk2_cipher_fallback(struct skcipher_request *areq) -+{ -+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); -+ struct rk2_cipher_ctx *op = crypto_skcipher_ctx(tfm); -+ struct rk2_cipher_rctx *rctx = skcipher_request_ctx(areq); -+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.skcipher.base); -+ int err; -+ -+ algt->stat_fb++; -+ -+ skcipher_request_set_tfm(&rctx->fallback_req, op->fallback_tfm); -+ skcipher_request_set_callback(&rctx->fallback_req, areq->base.flags, -+ areq->base.complete, areq->base.data); -+ skcipher_request_set_crypt(&rctx->fallback_req, areq->src, areq->dst, -+ areq->cryptlen, areq->iv); -+ if (rctx->mode & RK2_CRYPTO_DEC) -+ err = crypto_skcipher_decrypt(&rctx->fallback_req); -+ else -+ err = crypto_skcipher_encrypt(&rctx->fallback_req); -+ return err; -+} -+ -+static int rk2_cipher_handle_req(struct skcipher_request *req) -+{ -+ struct rk2_cipher_rctx *rctx = skcipher_request_ctx(req); -+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -+ struct rk2_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -+ struct rk2_crypto_dev *rkc; -+ struct crypto_engine *engine; -+ -+ if (ctx->keylen == AES_KEYSIZE_192 * 2) -+ return rk2_cipher_fallback(req); -+ -+ if (rk2_cipher_need_fallback(req)) -+ return rk2_cipher_fallback(req); -+ -+ rkc = get_rk2_crypto(); -+ -+ engine = rkc->engine; -+ rctx->dev = rkc; -+ -+ return crypto_transfer_skcipher_request_to_engine(engine, req); -+} -+ -+int rk2_aes_xts_setkey(struct crypto_skcipher *cipher, const u8 *key, -+ unsigned int keylen) -+{ -+ struct crypto_tfm *tfm = crypto_skcipher_tfm(cipher); -+ struct rk2_cipher_ctx *ctx = crypto_tfm_ctx(tfm); -+ int err; -+ -+ err = xts_verify_key(cipher, key, keylen); -+ if (err) -+ return err; -+ -+ ctx->keylen = keylen; -+ memcpy(ctx->key, key, keylen); -+ -+ return crypto_skcipher_setkey(ctx->fallback_tfm, key, keylen); -+} -+ -+int rk2_aes_setkey(struct crypto_skcipher *cipher, const u8 *key, -+ unsigned int keylen) -+{ -+ struct crypto_tfm *tfm = crypto_skcipher_tfm(cipher); -+ struct rk2_cipher_ctx *ctx = crypto_tfm_ctx(tfm); -+ -+ if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 && -+ keylen != AES_KEYSIZE_256) -+ return -EINVAL; -+ ctx->keylen = keylen; -+ memcpy(ctx->key, key, keylen); -+ -+ return crypto_skcipher_setkey(ctx->fallback_tfm, key, keylen); -+} -+ -+int rk2_skcipher_encrypt(struct skcipher_request *req) -+{ -+ struct rk2_cipher_rctx *rctx = skcipher_request_ctx(req); -+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.skcipher.base); -+ -+ rctx->mode = algt->rk2_mode; -+ return rk2_cipher_handle_req(req); -+} -+ -+int rk2_skcipher_decrypt(struct skcipher_request *req) -+{ -+ struct rk2_cipher_rctx *rctx = skcipher_request_ctx(req); -+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req); -+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.skcipher.base); -+ -+ rctx->mode = algt->rk2_mode | RK2_CRYPTO_DEC; -+ return rk2_cipher_handle_req(req); -+} -+ -+int rk2_cipher_run(struct crypto_engine *engine, void *async_req) -+{ -+ struct skcipher_request *areq = container_of(async_req, struct skcipher_request, base); -+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); -+ struct rk2_cipher_rctx *rctx = skcipher_request_ctx(areq); -+ struct rk2_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -+ struct scatterlist *sgs, *sgd; -+ int err = 0; -+ int ivsize = crypto_skcipher_ivsize(tfm); -+ unsigned int len = areq->cryptlen; -+ unsigned int todo; -+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.skcipher.base); -+ struct rk2_crypto_dev *rkc = rctx->dev; -+ struct rk2_crypto_lli *dd = &rkc->tl[0]; -+ u32 m, v; -+ u32 *rkey = (u32 *)ctx->key; -+ u32 *riv = (u32 *)areq->iv; -+ int i; -+ unsigned int offset; -+ -+ algt->stat_req++; -+ rkc->nreq++; -+ -+ m = rctx->mode | RK2_CRYPTO_ENABLE; -+ if (algt->is_xts) { -+ switch (ctx->keylen) { -+ case AES_KEYSIZE_128 * 2: -+ m |= RK2_CRYPTO_AES_128BIT_key; -+ break; -+ case AES_KEYSIZE_256 * 2: -+ m |= RK2_CRYPTO_AES_256BIT_key; -+ break; -+ default: -+ dev_err(rkc->dev, "Invalid key length %u\n", ctx->keylen); -+ return -EINVAL; -+ } -+ } else { -+ switch (ctx->keylen) { -+ case AES_KEYSIZE_128: -+ m |= RK2_CRYPTO_AES_128BIT_key; -+ break; -+ case AES_KEYSIZE_192: -+ m |= RK2_CRYPTO_AES_192BIT_key; -+ break; -+ case AES_KEYSIZE_256: -+ m |= RK2_CRYPTO_AES_256BIT_key; -+ break; -+ default: -+ dev_err(rkc->dev, "Invalid key length %u\n", ctx->keylen); -+ return -EINVAL; -+ } -+ } -+ -+ err = pm_runtime_resume_and_get(rkc->dev); -+ if (err) -+ return err; -+ -+ /* the upper bits are a write enable mask, so we need to write 1 to all -+ * upper 16 bits to allow write to the 16 lower bits -+ */ -+ m |= 0xffff0000; -+ -+ dev_dbg(rkc->dev, "%s %s len=%u keylen=%u mode=%x\n", __func__, -+ crypto_tfm_alg_name(areq->base.tfm), -+ areq->cryptlen, ctx->keylen, m); -+ sgs = areq->src; -+ sgd = areq->dst; -+ -+ while (sgs && sgd && len) { -+ ivsize = crypto_skcipher_ivsize(tfm); -+ if (areq->iv && crypto_skcipher_ivsize(tfm) > 0) { -+ if (rctx->mode & RK2_CRYPTO_DEC) { -+ offset = sgs->length - ivsize; -+ scatterwalk_map_and_copy(rctx->backup_iv, sgs, -+ offset, ivsize, 0); -+ } -+ } -+ -+ dev_dbg(rkc->dev, "SG len=%u mode=%x ivsize=%u\n", sgs->length, m, ivsize); -+ -+ if (sgs == sgd) { -+ err = dma_map_sg(rkc->dev, sgs, 1, DMA_BIDIRECTIONAL); -+ if (err != 1) { -+ dev_err(rkc->dev, "Invalid sg number %d\n", err); -+ err = -EINVAL; -+ goto theend; -+ } -+ } else { -+ err = dma_map_sg(rkc->dev, sgs, 1, DMA_TO_DEVICE); -+ if (err != 1) { -+ dev_err(rkc->dev, "Invalid sg number %d\n", err); -+ err = -EINVAL; -+ goto theend; -+ } -+ err = dma_map_sg(rkc->dev, sgd, 1, DMA_FROM_DEVICE); -+ if (err != 1) { -+ dev_err(rkc->dev, "Invalid sg number %d\n", err); -+ err = -EINVAL; -+ dma_unmap_sg(rkc->dev, sgs, 1, DMA_TO_DEVICE); -+ goto theend; -+ } -+ } -+ err = 0; -+ writel(m, rkc->reg + RK2_CRYPTO_BC_CTL); -+ -+ if (algt->is_xts) { -+ for (i = 0; i < ctx->keylen / 8; i++) { -+ v = cpu_to_be32(rkey[i]); -+ writel(v, rkc->reg + RK2_CRYPTO_KEY0 + i * 4); -+ } -+ for (i = 0; i < (ctx->keylen / 8); i++) { -+ v = cpu_to_be32(rkey[i + ctx->keylen / 8]); -+ writel(v, rkc->reg + RK2_CRYPTO_CH4_KEY0 + i * 4); -+ } -+ } else { -+ for (i = 0; i < ctx->keylen / 4; i++) { -+ v = cpu_to_be32(rkey[i]); -+ writel(v, rkc->reg + RK2_CRYPTO_KEY0 + i * 4); -+ } -+ } -+ -+ if (ivsize) { -+ for (i = 0; i < ivsize / 4; i++) -+ writel(cpu_to_be32(riv[i]), -+ rkc->reg + RK2_CRYPTO_CH0_IV_0 + i * 4); -+ writel(ivsize, rkc->reg + RK2_CRYPTO_CH0_IV_LEN); -+ } -+ if (!sgs->length) { -+ sgs = sg_next(sgs); -+ sgd = sg_next(sgd); -+ continue; -+ } -+ -+ /* The hw support multiple descriptor, so why this driver use -+ * only one descriptor ? -+ * Using one descriptor per SG seems the way to do and it works -+ * but only when doing encryption. -+ * With decryption it always fail on second descriptor. -+ * Probably the HW dont know how to use IV. -+ */ -+ todo = min(sg_dma_len(sgs), len); -+ len -= todo; -+ dd->src_addr = sg_dma_address(sgs); -+ dd->src_len = todo; -+ dd->dst_addr = sg_dma_address(sgd); -+ dd->dst_len = todo; -+ dd->iv = 0; -+ dd->next = 1; -+ -+ dd->user = RK2_LLI_CIPHER_START | RK2_LLI_STRING_FIRST | RK2_LLI_STRING_LAST; -+ dd->dma_ctrl |= RK2_LLI_DMA_CTRL_DST_INT | RK2_LLI_DMA_CTRL_LAST; -+ -+ writel(RK2_CRYPTO_DMA_INT_LISTDONE | 0x7F, rkc->reg + RK2_CRYPTO_DMA_INT_EN); -+ -+ /*writel(0x00030000, rkc->reg + RK2_CRYPTO_FIFO_CTL);*/ -+ writel(rkc->t_phy, rkc->reg + RK2_CRYPTO_DMA_LLI_ADDR); -+ -+ reinit_completion(&rkc->complete); -+ rkc->status = 0; -+ -+ writel(RK2_CRYPTO_DMA_CTL_START | 1 << 16, rkc->reg + RK2_CRYPTO_DMA_CTL); -+ -+ wait_for_completion_interruptible_timeout(&rkc->complete, -+ msecs_to_jiffies(10000)); -+ if (sgs == sgd) { -+ dma_unmap_sg(rkc->dev, sgs, 1, DMA_BIDIRECTIONAL); -+ } else { -+ dma_unmap_sg(rkc->dev, sgs, 1, DMA_TO_DEVICE); -+ dma_unmap_sg(rkc->dev, sgd, 1, DMA_FROM_DEVICE); -+ } -+ -+ if (!rkc->status) { -+ dev_err(rkc->dev, "DMA timeout\n"); -+ rk2_print(rkc); -+ err = -EFAULT; -+ goto theend; -+ } -+ if (areq->iv && ivsize > 0) { -+ offset = sgd->length - ivsize; -+ if (rctx->mode & RK2_CRYPTO_DEC) { -+ memcpy(areq->iv, rctx->backup_iv, ivsize); -+ memzero_explicit(rctx->backup_iv, ivsize); -+ } else { -+ scatterwalk_map_and_copy(areq->iv, sgd, offset, -+ ivsize, 0); -+ } -+ } -+ sgs = sg_next(sgs); -+ sgd = sg_next(sgd); -+ } -+theend: -+ writel(0xffff0000, rkc->reg + RK2_CRYPTO_BC_CTL); -+ pm_runtime_put_autosuspend(rkc->dev); -+ -+ local_bh_disable(); -+ crypto_finalize_skcipher_request(engine, areq, err); -+ local_bh_enable(); -+ return 0; -+} -+ -+int rk2_cipher_tfm_init(struct crypto_skcipher *tfm) -+{ -+ struct rk2_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -+ const char *name = crypto_tfm_alg_name(&tfm->base); -+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm); -+ struct rk2_crypto_template *algt = container_of(alg, struct rk2_crypto_template, alg.skcipher.base); -+ -+ ctx->fallback_tfm = crypto_alloc_skcipher(name, 0, CRYPTO_ALG_NEED_FALLBACK); -+ if (IS_ERR(ctx->fallback_tfm)) { -+ dev_err(algt->dev->dev, "ERROR: Cannot allocate fallback for %s %ld\n", -+ name, PTR_ERR(ctx->fallback_tfm)); -+ return PTR_ERR(ctx->fallback_tfm); -+ } -+ -+ dev_info(algt->dev->dev, "Fallback for %s is %s\n", -+ crypto_tfm_alg_driver_name(&tfm->base), -+ crypto_tfm_alg_driver_name(crypto_skcipher_tfm(ctx->fallback_tfm))); -+ -+ tfm->reqsize = sizeof(struct rk2_cipher_rctx) + -+ crypto_skcipher_reqsize(ctx->fallback_tfm); -+ -+ return 0; -+} -+ -+void rk2_cipher_tfm_exit(struct crypto_skcipher *tfm) -+{ -+ struct rk2_cipher_ctx *ctx = crypto_skcipher_ctx(tfm); -+ -+ memzero_explicit(ctx->key, ctx->keylen); -+ crypto_free_skcipher(ctx->fallback_tfm); -+} --- -Armbian - diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/0027-RK3588-Add-rkvdec2-Support-v3.patch b/patch/kernel/archive/rockchip-rk3588-6.12/0027-RK3588-Add-rkvdec2-Support-v3.patch deleted file mode 120000 index 10a283585f9a..000000000000 --- a/patch/kernel/archive/rockchip-rk3588-6.12/0027-RK3588-Add-rkvdec2-Support-v3.patch +++ /dev/null @@ -1 +0,0 @@ -../rockchip64-6.12/media-0001-Add-rkvdec2-Support-v3.patch \ No newline at end of file diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/0028-media-v4l2-core-Initialize-h264-frame_mbs_only_flag-.patch b/patch/kernel/archive/rockchip-rk3588-6.12/0028-media-v4l2-core-Initialize-h264-frame_mbs_only_flag-.patch deleted file mode 100644 index 13b5aecefc5b..000000000000 --- a/patch/kernel/archive/rockchip-rk3588-6.12/0028-media-v4l2-core-Initialize-h264-frame_mbs_only_flag-.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: amazingfate -Date: Fri, 21 Jun 2024 16:32:55 +0800 -Subject: media: v4l2-core: Initialize h264 frame_mbs_only_flag as 1 - ---- - drivers/media/v4l2-core/v4l2-ctrls-core.c | 13 ++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c -index 111111111111..222222222222 100644 ---- a/drivers/media/v4l2-core/v4l2-ctrls-core.c -+++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c -@@ -111,6 +111,7 @@ static void std_init_compound(const struct v4l2_ctrl *ctrl, u32 idx, - struct v4l2_ctrl_vp9_frame *p_vp9_frame; - struct v4l2_ctrl_fwht_params *p_fwht_params; - struct v4l2_ctrl_h264_scaling_matrix *p_h264_scaling_matrix; -+ struct v4l2_ctrl_h264_sps *p_h264_sps; - struct v4l2_ctrl_av1_sequence *p_av1_sequence; - void *p = ptr.p + idx * ctrl->elem_size; - -@@ -179,6 +180,18 @@ static void std_init_compound(const struct v4l2_ctrl *ctrl, u32 idx, - */ - memset(p_h264_scaling_matrix, 16, sizeof(*p_h264_scaling_matrix)); - break; -+ case V4L2_CTRL_TYPE_H264_SPS: -+ p_h264_sps = p; -+ /* -+ * Without V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY, -+ * frame_mbs_only_flag set to 0 will translate to a miniumum -+ * height of 32 (see H.264 specification 7-8). Some driver may -+ * have a minimum size lower then 32, which would fail -+ * validation with the SPS value. Set this flag, so that there -+ * is now doubling in the height, allowing a valid default. -+ */ -+ p_h264_sps->flags = V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY; -+ break; - } - } - --- -Armbian - diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/Makefile b/patch/kernel/archive/rockchip-rk3588-6.12/overlay/Makefile deleted file mode 100644 index 4aebf957207a..000000000000 --- a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/Makefile +++ /dev/null @@ -1,48 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ - rockchip-rk3588-fanctrl.dtbo \ - rockchip-rk3588-sata1.dtbo \ - rockchip-rk3588-sata2.dtbo \ - rockchip-rk3588-hdmirx.dtbo \ - rockchip-rk3588-i2c8-m2.dtbo \ - rockchip-rk3588-pwm0-m0.dtbo \ - rockchip-rk3588-pwm0-m1.dtbo \ - rockchip-rk3588-pwm0-m2.dtbo \ - rockchip-rk3588-pwm1-m0.dtbo \ - rockchip-rk3588-pwm1-m1.dtbo \ - rockchip-rk3588-pwm1-m2.dtbo \ - rockchip-rk3588-pwm2-m1.dtbo \ - rockchip-rk3588-pwm3-m0.dtbo \ - rockchip-rk3588-pwm3-m1.dtbo \ - rockchip-rk3588-pwm3-m2.dtbo \ - rockchip-rk3588-pwm3-m3.dtbo \ - rockchip-rk3588-pwm5-m2.dtbo \ - rockchip-rk3588-pwm6-m0.dtbo \ - rockchip-rk3588-pwm6-m2.dtbo \ - rockchip-rk3588-pwm7-m0.dtbo \ - rockchip-rk3588-pwm7-m3.dtbo \ - rockchip-rk3588-pwm8-m0.dtbo \ - rockchip-rk3588-pwm10-m0.dtbo \ - rockchip-rk3588-pwm11-m0.dtbo \ - rockchip-rk3588-pwm11-m1.dtbo \ - rockchip-rk3588-pwm12-m0.dtbo \ - rockchip-rk3588-pwm13-m0.dtbo \ - rockchip-rk3588-pwm13-m2.dtbo \ - rockchip-rk3588-pwm14-m0.dtbo \ - rockchip-rk3588-pwm14-m1.dtbo \ - rockchip-rk3588-pwm14-m2.dtbo \ - rockchip-rk3588-pwm15-m0.dtbo \ - rockchip-rk3588-pwm15-m1.dtbo \ - rockchip-rk3588-pwm15-m2.dtbo \ - rockchip-rk3588-pwm15-m3.dtbo \ - rockchip-rk3588-uart1-m1.dtbo \ - rockchip-rk3588-uart3-m1.dtbo \ - rockchip-rk3588-uart4-m2.dtbo \ - rockchip-rk3588-uart6-m1.dtbo \ - rockchip-rk3588-uart7-m2.dtbo \ - rockchip-rk3588-uart8-m1.dtbo \ - rockchip-rk3588-rkvenc-overlay.dtso - -dtb-y += $(dtbo-y) - -clean-files := *.dtbo diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-bananapi-m7.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588-bananapi-m7.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-bananapi-m7.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588-bananapi-m7.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-cyber-aib.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588-cyber-aib.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-cyber-aib.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588-cyber-aib.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-hinlink-h88k.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588-hinlink-h88k.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-hinlink-h88k.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588-hinlink-h88k.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-mixtile-blade3.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588-mixtile-blade3.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-mixtile-blade3.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588-mixtile-blade3.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-nanopc-cm3588-nas.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588-nanopc-cm3588-nas.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-nanopc-cm3588-nas.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588-nanopc-cm3588-nas.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-rock-5b-plus.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588-rock-5b-plus.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588-rock-5b-plus.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588-rock-5b-plus.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-nanopi-r6c.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588s-nanopi-r6c.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-nanopi-r6c.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588s-nanopi-r6c.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-nanopi-r6s.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588s-nanopi-r6s.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-nanopi-r6s.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588s-nanopi-r6s.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-orangepi-5.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588s-orangepi-5.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-orangepi-5.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588s-orangepi-5.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-orangepi-5b.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588s-orangepi-5b.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-orangepi-5b.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588s-orangepi-5b.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-rock-5c.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588s-rock-5c.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-rock-5c.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588s-rock-5c.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-youyeetoo-r1.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3588s-youyeetoo-r1.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/dt/rk3588s-youyeetoo-r1.dts rename to patch/kernel/archive/rockchip64-6.12/dt/rk3588s-youyeetoo-r1.dts diff --git a/patch/kernel/archive/rockchip64-6.12/media-0003-rk3568-disable-hantro-h264.patch b/patch/kernel/archive/rockchip64-6.12/media-0003-rk3568-disable-hantro-h264.patch index 1d911252b60b..ad6527f623de 100644 --- a/patch/kernel/archive/rockchip64-6.12/media-0003-rk3568-disable-hantro-h264.patch +++ b/patch/kernel/archive/rockchip64-6.12/media-0003-rk3568-disable-hantro-h264.patch @@ -78,6 +78,19 @@ index 111111111111..222222222222 100644 const struct hantro_variant px30_vpu_variant = { .enc_offset = 0x0, .enc_fmts = rockchip_vpu_enc_fmts, +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +index fc67585b6..d27d60580 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +@@ -1127,7 +1127,7 @@ power-domain@RK3588_PD_SDMMC { + }; + + vpu121: video-codec@fdb50000 { +- compatible = "rockchip,rk3588-vpu121", "rockchip,rk3568-vpu"; ++ compatible = "rockchip,rk3588-vpu121", "rockchip,rk3328-vpu"; + reg = <0x0 0xfdb50000 0x0 0x800>; + interrupts = ; + interrupt-names = "vdpu"; -- Armbian diff --git a/patch/kernel/archive/rockchip64-6.12/overlay/Makefile b/patch/kernel/archive/rockchip64-6.12/overlay/Makefile index d06eecd537d0..c835645438ba 100644 --- a/patch/kernel/archive/rockchip64-6.12/overlay/Makefile +++ b/patch/kernel/archive/rockchip64-6.12/overlay/Makefile @@ -46,7 +46,49 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ rockchip-rk3568-hk-uart0.dtbo \ rockchip-rk3568-hk-uart0-rts_cts.dtbo \ rockchip-rk3568-hk-uart1.dtbo \ - rockchip-rk3568-rock-3a-disable-uart2.dtbo + rockchip-rk3568-rock-3a-disable-uart2.dtbo \ + rockchip-rk3588-fanctrl.dtbo \ + rockchip-rk3588-sata1.dtbo \ + rockchip-rk3588-sata2.dtbo \ + rockchip-rk3588-hdmirx.dtbo \ + rockchip-rk3588-i2c8-m2.dtbo \ + rockchip-rk3588-pwm0-m0.dtbo \ + rockchip-rk3588-pwm0-m1.dtbo \ + rockchip-rk3588-pwm0-m2.dtbo \ + rockchip-rk3588-pwm1-m0.dtbo \ + rockchip-rk3588-pwm1-m1.dtbo \ + rockchip-rk3588-pwm1-m2.dtbo \ + rockchip-rk3588-pwm2-m1.dtbo \ + rockchip-rk3588-pwm3-m0.dtbo \ + rockchip-rk3588-pwm3-m1.dtbo \ + rockchip-rk3588-pwm3-m2.dtbo \ + rockchip-rk3588-pwm3-m3.dtbo \ + rockchip-rk3588-pwm5-m2.dtbo \ + rockchip-rk3588-pwm6-m0.dtbo \ + rockchip-rk3588-pwm6-m2.dtbo \ + rockchip-rk3588-pwm7-m0.dtbo \ + rockchip-rk3588-pwm7-m3.dtbo \ + rockchip-rk3588-pwm8-m0.dtbo \ + rockchip-rk3588-pwm10-m0.dtbo \ + rockchip-rk3588-pwm11-m0.dtbo \ + rockchip-rk3588-pwm11-m1.dtbo \ + rockchip-rk3588-pwm12-m0.dtbo \ + rockchip-rk3588-pwm13-m0.dtbo \ + rockchip-rk3588-pwm13-m2.dtbo \ + rockchip-rk3588-pwm14-m0.dtbo \ + rockchip-rk3588-pwm14-m1.dtbo \ + rockchip-rk3588-pwm14-m2.dtbo \ + rockchip-rk3588-pwm15-m0.dtbo \ + rockchip-rk3588-pwm15-m1.dtbo \ + rockchip-rk3588-pwm15-m2.dtbo \ + rockchip-rk3588-pwm15-m3.dtbo \ + rockchip-rk3588-uart1-m1.dtbo \ + rockchip-rk3588-uart3-m1.dtbo \ + rockchip-rk3588-uart4-m2.dtbo \ + rockchip-rk3588-uart6-m1.dtbo \ + rockchip-rk3588-uart7-m2.dtbo \ + rockchip-rk3588-uart8-m1.dtbo \ + rockchip-rk3588-rkvenc-overlay.dtso scr-$(CONFIG_ARCH_ROCKCHIP) += \ rockchip-fixup.scr diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-fanctrl.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-fanctrl.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-fanctrl.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-fanctrl.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-hdmirx.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-hdmirx.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-hdmirx.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-hdmirx.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-i2c8-m2.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-i2c8-m2.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-i2c8-m2.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-i2c8-m2.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm0-m0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm0-m0.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm0-m0.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm0-m0.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm0-m1.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm0-m1.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm0-m1.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm0-m1.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm0-m2.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm0-m2.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm0-m2.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm0-m2.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm1-m0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm1-m0.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm1-m0.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm1-m0.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm1-m1.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm1-m1.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm1-m1.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm1-m1.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm1-m2.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm1-m2.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm1-m2.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm1-m2.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm10-m0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm10-m0.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm10-m0.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm10-m0.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm11-m0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm11-m0.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm11-m0.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm11-m0.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm11-m1.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm11-m1.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm11-m1.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm11-m1.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm12-m0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm12-m0.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm12-m0.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm12-m0.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm13-m0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm13-m0.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm13-m0.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm13-m0.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm13-m2.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm13-m2.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm13-m2.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm13-m2.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm14-m0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm14-m0.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm14-m0.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm14-m0.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm14-m1.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm14-m1.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm14-m1.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm14-m1.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm14-m2.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm14-m2.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm14-m2.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm14-m2.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm15-m0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm15-m0.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm15-m0.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm15-m0.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm15-m1.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm15-m1.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm15-m1.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm15-m1.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm15-m2.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm15-m2.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm15-m2.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm15-m2.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm15-m3.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm15-m3.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm15-m3.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm15-m3.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm2-m1.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm2-m1.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm2-m1.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm2-m1.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm3-m0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm3-m0.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm3-m0.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm3-m0.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm3-m1.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm3-m1.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm3-m1.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm3-m1.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm3-m2.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm3-m2.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm3-m2.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm3-m2.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm3-m3.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm3-m3.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm3-m3.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm3-m3.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm5-m2.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm5-m2.dtso similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm5-m2.dtso rename to patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm5-m2.dtso diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/overlay/rockchip-rk3588-pwm6-m0.dtso b/patch/kernel/archive/rockchip64-6.12/overlay/rockchip-rk3588-pwm6-m0.dtso similarity index 100% rename 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patch/kernel/archive/rockchip64-6.12/rk3588-1061-arm64-dts-rockchip-Add-PCIe-3.0-pinctrl-to-Turing-RK.patch diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/1062-arm64-dts-rockchip-Enable-GPU-node-on-Turing-RK1.patch b/patch/kernel/archive/rockchip64-6.12/rk3588-1062-arm64-dts-rockchip-Enable-GPU-node-on-Turing-RK1.patch similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/1062-arm64-dts-rockchip-Enable-GPU-node-on-Turing-RK1.patch rename to patch/kernel/archive/rockchip64-6.12/rk3588-1062-arm64-dts-rockchip-Enable-GPU-node-on-Turing-RK1.patch diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/1063-arm64-dts-rockchip-Enable-automatic-fan-control-on-t.patch b/patch/kernel/archive/rockchip64-6.12/rk3588-1063-arm64-dts-rockchip-Enable-automatic-fan-control-on-t.patch similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/1063-arm64-dts-rockchip-Enable-automatic-fan-control-on-t.patch rename to patch/kernel/archive/rockchip64-6.12/rk3588-1063-arm64-dts-rockchip-Enable-automatic-fan-control-on-t.patch diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/1064-arm64-dts-rockchip-Add-missing-hym8563-clock-frequen.patch b/patch/kernel/archive/rockchip64-6.12/rk3588-1064-arm64-dts-rockchip-Add-missing-hym8563-clock-frequen.patch similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/1064-arm64-dts-rockchip-Add-missing-hym8563-clock-frequen.patch rename to patch/kernel/archive/rockchip64-6.12/rk3588-1064-arm64-dts-rockchip-Add-missing-hym8563-clock-frequen.patch diff --git a/patch/kernel/archive/rockchip-rk3588-6.12/1071-arm64-dts-Add-missing-nodes-to-Orange-Pi-5-Plus.patch b/patch/kernel/archive/rockchip64-6.12/rk3588-1071-arm64-dts-Add-missing-nodes-to-Orange-Pi-5-Plus.patch similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.12/1071-arm64-dts-Add-missing-nodes-to-Orange-Pi-5-Plus.patch rename to patch/kernel/archive/rockchip64-6.12/rk3588-1071-arm64-dts-Add-missing-nodes-to-Orange-Pi-5-Plus.patch