diff --git a/config/boards/nanopc-cm3588-nas.csc b/config/boards/cm3588-nas.csc similarity index 53% rename from config/boards/nanopc-cm3588-nas.csc rename to config/boards/cm3588-nas.csc index 1327ff570a3e..2958276fffeb 100644 --- a/config/boards/nanopc-cm3588-nas.csc +++ b/config/boards/cm3588-nas.csc @@ -1,17 +1,17 @@ # Rockchip RK3588 octa core 16GB RAM SoC eMMC 4x NVMe 2x USB3 USB2 USB-C 2.5GbE BOARD_NAME="FriendlyElec CM3588 NAS" BOARDFAMILY="rockchip-rk3588" -BOARD_MAINTAINER="" -BOOTCONFIG="nanopc_cm3588_defconfig" # Enables booting from NVMe. Vendor name, not standard, see hook below, set BOOT_SOC below to compensate +BOARD_MAINTAINER="ColorfulRhino" +BOOTCONFIG="cm3588-nas-rk3588_defconfig" # Mainline defconfig, enables booting from NVMe BOOT_SOC="rk3588" KERNEL_TARGET="vendor,current,edge" FULL_DESKTOP="yes" BOOT_LOGO="desktop" IMAGE_PARTITION_TABLE="gpt" -BOOT_FDT_FILE="rockchip/rk3588-nanopc-cm3588-nas.dtb" +BOOT_FDT_FILE="rockchip/rk3588-friendlyelec-cm3588-nas.dtb" BOOT_SCENARIO="spl-blobs" -function post_family_tweaks__nanopccm3588nas_udev_naming_audios() { +function post_family_tweaks__cm3588_nas_udev_naming_audios() { display_alert "$BOARD" "Renaming CM3588 audio interfaces to human-readable form" "info" mkdir -p $SDCARD/etc/udev/rules.d/ @@ -27,7 +27,7 @@ function post_family_tweaks__nanopccm3588nas_udev_naming_audios() { # Output from CM3588 syslog with edge kernel 6.8: r8169 0004:41:00.0 enP4p65s0: renamed from eth0 # Note: legacy kernel 5.10 uses driver r8125, edge kernel uses r8169 as of 6.8 -function post_family_tweaks__nanopccm3588nas_udev_naming_network_interfaces() { +function post_family_tweaks__cm3588_nas_udev_naming_network_interfaces() { display_alert "$BOARD" "Renaming CM3588 LAN interface to eth0" "info" mkdir -p $SDCARD/etc/udev/rules.d/ @@ -36,25 +36,23 @@ function post_family_tweaks__nanopccm3588nas_udev_naming_network_interfaces() { EOF } -# Mainline u-boot or Kwiboo's tree -function post_family_config_branch_edge__nanopccm3588nas_use_mainline_uboot() { - display_alert "$BOARD" "mainline (next branch) u-boot overrides for $BOARD / $BRANCH" "info" +# Mainline U-Boot +function post_family_config__cm3588_nas_use_mainline_uboot() { + display_alert "$BOARD" "Using mainline U-Boot for $BOARD / $BRANCH" "info" - declare -g BOOTCONFIG="nanopc-t6-rk3588_defconfig" # override the default for the board/family - declare -g BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc - declare -g BOOTSOURCE="https://github.com/Kwiboo/u-boot-rockchip.git" # We ❤️ Kwiboo's tree - declare -g BOOTBRANCH="branch:rk3xxx-2024.04" # commit:31522fe7b3c7733313e1c5eb4e340487f6000196 as of 2024-04-01 - declare -g BOOTPATCHDIR="v2024.04/board_${BOARD}" # empty; defconfig changes are done in hook below - declare -g BOOTDIR="u-boot-${BOARD}" # do not share u-boot directory - declare -g UBOOT_TARGET_MAP="BL31=${RKBIN_DIR}/${BL31_BLOB} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin u-boot-rockchip-spi.bin" - unset uboot_custom_postprocess write_uboot_platform write_uboot_platform_mtd # disable stuff from rockchip64_common; we're using binman here which does all the work already + declare -g BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc + declare -g BOOTSOURCE="https://github.com/u-boot/u-boot.git" # We ❤️ Mainline U-Boot + declare -g BOOTBRANCH="tag:v2024.10-rc3" + declare -g BOOTPATCHDIR="v2024.10" + # Don't set BOOTDIR, allow shared U-Boot source directory for disk space efficiency + + declare -g UBOOT_TARGET_MAP="BL31=${RKBIN_DIR}/${BL31_BLOB} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin" + + # Disable stuff from rockchip64_common; we're using binman here which does all the work already + unset uboot_custom_postprocess write_uboot_platform write_uboot_platform_mtd # Just use the binman-provided u-boot-rockchip.bin, which is ready-to-go function write_uboot_platform() { dd "if=$1/u-boot-rockchip.bin" "of=$2" bs=32k seek=1 conv=notrunc status=none } - - function write_uboot_platform_mtd() { - flashcp -v -p "$1/u-boot-rockchip-spi.bin" /dev/mtd0 - } } diff --git a/patch/kernel/archive/rockchip-rk3588-6.10/dt/rk3588-nanopc-cm3588-nas.dts b/patch/kernel/archive/rockchip-rk3588-6.10/dt/rk3588-friendlyelec-cm3588-nas.dts similarity index 100% rename from patch/kernel/archive/rockchip-rk3588-6.10/dt/rk3588-nanopc-cm3588-nas.dts rename to patch/kernel/archive/rockchip-rk3588-6.10/dt/rk3588-friendlyelec-cm3588-nas.dts diff --git a/patch/kernel/archive/rockchip-rk3588-6.11/1060-board-cm3588-nas-Add-HDMI-support.patch b/patch/kernel/archive/rockchip-rk3588-6.11/1060-board-cm3588-nas-Add-HDMI-support.patch new file mode 100644 index 000000000000..e3d63945901b --- /dev/null +++ b/patch/kernel/archive/rockchip-rk3588-6.11/1060-board-cm3588-nas-Add-HDMI-support.patch @@ -0,0 +1,88 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: ColorfulRhino <131405023+ColorfulRhino@users.noreply.github.com> +Date: Sun, 11 Aug 2024 15:28:03 +0200 +Subject: CM3588-NAS: Add HDMI support + +--- + arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts | 47 ++++++++++ + 1 file changed, 47 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts +index 111111111111..222222222222 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include "rk3588-friendlyelec-cm3588.dtsi" + + / { +@@ -225,6 +226,12 @@ &combphy2_psu { + status = "okay"; + }; + ++/* Properties "clock" and "clock-names" introduced by Collabora https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux/-/commit/8fff68cb7cfe1e698445896252e34f79fad41720 */ ++&display_subsystem { ++ clocks = <&hdptxphy_hdmi0>; ++ clock-names = "hdmi0_phy_pll"; ++}; ++ + /* GPIO names are in the format "Human-readable-name [SIGNAL_LABEL]" */ + /* Signal labels match the official CM3588 NAS SDK schematic revision 2309 */ + &gpio0 { +@@ -307,6 +314,31 @@ &gpio4 { + "", "", "", ""; + }; + ++&hdmi0 { ++ // avdd-0v9-supply = ++ // avdd-1v8-supply = ++ /* Dmesg error/warning: ++ * [ +0.000055] dwhdmi-rockchip fde80000.hdmi: Looking up avdd-0v9-supply from device tree ++ * [ +0.000011] dwhdmi-rockchip fde80000.hdmi: Looking up avdd-0v9-supply property in node /hdmi@fde80000 failed ++ * [ +0.000014] dwhdmi-rockchip fde80000.hdmi: supply avdd-0v9 not found, using dummy regulator ++ * [ +0.000080] dwhdmi-rockchip fde80000.hdmi: Looking up avdd-1v8-supply from device tree ++ * [ +0.000010] dwhdmi-rockchip fde80000.hdmi: Looking up avdd-1v8-supply property in node /hdmi@fde80000 failed ++ * [ +0.000010] dwhdmi-rockchip fde80000.hdmi: supply avdd-1v8 not found, using dummy regulator ++ * [ +0.001009] dwhdmi-rockchip fde80000.hdmi: registered ddc I2C bus driver ++ */ ++ status = "okay"; ++}; ++ ++&hdmi0_in { ++ hdmi0_in_vp0: endpoint { ++ remote-endpoint = <&vp0_out_hdmi0>; ++ }; ++}; ++ ++&hdptxphy_hdmi0 { ++ status = "okay"; ++}; ++ + /* Connected to MIPI-DSI0 */ + &i2c5 { + pinctrl-names = "default"; +@@ -776,3 +808,18 @@ usbdp_phy0_dp_altmode_mux: endpoint@1 { + &usbdp_phy1 { + status = "okay"; + }; ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vp0 { ++ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { ++ reg = ; ++ remote-endpoint = <&hdmi0_in_vp0>; ++ }; ++}; +-- +Armbian + diff --git a/patch/kernel/archive/rockchip-rk3588-6.11/dt/rk3588-nanopc-cm3588-nas.dts b/patch/kernel/archive/rockchip-rk3588-6.11/dt/rk3588-nanopc-cm3588-nas.dts index f95c8a708aba..c44b555cd982 100644 --- a/patch/kernel/archive/rockchip-rk3588-6.11/dt/rk3588-nanopc-cm3588-nas.dts +++ b/patch/kernel/archive/rockchip-rk3588-6.11/dt/rk3588-nanopc-cm3588-nas.dts @@ -1,1436 +1,9 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - * Copyright (c) 2023 FriendlyElec Computer Tech. Co., Ltd. - * Copyright (c) 2023 Thomas McKahan - * Author: ColorfulRhino - * - */ /dts-v1/; -#include -#include -#include -#include -#include -#include "rk3588.dtsi" +#include "rk3588-friendlyelec-cm3588-nas.dts" -/ { - model = "FriendlyElec CM3588 NAS"; - compatible = "friendlyarm,cm3588", "rockchip,rk3588"; - - aliases { - mmc0 = &sdhci; - mmc1 = &sdmmc; - // nvme0 = &nvme0; - // nvme1 = &nvme1; - // nvme2 = &nvme2; - // nvme3 = &nvme3; - // ethernet0 = &r8125_u10; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - adc_keys: adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - poll-interval = <100>; - - button-vol-up { - label = "Volume Up"; - linux,code = ; - press-threshold-microvolt = <17000>; - }; - }; - - analog-sound { - compatible = "simple-audio-card"; - pinctrl-names = "default"; - pinctrl-0 = <&headphone_detect>; - - simple-audio-card,name = "realtek,rt5616-codec"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - - simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; - - simple-audio-card,routing = - "Headphones", "HPOL", - "Headphones", "HPOR", - "MIC1", "Microphone Jack", - "Microphone Jack", "micbias1"; - simple-audio-card,widgets = - "Headphone", "Headphones", - "Microphone", "Microphone Jack"; - - simple-audio-card,cpu { - sound-dai = <&i2s0_8ch>; - }; - - simple-audio-card,codec { - sound-dai = <&rt5616>; - }; - }; - - fan: pwm-fan { - compatible = "pwm-fan"; - #cooling-cells = <2>; - cooling-levels = <0 50 100 150 200 255>; - pwms = <&pwm1 0 50000 0>; - status = "disabled"; - }; - - gpio_keys: gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&key1_pin>; - - button-user { - debounce-interval = <50>; - gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>; - label = "User Button"; - linux,code = ; - wakeup-source; - }; - }; - - leds { - compatible = "gpio-leds"; - - led_sys: led-0 { - gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; - label = "system-led"; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&led_sys_pin>; - }; - - led_usr: led-1 { - gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; - label = "user-led"; - pinctrl-names = "default"; - pinctrl-0 = <&led_usr_pin>; - }; - }; - - vcc_12v_dcin: vcc-12v-dcin-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - /* vcc_5v0_sys powers peripherals */ - vcc_5v0_sys: vcc-5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc_12v_dcin>; - }; - - vcc_5v0_host_20: vcc-5v0-host-20 { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_5v0_host20_en>; - regulator-name = "vcc_5v0_host_20"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc_5v0_sys>; - }; - - vcc_5v0_host_30: vcc-5v0-host-30 { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_5v0_host30_en>; - regulator-name = "vcc_5v0_host_30"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc_5v0_sys>; - }; - - vcc_3v3_host_32: vcc-3v3-host-32-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_3v3_host32_en>; - regulator-name = "vcc_3v3_host_32"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_5v0_sys>; - }; - - vbus_5v0_typec: vbus-5v0-typec-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&typec_5v_pwr_en>; - regulator-name = "vbus_5v0_typec"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc_5v0_sys>; - }; - - /* vcc_4v0_sys powers the RK806, RK860's */ - vcc_4v0_sys: vcc-4v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_4v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <4000000>; - regulator-max-microvolt = <4000000>; - vin-supply = <&vcc_12v_dcin>; - }; - - vcc_3v3_pcie20: vcc-3v3-pcie20-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_3v3_pcie20"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_3v3_s3>; - }; - - vcc_3v3_pcie30: vcc-3v3-pcie30-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_3v3_pcie30"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_5v0_sys>; - }; - - vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&sd_s0_pwr>; - regulator-boot-on; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "vcc_3v3_sd_s0"; - vin-supply = <&vcc_3v3_s3>; - }; - - vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc-1v1-nldo-s3"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <&vcc_4v0_sys>; - }; -}; - -&combphy0_ps { - status = "okay"; -}; - -&combphy1_ps { - status = "okay"; -}; - -&combphy2_psu { - status = "okay"; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu_lit_s0>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu_big0_s0>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu_big1_s0>; -}; - -/* Properties "clock" and "clock-names" introduced by Collabora https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux/-/commit/8fff68cb7cfe1e698445896252e34f79fad41720 */ -&display_subsystem { - clocks = <&hdptxphy_hdmi0>; - clock-names = "hdmi0_phy_pll"; -}; - -/* Signal labels [SIGNAL_LABEL] are from the official CM3588 NAS schematic revision 2309 */ -/* Some GPIOs like USB, sdmmc or SPI-NOR are not listed here */ -&gpio0 { - gpio-line-names = - /* GPIO0 A0-A7 */ - "", "", "", "", - "", "", "", "", - /* GPIO0 B0-B7 */ - "", "", "", "", - "", "", "", "", - /* GPIO0 C0-C7 */ - "", "", "", "", - "Pin 10 [UART0_RX_M0]", "Pin 08 [UART0_TX_M0/PWM4_M0]", "Pin 32 [PWM5_M1]", "", - /* GPIO0 D0-D7 */ - "", "", "", "", - "IR sensor [PWM3_IR_M0]", "User Button", "", ""; -}; - -&gpio1 { - gpio-line-names = - /* GPIO1 A0-A7 */ - "Pin 27 [UART6_RX_M1]", "Pin 28 [UART6_TX_M1]", "", "", - "", "", "", "Pin 15", - /* GPIO1 B0-B7 */ - "Pin 26", "Pin 21 [SPI0_MISO_M2]", "Pin 19 [SPI0_MOSI_M2/UART4_RX_M2]", "Pin 23 [SPI0_CLK_M2/UART4_TX_M2]", - "Pin 24 [SPI0_CS0_M2/UART7_RX_M2]", "Pin 22 [SPI0_CS1_M0/UART7_TX_M2]", "", "CSI-Pin 14 [MIPI_CAM2_CLKOUT]", - /* GPIO1 C0-C7 */ - "", "", "", "", - "Headphone detect [HP_DET_L]", "", "", "", - /* GPIO1 D0-D7 */ - "", "", "", "Fan [PWM1_M1]", - "", "", "Pin 05 [I2C8_SCL_M2]", "Pin 03 [I2C8_SDA_M2]"; -}; - -&gpio2 { - gpio-line-names = - /* GPIO2 A0-A7 */ - "", "", "", "", - "", "", "", "", - /* GPIO2 B0-B7 */ - "", "", "", "", - "", "", "", "", - /* GPIO2 C0-C7 */ - "", "CSI-Pin 11 [MIPI_CAM2_RESET_L]", "CSI-Pin 12 [MIPI_CAM2_PDN_L]", "", - "", "", "", "", - /* GPIO2 D0-D7 */ - "", "", "", "", - "", "", "", ""; -}; - -&gpio3 { - gpio-line-names = - /* GPIO3 A0-A7 */ - "Pin 35 [SPI4_MISO_M1/PW M10_M0]", "Pin 38 [SPI4_MOSI_M1]", "Pin 40 [SPI4_CLK_M1/UART8_TX_M1]", "Pin 36 [SPI4_CS0_M1/UART8_RX_M1]", - "Pin 37 [SPI4_CS1_M1]", "", "DSI-Pin 12 [LCD_RST]", "Buzzer [PW M8_M0]", - /* GPIO3 B0-B7 */ - "Pin 33 [PW M9_M0]", "DSI-Pin 10 [PW M2_M1/LCD_BL]", "Pin 07", "Pin 16", - "Pin 18", "Pin 29 [UART3_TX_M1/PW M12_M0]", "Pin 31 [UART3_RX_M1/PW M13_M0]", "Pin 12", - /* GPIO3 C0-C7 */ - "DSI-Pin 08 [TP_INT_L]", "DSI-Pin 14 [TP_RST_L]", "Pin 11 [PWM14_M0]", "Pin 13 [PWM15_IR_M0]", - "", "", "", "DSI-Pin 06 [I2C5_SCL_M0_TP]", - /* GPIO3 D0-D7 */ - "DSI-Pin 05 [I2C5_SDA_M0_TP]", "", "", "", - "", "", "", ""; -}; - -&gpio4 { - gpio-line-names = - /* GPIO4 A0-A7 */ - "", "", "", "", - "", "", "", "", - /* GPIO4 B0-B7 */ - "", "", "", "", - "", "", "", "", - /* GPIO4 C0-C7 */ - "", "", "", "", - "", "", "", "", - /* GPIO4 D0-D7 */ - "", "", "", "", - "", "", "", ""; -}; - -&gpu { - mali-supply = <&vdd_gpu_s0>; - sram-supply = <&vdd_gpu_mem_s0>; - status = "okay"; -}; - -&hdmi0 { - // avdd-0v9-supply = - // avdd-1v8-supply = - /* Dmesg error/warning: - * [ +0.000055] dwhdmi-rockchip fde80000.hdmi: Looking up avdd-0v9-supply from device tree - * [ +0.000011] dwhdmi-rockchip fde80000.hdmi: Looking up avdd-0v9-supply property in node /hdmi@fde80000 failed - * [ +0.000014] dwhdmi-rockchip fde80000.hdmi: supply avdd-0v9 not found, using dummy regulator - * [ +0.000080] dwhdmi-rockchip fde80000.hdmi: Looking up avdd-1v8-supply from device tree - * [ +0.000010] dwhdmi-rockchip fde80000.hdmi: Looking up avdd-1v8-supply property in node /hdmi@fde80000 failed - * [ +0.000010] dwhdmi-rockchip fde80000.hdmi: supply avdd-1v8 not found, using dummy regulator - * [ +0.001009] dwhdmi-rockchip fde80000.hdmi: registered ddc I2C bus driver - */ - status = "okay"; -}; - -&hdmi0_in { - hdmi0_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi0>; - }; -}; - -&hdptxphy_hdmi0 { - status = "okay"; -}; - -// /* 4k HDMI capture controller (see rk3588.dtsi) */ -// &hdmirx_cma { -// status = "okay"; -// }; - -// &hdmirx_ctrler { -// status = "okay"; -// hdmirx-5v-detection-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; -// pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_5v_detection>; -// pinctrl-names = "default"; -// memory-region = <&hdmirx_cma>; -// }; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0m2_xfer>; - status = "okay"; - - vdd_cpu_big0_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big0_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc_4v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_big1_s0: regulator@43 { - compatible = "rockchip,rk8603", "rockchip,rk8602"; - reg = <0x43>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu_big1_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <1050000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc_4v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c2 { - status = "okay"; - - vdd_npu_s0: regulator@42 { - compatible = "rockchip,rk8602"; - reg = <0x42>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_npu_s0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc_4v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; -}; - -&i2c4 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c4m3_xfer>; - status = "disabled"; -}; - -/* Connected to MIPI-DSI0 */ -&i2c5 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c5m0_xfer>; - status = "disabled"; -}; - -&i2c6 { - clock-frequency = <200000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c6m0_xfer>; - status = "okay"; - - fusb302: typec-portc@22 { - compatible = "fcs,fusb302"; - reg = <0x22>; - interrupt-parent = <&gpio0>; - interrupts = ; - pinctrl-0 = <&usbc0_int>; - pinctrl-names = "default"; - vbus-supply = <&vbus_5v0_typec>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - usbc0_role_sw: endpoint@0 { - remote-endpoint = <&dwc3_0_role_switch>; - }; - }; - }; - - usb_con: connector { - compatible = "usb-c-connector"; - data-role = "dual"; - label = "USB-C"; - op-sink-microwatt = <1000000>; - power-role = "dual"; - source-pdos = ; - sink-pdos = ; - try-power-role = "sink"; - - altmodes { - #address-cells = <1>; - #size-cells = <0>; - - altmode@0 { - reg = <0>; - svid = <0xff01>; - vdo = <0xffffffff>; - }; - }; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - usbc0_orien_sw: endpoint { - remote-endpoint = <&usbdp_phy0_orientation_switch>; - }; - }; - - port@1 { - reg = <1>; - dp_altmode_mux: endpoint { - remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; - }; - }; - }; - }; - }; - - hym8563: rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-output-names = "hym8563"; - interrupt-parent = <&gpio0>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&hym8563_int>; - wakeup-source; - }; -}; - -/* Connected to MIPI-CSI1 */ -&i2c7 { - clock-frequency = <200000>; - status = "okay"; - - rt5616: audio-codec@1b { - compatible = "realtek,rt5616"; - reg = <0x1b>; - assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; - assigned-clock-rates = <12288000>; - clocks = <&cru I2S0_8CH_MCLKOUT>; - clock-names = "mclk"; - #sound-dai-cells = <0>; - - port { - rt5616_p0_0: endpoint { - remote-endpoint = <&i2s0_8ch_p0_0>; - }; - }; - }; -}; - -/* GPIO Connector, connected to 40-pin GPIO header */ -&i2c8 { - pinctrl-0 = <&i2c8m2_xfer>; -}; - -&i2s0_8ch { - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_lrck - &i2s0_mclk - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; - status = "okay"; - - i2s0_8ch_p0: port { - i2s0_8ch_p0_0: endpoint { - dai-format = "i2s"; - mclk-fs = <256>; - remote-endpoint = <&rt5616_p0_0>; - }; - }; -}; - -&i2s5_8ch { - status = "okay"; -}; - -&i2s6_8ch { - status = "okay"; -}; - -&i2s7_8ch { - status = "okay"; -}; - -/* Temperature sensor near the center of the SoC */ -&package_thermal { - polling-delay = <1000>; - - trips { - package_hot: package_hot { - hysteresis = <2000>; - temperature = <65000>; - type = "active"; - }; - }; - - cooling-maps { - map0 { - cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - trip = <&package_hot>; - }; - }; -}; - -&pcie2x1l0 { // @fe170000 - /* 2. M.2 slot, CON14: pcie30phy port0 lane1 */ - max-link-speed = <3>; - num-lanes = <1>; - phys = <&pcie30phy>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_0_rst>; - reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc_3v3_pcie30>; - status = "okay"; - - // pcie@0,0 { - // reg = <0x00200000 0 0 0 0>; - // #address-cells = <3>; - // #size-cells = <2>; - - // nvme1: pcie@20,0 { - // reg = <0x000000 0 0 0 0>; - // }; - // }; -}; - -&pcie2x1l1 { // @fe180000 - /* 4. M.2 slot, CON16: pcie30phy port1 lane1 */ - max-link-speed = <3>; - num-lanes = <1>; - phys = <&pcie30phy>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_1_rst>; - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc_3v3_pcie30>; - status = "okay"; - - // pcie@0,0 { - // reg = <0x00300000 0 0 0 0>; - // #address-cells = <3>; - // #size-cells = <2>; - - // nvme3: pcie@30,0 { - // reg = <0x000000 0 0 0 0>; - // }; - // }; -}; - -&pcie2x1l2 { // @fe190000 - /* r8125 ethernet */ - pinctrl-names = "default"; - pinctrl-0 = <&pcie2_2_rst>; - reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc_3v3_pcie20>; - status = "okay"; - - // pcie@0,0 { - // reg = <0x00400000 0 0 0 0>; - // #address-cells = <3>; - // #size-cells = <2>; - - // r8125_u10: pcie@40,0 { - // reg = <0x000000 0 0 0 0>; - // local-mac-address = [ 00 00 00 00 00 00 ]; - // }; - // }; -}; - -&pcie30phy { - /* - * Michal Tomek describes: - * The PHY offers the following mapping options: - * - * port 0 lane 0 - always mapped to controller 0 (4L) - * port 0 lane 1 - to controller 0 or 2 (1L0) - * port 1 lane 0 - to controller 0 or 1 (2L) - * port 1 lane 1 - to controller 0, 1 or 3 (1L1) - * - * The data-lanes DT property maps these as follows: - * - * 0 = no controller (unsupported by the HW) - * 1 = 4L - * 2 = 2L - * 3 = 1L0 - * 4 = 1L1 - * - * <1 3 2 4> = NABIBI = [3 3] = x1x1 x1x1 (bif. of both ports; - */ - data-lanes = <1 3 2 4>; - status = "okay"; -}; - -&pcie3x4 { // @fe150000 - /* 1. M.2 slot, CON13: pcie30phy port0 lane0 */ - max-link-speed = <3>; - num-lanes = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie3x4_rst>; - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc_3v3_pcie30>; - status = "okay"; - - // pcie@0,0 { - // reg = <0x00000000 0 0 0 0>; - // #address-cells = <3>; - // #size-cells = <2>; - - // nvme0: pcie@0,0 { - // reg = <0x000000 0 0 0 0>; - // }; - // }; -}; - -&pcie3x2 { // @fe160000 - /* 3. M.2 slot, CON15: pcie30phy port1 lane0 */ - max-link-speed = <3>; - num-lanes = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pcie3x2_rst>; - reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc_3v3_pcie30>; - status = "okay"; - - // pcie@0,0 { - // reg = <0x00100000 0 0 0 0>; - // #address-cells = <3>; - // #size-cells = <2>; - - // nvme2: pcie@10,0 { - // reg = <0x000000 0 0 0 0>; - // }; - // }; -}; - -&pinctrl { - audio { - headphone_detect: headphone-detect { - rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - gpio-key { - key1_pin: key1-pin { - rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gpio-leds { - led_sys_pin: led-sys-pin { - rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - led_usr_pin: led-usr-pin { - rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - pcie { - pcie2_0_rst: pcie2-0-rst { - rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie2_1_rst: pcie2-1-rst { - rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie2_2_rst: pcie2-2-rst { - rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie3x2_rst: pcie3x2-rst { - rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pcie3x4_rst: pcie3x4-rst { - rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - sd_s0_pwr: sd-s0-pwr { - rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc_5v0_host20_en: vcc-5v0-host20-en { - rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc_5v0_host30_en: vcc-5v0-host30-en { - rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc_3v3_host32_en: vcc-3v3-host32-en { - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb-typec { - usbc0_int: usbc0-int { - rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - typec_5v_pwr_en: typec-5v-pwr-en { - rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -/* Connected to 5V Fan */ -&pwm1 { - pinctrl-0 = <&pwm1m1_pins>; - status = "okay"; -}; - -/* Connected to MIPI-DSI0 */ -&pwm2 { - pinctrl-0 = <&pwm2m1_pins>; -}; - -/* GPIO Connector, connected to 40-pin GPIO header */ -&pwm5 { - pinctrl-0 = <&pwm5m1_pins>; - status = "okay"; -}; - -/* GPIO Connector */ -&pwm8 { - pinctrl-0 = <&pwm8m0_pins>; - status = "okay"; -}; - -/* GPIO Connector */ -&pwm9 { - pinctrl-0 = <&pwm9m0_pins>; - status = "okay"; -}; - -&saradc { - vref-supply = <&avcc_1v8_s0>; - status = "okay"; -}; - -/* eMMC */ -&sdhci { - bus-width = <8>; - full-pwr-cycle-in-suspend; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - no-sd; - no-sdio; - non-removable; - status = "okay"; -}; - -/* microSD card */ -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <150000000>; - no-mmc; - no-sdio; - sd-uhs-sdr104; - vmmc-supply = <&vcc_3v3_sd_s0>; - vqmmc-supply = <&vccio_sd_s0>; - status = "okay"; -}; - -/* GPIO Connector */ -&spi0 { - num-cs = <1>; - pinctrl-0 = <&spi0m2_cs0 &spi0m2_pins>; - status = "disabled"; -}; - -&spi2 { - status = "okay"; - assigned-clocks = <&cru CLK_SPI2>; - assigned-clock-rates = <200000000>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; - num-cs = <1>; - - rk806_single: pmic@0 { - compatible = "rockchip,rk806"; - reg = <0x0>; - - interrupt-parent = <&gpio0>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - - pinctrl-names = "default"; - pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, - <&rk806_dvs2_null>, <&rk806_dvs3_null>; - - spi-max-frequency = <1000000>; - - system-power-controller; - - vcc1-supply = <&vcc_4v0_sys>; - vcc2-supply = <&vcc_4v0_sys>; - vcc3-supply = <&vcc_4v0_sys>; - vcc4-supply = <&vcc_4v0_sys>; - vcc5-supply = <&vcc_4v0_sys>; - vcc6-supply = <&vcc_4v0_sys>; - vcc7-supply = <&vcc_4v0_sys>; - vcc8-supply = <&vcc_4v0_sys>; - vcc9-supply = <&vcc_4v0_sys>; - vcc10-supply = <&vcc_4v0_sys>; - vcc11-supply = <&vcc_2v0_pldo_s3>; - vcc12-supply = <&vcc_4v0_sys>; - vcc13-supply = <&vcc_1v1_nldo_s3>; - vcc14-supply = <&vcc_1v1_nldo_s3>; - vcca-supply = <&vcc_4v0_sys>; - - gpio-controller; - #gpio-cells = <2>; - - rk806_dvs1_null: dvs1-null-pins { - pins = "gpio_pwrctrl1"; - function = "pin_fun0"; - }; - - rk806_dvs2_null: dvs2-null-pins { - pins = "gpio_pwrctrl2"; - function = "pin_fun0"; - }; - - rk806_dvs3_null: dvs3-null-pins { - pins = "gpio_pwrctrl3"; - function = "pin_fun0"; - }; - - regulators { - vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_gpu_s0"; - regulator-enable-ramp-delay = <400>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_cpu_lit_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_log_s0: dcdc-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <750000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_log_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <550000>; - regulator-max-microvolt = <950000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_vdenc_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_ddr_s0: dcdc-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <675000>; - regulator-max-microvolt = <900000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - vdd2_ddr_s3: dcdc-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vdd2_ddr_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_2v0_pldo_s3: dcdc-reg7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-ramp-delay = <12500>; - regulator-name = "vdd_2v0_pldo_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <2000000>; - }; - }; - - vcc_3v3_s3: dcdc-reg8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_3v3_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vddq_ddr_s0: dcdc-reg9 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vddq_ddr_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s3: dcdc-reg10 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avcc_1v8_s0: pldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "avcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8_s0: pldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - avdd_1v2_s0: pldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-name = "avdd_1v2_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3_s0: pldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vcc_3v3_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd_s0: pldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12500>; - regulator-name = "vccio_sd_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - pldo6_s3: pldo-reg6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "pldo6_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_0v75_s3: nldo-reg1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s3"; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <750000>; - }; - }; - - vdd_ddr_pll_s0: nldo-reg2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_ddr_pll_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <850000>; - }; - }; - - avdd_0v75_s0: nldo-reg3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "avdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v85_s0: nldo-reg4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <850000>; - regulator-name = "vdd_0v85_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_0v75_s0: nldo-reg5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <750000>; - regulator-name = "vdd_0v75_s0"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -/* GPIO Connector, connected to 40-pin GPIO header */ -&spi4 { - num-cs = <1>; - pinctrl-0 = <&spi4m1_cs0 &spi4m1_pins>; - status = "disabled"; -}; - -&tsadc { - status = "okay"; -}; - -/* GPIO Connector, connected to 40-pin GPIO header */ -&uart0 { - pinctrl-0 = <&uart0m0_xfer>; - status = "disabled"; -}; - -/* Debug UART */ -&uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; -}; - -/* GPIO Connector, connected to 40-pin GPIO header */ -&uart3 { - pinctrl-0 = <&uart3m1_xfer>; - status = "disabled"; -}; - -/* GPIO Connector, connected to 40-pin GPIO header */ -&uart4 { - pinctrl-0 = <&uart4m2_xfer>; - status = "disabled"; -}; - -/* GPIO Connector, connected to 40-pin GPIO header */ -&uart6 { - pinctrl-0 = <&uart6m1_xfer>; - status = "okay"; -}; - -/* GPIO Connector, connected to 40-pin GPIO header */ -&uart7 { - pinctrl-0 = <&uart7m2_xfer>; - status = "disabled"; -}; - -/* GPIO Connector, connected to 40-pin GPIO header */ -&uart8 { - pinctrl-0 = <&uart8m1_xfer>; - status = "disabled"; -}; - -&u2phy0 { - status = "okay"; -}; - -&u2phy0_otg { - rockchip,typec-vbus-det; /* @TODO Note: This flag is not (yet?) present in Linux 6.9 "Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml" */ - status = "okay"; -}; - -&u2phy1 { - status = "okay"; -}; - -&u2phy1_otg { - phy-supply = <&vcc_5v0_host_30>; - status = "okay"; -}; - -&u2phy2 { - status = "okay"; -}; - -&u2phy2_host { - phy-supply = <&vcc_5v0_host_20>; - status = "okay"; -}; - -&u2phy3 { - status = "okay"; -}; - -&u2phy3_host { - phy-supply = <&vcc_3v3_host_32>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - dr_mode = "otg"; - usb-role-switch; - status = "okay"; - - port { - #address-cells = <1>; - #size-cells = <0>; - - dwc3_0_role_switch: endpoint@0 { - reg = <0>; - remote-endpoint = <&usbc0_role_sw>; - }; - }; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -/* Upper USB 3.0 port */ -&usb_host1_xhci { - dr_mode = "host"; - snps,xhci-trb-ent-quirk; - status = "okay"; -}; - -/* Lower USB 3.0 port */ -&usb_host2_xhci { - dr_mode = "host"; - status = "okay"; -}; - -&usbdp_phy0 { - orientation-switch; - svid = <0xff01>; - sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; - sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; - status = "okay"; - - port { - #address-cells = <1>; - #size-cells = <0>; - usbdp_phy0_orientation_switch: endpoint@0 { - reg = <0>; - remote-endpoint = <&usbc0_orien_sw>; - }; - - usbdp_phy0_dp_altmode_mux: endpoint@1 { - reg = <1>; - remote-endpoint = <&dp_altmode_mux>; - }; - }; -}; - -&usbdp_phy1 { - status = "okay"; -}; - -&vop { - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi0_in_vp0>; - }; -}; - -&wdt { - status = "okay"; -}; +// DO NOT ADD ANYTHING TO THIS DTS! +// This file only exists for temporary backwards compatibility for existing installations installed before 2024-08-22. +// THIS COMPATIBILITY PATCH WILL BE DELETED in kernel 6.12, please migrate to the new dts by editing your "/boot/armbianEnv.txt"! diff --git a/patch/u-boot/legacy/u-boot-radxa-rk35xx/defconfig/nanopc_cm3588_defconfig b/patch/u-boot/legacy/u-boot-radxa-rk35xx/defconfig/nanopc_cm3588_defconfig deleted file mode 100644 index 47bed0ea5316..000000000000 --- a/patch/u-boot/legacy/u-boot-radxa-rk35xx/defconfig/nanopc_cm3588_defconfig +++ /dev/null @@ -1,216 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARCH_ROCKCHIP=y -CONFIG_SPL_GPIO_SUPPORT=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MALLOC_F_LEN=0x80000 -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" -CONFIG_ROCKCHIP_RK3588=y -CONFIG_ROCKCHIP_USB_BOOT=y -CONFIG_ROCKCHIP_FIT_IMAGE=y -CONFIG_ROCKCHIP_HWID_DTB=y -CONFIG_ROCKCHIP_VENDOR_PARTITION=y -CONFIG_USING_KERNEL_DTB_V2=y -CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y -CONFIG_ROCKCHIP_NEW_IDB=y -CONFIG_LOADER_INI="RK3588MINIALL.ini" -CONFIG_TRUST_INI="RK3588TRUST.ini" -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_TARGET_EVB_RK3588=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3588-nanopc-cm3588" -CONFIG_DEBUG_UART=y -CONFIG_LOCALVERSION="-armbian" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_FIT=y -CONFIG_FIT_IMAGE_POST_PROCESS=y -CONFIG_FIT_HW_CRYPTO=y -CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y -CONFIG_SPL_FIT_HW_CRYPTO=y -# CONFIG_SPL_SYS_DCACHE_OFF is not set -CONFIG_BOOTDELAY=0 -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_DISPLAY_CPUINFO is not set -CONFIG_ANDROID_BOOTLOADER=y -CONFIG_ANDROID_AVB=y -CONFIG_ANDROID_BOOT_IMAGE_HASH=y -CONFIG_SPL_BOARD_INIT=y -# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set -CONFIG_SPL_SEPARATE_BSS=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 -CONFIG_SPL_MMC_WRITE=y -CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_ATF=y -CONFIG_FASTBOOT_BUF_ADDR=0xc00800 -CONFIG_FASTBOOT_BUF_SIZE=0x04000000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_DTIMG=y -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_LZMADEC is not set -# CONFIG_CMD_UNZIP is not set -# CONFIG_CMD_FLASH is not set -# CONFIG_CMD_FPGA is not set -CONFIG_CMD_GPT=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_BOOT_ANDROID=y -CONFIG_CMD_MMC=y -CONFIG_CMD_PCI=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_TFTP_BOOTM=y -CONFIG_CMD_TFTP_FLASH=y -# CONFIG_CMD_MISC is not set -CONFIG_CMD_MTD_BLK=y -# CONFIG_SPL_DOS_PARTITION is not set -# CONFIG_ISO_PARTITION is not set -CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 -CONFIG_SPL_OF_CONTROL=y -CONFIG_SPL_DTB_MINIMUM=y -CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -# CONFIG_NET_TFTP_VARS is not set -CONFIG_REGMAP=y -CONFIG_SPL_REGMAP=y -CONFIG_SYSCON=y -CONFIG_SPL_SYSCON=y -# CONFIG_SARADC_ROCKCHIP is not set -CONFIG_SARADC_ROCKCHIP_V2=y -CONFIG_CLK=y -CONFIG_SPL_CLK=y -CONFIG_CLK_SCMI=y -CONFIG_SPL_CLK_SCMI=y -CONFIG_DM_CRYPTO=y -CONFIG_SPL_DM_CRYPTO=y -CONFIG_ROCKCHIP_CRYPTO_V2=y -CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y -CONFIG_DM_RNG=y -CONFIG_RNG_ROCKCHIP=y -CONFIG_SCMI_FIRMWARE=y -CONFIG_SPL_SCMI_FIRMWARE=y -CONFIG_ROCKCHIP_GPIO=y -CONFIG_ROCKCHIP_GPIO_V2=y -CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_DM_KEY=y -CONFIG_ADC_KEY=y -CONFIG_MISC=y -CONFIG_SPL_MISC=y -CONFIG_MISC_DECOMPRESS=y -CONFIG_SPL_MISC_DECOMPRESS=y -CONFIG_ROCKCHIP_OTP=y -CONFIG_ROCKCHIP_HW_DECOMPRESS=y -CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y -CONFIG_SPL_ROCKCHIP_SECURE_OTP=y -CONFIG_MMC_DW=y -CONFIG_MMC_DW_ROCKCHIP=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_SDMA=y -CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_MTD=y -CONFIG_MTD_BLK=y -CONFIG_MTD_DEVICE=y -CONFIG_NAND=y -CONFIG_MTD_SPI_NAND=y -CONFIG_SPI_FLASH=y -CONFIG_SF_DEFAULT_SPEED=80000000 -CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y -CONFIG_SPI_FLASH_XMC=y -CONFIG_SPI_FLASH_XTX=y -CONFIG_SPI_FLASH_MTD=y -CONFIG_DM_ETH=y -CONFIG_DM_ETH_PHY=y -CONFIG_DWC_ETH_QOS=y -CONFIG_GMAC_ROCKCHIP=y -CONFIG_NVME=y -CONFIG_PCI=y -CONFIG_DM_PCI=y -CONFIG_DM_PCI_COMPAT=y -CONFIG_PCIE_DW_ROCKCHIP=y -CONFIG_PHY_ROCKCHIP_INNO_USB2=y -CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y -CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y -CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y -CONFIG_PINCTRL=y -CONFIG_SPL_PINCTRL=y -CONFIG_DM_PMIC=y -CONFIG_PMIC_SPI_RK8XX=y -CONFIG_REGULATOR_PWM=y -CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_REGULATOR_GPIO=y -CONFIG_REGULATOR_RK860X=y -CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM=y -CONFIG_SPL_RAM=y -CONFIG_TPL_RAM=y -CONFIG_ROCKCHIP_SDRAM_COMMON=y -CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0 -CONFIG_DM_RESET=y -CONFIG_SPL_DM_RESET=y -CONFIG_SPL_RESET_ROCKCHIP=y -CONFIG_BAUDRATE=1500000 -CONFIG_DEBUG_UART_BASE=0xFEB50000 -CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_ROCKCHIP_SPI=y -CONFIG_ROCKCHIP_SFC=y -CONFIG_SYSRESET=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_XHCI_PCI=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_GENERIC=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_DWC3_GENERIC=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Rockchip" -CONFIG_USB_GADGET_VENDOR_NUM=0x2207 -CONFIG_USB_GADGET_PRODUCT_NUM=0x350a -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_DM_VIDEO=y -CONFIG_DISPLAY=y -CONFIG_DRM_ROCKCHIP=y -CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y -CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y -CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y -CONFIG_USE_TINY_PRINTF=y -CONFIG_LIB_RAND=y -CONFIG_SPL_TINY_MEMSET=y -CONFIG_RSA=y -CONFIG_SPL_RSA=y -CONFIG_RSA_N_SIZE=0x200 -CONFIG_RSA_E_SIZE=0x10 -CONFIG_RSA_C_SIZE=0x20 -CONFIG_LZ4=y -CONFIG_ERRNO_STR=y -# CONFIG_EFI_LOADER is not set -CONFIG_AVB_LIBAVB=y -CONFIG_AVB_LIBAVB_AB=y -CONFIG_AVB_LIBAVB_ATX=y -CONFIG_AVB_LIBAVB_USER=y -CONFIG_RK_AVB_LIBAVB_USER=y diff --git a/patch/u-boot/legacy/u-boot-radxa-rk35xx/dt/rk3588-nanopc-cm3588.dts b/patch/u-boot/legacy/u-boot-radxa-rk35xx/dt/rk3588-nanopc-cm3588.dts deleted file mode 100644 index b8a8c64ee6a7..000000000000 --- a/patch/u-boot/legacy/u-boot-radxa-rk35xx/dt/rk3588-nanopc-cm3588.dts +++ /dev/null @@ -1,235 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd - * - */ - -/dts-v1/; -#include -#include "rk3588.dtsi" -#include "rk3588-u-boot.dtsi" - -/ { - model = "FriendlyElec CM3588"; - compatible = "friendlyelec,cm3588", "rockchip,rk3588"; - - vcc12v_dcin: vcc12v-dcin { - u-boot,dm-pre-reloc; - compatible = "regulator-fixed"; - regulator-name = "vcc12v_dcin"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc5v0_sys: vcc5v0-sys { - u-boot,dm-pre-reloc; - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc12v_dcin>; - }; - - vcc_5v0: vcc-5v0 { - u-boot,dm-pre-reloc; - compatible = "regulator-fixed"; - regulator-name = "vcc_5v0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - regulator-always-on; - enable-active-high; - gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc_5v0_en>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - u-boot,dm-pre-reloc; - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host"; - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_pcie30: vcc3v3-pcie30 { - u-boot,dm-pre-reloc; - startup-delay-us = <50000>; - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie30"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - led_sys: led-sys { - u-boot,dm-pre-reloc; - compatible = "regulator-fixed"; - regulator-name = "led_sys"; - enable-active-high; - gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; // Turn on user led - regulator-boot-on; - regulator-always-on; - vin-supply = <&vcc5v0_sys>; - }; -}; - -&pcie2x1l0 { - u-boot,dm-pre-reloc; - /* 2. CON14: pcie30phy port0 lane1 */ - max-link-speed = <3>; - num-lanes = <1>; - phys = <&pcie30phy>; - reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; - - pcie@0,0 { - reg = <0x00200000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - nvme1: pcie@20,0 { - reg = <0x000000 0 0 0 0>; - }; - }; -}; - -&pcie2x1l1 { - u-boot,dm-pre-reloc; - /* 4. CON16: pcie30phy port1 lane1 */ - max-link-speed = <3>; - num-lanes = <1>; - phys = <&pcie30phy>; - reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; - - pcie@0,0 { - reg = <0x00300000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - nvme3: pcie@30,0 { - reg = <0x000000 0 0 0 0>; - }; - }; -}; - -&pcie3x4 { - u-boot,dm-pre-reloc; - /* 1. CON13: pcie30phy port0 lane0 */ - max-link-speed = <3>; - num-lanes = <1>; - reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; - - pcie@0,0 { - reg = <0x00000000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - nvme0: pcie@0,0 { - reg = <0x000000 0 0 0 0>; - }; - }; -}; - -&pcie3x2 { - u-boot,dm-pre-reloc; - /* 3. CON15: pcie30phy port1 lane0 */ - max-link-speed = <3>; - num-lanes = <1>; - reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie30>; - status = "okay"; - - pcie@0,0 { - reg = <0x00100000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - - nvme2: pcie@10,0 { - reg = <0x000000 0 0 0 0>; - }; - }; -}; - -&pcie30phy { - u-boot,dm-pre-reloc; - rockchip,pcie30-phymode = ; - status = "okay"; -}; - -&combphy0_ps { - u-boot,dm-pre-reloc; - status = "okay"; -}; - -&combphy2_psu { - u-boot,dm-pre-reloc; - status = "okay"; -}; - -&usb2phy0_grf { - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&u2phy0 { - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&u2phy0_otg { - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&usb2phy2_grf { - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&u2phy2 { - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&u2phy2_host { - status = "okay"; - u-boot,dm-pre-reloc; -}; - -&pinctrl { - usb { - u-boot,dm-pre-reloc; - vcc5v0_host_en: vcc5v0-host-en { - u-boot,dm-pre-reloc; - rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - power { - u-boot,dm-spl; - vcc_5v0_en: vcc-5v0-en { - u-boot,dm-spl; - rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -};