diff --git a/Libraries/Cordio/controller/sources/ble/lhci/lhci_cmd_vs.c b/Libraries/Cordio/controller/sources/ble/lhci/lhci_cmd_vs.c index a2a901487e..4ab4e9c098 100644 --- a/Libraries/Cordio/controller/sources/ble/lhci/lhci_cmd_vs.c +++ b/Libraries/Cordio/controller/sources/ble/lhci/lhci_cmd_vs.c @@ -233,33 +233,6 @@ bool_t lhciCommonVsStdDecodeCmdPkt(LhciHdr_t *pHdr, uint8_t *pBuf) evtParamLen += sizeof(BbBlePduFiltStats_t); break; - case LHCI_OPCODE_VS_REG_WRITE: { - uint8_t len; - uint32_t addr; - uint32_t *addrP; - - BSTREAM_TO_UINT8(len, pBuf); - BSTREAM_TO_UINT32(addr, pBuf); - addrP = (uint32_t *)addr; - - LL_TRACE_INFO2("### LlVsRegWrite ### 0x%08X %d bytes", addr, len); - - memcpy(addrP, pBuf, len); - break; - } - - case LHCI_OPCODE_VS_REG_READ: { - uint8_t len; - - BSTREAM_TO_UINT8(len, pBuf); - BSTREAM_TO_UINT32(regReadAddr, pBuf); - - LL_TRACE_INFO2("### LlVsRegRead ### 0x%08X %d bytes", regReadAddr, len); - - evtParamLen += len; - break; - } - case LHCI_OPCODE_VS_TX_TEST: { uint16_t numPackets = pBuf[4] | (pBuf[5] << 8); @@ -374,7 +347,6 @@ bool_t lhciCommonVsStdDecodeCmdPkt(LhciHdr_t *pHdr, uint8_t *pBuf) case LHCI_OPCODE_VS_GET_RAND_ADDR: case LHCI_OPCODE_VS_SET_TX_TEST_ERR_PATT: case LHCI_OPCODE_VS_SET_SNIFFER_ENABLE: - case LHCI_OPCODE_VS_REG_WRITE: case LHCI_OPCODE_VS_RX_TEST: case LHCI_OPCODE_VS_TX_TEST: case LHCI_OPCODE_VS_RESET_ADV_STATS: @@ -514,14 +486,6 @@ bool_t lhciCommonVsStdDecodeCmdPkt(LhciHdr_t *pHdr, uint8_t *pBuf) break; } - case LHCI_OPCODE_VS_REG_READ: { - if (regReadAddr != 0) { - uint32_t *regReadP = (uint32_t *)regReadAddr; - memcpy(pBuf, regReadP, (evtParamLen - 1)); - } - break; - } - /* --- default --- */ default: diff --git a/Libraries/Cordio/controller/sources/ble/lhci/lhci_int.h b/Libraries/Cordio/controller/sources/ble/lhci/lhci_int.h index 9ca0050561..0b7b31c1eb 100644 --- a/Libraries/Cordio/controller/sources/ble/lhci/lhci_int.h +++ b/Libraries/Cordio/controller/sources/ble/lhci/lhci_int.h @@ -360,31 +360,29 @@ extern "C" { #define LHCI_OPCODE_VS_SET_CONN_PHY_TX_PWR \ HCI_OPCODE(HCI_OGF_VENDOR_SPEC, 0x3DD) /*!< Set Connection Phy Tx Power opcode. */ -#define LHCI_OPCODE_VS_REG_WRITE HCI_OPCODE(HCI_OGF_VENDOR_SPEC, 0x300) /*!< Write data to MCU register or memory space. */ -#define LHCI_OPCODE_VS_REG_READ HCI_OPCODE(HCI_OGF_VENDOR_SPEC, 0x301) /*!< Read data from MCU register or memory space. */ #define LHCI_OPCODE_VS_RESET_CONN_STATS \ - HCI_OPCODE(HCI_OGF_VENDOR_SPEC, 0x302) /*!< Reset connection stats. */ + HCI_OPCODE(HCI_OGF_VENDOR_SPEC, 0x300) /*!< Reset connection stats. */ #define LHCI_OPCODE_VS_TX_TEST \ - HCI_OPCODE(HCI_OGF_VENDOR_SPEC, 0x303) /*!< Vendor specific TX test that takes numPkt param. */ + HCI_OPCODE(HCI_OGF_VENDOR_SPEC, 0x301) /*!< Vendor specific TX test that takes numPkt param. */ #define LHCI_OPCODE_VS_RESET_TEST_STATS \ HCI_OPCODE(HCI_OGF_VENDOR_SPEC, \ - 0x304) /*!