From 8b15d663023d838b6e9ee7b9f8c8cee941608aed Mon Sep 17 00:00:00 2001 From: AndreiGrozav Date: Wed, 12 Oct 2022 16:14:20 +0100 Subject: [PATCH] Rename pluto_ng to jupiter_sdr plus RevB updates Update license according to the latest format --- projects/{pluto_ng => jupiter_sdr}/Makefile | 2 +- projects/{pluto_ng => jupiter_sdr}/Readme.md | 8 ++-- .../{pluto_ng => jupiter_sdr}/system_bd.tcl | 24 +++++++---- .../system_constr.xdc | 43 +++++++++++-------- projects/jupiter_sdr/system_project.tcl | 21 +++++++++ .../{pluto_ng => jupiter_sdr}/system_top.v | 33 +++++++++----- projects/pluto_ng/system_project.tcl | 24 ----------- 7 files changed, 89 insertions(+), 66 deletions(-) rename projects/{pluto_ng => jupiter_sdr}/Makefile (96%) rename projects/{pluto_ng => jupiter_sdr}/Readme.md (60%) rename projects/{pluto_ng => jupiter_sdr}/system_bd.tcl (96%) rename projects/{pluto_ng => jupiter_sdr}/system_constr.xdc (92%) create mode 100644 projects/jupiter_sdr/system_project.tcl rename projects/{pluto_ng => jupiter_sdr}/system_top.v (94%) delete mode 100644 projects/pluto_ng/system_project.tcl diff --git a/projects/pluto_ng/Makefile b/projects/jupiter_sdr/Makefile similarity index 96% rename from projects/pluto_ng/Makefile rename to projects/jupiter_sdr/Makefile index 6343270346..1b42442c34 100644 --- a/projects/pluto_ng/Makefile +++ b/projects/jupiter_sdr/Makefile @@ -4,7 +4,7 @@ ## Auto-generated, do not modify! #################################################################################### -PROJECT_NAME := pluto_ng +PROJECT_NAME := jupiter_sdr M_DEPS += ../scripts/adi_pd.tcl M_DEPS += ../common/xilinx/adi_fir_filter_constr.xdc diff --git a/projects/pluto_ng/Readme.md b/projects/jupiter_sdr/Readme.md similarity index 60% rename from projects/pluto_ng/Readme.md rename to projects/jupiter_sdr/Readme.md index dbc86b6a45..d9146c4dbb 100644 --- a/projects/pluto_ng/Readme.md +++ b/projects/jupiter_sdr/Readme.md @@ -1,8 +1,8 @@ -# PLUTO HDL Project +# JUPITER_SDR HDL Project Here are some pointers to help you: - * [Board Product Page](https://www.analog.com/adalm-pluto_ng) + * [Board Product Page](https://www.analog.com/jupiter_sdr) * Parts : [RF Agile Transceiver](https://www.analog.com/adrv9002) - * Project Doc: https://wiki.analog.com/university/tools/pluto_ng - * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/adrv9002/reference_hdl + * Project Doc: https://wiki.analog.com/university/tools/jupiter_sdr + * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/jupiter_sdr/reference_hdl * Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-transceiver/adrv9002 diff --git a/projects/pluto_ng/system_bd.tcl b/projects/jupiter_sdr/system_bd.tcl similarity index 96% rename from projects/pluto_ng/system_bd.tcl rename to projects/jupiter_sdr/system_bd.tcl index 9f62a5d35d..50280339d4 100644 --- a/projects/pluto_ng/system_bd.tcl +++ b/projects/jupiter_sdr/system_bd.tcl @@ -1,3 +1,8 @@ +############################################################################### +## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +################################################################################ + # create board design source $ad_hdl_dir/projects/common/xilinx/adi_fir_filter_bd.tcl source $ad_hdl_dir/projects/scripts/adi_pd.tcl @@ -68,10 +73,11 @@ ad_ip_parameter sys_ps8 CONFIG.PSU__PMU__PERIPHERAL__ENABLE {0} # some sets of parameters must be configured at the same tine to avoid tools issues set_property -dict [list CONFIG.PSU__DISPLAYPORT__PERIPHERAL__ENABLE {1} \ CONFIG.PSU__DPAUX__PERIPHERAL__IO {MIO 27 .. 30} \ - CONFIG.PSU__DP__LANE_SEL {Single Lower} \ + CONFIG.PSU__DP__LANE_SEL {Dual Higher} \ CONFIG.PSU__SATA__PERIPHERAL__ENABLE {1} \ CONFIG.PSU__SATA__LANE0__ENABLE {0} \ - CONFIG.PSU__SATA__LANE1__IO {GT Lane3} \ + CONFIG.PSU__SATA__LANE1__ENABLE {1} \ + CONFIG.PSU__SATA__LANE1__IO {GT Lane1} \ CONFIG.PSU__USB0__PERIPHERAL__ENABLE {1} \ CONFIG.PSU__USB3_0__PERIPHERAL__ENABLE {1} \ CONFIG.PSU__USB3_0__PERIPHERAL__IO {GT Lane0} \ @@ -114,7 +120,7 @@ set_property -dict [list CONFIG.PSU__I2C1__PERIPHERAL__ENABLE {1} \ CONFIG.PSU__I2C1__PERIPHERAL__IO {MIO 32 .. 33} \ ] [get_bd_cells sys_ps8] -ad_ip_parameter sys_ps8 CONFIG.PSU__SATA__REF_CLK_FREQ {125} +ad_ip_parameter sys_ps8 CONFIG.PSU__SATA__REF_CLK_FREQ {150} ad_ip_parameter sys_ps8 CONFIG.PSU__CRF_APB__TOPSW_MAIN_CTRL__SRCSEL {DPLL} ad_ip_parameter sys_ps8 CONFIG.PSU__DP__REF_CLK_FREQ 108 ad_ip_parameter sys_ps8 CONFIG.PSU__USB0_COHERENCY 1 @@ -155,12 +161,12 @@ set sys_cpu_clk [get_bd_nets sys_cpu_clk] set sys_dma_clk [get_bd_nets sys_250m_clk] set sys_iodelay_clk [get_bd_nets sys_500m_clk] -set sys_cpu_reset [get_bd_nets sys_cpu_reset] -set sys_cpu_resetn [get_bd_nets sys_cpu_resetn] -set sys_dma_reset [get_bd_nets sys_250m_reset] -set sys_dma_resetn [get_bd_nets sys_250m_resetn] -set sys_iodelay_reset [get_bd_nets sys_500m_reset] -set sys_iodelay_resetn [get_bd_nets sys_500m_resetn] +set sys_cpu_reset [get_bd_nets sys_cpu_reset] +set sys_cpu_resetn [get_bd_nets sys_cpu_resetn] +set sys_dma_reset [get_bd_nets sys_250m_reset] +set sys_dma_resetn [get_bd_nets sys_250m_resetn] +set sys_iodelay_reset [get_bd_nets sys_500m_reset] +set sys_iodelay_resetn [get_bd_nets sys_500m_resetn] # gpio diff --git a/projects/pluto_ng/system_constr.xdc b/projects/jupiter_sdr/system_constr.xdc similarity index 92% rename from projects/pluto_ng/system_constr.xdc rename to projects/jupiter_sdr/system_constr.xdc index f8063cf29d..501e77753e 100644 --- a/projects/pluto_ng/system_constr.xdc +++ b/projects/jupiter_sdr/system_constr.xdc @@ -1,5 +1,9 @@ +############################################################################### +## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +################################################################################ -# pluto_ng pinout +# jupiter_sdr pinout set_property -dict {PACKAGE_PIN J7 IOSTANDARD LVCMOS18} [get_ports gp_int] ; ## IO_L24P_65_ADRV9002_GP_INT set_property -dict {PACKAGE_PIN L4 IOSTANDARD LVCMOS18} [get_ports mode] ; ## IO_65_ADRV9002_MODE @@ -11,6 +15,7 @@ set_property -dict {PACKAGE_PIN R1 IOSTANDARD LVCMOS18} [get_ports spi_do] set_property -dict {PACKAGE_PIN M7 IOSTANDARD LVCMOS18} [get_ports spi_enb] ; ## IO_65_SPI_ENB set_property -dict {PACKAGE_PIN R2 IOSTANDARD LVCMOS18} [get_ports spi_clk] ; ## IO_L1P_65_SPICLK +set_property -dict {PACKAGE_PIN A4 IOSTANDARD LVCMOS18} [get_ports usb_flash_prog_en] ; ## IO_66_USB_FLASH_PROG_EN set_property -dict {PACKAGE_PIN E7 IOSTANDARD LVCMOS18} [get_ports usb_pd_reset] ; ## IO_66_USB_PD_RESET set_property -dict {PACKAGE_PIN D8 IOSTANDARD LVCMOS18} [get_ports vin_poe_valid_n] ; ## VIN_POE_VALID_N set_property -dict {PACKAGE_PIN B7 IOSTANDARD LVCMOS18} [get_ports vin_usb2_valid_n] ; ## VIN_USB2_VALID_N @@ -73,6 +78,10 @@ set_property -dict {PACKAGE_PIN N1 IOSTANDARD LVDS} set_property -dict {PACKAGE_PIN AA5 IOSTANDARD LVDS DIFF_TERM_ADV TERM_100} [get_ports fpga_mcs_in_n] ; ## IO_L11N_64_EXT_MCS_IN_N set_property -dict {PACKAGE_PIN Y5 IOSTANDARD LVDS DIFF_TERM_ADV TERM_100} [get_ports fpga_mcs_in_p] ; ## IO_L11P_64_EXT_MCS_IN_P +set_property -dict {PACKAGE_PIN AE9 IOSTANDARD LVCMOS18} [get_ports adrv9002_mcssrc] ; ## IO_L4N_64_ADRV9002_MCSSRC +set_property -dict {PACKAGE_PIN C1 IOSTANDARD LVCMOS18} [get_ports fan_en] ; ## IO_L7P_66_FAN_EN +set_property -dict {PACKAGE_PIN B1 IOSTANDARD LVCMOS18} [get_ports fan_ctl] ; ## IO_L7N_66_FAN_CTL + set_property -dict {PACKAGE_PIN AD6 IOSTANDARD LVCMOS18} [get_ports dgpio[0]] ; ## IO_L5P_64_ADRV9002_DGPIO_0 set_property -dict {PACKAGE_PIN AD5 IOSTANDARD LVCMOS18} [get_ports dgpio[1]] ; ## IO_L5N_64_ADRV9002_DGPIO_1 set_property -dict {PACKAGE_PIN AC9 IOSTANDARD LVCMOS18} [get_ports dgpio[2]] ; ## IO_L6P_64_ADRV9002_DGPIO_2 @@ -121,25 +130,25 @@ set_property -dict {PACKAGE_PIN E10 IOSTANDARD LVCMOS33} [get_ports ext_gpio[15] # BANK 26 3V3 -set_property -dict {PACKAGE_PIN H10 IOSTANDARD LVCMOS33} [get_ports add_on[0]] ; # IO_L9P_AD3P_26 - -set_property -dict {PACKAGE_PIN H9 IOSTANDARD LVCMOS33} [get_ports add_on[1]] ; # IO_L9N_AD3N_26 - -set_property -dict {PACKAGE_PIN G10 IOSTANDARD LVCMOS33} [get_ports add_on[2]] ; # IO_L10P_AD2P_26 - -set_property -dict {PACKAGE_PIN F10 IOSTANDARD LVCMOS33} [get_ports add_on[3]] ; # IO_L10N_AD2N_26 - -set_property -dict {PACKAGE_PIN H11 IOSTANDARD LVCMOS33} [get_ports add_on[4]] ; # IO_L11P_AD1P_26 - -set_property -dict {PACKAGE_PIN G11 IOSTANDARD LVCMOS33} [get_ports add_on[5]] ; # IO_L11N_AD1N_26 - -set_property -dict {PACKAGE_PIN G12 IOSTANDARD LVCMOS33} [get_ports add_on[6]] ; # IO_L12P_AD0P_26 -set_property -dict {PACKAGE_PIN F12 IOSTANDARD LVCMOS33} [get_ports add_on[7]] ; # IO_L12N_AD0N_26 +set_property -dict {PACKAGE_PIN H10 IOSTANDARD LVCMOS33} [get_ports add_on_gpio[0]] ; # IO_L9P_AD3P_26 - +set_property -dict {PACKAGE_PIN H9 IOSTANDARD LVCMOS33} [get_ports add_on_gpio[1]] ; # IO_L9N_AD3N_26 - +set_property -dict {PACKAGE_PIN G10 IOSTANDARD LVCMOS33} [get_ports add_on_gpio[2]] ; # IO_L10P_AD2P_26 - +set_property -dict {PACKAGE_PIN F10 IOSTANDARD LVCMOS33} [get_ports add_on_gpio[3]] ; # IO_L10N_AD2N_26 - +set_property -dict {PACKAGE_PIN H11 IOSTANDARD LVCMOS33} [get_ports add_on_gpio[4]] ; # IO_L11P_AD1P_26 - +set_property -dict {PACKAGE_PIN G11 IOSTANDARD LVCMOS33} [get_ports add_on_gpio[5]] ; # IO_L11N_AD1N_26 - +set_property -dict {PACKAGE_PIN G12 IOSTANDARD LVCMOS33} [get_ports add_on_gpio[6]] ; # IO_L12P_AD0P_26 +set_property -dict {PACKAGE_PIN F12 IOSTANDARD LVCMOS33} [get_ports add_on_gpio[7]] ; # IO_L12N_AD0N_26 # BANK 64 1V8 -set_property -dict {PACKAGE_PIN AB6 IOSTANDARD LVCMOS18} [get_ports add_on[8]] ; # IO_L1P_T0L_N0_DBC_64 - -set_property -dict {PACKAGE_PIN AC6 IOSTANDARD LVCMOS18} [get_ports add_on[9]] ; # IO_L1N_T0L_N1_DBC_64 -set_property -dict {PACKAGE_PIN AD8 IOSTANDARD LVCMOS18} [get_ports add_on[10]] ; # IO_L2P_T0L_N2_64 -set_property -dict {PACKAGE_PIN AD7 IOSTANDARD LVCMOS18} [get_ports add_on[11]] ; # IO_L2N_T0L_N3_64 -set_property -dict {PACKAGE_PIN AB2 IOSTANDARD LVCMOS18} [get_ports add_on[12]] ; # IO_L21P_T3L_N4_AD8P_64 -set_property -dict {PACKAGE_PIN AB1 IOSTANDARD LVCMOS18} [get_ports add_on[13]] ; # IO_L21N_T3L_N5_AD8N_64 -set_property -dict {PACKAGE_PIN W1 IOSTANDARD LVCMOS18} [get_ports add_on[14]] ; # IO_L23P_T3U_N8_64 -set_property -dict {PACKAGE_PIN Y1 IOSTANDARD LVCMOS18} [get_ports add_on[15]] ; # IO_L23N_T3U_N9_64 +set_property -dict {PACKAGE_PIN AC6 IOSTANDARD LVCMOS18} [get_ports add_on_gpio[8]] ; # IO_L1N_T0L_N1_DBC_64 +set_property -dict {PACKAGE_PIN AD8 IOSTANDARD LVCMOS18} [get_ports add_on_gpio[9]] ; # IO_L2P_T0L_N2_64 +set_property -dict {PACKAGE_PIN AD7 IOSTANDARD LVCMOS18} [get_ports add_on_gpio[10]] ; # IO_L2N_T0L_N3_64 +set_property -dict {PACKAGE_PIN AB2 IOSTANDARD LVCMOS18} [get_ports add_on_gpio[11]] ; # IO_L21P_T3L_N4_AD8P_64 +set_property -dict {PACKAGE_PIN AB1 IOSTANDARD LVCMOS18} [get_ports add_on_gpio[12]] ; # IO_L21N_T3L_N5_AD8N_64 +set_property -dict {PACKAGE_PIN W1 IOSTANDARD LVCMOS18} [get_ports add_on_gpio[13]] ; # IO_L23P_T3U_N8_64 +set_property -dict {PACKAGE_PIN Y1 IOSTANDARD LVCMOS18} [get_ports add_on_gpio[14]] ; # IO_L23N_T3U_N9_64 +set_property -dict {PACKAGE_PIN AB6 IOSTANDARD LVCMOS18} [get_ports add_on_power] ; # IO_L1P_T0L_N0_DBC_64 ## connect to system management (monitor) diff --git a/projects/jupiter_sdr/system_project.tcl b/projects/jupiter_sdr/system_project.tcl new file mode 100644 index 0000000000..f89b31166f --- /dev/null +++ b/projects/jupiter_sdr/system_project.tcl @@ -0,0 +1,21 @@ +############################################################################### +## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved. +### SPDX short identifier: ADIBSD +################################################################################ + +source ../../scripts/adi_env.tcl +source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl +source $ad_hdl_dir/projects/scripts/adi_board.tcl + +set p_device xczu3eg-sfva625-2-e + +set sys_zynq 2 + +adi_project jupiter_sdr + +adi_project_files jupiter_sdr [list \ + "system_top.v" \ + "system_constr.xdc" \ + "$ad_hdl_dir/library/common/ad_iobuf.v" ] + +adi_project_run jupiter_sdr diff --git a/projects/pluto_ng/system_top.v b/projects/jupiter_sdr/system_top.v similarity index 94% rename from projects/pluto_ng/system_top.v rename to projects/jupiter_sdr/system_top.v index 51967af471..cd6583f577 100644 --- a/projects/pluto_ng/system_top.v +++ b/projects/jupiter_sdr/system_top.v @@ -1,6 +1,6 @@ // *************************************************************************** // *************************************************************************** -// Copyright 2014 - 2021 (c) Analog Devices, Inc. All rights reserved. +// Copyright (C) 2023 Analog Devices, Inc. All rights reserved. // // In this HDL repository, there are many different and unique modules, consisting // of various HDL (Verilog or VHDL) components. The individual modules are @@ -43,9 +43,14 @@ module system_top ( output spi_enb, output usb_pd_reset, + output usb_flash_prog_en, + output fan_en, + output fan_ctl, + output adrv9002_mcssrc, inout [15:0] ext_gpio, - inout [15:0] add_on, + inout [14:0] add_on_gpio, + output add_on_power, inout [11:0] dgpio, input gp_int, @@ -60,9 +65,6 @@ module system_top ( input fpga_ref_clk_n, input fpga_ref_clk_p, - //input adrv9002_dev_clk, - //input s_1pps, - input fpga_mcs_in_n, input fpga_mcs_in_p, output dev_mcs_fpga_out_n, @@ -178,7 +180,8 @@ module system_top ( // assignments - assign gpio_i[94:64] = gpio_o[94:64]; + assign gpio_i[94:68] = gpio_o[94:68]; + assign gpio_i[64] = gpio_o[64]; assign gpio_i[15:7] = gpio_o[15:7]; assign gpio_i[3:1] = gpio_o[3:1]; @@ -192,7 +195,13 @@ module system_top ( assign gpio_i[6] = vin_usb1_valid_n; assign mssi_sync = mcs_sync_busy | gpio_o[7]; + + // TO-DO //assign usb_pd_reset = gpio_o[8]; + assign adrv9002_mcssrc = gpio_o[65]; + assign usb_flash_prog_en = gpio_o[66]; + assign fan_en = 1'b1; + assign fan_ctl = gpio_o[67]; assign rf_rx1a_mux_ctl = gpio_o[ 8]; assign rf_rx1b_mux_ctl = gpio_o[ 9]; @@ -228,12 +237,14 @@ module system_top ( dgpio[11:0]})); // 43:32 ad_iobuf #( - .DATA_WIDTH(16) + .DATA_WIDTH(15) ) i_iobuf_addon ( - .dio_t ({gpio_t[63:48]}), - .dio_i ({gpio_o[63:48]}), - .dio_o ({gpio_i[63:48]}), - .dio_p ({add_on})); + .dio_t ({gpio_t[62:48]}), + .dio_i ({gpio_o[62:48]}), + .dio_o ({gpio_i[62:48]}), + .dio_p (add_on_gpio)); + + assign add_on_power = gpio_o[63]; IBUFDS i_ibufgs_fpga_ref_clk ( .I (fpga_ref_clk_p), diff --git a/projects/pluto_ng/system_project.tcl b/projects/pluto_ng/system_project.tcl deleted file mode 100644 index 7359bf733a..0000000000 --- a/projects/pluto_ng/system_project.tcl +++ /dev/null @@ -1,24 +0,0 @@ -source ../../scripts/adi_env.tcl -source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl -source $ad_hdl_dir/projects/scripts/adi_board.tcl - -# make ADI_PLUTO_FPGA=xczu2cg-sfva625-1-e -# make ADI_PLUTO_FPGA=xczu3eg-sfva625-1-e - -if [info exists ::env(ADI_PLUTO_FPGA)] { - set p_device $::env(ADI_PLUTO_FPGA) -} else { - # default - set p_device xczu3eg-sfva625-2-e -} - -set sys_zynq 2 - -adi_project pluto_ng - -adi_project_files pluto_ng [list \ - "system_top.v" \ - "system_constr.xdc" \ - "$ad_hdl_dir/library/common/ad_iobuf.v" ] - -adi_project_run pluto_ng