diff --git a/DCDC/globconf.inc b/DCDC/globconf.inc index 09106c4..56795e3 100644 --- a/DCDC/globconf.inc +++ b/DCDC/globconf.inc @@ -22,7 +22,7 @@ HAS_ADC = 1 ; Analog input words HAS_BACKGROUND = 1 ; Background Forth task (TIM2 ticker) - BG_TIM2_REL = 0x08FC ; 1ms ticker for 7S-LED MPX + BG_TIM_REL = 0x08FC ; 1ms ticker for 7S-LED MPX BG_RUNMASK = 0 ; BG task runs if "(BG_RUNMASK AND TICKCNT) equals 0" HAS_CPNVM = 1 ; Can compile to Flash, always interpret to RAM HAS_DOES = 1 ; CREATE-DOES> extension diff --git a/Makefile b/Makefile index 0b62bda..a1a9e69 100644 --- a/Makefile +++ b/Makefile @@ -1,7 +1,7 @@ -E4THCOM=e4thcom-0.6.3 +E4THCOM=e4thcom TERM_PORT=ttyUSB0 TERM_BAUD=9600 -TERM_FLAGS= +TERM_FLAGS="-p mcu:target:lib" ifeq ($(BOARD),) @@ -50,6 +50,9 @@ defaults: defaults105: stm8flash -c stlinkv2 -p stm8s105k4 -s opt -w tools/stm8s105FactoryDefaults.bin +term: + $(E4THCOM) -t stm8ef -p .:lib $(TERM_FLAGS) -d $(TERM_PORT) -b B$(TERM_BAUD) + else include forth.mk endif diff --git a/README.md b/README.md index 3b25b65..5d292a5 100644 --- a/README.md +++ b/README.md @@ -42,13 +42,13 @@ Various STM8 Discovery boards and [breakout boards](https://github.com/TG9541/st TG9541/STM8EF provides board support for several common "Chinese gadgets" like the following: -* [MINDEV](https://github.com/TG9541/stm8ef/wiki/Breakout-Boards) for the STM8S103F3P6 $0.65 "minimum development board" -* [C0135](https://github.com/TG9541/stm8ef/wiki/Board-C0135) "Relay-4 Board" - it can be used as a *Nano PLC* -* [W1209](https://github.com/TG9541/stm8ef/wiki/Board-W1209) $1.50 thermostat board w/ 3 digit 7S-LED display, full- or half-duplex RS232 -* [W1219](https://github.com/TG9541/stm8ef/wiki/Board-W1219) low cost thermostat with 2x3 digit 7S-LED display, half-duplex RS232 through PD1/SWIM -* [W1401](https://github.com/TG9541/stm8ef/wiki/Board-W1401) (also XH-W1401) thermostat with 3x2 digit 7S-LED display, half-duplex RS232 through SWIM +* [MINDEV](https://github.com/TG9541/stm8ef/wiki/Breakout-Boards) for the STM8S103F3P6 $0.80 "minimum development board" +* [C0135](https://github.com/TG9541/stm8ef/wiki/Board-C0135) the "Relay-4 Board" can be used as a *Nano PLC* (Forth MODBUS support is available) +* [W1209](https://github.com/TG9541/stm8ef/wiki/Board-W1209) $1.50 thermostat board w/ 3 digit 7S-LED display, full- or half-duplex RS232 (some board variants, e.g. with CA LED displays, are supported) +* [W1219](https://github.com/TG9541/stm8ef/wiki/Board-W1219) low cost thermostat with 2x3 digit 7S-LED display with half-duplex RS232 through PD1/SWIM +* [W1401](https://github.com/TG9541/stm8ef/wiki/Board-W1401) (also XH-W1401) thermostat with 3x2 digit 7S-LED display with half-duplex RS232 through shared PD1/SWIM * [DCDC](https://github.com/TG9541/stm8ef/wiki/Board-CN2596) hacked DCDC converter with voltmeter -* [XH-M194](https://github.com/TG9541/stm8ef/wiki/Board-XH-M194) Timer board with 6 relays, RTC with clock display, and 6 keys +* [XH-M194](https://github.com/TG9541/stm8ef/wiki/Board-XH-M194) Timer board with STM8S105K4T6C, 6 relays, RTC with clock display, 6 keys with half-duplex RS232 through PD1/SWIM * [XY-PWM](https://github.com/TG9541/stm8ef/wiki/XY-PWM) PWM board w/ 3 digit 7S-LED display, 3 keys, dual PWM and full-duplex RS232 * [XY-LPWM](https://github.com/TG9541/stm8ef/wiki/Board-XY-LPWM) PWM board w/ 2x4 digit 7S-LCD display, 4 keys, PWM and full-duplex RS232 @@ -62,9 +62,9 @@ From STM8 eForth 2.2.24 on, the binary release contains all the files that are n In addition to the initial code STM8 eForth offers many features: -* Subroutine Threaded Code (STC) with improved code density +* Subroutine Threaded Code (STC) with improved code density that rivals DTC * native `BRANCH` (JP), and `EXIT` (RET) - * relative CALL where possible (2 instead of 3 bytes) + * relative CALL when possible (2 instead of 3 bytes) * TRAP as pseudo-opcode for literals (3 instead of 5 bytes) * [ALIAS words](https://github.com/TG9541/stm8ef/wiki/STM8-eForth-Alias-Words) for indirect dictionary entries ([even in EEPROM!](https://github.com/TG9541/stm8ef/wiki/STM8-eForth-Alias-Words#dictionary-with-alias-words-in-the-eeprom)) * Forth - machine-code interface using STM8 registers @@ -81,51 +81,46 @@ In addition to the initial code STM8 eForth offers many features: * [on supported boards](https://github.com/TG9541/stm8ef/wiki/eForth-Background-Task) `?KEY` reads board keys, `EMIT` uses board display * robust context switch with "clean stack" approach * cooperative multitasking with `'IDLE` - * [idle task](https://github.com/TG9541/stm8ef/wiki/STM8-eForth-Idle-Task) execution while there is no console input - * very fast idle loop (< 10µs) + * [idle task](https://github.com/TG9541/stm8ef/wiki/STM8-eForth-Idle-Task) execution while there is no console input with < 10µs cycle time + * code in the `'IDLE` task can use the interpreter with `EVALUATE` * configuration options for serial console or dual serial interface - * UART: `?RX` and `TX!` - * any GPIO or pair of GPIOs from ports PA through PD can be used as a simulated COM port + * UART: `?RX` and `TX!` full-duplex w/ half-duplex option on STM8 Low Density devices * GPIO w/ Port edge & Timer4 interrupts: `?RXP .. TXP!` * half-duplex "bus style" communication using simulated COM port or UART + * any GPIO or pair of GPIOs from ports PA through PD can be used as a simulated COM port * option for `TX! .. ?RX` on simulated COM port, and `?RXP .. TXP!` on UART * configurable vocabulary subsets for binary size optimization - * configuration possible down to the level of single words - * export of `ALIAS` definitions for unlinked words + * board dependent configuration possible down to the level of single words + * export of `ALIAS` definitions for any unlinked words * Extended vocabulary: - * `CREATE ... DOES>` for defining *defining words* - * Vectored I/O: `'KEY?` and `'EMIT` - * Loop structure words: `DO .. LEAVE .. LOOP`, `+LOOP` + * `CONSTANT` (yes, that was missing in the original code) + * `'KEY?` and `'EMIT` for I/O redirection (that was missing, too) + * `CREATE ... DOES>` for *defining words* (few eForth variants have it) + * `DO .. LEAVE .. LOOP`, `+LOOP` for better compatibility with generic Forth * STM8S ADC control: `ADC!`, `ADC@` * board keys, outputs, LEDs: `BKEY`, `KEYB?`, `EMIT7S`, `OUT`, `OUT!` * EEPROM, FLASH lock/unlock: `LOCK`, `ULOCK`, `LOCKF`, `ULOCKF` * native bit set/reset: `B!` (b a u -- ), `[ .. ]B!` (and more) * native 16bit STM8 timer register access: `2C@`, `2C!` - * compile to Flash memory: `NVR`, `RAM`, `WIPE`, `RESET` + * compile to Flash memory: `NVR`, `RAM`, `WIPE`, `RESET` and `PERSIST` * autostart applications: `'BOOT` - * `EVALUATE` for interpreting text strings (even in the idle task!) - * many words that were missing in eForth compared to Forth systems popular in the 1980s -* board support for [STM8S based very-low-cost boards][WG1]: - * STM8S103F3P6 "$0.80" breakout board - * Termostats, e.g. W1209, W1219, or W1401 - * Low cost power supply boards, e.g. XH-M188, DCDC w/ voltmeter - * C0135 Relay Board - * configuration folders for easy application to new boards + * `EVALUATE` can run the Forth interpreter on text strings (even compilation is possible!) + * many words from Forth systems that were popular in the 1980s are provided in the library ## Other changes to the original STM8EF code: * "ASxxxx V2.0" syntax (the free [SDCC tool chain](http://sdcc.sourceforge.net/) allows mixing Forth, assembly, and C) -* hard STM8S105C6 dependencies removed (e.g. initialization, clock, RAM layout, UART2) +* hard STM8S105C6 dependencies were removed (e.g. initialization, clock, RAM layout, UART2) * flexible RAM layout, basic RAM memory management, meaningful symbols for RAM locations * conditional code for different target boards with a subdirectory based configuration framework * original code bugs fixed (e.g. `COMPILE`, `DEPTH`, `R!`, `PICK`) * significant binary size reduction +* many more # Disclaimer, copyright This is a hobby project! Don't use the code if support or correctness are required. -There is a policy to keep the code free from 3rd party licenses but it can't be guaranteed that no additional licenses apply which, in the worst case, may require derived work to be made public! Please refer to LICENSE.md for details. +The license is MIT. Please refer to LICENSE.md for details. [WG1]: https://github.com/TG9541/stm8ef/wiki/STM8S-Value-Line-Gadgets - diff --git a/STM8S207RB/globconf.inc b/STM8S207RB/globconf.inc index 6e3856a..02d0fc7 100644 --- a/STM8S207RB/globconf.inc +++ b/STM8S207RB/globconf.inc @@ -3,6 +3,7 @@ ; Clock: HSI (no crystal) HALF_DUPLEX = 0 ; Use UART in half duplex mode + USE_UART2 = 0 ; Use the 2nd UART for the console (STM8S207: optional) HAS_TXUART = 1 ; No UART TXD, word TX! HAS_RXUART = 1 ; No UART RXD, word ?RX HAS_TXSIM = 0 ; Enable TxD via GPIO/TIM4, word TXGP! diff --git a/W1219/globconf.inc b/W1219/globconf.inc index 552a5ff..0d729f8 100644 --- a/W1219/globconf.inc +++ b/W1219/globconf.inc @@ -21,7 +21,7 @@ HAS_ADC = 1 ; Analog input words HAS_BACKGROUND = 1 ; Background Forth task (TIM2 ticker) - BG_TIM2_REL = 0x09BA ; 5ms/4 = 1.25ms ticker for 7S-LED MPX + BG_TIM_REL = 0x09BA ; 5ms/4 = 1.25ms ticker for 7S-LED MPX BG_RUNMASK = 3 ; BG task runs "in one out of four" cycles HAS_CPNVM = 1 ; Can compile to Flash, always interpret to RAM diff --git a/W1401/globconf.inc b/W1401/globconf.inc index 10a24b4..ca71099 100644 --- a/W1401/globconf.inc +++ b/W1401/globconf.inc @@ -23,7 +23,7 @@ HAS_ADC = 1 ; Analog input words HAS_BACKGROUND = 1 ; Background Forth task (TIM2 ticker) - BG_TIM2_REL = 0x09BA ; 5ms/4 = 1.25ms ticker for 7S-LED MPX + BG_TIM_REL = 0x09BA ; 5ms/4 = 1.25ms ticker for 7S-LED MPX BG_RUNMASK = 3 ; BG task runs "in one out of four" cycles HAS_CPNVM = 1 ; Can compile to Flash, always interpret to RAM diff --git a/XH-M194/globconf.inc b/XH-M194/globconf.inc index 6157783..0ea6549 100644 --- a/XH-M194/globconf.inc +++ b/XH-M194/globconf.inc @@ -21,7 +21,7 @@ HAS_ADC = 0 ; Analog input words HAS_BACKGROUND = 1 ; Background Forth task (TIM2 ticker) - BG_TIM2_REL = 0x09BA ; 5ms/4 = 1.25ms ticker for 7S-LED MPX + BG_TIM_REL = 0x09BA ; 5ms/4 = 1.25ms ticker for 7S-LED MPX BG_RUNMASK = 3 ; BG task runs "in one out of four" cycles HAS_CPNVM = 1 ; Can compile to Flash, always interpret to RAM diff --git a/XY-PWM/globconf.inc b/XY-PWM/globconf.inc index c8f271e..c1b0847 100644 --- a/XY-PWM/globconf.inc +++ b/XY-PWM/globconf.inc @@ -21,7 +21,7 @@ HAS_ADC = 0 ; no, Analog input words HAS_BACKGROUND = 1 ; Background Forth task (TIM2 ticker) - BG_TIM2_REL = 0x09BA ; 5ms/4 = 1.25ms ticker for 7S-LED MPX + BG_TIM_REL = 0x09BA ; 5ms/4 = 1.25ms ticker for 7S-LED MPX BG_RUNMASK = 3 ; BG task runs "in one out of four" cycles HAS_CPNVM = 1 ; Can compile to Flash, always interpret to RAM diff --git a/forth.asm b/forth.asm index 205772e..2e2b6e9 100644 --- a/forth.asm +++ b/forth.asm @@ -47,6 +47,7 @@ .globl _EXTI2_IRQHandler .globl _EXTI3_IRQHandler .globl _EXTI4_IRQHandler + .globl _TIM1_UO_IRQHandler .globl _TIM2_UO_IRQHandler .globl _TIM4_IRQHandler .globl _forth @@ -374,10 +375,11 @@ _TIM4_IRQHandler: ; ============================================== -; TIM2 interrupt handler for background task +; TIM1 or TIM2 interrupt handler for background task +_TIM1_UO_IRQHandler: _TIM2_UO_IRQHandler: .ifne (HAS_LED7SEG + HAS_BACKGROUND) - BRES TIM2_SR1,#0 ; clear TIM2 UIF + BRES BG_TIM_SR1,#0 ; clear TIM1 or TIM2 UIF .ifne HAS_LED7SEG CALL LED_MPX ; board dependent code for 7Seg-LED-Displays @@ -524,12 +526,17 @@ COLD: .ifne HAS_BACKGROUND ; init BG timer interrupt + .ifne BG_USE_TIM1 + MOV ITC_SPR3,#0x3F ; Interrupt prio. low for TIM1 (Int11) + MOV TIM1_PSCRL,#7 ; prescaler 1/(7+1) = 1/8 + .else MOV ITC_SPR4,#0xF7 ; Interrupt prio. low for TIM2 (Int13) - MOV TIM2_PSCR,#0x03 ; prescaler 1/8 - MOV TIM2_ARRH,#(BG_TIM2_REL/256) ; reload H - MOV TIM2_ARRL,#(BG_TIM2_REL%256) ; L - MOV TIM2_CR1,#0x01 ; enable TIM2 - MOV TIM2_IER,#0x01 ; enable TIM2 interrupt + MOV TIM2_PSCR,#0x03 ; prescaler 1/(2^3) = 1/8 + .endif + MOV BG_TIM_ARRH,#(BG_TIM_REL/256) ; reload H + MOV BG_TIM_ARRL,#(BG_TIM_REL%256) ; L + MOV BG_TIM_CR1,#0x01 ; enable background timer + MOV BG_TIM_IER,#0x01 ; enable background timer interrupt .endif .ifne HAS_RXUART+HAS_TXUART @@ -1051,9 +1058,8 @@ DROP: HEADER DDROP "2DROP" DDROP: - INCW X - INCW X - JRA DROP + ADDW X,#4 + RET ; DUP ( w -- w w ) ( TOS STM8: -- Y,Z,N ) ; Duplicate top stack item. diff --git a/inc/defconf.inc b/inc/defconf.inc index 6360ea7..3338db1 100644 --- a/inc/defconf.inc +++ b/inc/defconf.inc @@ -7,7 +7,8 @@ TERM_LINUX = 1 ; LF terminates line - HALF_DUPLEX = 0 ; Use UART in half duplex mode (1: PD5, 2: PA3) + HALF_DUPLEX = 0 ; Use the STM8S Low Density UART in half duplex mode (1: PD5, 2: PA3) + USE_UART2 = 0 ; Use the 2nd UART for the console (STM8S207: optional, STM8S105: default) HAS_RXUART = 1 ; Enable UART RXD, word ?RX HAS_TXUART = 1 ; Enable UART TXD, word TX! HAS_RXSIM = 0 ; Enable RxD via GPIO/TIM4, word ?RXGP @@ -17,8 +18,8 @@ PNTX = 1 ; Port GPIO# for HAS_TXDSIM SERPRIOTIM = 0 ; RXSIM priority in BG ticks - EMIT_BG = DROP ; TODO: vectored NUL background EMIT vector - QKEY_BG = ZERO ; TODO: NUL background QKEY vector + EMIT_BG = DROP ; vectored NUL background EMIT vector + QKEY_BG = ZERO ; NUL background QKEY vector HAS_LED7SEG = 0 ; 7-seg LED display, number of groups (0: none) LEN_7SGROUP = 3 ; default: 3 dig. 7-seg LED @@ -28,9 +29,11 @@ HAS_INPUTS = 0 ; Board digital inputs HAS_ADC = 0 ; Board analog inputs - HAS_BACKGROUND = 0 ; Background Forth task (TIM2 ticker) - BG_TIM2_REL = 0x26DE ; Reload value for TIM2 background ticker (default 0x26DE @ 5ms HSE) + HAS_BACKGROUND = 0 ; Background Forth task (TIM1 or TIM2 ticker) + BG_USE_TIM1 = 0 ; Use TIM1 for the Background Task (instead of TIM2) + BG_TIM_REL = 0x26DE ; Reload value for background ticker timer (default 0x26DE @ 5ms HSE) BG_RUNMASK = 0 ; BG task runs if "(BG_RUNMASK AND TICKCNT) equals 0" + HAS_CPNVM = 0 ; Can compile to Flash, always interpret to RAM HAS_DOES = 0 ; DOES> extension HAS_DOLOOP = 0 ; DO .. LOOP extension: DO LEAVE LOOP +LOOP diff --git a/inc/stm8device.inc b/inc/stm8device.inc index 1c2bf80..86b5473 100644 --- a/inc/stm8device.inc +++ b/inc/stm8device.inc @@ -249,24 +249,13 @@ UART2_GTR = 0x524A ; UART2 guard time register (0x00) UART2_PSCR = 0x524B ; UART2 prescaler register (0x00) - UART3_SR = 0x5240 ; UART3 status register (0xC0) - UART3_DR = 0x5241 ; UART3 data register (0xXX) - UART3_BRR1 = 0x5242 ; UART3 baud rate register 1 (0x00) - UART3_BRR2 = 0x5243 ; UART3 baud rate register 2 (0x00) - UART3_CR1 = 0x5244 ; UART3 control register 1 (0x00) - UART3_CR2 = 0x5245 ; UART3 control register 2 (0x00) - UART3_CR3 = 0x5246 ; UART3 control register 3 (0x00) - UART3_CR4 = 0x5247 ; UART3 control register 4 (0x00) - ; 0x5248 - UART3_CR6 = 0x5249 ; UART3 control register 6 (0x00) - - .ifeq (TARGET - STM8S105K4) - UART_DR = UART2_DR + .ifeq (TARGET - STM8S105K4) * (USE_UART2 - 1) + UART_DR = UART2_DR ; STM8S105 or STM8S207 UART_SR = UART2_SR UART_BRR1 = UART2_BRR1 UART_CR2 = UART2_CR2 .else - UART_DR = UART1_DR ; STM8S103 and STM8S207 + UART_DR = UART1_DR ; STM8S103 or STM8S207 UART_SR = UART1_SR UART_BRR1 = UART1_BRR1 UART_CR2 = UART1_CR2 @@ -309,7 +298,6 @@ TIM1_OISR = 0x526F ; TIM1 output idle state register (0x00) ; ***** TIM2 -;.ifeq HAS_BACKGROUND TIM2_CR1 = 0x5300 ; TIM2 control register 1 (0x00) .ifne (TARGET - STM8S103F3) @@ -355,7 +343,22 @@ TIM2_CCR3H = 0x5315 ; TIM2 capture/compare register 3 high (0x00) TIM2_CCR3L = 0x5316 ; TIM2 capture/compare register 3 low (0x00) .endif -;.endif + +; define symbols for the background task timer + .ifne BG_USE_TIM1 + BG_TIM_CR1 = TIM1_CR1 + BG_TIM_IER = TIM1_IER + BG_TIM_SR1 = TIM1_SR1 + BG_TIM_ARRH = TIM1_ARRH + BG_TIM_ARRL = TIM1_ARRL + .else + BG_TIM_CR1 = TIM2_CR1 + BG_TIM_IER = TIM2_IER + BG_TIM_SR1 = TIM2_SR1 + BG_TIM_ARRH = TIM2_ARRH + BG_TIM_ARRL = TIM2_ARRL + .endif + ; ***** TIM3 (High Density) diff --git a/inc/stm8ldevice.inc b/inc/stm8ldevice.inc index 2ea0eac..e3eb0ea 100644 --- a/inc/stm8ldevice.inc +++ b/inc/stm8ldevice.inc @@ -304,7 +304,19 @@ TIM2_CCR2L = 0x5264 ; TIM2 capture/compare register 2 low 0x00 TIM2_BKR = 0x5265 ; TIM2 break register 0x00 TIM2_OISR = 0x5266 ; TIM2 output idle state register 0x00 + + .ifne BG_USE_TIM1 + error: BG_USE_TIM1 not supported + .else + BG_TIM_CR1 = TIM2_CR1 + BG_TIM_IER = TIM2_IER + BG_TIM_SR1 = TIM2_SR1 + BG_TIM_ARRH = TIM2_ARRH + BG_TIM_ARRL = TIM2_ARRL + .endif + ; 0x00 5267 to 0x00 527F Reserved area (25 bytes) + ; TIM3 TIM3_CR1 = 0x5280 ; TIM3 control register 1 0x00 TIM3_CR2 = 0x5281 ; TIM3 control register 2 0x00 diff --git a/main.c b/main.c index af56da1..638830b 100644 --- a/main.c +++ b/main.c @@ -5,7 +5,9 @@ // The following declarations are just to provide a placeholder // so that mixing-in C code with own memory gets easier -volatile __at(0x40) uint8_t forthData[0x03FF-0x40]; +// When creating mixed C/Forth applications with Medium Density or +// High Density devices don't forget to adjust this address range! +volatile __at(0x30) uint8_t forthData[0x03FF-0x30]; // declare trap handler void TRAP_Handler() __trap; @@ -25,6 +27,11 @@ void EXTI3_IRQHandler() __interrupt (INTVEC_EXTI3); // declare interrupt handler for Port E external interrupts void EXTI4_IRQHandler() __interrupt (INTVEC_EXTI4); +#ifdef INTVEC_TIM1_UPDATE +// declare interrupt handler for TIM1 update overflow +void TIM1_UO_IRQHandler() __interrupt (INTVEC_TIM1_UPDATE); +#endif + // declare interrupt handler for TIM2 update overflow void TIM2_UO_IRQHandler() __interrupt (INTVEC_TIM2_UPDATE); diff --git a/mcu/STM8S103.efr b/mcu/STM8S103.efr index 3f7198a..a3d3d40 100644 --- a/mcu/STM8S103.efr +++ b/mcu/STM8S103.efr @@ -38,10 +38,10 @@ 8042 equ INT_TIM2CC \ TIM2 capture/compare \ 8046 \ 804A -804E equ INT_UARTTX \ UART1 Tx complete +804E equ INT_UARTTX \ UART1 Tx complete (1st UART) 8052 equ INT_UARTRX \ UART1 Receive register DATA FULL 8056 equ INT_I2C \ I2C interrupt -\ 805A +\ 805A - no 2nd UART \ 805E 8062 equ INT_ADC1 \ ADC1 end of conversion/analog watchdog interrupt 8066 equ INT_TIM4 \ TIM4 update/overflow @@ -203,6 +203,8 @@ 521D equ I2C_TRISER \ I2C TRISE register (0x02) 521E equ I2C_PECR \ I2C packet error checking register (0x00) +\ Low Density devices use "1st UART" addresses which in this case +\ is the same as the name in the datasheet 5230 equ UART1_SR \ UART1 status register (0xC0) 5231 equ UART1_DR \ UART1 data register (0xXX) 5232 equ UART1_BRR1 \ UART1 baud rate register 1 (0x00) @@ -214,18 +216,7 @@ 5238 equ UART1_CR5 \ UART1 control register 5 (0x00) 5239 equ UART1_GTR \ UART1 guard time register (0x00) 523A equ UART1_PSCR \ UART1 prescaler register (0x00) -5240 equ UART2_SR \ UART1 status register (0xC0) -5241 equ UART2_DR \ UART1 data register (0xXX) -5242 equ UART2_BRR1 \ UART1 baud rate register 1 (0x00) -5243 equ UART2_BRR2 \ UART1 baud rate register 2 (0x00) -5244 equ UART2_CR1 \ UART1 control register 1 (0x00) -5245 equ UART2_CR2 \ UART1 control register 2 (0x00) -5246 equ UART2_CR3 \ UART1 control register 3 (0x00) -5247 equ UART2_CR4 \ UART1 control register 4 (0x00) -5248 equ UART2_CR5 \ UART1 control register 5 (0x00) -5249 equ UART2_CR6 \ UART1 control register 6 (0x00) -524A equ UART2_GTR \ UART1 guard time register (0x00) -524B equ UART2_PSCR \ UART1 prescaler register (0x00) + 5250 equ TIM1_CR1 \ TIM1 control register 1 (0x00) 5251 equ TIM1_CR2 \ TIM1 control register 2 (0x00) 5252 equ TIM1_SMCR \ TIM1 slave mode control register (0x00) diff --git a/mcu/STM8S105.efr b/mcu/STM8S105.efr index ccedf46..cb3ef2a 100644 --- a/mcu/STM8S105.efr +++ b/mcu/STM8S105.efr @@ -38,11 +38,11 @@ 8042 equ INT_TIM2CC \ TIM2 capture/compare 8046 equ INT_TIM3 \ TIM3 update /overflow 804A equ INT_TIM3CC \ TIM3 capture/compare -\ 804E +\ 804E - no 1st UART \ 8052 8056 equ INT_I2C \ I2C interrupt -805A equ INT_UARTTX \ UART2 Tx complete -805C equ INT_UARTRX \ UART2 Receive register DATA FULL +805A equ INT_UARTTX \ UART2 Tx complete +805C equ INT_UARTRX \ UART2 Receive register DATA FULL 8062 equ INT_ADC1 \ ADC1 end of conversion/analog watchdog interrupt 8066 equ INT_TIM4 \ TIM4 update/overflow 806A equ INT_FLASH \ Flash EOP/WR_PG_DIS @@ -194,29 +194,21 @@ 521D equ I2C_TRISER \ I2C TRISE register (0x02) 521E equ I2C_PECR \ I2C packet error checking register (0x00) -5230 equ UART1_SR \ UART1 status register (0xC0) -5231 equ UART1_DR \ UART1 data register (0xXX) -5232 equ UART1_BRR1 \ UART1 baud rate register 1 (0x00) -5233 equ UART1_BRR2 \ UART1 baud rate register 2 (0x00) -5234 equ UART1_CR1 \ UART1 control register 1 (0x00) -5235 equ UART1_CR2 \ UART1 control register 2 (0x00) -5236 equ UART1_CR3 \ UART1 control register 3 (0x00) -5237 equ UART1_CR4 \ UART1 control register 4 (0x00) -5238 equ UART1_CR5 \ UART1 control register 5 (0x00) -5239 equ UART1_GTR \ UART1 guard time register (0x00) -523A equ UART1_PSCR \ UART1 prescaler register (0x00) -5240 equ UART2_SR \ UART1 status register (0xC0) -5241 equ UART2_DR \ UART1 data register (0xXX) -5242 equ UART2_BRR1 \ UART1 baud rate register 1 (0x00) -5243 equ UART2_BRR2 \ UART1 baud rate register 2 (0x00) -5244 equ UART2_CR1 \ UART1 control register 1 (0x00) -5245 equ UART2_CR2 \ UART1 control register 2 (0x00) -5246 equ UART2_CR3 \ UART1 control register 3 (0x00) -5247 equ UART2_CR4 \ UART1 control register 4 (0x00) -5248 equ UART2_CR5 \ UART1 control register 5 (0x00) -5249 equ UART2_CR6 \ UART1 control register 6 (0x00) -524A equ UART2_GTR \ UART1 guard time register (0x00) -524B equ UART2_PSCR \ UART1 prescaler register (0x00) +\ Medium Density devices use 2nd UART addresses +\ in this case UART2 is identical with the name in the datasheet +5240 equ UART2_SR \ UART2 status register (0xC0) +5241 equ UART2_DR \ UART2 data register (0xXX) +5242 equ UART2_BRR1 \ UART2 baud rate register 1 (0x00) +5243 equ UART2_BRR2 \ UART2 baud rate register 2 (0x00) +5244 equ UART2_CR1 \ UART2 control register 1 (0x00) +5245 equ UART2_CR2 \ UART2 control register 2 (0x00) +5246 equ UART2_CR3 \ UART2 control register 3 (0x00) +5247 equ UART2_CR4 \ UART2 control register 4 (0x00) +5248 equ UART2_CR5 \ UART2 control register 5 (0x00) +5249 equ UART2_CR6 \ UART2 control register 6 (0x00) +524A equ UART2_GTR \ UART2 guard time register (0x00) +524B equ UART2_PSCR \ UART2 prescaler register (0x00) + 5250 equ TIM1_CR1 \ TIM1 control register 1 (0x00) 5251 equ TIM1_CR2 \ TIM1 control register 2 (0x00) 5252 equ TIM1_SMCR \ TIM1 slave mode control register (0x00) diff --git a/mcu/STM8S207.efr b/mcu/STM8S207.efr index 1804dda..7671bdd 100644 --- a/mcu/STM8S207.efr +++ b/mcu/STM8S207.efr @@ -38,11 +38,11 @@ 8042 equ INT_TIM2CC \ TIM2 capture/compare 8046 equ INT_TIM3 \ TIM3 update /overflow 804A equ INT_TIM3CC \ TIM3 capture/compare -\ 804E -\ 8052 +804E equ INT_UARTTX \ UART1 Tx complete (1st UART) +8052 equ INT_UARTRX \ UART1 Receive register DATA FULL 8056 equ INT_I2C \ I2C interrupt -805A equ INT_UARTTX \ UART2 Tx complete -805C equ INT_UARTRX \ UART2 Receive register DATA FULL +805A equ INT_UART2TX \ UART3 Tx complete (2nd UART-> comments in UART section) +805C equ INT_UART2RX \ UART3 Receive register DATA FULL 8062 equ INT_ADC1 \ ADC1 end of conversion/analog watchdog interrupt 8066 equ INT_TIM4 \ TIM4 update/overflow 806A equ INT_FLASH \ Flash EOP/WR_PG_DIS @@ -195,6 +195,8 @@ 521D equ I2C_TRISER \ I2C TRISE register (0x02) 521E equ I2C_PECR \ I2C packet error checking register (0x00) +\ High Density devices have a 1st and a 2nd UART - +\ the datasheet name is in the comment 5230 equ UART1_SR \ UART1 status register (0xC0) 5231 equ UART1_DR \ UART1 data register (0xXX) 5232 equ UART1_BRR1 \ UART1 baud rate register 1 (0x00) @@ -207,15 +209,15 @@ 5239 equ UART1_GTR \ UART1 guard time register (0x00) 523A equ UART1_PSCR \ UART1 prescaler register (0x00) -5240 equ UART3_SR \ UART3 status register (0xC0) -5241 equ UART3_DR \ UART3 data register (0xXX) -5242 equ UART3_BRR1 \ UART3 baud rate register 1 (0x00) -5243 equ UART3_BRR2 \ UART3 baud rate register 2 (0x00) -5244 equ UART3_CR1 \ UART3 control register 1 (0x00) -5245 equ UART3_CR2 \ UART3 control register 2 (0x00) -5246 equ UART3_CR3 \ UART3 control register 3 (0x00) -5247 equ UART3_CR4 \ UART3 control register 4 (0x00) -5249 equ UART3_CR6 \ UART3 control register 6 (0x00) +5240 equ UART2_SR \ UART3 status register (0xC0) +5241 equ UART2_DR \ UART3 data register (0xXX) +5242 equ UART2_BRR1 \ UART3 baud rate register 1 (0x00) +5243 equ UART2_BRR2 \ UART3 baud rate register 2 (0x00) +5244 equ UART2_CR1 \ UART3 control register 1 (0x00) +5245 equ UART2_CR2 \ UART3 control register 2 (0x00) +5246 equ UART2_CR3 \ UART3 control register 3 (0x00) +5247 equ UART2_CR4 \ UART3 control register 4 (0x00) +5249 equ UART2_CR6 \ UART3 control register 6 (0x00) 5250 equ TIM1_CR1 \ TIM1 control register 1 (0x00) 5251 equ TIM1_CR2 \ TIM1 control register 2 (0x00)