diff --git a/Hercules_VS2008.vcproj b/Hercules_VS2008.vcproj
index 1ac47f47e..1fe33cf1c 100644
--- a/Hercules_VS2008.vcproj
+++ b/Hercules_VS2008.vcproj
@@ -3442,6 +3442,14 @@
RelativePath=".\tests\cpu0off.core"
>
+
+
+
+
@@ -4481,6 +4489,14 @@
RelativePath=".\tests\csxtr.tst"
>
+
+
+
+
@@ -4901,6 +4917,14 @@
RelativePath=".\tests\CMPSC.asm"
>
+
+
+
+
@@ -5292,6 +5316,22 @@
RelativePath=".\tests\CMPSC.pdf"
>
+
+
+
+
+
+
+
+
diff --git a/Hercules_VS2015.vcxproj b/Hercules_VS2015.vcxproj
index ef4ea403a..9baacfc7b 100644
--- a/Hercules_VS2015.vcxproj
+++ b/Hercules_VS2015.vcxproj
@@ -930,6 +930,16 @@
+
+
+
+
+
+
+
+
+
+
diff --git a/Hercules_VS2015.vcxproj.filters b/Hercules_VS2015.vcxproj.filters
index bce2a2875..c344124ce 100644
--- a/Hercules_VS2015.vcxproj.filters
+++ b/Hercules_VS2015.vcxproj.filters
@@ -1715,6 +1715,12 @@
Other Files\tests\core
+
+ Other Files\tests\core
+
+
+ Other Files\tests\core
+
Other Files\tests\core
@@ -2018,6 +2024,12 @@
Other Files\tests\scripts\tst
+
+ Other Files\tests\scripts\tst
+
+
+ Other Files\tests\scripts\tst
+
Other Files\tests\scripts\tst
@@ -2264,6 +2276,12 @@
Other Files\tests\scripts\asm
+
+ Other Files\tests\scripts\asm
+
+
+ Other Files\tests\scripts\asm
+
Other Files\tests\scripts\asm
@@ -2468,6 +2486,18 @@
Other Files\tests\scripts\asm\list
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
Other Files\tests\scripts\asm\list
diff --git a/Hercules_VS2017.vcxproj b/Hercules_VS2017.vcxproj
index 30f775d49..ab76e41c3 100644
--- a/Hercules_VS2017.vcxproj
+++ b/Hercules_VS2017.vcxproj
@@ -930,6 +930,16 @@
+
+
+
+
+
+
+
+
+
+
diff --git a/Hercules_VS2017.vcxproj.filters b/Hercules_VS2017.vcxproj.filters
index bce2a2875..c344124ce 100644
--- a/Hercules_VS2017.vcxproj.filters
+++ b/Hercules_VS2017.vcxproj.filters
@@ -1715,6 +1715,12 @@
Other Files\tests\core
+
+ Other Files\tests\core
+
+
+ Other Files\tests\core
+
Other Files\tests\core
@@ -2018,6 +2024,12 @@
Other Files\tests\scripts\tst
+
+ Other Files\tests\scripts\tst
+
+
+ Other Files\tests\scripts\tst
+
Other Files\tests\scripts\tst
@@ -2264,6 +2276,12 @@
Other Files\tests\scripts\asm
+
+ Other Files\tests\scripts\asm
+
+
+ Other Files\tests\scripts\asm
+
Other Files\tests\scripts\asm
@@ -2468,6 +2486,18 @@
Other Files\tests\scripts\asm\list
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
Other Files\tests\scripts\asm\list
diff --git a/Hercules_VS2019.vcxproj b/Hercules_VS2019.vcxproj
index f7c8fdf29..c73bfb4ef 100644
--- a/Hercules_VS2019.vcxproj
+++ b/Hercules_VS2019.vcxproj
@@ -930,6 +930,16 @@
+
+
+
+
+
+
+
+
+
+
diff --git a/Hercules_VS2019.vcxproj.filters b/Hercules_VS2019.vcxproj.filters
index bce2a2875..c344124ce 100644
--- a/Hercules_VS2019.vcxproj.filters
+++ b/Hercules_VS2019.vcxproj.filters
@@ -1715,6 +1715,12 @@
Other Files\tests\core
+
+ Other Files\tests\core
+
+
+ Other Files\tests\core
+
Other Files\tests\core
@@ -2018,6 +2024,12 @@
Other Files\tests\scripts\tst
+
+ Other Files\tests\scripts\tst
+
+
+ Other Files\tests\scripts\tst
+
Other Files\tests\scripts\tst
@@ -2264,6 +2276,12 @@
Other Files\tests\scripts\asm
+
+ Other Files\tests\scripts\asm
+
+
+ Other Files\tests\scripts\asm
+
Other Files\tests\scripts\asm
@@ -2468,6 +2486,18 @@
Other Files\tests\scripts\asm\list
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
Other Files\tests\scripts\asm\list
diff --git a/Hercules_VS2022.vcxproj b/Hercules_VS2022.vcxproj
index 1015fd2f4..eb2f65574 100644
--- a/Hercules_VS2022.vcxproj
+++ b/Hercules_VS2022.vcxproj
@@ -930,6 +930,16 @@
+
+
+
+
+
+
+
+
+
+
diff --git a/Hercules_VS2022.vcxproj.filters b/Hercules_VS2022.vcxproj.filters
index bce2a2875..c344124ce 100644
--- a/Hercules_VS2022.vcxproj.filters
+++ b/Hercules_VS2022.vcxproj.filters
@@ -1715,6 +1715,12 @@
Other Files\tests\core
+
+ Other Files\tests\core
+
+
+ Other Files\tests\core
+
Other Files\tests\core
@@ -2018,6 +2024,12 @@
Other Files\tests\scripts\tst
+
+ Other Files\tests\scripts\tst
+
+
+ Other Files\tests\scripts\tst
+
Other Files\tests\scripts\tst
@@ -2264,6 +2276,12 @@
Other Files\tests\scripts\asm
+
+ Other Files\tests\scripts\asm
+
+
+ Other Files\tests\scripts\asm
+
Other Files\tests\scripts\asm
@@ -2468,6 +2486,18 @@
Other Files\tests\scripts\asm\list
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
+
+ Other Files\tests\scripts\asm\list
+
Other Files\tests\scripts\asm\list
diff --git a/general1.c b/general1.c
index f246ad602..7335f4e66 100644
--- a/general1.c
+++ b/general1.c
@@ -3898,22 +3898,380 @@ BYTE termchar; /* Terminating character */
#if defined( FEATURE_STRING_INSTRUCTION )
+
+#undef CUSE_DEBUG
+#define CUSE_DEBUG ( 0 )
+
+#undef MEM_CMP_NPOS
+#define MEM_CMP_NPOS ( -1 )
+
+#undef PAGEBYTES
+#define PAGEBYTES( _ea ) (PAGEFRAME_PAGESIZE - ((_ea) & PAGEFRAME_BYTEMASK))
+
+#undef MAINSTOR_PAGEBASE
+#define MAINSTOR_PAGEBASE( _ma ) ((BYTE*) ((uintptr_t) ( _ma ) & PAGEFRAME_PAGEMASK))
+
+/*-------------------------------------------------------------------*/
+/* mem_cmp_first_equ -- compare memory for first equal byte */
+/*-------------------------------------------------------------------*/
+/* Input: */
+/* regs CPU register context */
+/* ea1 Logical address of leftmost byte of operand-1 */
+/* b1 Operand-1 base register */
+/* ea2 Logical address of leftmost byte of operand-2 */
+/* b2 Operand-2 base register */
+/* len Compare length */
+/* Output: */
+/* rc MEM_CMP_NPOS : no equ byte */
+/* 0 to (len-1) : index of equ byte */
+/* */
+/*-------------------------------------------------------------------*/
+int ARCH_DEP( mem_cmp_first_equ )
+(
+ REGS* regs, // register context
+ VADR ea1, int b1, // op-1 (dst)
+ VADR ea2, int b2, // op-2 (src)
+ U32 len // compare length
+)
+{
+ BYTE *m1, *m2; // operand mainstor addresses
+ BYTE *m1pg, *m2pg; // operand page
+ U32 i; // loop index
+
+ /* fast exit */
+ if (len == 0) return MEM_CMP_NPOS;
+
+ // Translate left most byte of each operand
+ m1 = MADDRL(ea1 & ADDRESS_MAXWRAP( regs ), PAGEBYTES( ea1 ), b1, regs, ACCTYPE_READ, regs->psw.pkey );
+ m2 = MADDRL(ea2 & ADDRESS_MAXWRAP( regs ), PAGEBYTES( ea2 ), b2, regs, ACCTYPE_READ, regs->psw.pkey );
+
+ m1pg = MAINSTOR_PAGEBASE ( m1 );
+ m2pg = MAINSTOR_PAGEBASE ( m2 );
+
+ for (i = 0; i < len ; i++)
+ {
+ /* compare bytes */
+ if (*m1 == *m2)
+ return i;
+
+ /* update mainstore addresses */
+ m1++;
+ m2++;
+
+ /* check for page cross */
+ if (MAINSTOR_PAGEBASE ( m1 ) != m1pg)
+ {
+ m1 = MADDRL((ea1 + (i+1)) & ADDRESS_MAXWRAP( regs ), PAGEFRAME_PAGESIZE, b1, regs, ACCTYPE_READ, regs->psw.pkey );
+ m1pg = MAINSTOR_PAGEBASE ( m1 );
+ }
+ if (MAINSTOR_PAGEBASE ( m2 ) != m2pg)
+ {
+ m2 = MADDRL((ea2 + (i+1)) & ADDRESS_MAXWRAP( regs ), PAGEFRAME_PAGESIZE, b2, regs, ACCTYPE_READ, regs->psw.pkey );
+ m2pg = MAINSTOR_PAGEBASE ( m2 );
+ }
+ }
+
+ /* no equ byte in memory */
+ return MEM_CMP_NPOS;
+
+} /* end ARCH_DEP( mem_cmp_first_equ ) */
+
+/*-------------------------------------------------------------------*/
+/* mem_cmp_first_substr - compare memory for first possible substring*/
+/* */
+/* Possile substrings are searched right to left to find the */
+/* rightmost non-equal byte. The next byte establishes the next */
+/* possible substring starting position for comparison. */
+/*-------------------------------------------------------------------*/
+/* Input: */
+/* regs CPU register context */
+/* ea1 Logical address of leftmost byte of operand-1 */
+/* b1 Operand-1 base register */
+/* ea2 Logical address of leftmost byte of operand-2 */
+/* b2 Operand-2 base register */
+/* len Compare length */
+/* sublen Substring length */
+/* *equlen possile substring length (if requested) */
+/* Output: */
+/* rc MEM_CMP_NPOS : no equ byte */
+/* 0 to (len-1) : index of first possible substring */
+/* */
+/*-------------------------------------------------------------------*/
+int ARCH_DEP( mem_cmp_first_substr )
+(
+ REGS* regs, // register context
+ VADR ea1, int b1, // op-1 (dst)
+ VADR ea2, int b2, // op-2 (src)
+ int len, // compare length
+ int sublen, // substring length
+ int* equlen // # of equal bytes
+)
+{
+ BYTE *m1, *m2; // operand mainstor addresses
+ BYTE *m1pg, *m2pg; // operand page
+
+ int ss_index=0; // possible substring index
+ int ss_scan_index=0; // substring scan index
+ int ss_scan_work; // substring scan length
+ int ss_equ_len; // substring equal length
+
+ /* Is caller interested in equality length? */
+ if (equlen)
+ *equlen = 0;
+
+ /* fast exits */
+ if (len <= 0) return MEM_CMP_NPOS;
+ if (sublen <= 0) return MEM_CMP_NPOS;
+
+ /* operand mainstore addresses */
+ m1 = MADDRL(ea1, PAGEBYTES( ea1 ), b1, regs, ACCTYPE_READ, regs->psw.pkey );
+ m2 = MADDRL(ea2, PAGEBYTES( ea2 ), b2, regs, ACCTYPE_READ, regs->psw.pkey );
+
+ m1pg = MAINSTOR_PAGEBASE ( m1 );
+ m2pg = MAINSTOR_PAGEBASE ( m2 );
+
+ for (ss_index = 0; ss_index < len; ss_index = ( ss_scan_index +1 ) )
+ {
+ /* reset candidate substring length */
+ ss_equ_len = 0;
+
+ /* righttmost byte of candidate substring */
+ ss_scan_index = min( ss_index + (sublen-1), (len-1));
+ ss_scan_work = ss_scan_index - ss_index;
+
+#if CUSE_DEBUG
+ logmsg("CUSE: MEM_CMP_FIRST_SUBSTR outer: len=%d, sublen=%d, scan_ss_index=%d, ss_index=%d, ss_equ_len=%d, ea1+idx=%X , m1=%p, ea2+idx=%X, m2=%p \n",
+ len, sublen, ss_scan_index, ss_index, ss_equ_len, ea1+ss_scan_index, m1, ea2+ss_scan_index, m2);
+#endif
+ /* operand candidate substring rightmost mainstore address */
+ m1 += ss_scan_work;
+ m2 += ss_scan_work;
+
+ /* check for page cross */
+ if (MAINSTOR_PAGEBASE ( m1 ) != m1pg)
+ {
+ m1 = MADDRL((ea1 + ss_scan_index) & ADDRESS_MAXWRAP( regs ), 1, b1, regs, ACCTYPE_READ, regs->psw.pkey );
+ m1pg = MAINSTOR_PAGEBASE ( m1 );
+ }
+ if (MAINSTOR_PAGEBASE ( m2 ) != m2pg)
+ {
+ m2 = MADDRL((ea2 + ss_scan_index) & ADDRESS_MAXWRAP( regs ), 1, b2, regs, ACCTYPE_READ, regs->psw.pkey );
+ m2pg = MAINSTOR_PAGEBASE ( m2 );
+ }
+
+ /* check candidate substring - right to left */
+ for ( ; ss_scan_index >= ss_index ; ss_scan_index-- )
+ {
+#if CUSE_DEBUG
+ logmsg("CUSE: MEM_CMP_FIRST_SUBSTR inner: len=%d, sublen=%d, scan_ss_index=%d, ss_index=%d, ss_equ_len=%d, m1=%p, m2=%p \n",
+ len, sublen, ss_scan_index, ss_index, ss_equ_len, m1, m2);
+#endif
+ /* compare bytes */
+ if (*m1 != *m2)
+ break;
+
+ /* update partial substring length */
+ ss_equ_len++;
+
+ /* update mainstore addresses */
+ m1--;
+ m2--;
+
+ /* check for page cross */
+ if (MAINSTOR_PAGEBASE ( m1 ) != m1pg)
+ {
+ m1 = MADDRL((ea1 + (ss_scan_index-1)) & ADDRESS_MAXWRAP( regs ), 1, b1, regs, ACCTYPE_READ, regs->psw.pkey );
+ m1pg = MAINSTOR_PAGEBASE ( m1 );
+ }
+ if (MAINSTOR_PAGEBASE ( m2 ) != m2pg)
+ {
+ m2 = MADDRL((ea2 + (ss_scan_index-1)) & ADDRESS_MAXWRAP( regs ), 1, b2, regs, ACCTYPE_READ, regs->psw.pkey );
+ m2pg = MAINSTOR_PAGEBASE ( m2 );
+ }
+ } /* end check candidate substring - right to left */
+
+ /* Is caller interested in equality length? */
+ if (equlen)
+ *equlen = ss_equ_len;
+
+ /* substring found? */
+ if ( ss_scan_index < ss_index ) return ss_index;
+
+ /* last possible substring extends beyond length? */
+ if ( ss_equ_len > 0 && ss_index + sublen >= len) return ss_scan_index +1;
+
+ /* update mainstore addresses to next byte */
+ m1++;
+ m2++;
+
+ /* check for page cross */
+ if (MAINSTOR_PAGEBASE ( m1 ) != m1pg)
+ {
+ m1 = MADDRL((ea1 + (ss_scan_index +1)) & ADDRESS_MAXWRAP( regs ), 1, b1, regs, ACCTYPE_READ, regs->psw.pkey );
+ m1pg = MAINSTOR_PAGEBASE ( m1 );
+ }
+ if (MAINSTOR_PAGEBASE ( m2 ) != m2pg)
+ {
+ m2 = MADDRL((ea2 + (ss_scan_index +1)) & ADDRESS_MAXWRAP( regs ), 1, b2, regs, ACCTYPE_READ, regs->psw.pkey );
+ m2pg = MAINSTOR_PAGEBASE ( m2 );
+ }
+ } /* end check for substring */
+
+ /* no substring; no equal bytes found */
+ /* Is caller interested in equality length? */
+ if (equlen)
+ *equlen = 0;
+
+ return MEM_CMP_NPOS;
+
+} /* end ARCH_DEP( mem_cmp_first_substr ) */
+
+/*-------------------------------------------------------------------*/
+/* mem_cmp_last_neq -- compare memory for last neq byte */
+/*-------------------------------------------------------------------*/
+/* Input: */
+/* regs CPU register context */
+/* ea1 Logical address of leftmost byte of operand-1 */
+/* b1 Operand-1 base register */
+/* ea2 Logical address of leftmost byte of operand-2 */
+/* b2 Operand-2 base register */
+/* len Compare length */
+/* Output: */
+/* rc MEM_CMP_NPOS : no neq byte (memory is equal) */
+/* 0 to (len-1) : index of neq byte */
+/* */
+/*-------------------------------------------------------------------*/
+int ARCH_DEP( mem_cmp_last_neq )
+(
+ REGS* regs, // register context
+ VADR ea1, int b1, // op-1 (dst)
+ VADR ea2, int b2, // op-2 (src)
+ int len // compare length
+)
+{
+ BYTE *m1, *m2; // operand mainstor addresses
+ BYTE *m1pg, *m2pg; // operand page
+ int i; // loop index
+
+ /* fast exit */
+ if (len <= 0) return MEM_CMP_NPOS;
+
+ // Translate righttmost byte of each operand
+ m1 = MADDRL((ea1 + (len-1)) & ADDRESS_MAXWRAP( regs ), 1, b1, regs, ACCTYPE_READ, regs->psw.pkey );
+ m2 = MADDRL((ea2 + (len-1)) & ADDRESS_MAXWRAP( regs ), 1, b2, regs, ACCTYPE_READ, regs->psw.pkey );
+
+ m1pg = MAINSTOR_PAGEBASE ( m1 );
+ m2pg = MAINSTOR_PAGEBASE ( m2 );
+
+ for (i = (len-1); i >= 0 ; i--)
+ {
+ /* compare bytes */
+ if (*m1 != *m2)
+ return i;
+
+ /* update mainstore addresses */
+ m1--;
+ m2--;
+
+ /* check for page cross */
+ if (MAINSTOR_PAGEBASE ( m1 ) != m1pg)
+ {
+ m1 = MADDRL((ea1 + (i-1)) & ADDRESS_MAXWRAP( regs ), 1, b1, regs, ACCTYPE_READ, regs->psw.pkey );
+ m1pg = MAINSTOR_PAGEBASE ( m1 );
+ }
+ if (MAINSTOR_PAGEBASE ( m2 ) != m2pg)
+ {
+ m2 = MADDRL((ea2 + (i-1)) & ADDRESS_MAXWRAP( regs ), 1, b2, regs, ACCTYPE_READ, regs->psw.pkey );
+ m2pg = MAINSTOR_PAGEBASE ( m2 );
+ }
+ }
+
+ /* no neq bytes; memory is equal */
+ return MEM_CMP_NPOS;
+
+} /* end ARCH_DEP( mem_cmp_last_neq ) */
+
+/*-------------------------------------------------------------------*/
+/* mem_pad_cmp_last_neq -- compare memory to pad for last neq byte */
+/*-------------------------------------------------------------------*/
+/* Input: */
+/* regs CPU register context */
+/* ea1 Logical address of leftmost byte of operand-1 */
+/* b1 Operand-1 base register */
+/* pad Padding byte */
+/* len Compare length */
+/* Output: */
+/* rc MEM_CMP_NPOS : no neq byte (memory is equal to pad) */
+/* 0 to (len-1) : index of neq byte */
+/* */
+/*-------------------------------------------------------------------*/
+int ARCH_DEP( mem_pad_cmp_last_neq )
+(
+ REGS* regs, // register context
+ VADR ea1, int b1, // op-1 (dst)
+ const BYTE pad, // pad byte
+ int len // compare length
+)
+{
+ BYTE *m1; // operand mainstor addresses
+ BYTE *m1pg; // operand page
+ int i; // loop index
+
+ if (len <= 0) return MEM_CMP_NPOS;
+
+ // Translate righttmost byte of operand
+ m1 = MADDRL((ea1 + (len-1)) & ADDRESS_MAXWRAP( regs ), 1, b1, regs, ACCTYPE_READ, regs->psw.pkey );
+ m1pg = MAINSTOR_PAGEBASE ( m1 );
+
+ for (i = (len-1); i >= 0 ; i--)
+ {
+ /* compare byte to pad */
+ if (*m1 != pad)
+ return i;
+
+ /* update mainstore address */
+ m1--;
+
+ /* check for page cross */
+ if (MAINSTOR_PAGEBASE ( m1 ) != m1pg)
+ {
+ m1 = MADDRL((ea1 + (i-1)) & ADDRESS_MAXWRAP( regs ), 1, b1, regs, ACCTYPE_READ, regs->psw.pkey );
+ m1pg = MAINSTOR_PAGEBASE ( m1 );
+ }
+ }
+
+ /* no neq bytes; memory is equal to pad */
+ return MEM_CMP_NPOS;
+
+} /* end ARCH_DEP( mem_pad_cmp_last_neq ) */
+
/*-------------------------------------------------------------------*/
/* B257 CUSE - Compare Until Substring Equal [RRE] */
/*-------------------------------------------------------------------*/
+#undef CUSE_MAX
+#define CUSE_MAX _4K
+
DEF_INST( compare_until_substring_equal )
{
-int r1, r2; /* Values of R fields */
-int i; /* Loop counter */
-int cc = 0; /* Condition code */
-VADR addr1, addr2; /* Operand addresses */
-VADR eqaddr1, eqaddr2; /* Address of equal substring*/
-S64 len1, len2; /* Operand lengths */
-S64 remlen1, remlen2; /* Lengths remaining */
-BYTE byte1, byte2; /* Operand bytes */
-BYTE pad; /* Padding byte */
-BYTE sublen; /* Substring length */
-BYTE equlen = 0; /* Equal byte counter */
+ int r1, r2; // Values of R fields
+ int i; // Loop counter
+ int cc = 0; // Condition code
+ VADR addr1, addr2; // Operand addresses
+ VADR eqaddr1, eqaddr2; // Address of equal substring
+ S64 len1, len2; // Operand lengths
+ S64 remlen1, remlen2; // Lengths remaining
+ BYTE byte1, byte2; // Operand bytes
+ BYTE pad; // Padding byte
+ BYTE sublen; // Substring length
+ BYTE equlen = 0; // Equal byte counter
+
+ int peeklen; // Operand look ahead length
+ int scanlen; // scan length
+ int padlen; // Operand pad length
+ int lastneq; // mem_cmp_last_neq return
+ int firstequ; // mem_cmp_first_equ return
+ int rc; // work - return code
+ U32 idx =0; // mem_cmp() - index
RRE( inst, regs, r1, r2 );
PER_ZEROADDR_LCHECK2( regs, r1, r1+1, r2, r2+1 );
@@ -3969,17 +4327,359 @@ BYTE equlen = 0; /* Equal byte counter */
/* Process operands from left to right */
for (i=0; len1 > 0 || len2 > 0 ; i++)
{
-#undef CUSE_MAX
-#define CUSE_MAX _4K
-
- /* If 4096 bytes have been compared, and the last bytes
- compared were unequal, exit with condition code 3 */
- if (equlen == 0 && i >= CUSE_MAX)
+#if CUSE_DEBUG
+ logmsg("CUSE: addr1=%X, len1=%ld, addr2=%X, len2=%ld, equlen=%ld, eqaddr1=%X, remlen1=%ld, eqaddr2=%X, remlen2=%ld, i=%d \n",
+ addr1, len1, addr2, len2, equlen, eqaddr1, remlen1, eqaddr2, remlen2, i);
+#endif
+ /* If equal byte count has reached substring length
+ exit with condition code zero */
+ if (equlen == sublen)
{
- cc = 3;
+ cc = 0;
break;
}
+ /* interrupt and cc=3 checks: last comparision was unequal */
+ if ( equlen == 0 )
+ {
+ /* If 4096 bytes have been compared, and the last bytes
+ compared were unequal, exit with condition code 3 */
+ if (i >= CUSE_MAX)
+ {
+ cc = 3;
+ break;
+ }
+ }
+
+ /* ---------------------------- */
+ /* Special Cases Optimizations */
+ /* ---------------------------- */
+
+ /* ---------------------------------- */
+ /* Special case: substring length = 1 */
+ /* ---------------------------------- */
+ if (sublen == 1 )
+ {
+ scanlen = min ( len1, len2 );
+ firstequ = ARCH_DEP( mem_cmp_first_equ )( regs, addr1, r1, addr2, r2, scanlen);
+
+#if CUSE_DEBUG
+ logmsg("CUSE: mem_cmp_first_equ: addr1=%X, addr2=%X, scanlen=%d, firstequ=%d \n",
+ addr1, addr2, scanlen, firstequ);
+#endif
+ if (firstequ == MEM_CMP_NPOS)
+ {
+ /* no matching byte */
+ addr1 += scanlen;
+ addr1 &= ADDRESS_MAXWRAP( regs );
+ len1 -= scanlen;
+
+ addr2 += scanlen;
+ addr2 &= ADDRESS_MAXWRAP( regs );
+ len2 -= scanlen;
+
+ /* update bytes compared for cc=3 check */
+ i += scanlen;
+
+ equlen = 0;
+ cc = 2;
+ continue;
+ }
+ else
+ {
+ /* found a matching byte */
+ addr1 += firstequ;
+ addr1 &= ADDRESS_MAXWRAP( regs );
+ len1 -= firstequ;
+
+ addr2 += firstequ;
+ addr2 &= ADDRESS_MAXWRAP( regs );
+ len2 -= firstequ;
+
+ /* Update equal string addresses and lengths */
+ eqaddr1 = addr1;
+ eqaddr2 = addr2;
+ remlen1 = len1;
+ remlen2 = len2;
+
+ equlen = 1;
+ cc = 0;
+ continue;
+ }
+ } /* end Special case: substring length = 1 */
+
+ /* --------------------------------------------------- */
+ /* Special case: partial substring found */
+ /* - continue compare */
+ /* --------------------------------------------------- */
+ if (equlen > 0 && len1 > 0 && len2 > 0)
+ {
+ scanlen = min (sublen - equlen, min( len1, len2) );
+ rc = ARCH_DEP( mem_cmp ) (regs, addr1, r1, addr2, r2, scanlen, &idx);
+
+#if CUSE_DEBUG
+ logmsg("CUSE: mem_cmp: addr1=%X, addr2=%X, scanlen=%d, sublen=%d, rc=%d, idx=%u \n",
+ addr1, addr2, scanlen, sublen, rc, idx);
+#endif
+ if (rc == 0)
+ {
+ /* larger partial substring found - may need pad to complete */
+ addr1 += scanlen;
+ addr1 &= ADDRESS_MAXWRAP( regs );
+ len1 -= scanlen;
+
+ addr2 += scanlen;
+ addr2 &= ADDRESS_MAXWRAP( regs );
+ len2 -= scanlen;
+
+ equlen += scanlen;
+
+ /* update bytes compared for cc=3 check */
+ i += scanlen;
+
+ cc = ( sublen == equlen ) ? 0 : 1;
+ continue;
+ }
+ else
+ {
+ /* substring not found */
+ /* update to nonequal byte */
+ addr1 += (idx +1);
+ addr1 &= ADDRESS_MAXWRAP( regs );
+ len1 -= (idx +1);
+
+ addr2 += (idx +1);
+ addr2 &= ADDRESS_MAXWRAP( regs );
+ len2 -= (idx +1);
+
+ equlen = 0;
+
+ /* update bytes compared for cc=3 check */
+ i += (idx +1);
+
+ cc = 2;
+ continue;
+ }
+ } /* end Special case: partial substring found */
+
+ /* ----------------------------------------------------------------------- */
+ /* Special case: no partial substring - scan for first possible substring */
+ /* ----------------------------------------------------------------------- */
+ scanlen = min( len1, len2 );
+ if (equlen == 0 && scanlen > sublen)
+ {
+ int ss_len = 0;
+ firstequ = ARCH_DEP( mem_cmp_first_substr )( regs, addr1, r1, addr2, r2, scanlen, sublen, &ss_len);
+
+#if CUSE_DEBUG
+ logmsg("CUSE: mem_cmp_first_substr: addr1=%X, addr2=%X, scanlen=%d, sublen=%d, firstequ=%d, ss_len=%d \n",
+ addr1, addr2, scanlen, sublen, firstequ, ss_len);
+#endif
+ if (firstequ == MEM_CMP_NPOS)
+ {
+ /* no possible substring found - update to next end of scanned memory */
+ addr1 += scanlen ;
+ addr1 &= ADDRESS_MAXWRAP( regs );
+ len1 -= scanlen;
+
+ addr2 += scanlen;
+ addr2 &= ADDRESS_MAXWRAP( regs );
+ len2 -= scanlen;
+
+ /* update bytes compared for cc=3 check */
+ i += scanlen;
+
+ /* save the start of possible substring addresses and remaining lengths */
+ eqaddr1 = addr1;
+ eqaddr2 = addr2;
+ remlen1 = len1;
+ remlen2 = len2;
+ equlen = 0;
+
+ cc = 2;
+ }
+ else
+ {
+ /* found a start of possible substring byte */
+
+ /* save the start of possible substring addresses and remaining lengths */
+ eqaddr1 = addr1 + firstequ;
+ eqaddr2 = addr2 + firstequ;
+ remlen1 = len1 - firstequ;
+ remlen2 = len2 - firstequ;
+ equlen = ss_len;
+
+ /* update address and length to next byte */
+ addr1 += (firstequ + ss_len);
+ addr1 &= ADDRESS_MAXWRAP( regs );
+ len1 -= (firstequ + ss_len);
+
+ addr2 += (firstequ + ss_len);
+ addr2 &= ADDRESS_MAXWRAP( regs );
+ len2 -= (firstequ + ss_len);
+
+ /* update bytes compared for cc=3 check */
+ i += (firstequ + ss_len);
+
+ cc = ( sublen == equlen ) ? 0 : 1;
+ }
+ continue;
+
+ } /*end Special case: no partial substring - scan for first possible substring */
+
+ /* ------------------------------------------------------------------- */
+ /* Special case: scan substring right to left */
+ /* ------------------------------------------------------------------- */
+ /* Peek look ahead at last non-pad byte of candidate substring */
+ peeklen = min( sublen - equlen, min ( len1, len2 ) );
+ if (peeklen > 1)
+ {
+ lastneq = ARCH_DEP( mem_cmp_last_neq )( regs, addr1, r1, addr2, r2, peeklen);
+
+#if CUSE_DEBUG
+ logmsg("CUSE: mem_cmp_last_neq: addr1=%X, addr2=%X, peaklen=%d, lastneq=%d \n",
+ addr1, addr2, peeklen, lastneq);
+#endif
+ if (lastneq == MEM_CMP_NPOS)
+ {
+ if (sublen == peeklen + equlen)
+ {
+ /* complete substring found */
+ cc = 0;
+ break;
+ }
+ else
+ {
+ /* partial substring found - possibly need padding */
+ addr1 += peeklen;
+ addr1 &= ADDRESS_MAXWRAP( regs );
+ len1 -= peeklen;
+
+ addr2 += peeklen;
+ addr2 &= ADDRESS_MAXWRAP( regs );
+ len2 -= peeklen;
+
+ /* update bytes compared for cc=3 check */
+ i += peeklen;
+
+ equlen += peeklen;
+ cc = 1;
+ continue;
+ }
+ }
+ else
+ {
+ /* found a mismatch - update to nonequal byte */
+ addr1 += (lastneq +1);
+ addr1 &= ADDRESS_MAXWRAP( regs );
+ len1 -= (lastneq +1);
+
+ addr2 += (lastneq +1);
+ addr2 &= ADDRESS_MAXWRAP( regs );
+ len2 -= (lastneq +1);
+
+ /* update bytes compared for cc=3 check */
+ i += (lastneq +1);
+
+ equlen = 0;
+ cc = 2;
+ continue;
+ }
+ } /* end Special case: scan substring right to left */
+
+ /* -------------------------------------------------------------- */
+ /* Special case: only have operand-1. only padding check required */
+ /* -------------------------------------------------------------- */
+ if ( len1 > 0 && len2 == 0)
+ {
+ padlen = min( len1, (sublen - equlen));
+ lastneq = ARCH_DEP( mem_pad_cmp_last_neq )( regs, addr1, r1, pad, padlen );
+
+#if CUSE_DEBUG
+ logmsg("CUSE: op-1 pad check: addr1=%X, len1=%ld, padlen=%d, eqaddr1=%X, equlen=%d, remlen1=%d, lastneq=%d \n",
+ addr1, len1, padlen, eqaddr1, equlen, remlen1, lastneq );
+#endif
+ if (lastneq == MEM_CMP_NPOS)
+ {
+ addr1 += padlen;
+ addr1 &= ADDRESS_MAXWRAP( regs );
+ len1 -= padlen;
+
+ equlen += padlen;
+
+ cc = (sublen == equlen ) ? 0 : 1;
+ break;
+ }
+ else
+ {
+ /* found a mismatch - update to nonequal byte */
+ addr1 += (lastneq +1);
+ addr1 &= ADDRESS_MAXWRAP( regs );
+ len1 -= (lastneq +1);
+
+ /* update bytes compared for cc=3 check */
+ i += (lastneq +1);
+
+ eqaddr1 = addr1;
+ remlen1 = len1;
+
+ equlen = 0;
+ cc = 2;
+ continue;
+ }
+ } /* end Special case: only have operand-1. only padding check required */
+
+ /* -------------------------------------------------------------- */
+ /* Special case: only have operand-2. only padding check required */
+ /* -------------------------------------------------------------- */
+ if ( len1 == 0 && len2 > 0)
+ {
+ padlen = min( len2, (sublen - equlen));
+ lastneq = ARCH_DEP( mem_pad_cmp_last_neq )( regs, addr2, r2, pad, padlen );
+
+#if CUSE_DEBUG
+ logmsg("CUSE: op-2 pad check: addr2=%X, len2=%ld, padlen=%d, eqaddr2=%X, equlen=%d, remlen2=%d, lastneq=%d \n",
+ addr2, len2, padlen, eqaddr2, equlen, remlen2, lastneq );
+#endif
+ if (lastneq == MEM_CMP_NPOS)
+ {
+ addr2 += padlen;
+ addr2 &= ADDRESS_MAXWRAP( regs );
+ len2 -= padlen;
+
+ equlen += padlen;
+
+ cc = (sublen == equlen ) ? 0 : 1;
+ break;
+ }
+ else
+ {
+ /* found a mismatch - update to nonequal byte */
+ addr2 += (lastneq +1);
+ addr2 &= ADDRESS_MAXWRAP( regs );
+ len2 -= (lastneq +1);
+
+ /* update bytes compared for cc=3 check */
+ i += (lastneq +1);
+
+ eqaddr2 = addr2;
+ remlen2 = len2;
+
+ equlen = 0;
+ cc = 2;
+ continue;
+ }
+ } /* Special case: only have operand-2. only padding check required */
+
+ /* ------------------------------------------------------- */
+ /* General case: */
+ /* Scan left to right byte by byte */
+ /* ------------------------------------------------------- */
+
+#if CUSE_DEBUG
+ logmsg("CUSE: general: addr1=%X, len1=%ld, addr2=%X, len2=%ld, equlen=%d \n",
+ addr1, len1, addr2, len2, equlen);
+#endif
/* Fetch byte from first operand, or use padding byte */
if (len1 > 0)
byte1 = ARCH_DEP( vfetchb )( addr1, r1, regs );
@@ -4034,30 +4734,15 @@ BYTE equlen = 0; /* Equal byte counter */
len2--;
}
- /* update GPRs if we just crossed half page - could get rupt */
- if ((addr1 & 0x7FF) == 0 || (addr2 & 0x7FF) == 0)
- {
- /* Update R1 and R2 to point to next bytes to compare */
- SET_GR_A( r1, regs, addr1 );
- SET_GR_A( r2, regs, addr2 );
-
- /* Set R1+1 and R2+1 to remaining operand lengths */
- SET_GR_A( r1+1, regs, len1 );
- SET_GR_A( r2+1, regs, len2 );
- }
-
- /* If equal byte count has reached substring length
- exit with condition code zero */
- if (equlen == sublen)
- {
- cc = 0;
- break;
- }
-
} /* end for(i) */
+#if CUSE_DEBUG
+ logmsg("CUSE: scan complete: addr1=%X, len1=%ld, addr2=%X, len2=%ld, equlen=%ld, eqaddr1=%X, remlen1=%ld, eqaddr2=%X, remlen2=%ld, i=%d, cc=%d \n",
+ addr1, len1, addr2, len2, equlen, eqaddr1, remlen1, eqaddr2, remlen2, i, cc);
+#endif
+
/* Update the registers */
- if (cc < 2)
+ if (cc < 2 && equlen > 0)
{
/* Update R1 and R2 to point to the equal substring */
SET_GR_A( r1, regs, eqaddr1 );
@@ -4083,6 +4768,7 @@ BYTE equlen = 0; /* Equal byte counter */
regs->psw.cc = cc;
} /* end DEF_INST( compare_until_substring_equal ) */
+
#endif /* defined( FEATURE_STRING_INSTRUCTION ) */
diff --git a/tests/CUSE-01-basic.asm b/tests/CUSE-01-basic.asm
new file mode 100644
index 000000000..dc4e97b02
--- /dev/null
+++ b/tests/CUSE-01-basic.asm
@@ -0,0 +1,2028 @@
+ TITLE ' CUSE-01-basic (Test CUSE instruction)'
+***********************************************************************
+*
+* CUSE basic instruction tests
+*
+***********************************************************************
+*
+* This program tests proper functioning of the CUSE instruction.
+* Specification Exceptions are not tested.
+*
+* PLEASE NOTE that the tests are very SIMPLE TESTS designed to catch
+* obvious coding errors. None of the tests are thorough. They are
+* NOT designed to test all aspects of the instruction.
+*
+* NOTE: This test is based on the CLCL-et-al Test but modified to
+* only test the CUSE instruction. -- James Wekel November 2022
+*
+***********************************************************************
+*
+* Example Hercules Testcase:
+*
+*
+* *Testcase CUSE-01-basic (Test CUSE instructions)
+*
+* # ------------------------------------------------------------
+* # This tests only the basic function of the CUSE instruction.
+* # Specification Exceptions are NOT tested.
+* # ------------------------------------------------------------
+*
+* mainsize 16
+* numcpu 1
+* sysclear
+* archlvl z/Arch
+* loadcore "$(testpath)/CUSE-01-basic.core" 0x0
+* runtest 1
+* *Done
+*
+*
+***********************************************************************
+ SPACE 2
+CUSE1TST START 0
+ USING CUSE1TST,R0 Low core addressability
+ SPACE 2
+ ORG CUSE1TST+X'1A0' z/Architecure RESTART PSW
+ DC X'0000000180000000'
+ DC AD(BEGIN)
+ SPACE 2
+ ORG CUSE1TST+X'1D0' z/Architecure PROGRAM CHECK PSW
+ DC X'0002000180000000'
+ DC AD(X'DEAD')
+ SPACE 3
+ ORG CUSE1TST+X'200' Start of actual test program...
+ EJECT
+***********************************************************************
+* The actual "CUSE1TST" program itself...
+***********************************************************************
+*
+* Architecture Mode: z/Arch
+* Register Usage:
+*
+* R0 CUSE - SS length
+* R1 CUSE - Pad byte
+* R2 CUSE - First-Operand Address
+* R3 CUSE - First-Operand Length
+* R4 CUSE - Second-Operand Address
+* R5 CUSE - Second-Operand Length
+* R6 Testing control table - base current entry
+* R7 (work)
+* R8 First base register
+* R9 Second base register
+* R10-R13 (work)
+* R14 Subroutine call
+* R15 Secondary Subroutine call or work
+*
+***********************************************************************
+ SPACE
+ USING BEGIN,R8 FIRST Base Register
+ USING BEGIN+4096,R9 SECOND Base Register
+ SPACE
+BEGIN BALR R8,0 Initalize FIRST base register
+ BCTR R8,0 Initalize FIRST base register
+ BCTR R8,0 Initalize FIRST base register
+ SPACE
+ LA R9,2048(,R8) Initalize SECOND base register
+ LA R9,2048(,R9) Initalize SECOND base register
+ SPACE 2
+***********************************************************************
+* Run the test(s)...
+***********************************************************************
+ SPACE
+ BAL R14,TEST01 Test CUSE instruction
+ SPACE 2
+***********************************************************************
+* Test for normal or unexpected test completion...
+***********************************************************************
+ SPACE
+ CLI TESTNUM,X'F4' Did we end on expected test?
+ BNE FAILTEST No?! Then FAIL the test!
+ SPACE
+ CLI SUBTEST,X'04' Did we end on expected SUB-test?
+ BNE FAILTEST No?! Then FAIL the test!
+ SPACE
+ B EOJ Yes, then normal completion!
+ EJECT
+***********************************************************************
+* Fixed test storage locations ...
+***********************************************************************
+ SPACE 2
+ ORG CUSE1TST+X'400'
+ SPACE 4
+TESTADDR DS 0D Where test/subtest numbers will go
+TESTNUM DC X'99' Test number of active test
+SUBTEST DC X'99' Active test sub-test number
+ SPACE 4
+ ORG *+X'100'
+ EJECT
+***********************************************************************
+* TEST01 Test CUSE instruction
+***********************************************************************
+ SPACE
+TEST01 MVI TESTNUM,X'01'
+ SPACE
+ LA R6,CUSECTL Point R6 --> testing control table
+ USING CUSETEST,R6 What each table entry looks like
+ SPACE
+TST1LOOP EQU *
+ IC R10,TNUM Set test number
+ STC R10,TESTNUM
+*
+** Initialize operand data (move data to testing address)
+*
+* Build Operand-1
+ SPACE
+ L R2,OP1WHERE Where to move operand-1 data to
+ L R3,OP1LEN Get operand-1 length
+ L R10,SS1ADDR Calculate OP 1 starting
+ SR R10,R3 address
+ A R10,SS1LEN
+ L R11,OP1LEN
+ MVCL R2,R10
+ SPACE
+ BCTR R2,0 less one for last char addr
+ MVC 0(0,R2),SS1LAST set last char
+ SPACE
+* Build Operand-2
+ SPACE
+ L R4,OP2WHERE Where to move operand-1 data to
+ L R5,OP2LEN Get operand-1 length
+ L R10,SS2ADDR Calculate OP 2 starting
+ SR R10,R5 address
+ A R10,SS2LEN
+ L R11,OP2LEN
+ MVCL R4,R10
+ SPACE
+ BCTR R4,0 less one for last char addr
+ MVC 0(0,R4),SS2LAST set last char
+ SPACE 2
+** Execute CUSE instruction and check for expected condition code
+ SPACE
+ L R11,FAILMASK (failure CC)
+ SLL R11,4 (shift to BC instr CC position)
+ SPACE
+ IC R0,SSLEN Set SS length
+ IC R1,PAD Set SS Pad byte
+ SPACE
+ LM R2,R5,OPSWHERE
+ SPACE
+ MVI SUBTEST,X'00' (primary test)
+DOAGAIN CUSE R2,R4 Do Test
+ SPACE
+ EX R11,CUSEBC fail if...
+ BC B'0001',DOAGAIN cc=3, not finished
+ SPACE 2
+*
+** Verify R2,R3,R4,R5 contain (or still contain!) expected values
+*
+ LM R10,R11,ENDOP1 end OP-1 address and length
+ SPACE
+ MVI SUBTEST,X'01' (R2 result - op1 found addr)
+ CLR R2,R10 R2 correct?
+ BNE CUSEFAIL No, FAILTEST!
+ SPACE
+ MVI SUBTEST,X'02' (R3 result - op1 remaining len)
+ CLR R3,R11 R3 correct
+ BNE CUSEFAIL No, FAILTEST!
+ SPACE
+ LM R10,R11,ENDOP2 end OP-2 address and length
+ SPACE
+ MVI SUBTEST,X'03' (R4 result - op2 found addr)
+ CLR R4,R10 R4 correct
+ BNE CUSEFAIL No, FAILTEST!
+ SPACE
+ MVI SUBTEST,X'04' (R3 result - op2 remaining len)
+ CLR R5,R11 R5 correct
+ BNE CUSEFAIL No, FAILTEST!
+ SPACE
+ LA R6,CUSENEXT Go on to next table entry
+ CLC =F'0',0(R6) End of table?
+ BNE TST1LOOP No, loop...
+ B CUSEDONE Done! (success!)
+ SPACE 2
+CUSEFAIL LA R14,FAILTEST Unexpected results!
+CUSEDONE BR R14 Return to caller or FAILTEST
+ SPACE 2
+CUSEBC BC 0,CUSEFAIL (fail if unexpected condition code)
+ SPACE 2
+ DROP R6
+ DROP R15
+ USING BEGIN,R8
+ EJECT
+***********************************************************************
+* Normal completion or Abnormal termination PSWs
+***********************************************************************
+ SPACE 5
+EOJPSW DC 0D'0',X'0002000180000000',AD(0)
+ SPACE
+EOJ LPSWE EOJPSW Normal completion
+ SPACE 5
+FAILPSW DC 0D'0',X'0002000180000000',AD(X'BAD')
+ SPACE
+FAILTEST LPSWE FAILPSW Abnormal termination
+ SPACE 7
+***********************************************************************
+* Working Storage
+***********************************************************************
+ SPACE 2
+ LTORG , Literals pool
+ SPACE 3
+K EQU 1024 One KB
+PAGE EQU (4*K) Size of one page
+K4 EQU (4*K) 4 KB
+K32 EQU (32*K) 32 KB
+K64 EQU (64*K) 64 KB
+MB EQU (K*K) 1 MB
+ EJECT
+CUSE1TST CSECT ,
+ SPACE 2
+***********************************************************************
+* CUSETEST DSECT
+***********************************************************************
+ SPACE 2
+CUSETEST DSECT ,
+TNUM DC X'00' CUSE table number
+ DC XL3'00'
+ SPACE 2
+SSLEN DC AL1(0) CUSE - SS length
+PAD DC X'00' CUSE - Pad byte
+SS1LAST DC X'00' First-Operand SS last byte
+SS2LAST DC X'00' Second-Operand SS last byte
+ SPACE 2
+SS1ADDR DC A(0) First-Operand SS Address
+SS1LEN DC A(0) First-Operand SS length
+SS2ADDR DC A(0) Second-Operand SS Address
+SS2LEN DC A(0) Second-Operand SS length
+ SPACE 2
+OPSWHERE EQU *
+OP1WHERE DC A(0) Where Operand-1 data should be placed
+OP1LEN DC F'0' CUSE - First-Operand Length
+OP2WHERE DC A(0) Where Operand-2 data should be placed
+OP2LEN DC F'0' CUSE - Second-Operand Length
+
+ SPACE 2
+FAILMASK DC A(0) Failure Branch on Condition mask
+ SPACE 2
+* Ending register values
+ENDOP1 DC A(0) Operand 1 address
+ DC A(0) Operand 1 length
+ENDOP2 DC A(0) Operand 2 address
+ DC A(0) Operand 2 length
+ SPACE 2
+CUSENEXT EQU * Start of next table entry...
+ SPACE 5
+REG2PATT EQU X'AABBCCDD' Polluted Register pattern
+REG2LOW EQU X'DD' (last byte above)
+ EJECT
+***********************************************************************
+* CUSE Testing Control tables (ref: CUSETEST DSECT)
+***********************************************************************
+ SPACE
+CUSE1TST CSECT ,
+CUSECTL DC 0A(0) start of table
+ SPACE
+***********************************************************************
+* tests with CC=0
+***********************************************************************
+ SPACE
+CC0T1 DS 0F
+ DC X'01' Test Num
+ DC XL3'00'
+*
+ DC AL1(1) SS Length
+ DC X'00' Pad Byte
+ DC X'AA' First-Operand SS last byte
+ DC X'AA' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(001) Op-1 SS & length
+ DC A(COP2A),A(001) OP-2 SS & length
+* Target
+ DC A(1*MB+(1*K32)),A(1) Op-1 & length
+ DC A(2*MB+(1*K32)),A(1) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(1*K32)+000),A(001) OP-1
+ DC A(2*MB+(1*K32)+000),A(001) OP-2
+ SPACE 2
+CC0T2 DS 0F
+ DC X'02' Test Num
+ DC XL3'00'
+*
+ DC AL1(1) SS Length
+ DC X'00' Pad Byte
+ DC X'BB' First-Operand SS last byte
+ DC X'BB' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(001) Op-1 SS & length
+ DC A(COP2A),A(001) OP-2 SS & length
+* Target
+ DC A(1*MB+(2*K32)),A(2) Op-1 & length
+ DC A(2*MB+(2*K32)),A(2) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(2*K32)+001),A(001) OP-1
+ DC A(2*MB+(2*K32)+001),A(001) OP-2
+ SPACE 2
+CC0T3 DS 0F
+ DC X'03' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(004) Op-1 SS & length
+ DC A(COP2A),A(004) OP-2 SS & length
+* Target
+ DC A(1*MB+(3*K32)),A(8) Op-1 & length
+ DC A(2*MB+(3*K32)),A(8) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(3*K32)+(8-4)),A(004) OP-1
+ DC A(2*MB+(3*K32)+(8-4)),A(004) OP-2
+ SPACE 2
+CC0T4 DS 0F
+ DC X'04' Test Num
+ DC XL3'00'
+*
+ DC AL1(13) SS Length
+ DC X'00' Pad Byte
+ DC X'DD' First-Operand SS last byte
+ DC X'DD' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(013) Op-1 SS & length
+ DC A(COP2A),A(013) OP-2 SS & length
+* Target
+ DC A(1*MB+(4*K32)),A(63) Op-1 & length
+ DC A(2*MB+(4*K32)),A(63) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(4*K32)+(63-13)),A(013) OP-1
+ DC A(2*MB+(4*K32)+(63-13)),A(013) OP-2
+ SPACE 2
+CC0T5 DS 0F
+ DC X'05' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'00' Pad Byte
+ DC X'EE' First-Operand SS last byte
+ DC X'EE' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(1*MB+(5*K32)),A(512) Op-1 & length
+ DC A(2*MB+(5*K32)),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(5*K32)+(512-62)),A(062) OP-1
+ DC A(2*MB+(5*K32)+(512-62)),A(062) OP-2
+ SPACE 2
+CC0T6 DS 0F
+ DC X'06' Test Num
+ DC XL3'00'
+*
+ DC AL1(127) SS Length
+ DC X'00' Pad Byte
+ DC X'FF' First-Operand SS last byte
+ DC X'FF' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(127) Op-1 SS & length
+ DC A(COP2A),A(127) OP-2 SS & length
+* Target
+ DC A(1*MB+(6*K32)),A(2048) Op-1 & length
+ DC A(2*MB+(6*K32)),A(2048) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(6*K32)+(2048-127)),A(127) OP-1
+ DC A(2*MB+(6*K32)+(2048-127)),A(127) OP-2
+ SPACE
+* Cross page bounday tests
+ SPACE
+* Cross page bounday - operand-1
+ SPACE
+CC0T7 DS 0F
+ DC X'07' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'00' Pad Byte
+ DC X'55' First-Operand SS last byte
+ DC X'55' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(1*MB+(7*K32)-128),A(512) Op-1 & length
+ DC A(2*MB+(7*K32)),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(7*K32)+(512-62)-128),A(062) OP-1
+ DC A(2*MB+(7*K32)+(512-62)),A(062) OP-2
+ SPACE
+* Cross page bounday - operand-2
+ SPACE
+CC0T8 DS 0F
+ DC X'08' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'00' Pad Byte
+ DC X'66' First-Operand SS last byte
+ DC X'66' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(1*MB+(8*K32)),A(512) Op-1 & length
+ DC A(2*MB+(8*K32)-128),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(8*K32)+(512-62)),A(062) OP-1
+ DC A(2*MB+(8*K32)+(512-62)-128),A(062) OP-2
+ SPACE
+* Cross page bounday - operand-1 and operand-2
+ SPACE
+CC0T9 DS 0F
+ DC X'09' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(1*MB+(9*K32)-96),A(512) Op-1 & length
+ DC A(2*MB+(9*K32)-128),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(9*K32)+(512-62)-96),A(062) OP-1
+ DC A(2*MB+(9*K32)+(512-62)-128),A(062) OP-2
+ SPACE
+* PAD tests
+ SPACE
+* Pad - operand-1
+ SPACE
+CC0TA DS 0F
+ DC X'0A' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(1*MB+(10*K32)),A(500) Op-1 & length
+ DC A(2*MB+(10*K32)),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(10*K32)+(512-62)),A(062-(512-500)) OP-1
+ DC A(2*MB+(10*K32)+(512-62)),A(062) OP-2
+ SPACE
+* Pad - operand-2
+ SPACE
+CC0TB DS 0F
+ DC X'0B' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(1*MB+(11*K32)),A(512) Op-1 & length
+ DC A(2*MB+(11*K32)),A(500) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(11*K32)+(512-62)),A(062) OP-1
+ DC A(2*MB+(11*K32)+(512-62)),A(062-(512-500)) OP-2
+ SPACE
+* PAD and Cross page bounday tests
+ SPACE
+* Pad - operand-1 ; Cross page bounday - operand-1
+ SPACE
+CC0TC DS 0F
+ DC X'0C' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(1*MB+(12*K32)-96),A(500) Op-1 & length
+ DC A(2*MB+(12*K32)),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(12*K32)+(512-62)-96),A(062-(512-500)) OP-1
+ DC A(2*MB+(12*K32)+(512-62)),A(062) OP-2
+ SPACE
+* Pad - operand-1 ; Cross page bounday - operand-2
+ SPACE
+CC0TD DS 0F
+ DC X'0D' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(1*MB+(13*K32)),A(500) Op-1 & length
+ DC A(2*MB+(13*K32)-96),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(13*K32)+(512-62)),A(062-(512-500)) OP-1
+ DC A(2*MB+(13*K32)+(512-62)-96),A(062) OP-2
+ SPACE
+* Pad - operand-2 ; Cross page bounday - operand-1
+ SPACE
+CC0TE DS 0F
+ DC X'0E' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(1*MB+(14*K32)-96),A(512) Op-1 & length
+ DC A(2*MB+(14*K32)),A(500) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(14*K32)+(512-62)-96),A(062) OP-1
+ DC A(2*MB+(14*K32)+(512-62)),A(062-(512-500)) OP-2
+ SPACE
+* Pad - operand-2 ; Cross page bounday - operand-2
+ SPACE
+CC0TF DS 0F
+ DC X'0F' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(1*MB+(15*K32)),A(512) Op-1 & length
+ DC A(2*MB+(15*K32)-96),A(500) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(1*MB+(15*K32)+(512-62)),A(062) OP-1
+ DC A(2*MB+(15*K32)+(512-62)-96),A(062-(512-500)) OP-2
+ EJECT
+***********************************************************************
+* tests with CC=1
+***********************************************************************
+ SPACE
+CC1T1 DS 0F
+ DC X'11' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'11' Pad Byte
+ DC X'11' First-Operand SS last byte
+ DC X'11' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(001) Op-1 SS & length
+ DC A(COP2A),A(001) OP-2 SS & length
+* Target
+ DC A(3*MB+(1*K32)),A(1) Op-1 & length
+ DC A(4*MB+(1*K32)),A(1) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(1*K32)+000),A(001) OP-1
+ DC A(4*MB+(1*K32)+000),A(001) OP-2
+ SPACE 2
+CC1T2 DS 0F
+ DC X'12' Test Num
+ DC XL3'00'
+*
+ DC AL1(2) SS Length
+ DC X'00' Pad Byte
+ DC X'BB' First-Operand SS last byte
+ DC X'BB' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(001) Op-1 SS & length
+ DC A(COP2A),A(001) OP-2 SS & length
+* Target
+ DC A(3*MB+(2*K32)),A(2) Op-1 & length
+ DC A(4*MB+(2*K32)),A(2) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(2*K32)+001),A(001) OP-1
+ DC A(4*MB+(2*K32)+001),A(001) OP-2
+ SPACE 2
+CC1T3 DS 0F
+ DC X'13' Test Num
+ DC XL3'00'
+*
+ DC AL1(6) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(004) Op-1 SS & length
+ DC A(COP2A),A(004) OP-2 SS & length
+* Target
+ DC A(3*MB+(3*K32)),A(8) Op-1 & length
+ DC A(4*MB+(3*K32)),A(8) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(3*K32)+(8-4)),A(004) OP-1
+ DC A(4*MB+(3*K32)+(8-4)),A(004) OP-2
+ SPACE 2
+CC1T4 DS 0F
+ DC X'14' Test Num
+ DC XL3'00'
+*
+ DC AL1(18) SS Length
+ DC X'00' Pad Byte
+ DC X'DD' First-Operand SS last byte
+ DC X'DD' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(013) Op-1 SS & length
+ DC A(COP2A),A(013) OP-2 SS & length
+* Target
+ DC A(3*MB+(4*K32)),A(63) Op-1 & length
+ DC A(4*MB+(4*K32)),A(63) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(4*K32)+(63-13)),A(013) OP-1
+ DC A(4*MB+(4*K32)+(63-13)),A(013) OP-2
+ SPACE 2
+CC1T5 DS 0F
+ DC X'15' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'00' Pad Byte
+ DC X'EE' First-Operand SS last byte
+ DC X'EE' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(3*MB+(5*K32)),A(512) Op-1 & length
+ DC A(4*MB+(5*K32)),A(512) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(5*K32)+(512-62)),A(062) OP-1
+ DC A(4*MB+(5*K32)+(512-62)),A(062) OP-2
+ SPACE 2
+CC1T6 DS 0F
+ DC X'16' Test Num
+ DC XL3'00'
+*
+ DC AL1(128) SS Length
+ DC X'00' Pad Byte
+ DC X'FF' First-Operand SS last byte
+ DC X'FF' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(127) Op-1 SS & length
+ DC A(COP2A),A(127) OP-2 SS & length
+* Target
+ DC A(3*MB+(6*K32)),A(2048) Op-1 & length
+ DC A(4*MB+(6*K32)),A(2048) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(6*K32)+(2048-127)),A(127) OP-1
+ DC A(4*MB+(6*K32)+(2048-127)),A(127) OP-2
+ SPACE
+* Cross page bounday tests
+ SPACE
+* Cross page bounday - operand-1
+ SPACE
+CC1T7 DS 0F
+ DC X'17' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'00' Pad Byte
+ DC X'55' First-Operand SS last byte
+ DC X'55' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(3*MB+(7*K32)-128),A(512) Op-1 & length
+ DC A(4*MB+(7*K32)),A(512) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(7*K32)+(512-62)-128),A(062) OP-1
+ DC A(4*MB+(7*K32)+(512-62)),A(062) OP-2
+ SPACE
+* Cross page bounday - operand-2
+ SPACE
+CC1T8 DS 0F
+ DC X'18' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'00' Pad Byte
+ DC X'66' First-Operand SS last byte
+ DC X'66' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(3*MB+(8*K32)),A(512) Op-1 & length
+ DC A(4*MB+(8*K32)-128),A(512) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(8*K32)+(512-62)),A(062) OP-1
+ DC A(4*MB+(8*K32)+(512-62)-128),A(062) OP-2
+ SPACE
+* Cross page bounday - operand-1 and operand-2
+ SPACE
+CC1T9 DS 0F
+ DC X'19' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(3*MB+(9*K32)-96),A(512) Op-1 & length
+ DC A(4*MB+(9*K32)-128),A(512) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(9*K32)+(512-62)-96),A(062) OP-1
+ DC A(4*MB+(9*K32)+(512-62)-128),A(062) OP-2
+ SPACE
+* PAD tests
+ SPACE
+* Pad - operand-1
+ SPACE
+CC1TA DS 0F
+ DC X'1A' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(3*MB+(10*K32)),A(500) Op-1 & length
+ DC A(4*MB+(10*K32)),A(512) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(10*K32)+(512-62)),A(062-(512-500)) OP-1
+ DC A(4*MB+(10*K32)+(512-62)),A(062) OP-2
+ SPACE
+* Pad - operand-2
+ SPACE
+CC1TB DS 0F
+ DC X'1B' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(3*MB+(11*K32)),A(512) Op-1 & length
+ DC A(4*MB+(11*K32)),A(500) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(11*K32)+(512-62)),A(062) OP-1
+ DC A(4*MB+(11*K32)+(512-62)),A(062-(512-500)) OP-2
+ SPACE
+* PAD and Cross page bounday tests
+ SPACE
+* Pad - operand-1 ; Cross page bounday - operand-1
+ SPACE
+CC1TC DS 0F
+ DC X'1C' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(3*MB+(12*K32)-96),A(500) Op-1 & length
+ DC A(4*MB+(12*K32)),A(512) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(12*K32)+(512-62)-96),A(062-(512-500)) OP-1
+ DC A(4*MB+(12*K32)+(512-62)),A(062) OP-2
+ SPACE
+* Pad - operand-1 ; Cross page bounday - operand-2
+ SPACE
+CC1TD DS 0F
+ DC X'1D' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(3*MB+(13*K32)),A(500) Op-1 & length
+ DC A(4*MB+(13*K32)-96),A(512) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(13*K32)+(512-62)),A(062-(512-500)) OP-1
+ DC A(4*MB+(13*K32)+(512-62)-96),A(062) OP-2
+ SPACE
+* Pad - operand-2 ; Cross page bounday - operand-1
+ SPACE
+CC1TE DS 0F
+ DC X'1E' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(3*MB+(14*K32)-96),A(512) Op-1 & length
+ DC A(4*MB+(14*K32)),A(500) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(14*K32)+(512-62)-96),A(062) OP-1
+ DC A(4*MB+(14*K32)+(512-62)),A(062-(512-500)) OP-2
+ SPACE
+* Pad - operand-2 ; Cross page bounday - operand-2
+ SPACE
+CC1TF DS 0F
+ DC X'1F' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(3*MB+(15*K32)),A(512) Op-1 & length
+ DC A(4*MB+(15*K32)-96),A(500) Op-2 & length
+*
+ DC A(11) CC1 Fail mask
+* Ending register values
+ DC A(3*MB+(15*K32)+(512-62)),A(062) OP-1
+ DC A(4*MB+(15*K32)+(512-62)-96),A(062-(512-500)) OP-2
+ EJECT
+***********************************************************************
+* tests with CC=2
+***********************************************************************
+ SPACE
+CC2T1 DS 0F
+ DC X'21' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'11' Pad Byte
+ DC X'11' First-Operand SS last byte
+ DC X'12' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(001) Op-1 SS & length
+ DC A(COP2A),A(001) OP-2 SS & length
+* Target
+ DC A(5*MB+(1*K32)),A(1) Op-1 & length
+ DC A(6*MB+(1*K32)),A(1) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(1*K32)+001),A(000) OP-1
+ DC A(6*MB+(1*K32)+001),A(000) OP-2
+ SPACE 2
+CC2T2 DS 0F
+ DC X'22' Test Num
+ DC XL3'00'
+*
+ DC AL1(2) SS Length
+ DC X'00' Pad Byte
+ DC X'BB' First-Operand SS last byte
+ DC X'BC' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(001) Op-1 SS & length
+ DC A(COP2A),A(001) OP-2 SS & length
+* Target
+ DC A(5*MB+(2*K32)),A(2) Op-1 & length
+ DC A(6*MB+(2*K32)),A(2) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(2*K32)+002),A(000) OP-1
+ DC A(6*MB+(2*K32)+002),A(000) OP-2
+ SPACE 2
+CC2T3 DS 0F
+ DC X'23' Test Num
+ DC XL3'00'
+*
+ DC AL1(6) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CD' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(004) Op-1 SS & length
+ DC A(COP2A),A(004) OP-2 SS & length
+* Target
+ DC A(5*MB+(3*K32)),A(8) Op-1 & length
+ DC A(6*MB+(3*K32)),A(8) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(3*K32)+8),A(000) OP-1
+ DC A(6*MB+(3*K32)+8),A(000) OP-2
+ SPACE 2
+CC2T4 DS 0F
+ DC X'24' Test Num
+ DC XL3'00'
+*
+ DC AL1(18) SS Length
+ DC X'00' Pad Byte
+ DC X'DD' First-Operand SS last byte
+ DC X'DE' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(013) Op-1 SS & length
+ DC A(COP2A),A(013) OP-2 SS & length
+* Target
+ DC A(5*MB+(4*K32)),A(63) Op-1 & length
+ DC A(6*MB+(4*K32)),A(63) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(4*K32)+63),A(000) OP-1
+ DC A(6*MB+(4*K32)+63),A(000) OP-2
+ SPACE 2
+CC2T5 DS 0F
+ DC X'25' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'00' Pad Byte
+ DC X'EE' First-Operand SS last byte
+ DC X'EF' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(5*MB+(5*K32)),A(512) Op-1 & length
+ DC A(6*MB+(5*K32)),A(512) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(5*K32)+512),A(000) OP-1
+ DC A(6*MB+(5*K32)+512),A(000) OP-2
+ SPACE 2
+CC2T6 DS 0F
+ DC X'26' Test Num
+ DC XL3'00'
+*
+ DC AL1(128) SS Length
+ DC X'00' Pad Byte
+ DC X'FF' First-Operand SS last byte
+ DC X'F0' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(127) Op-1 SS & length
+ DC A(COP2A),A(127) OP-2 SS & length
+* Target
+ DC A(5*MB+(6*K32)),A(2048) Op-1 & length
+ DC A(6*MB+(6*K32)),A(2048) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(6*K32)+2048),A(000) OP-1
+ DC A(6*MB+(6*K32)+2048),A(000) OP-2
+ SPACE
+* Cross page bounday tests
+ SPACE
+* Cross page bounday - operand-1
+ SPACE
+CC2T7 DS 0F
+ DC X'27' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'00' Pad Byte
+ DC X'55' First-Operand SS last byte
+ DC X'56' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(5*MB+(7*K32)-128),A(512) Op-1 & length
+ DC A(6*MB+(7*K32)),A(512) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(7*K32)+512-128),A(000) OP-1
+ DC A(6*MB+(7*K32)+512),A(000) OP-2
+ SPACE
+* Cross page bounday - operand-2
+ SPACE
+CC2T8 DS 0F
+ DC X'28' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'00' Pad Byte
+ DC X'67' First-Operand SS last byte
+ DC X'66' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(5*MB+(8*K32)),A(512) Op-1 & length
+ DC A(6*MB+(8*K32)-128),A(512) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(8*K32)+512),A(000) OP-1
+ DC A(6*MB+(8*K32)+512-128),A(000) OP-2
+ SPACE
+* Cross page bounday - operand-1 and operand-2
+ SPACE
+CC2T9 DS 0F
+ DC X'29' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'00' Pad Byte
+ DC X'78' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(5*MB+(9*K32)-96),A(512) Op-1 & length
+ DC A(6*MB+(9*K32)-128),A(512) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(9*K32)+512-96),A(000) OP-1
+ DC A(6*MB+(9*K32)+512-128),A(000) OP-2
+ SPACE
+* PAD tests
+ SPACE
+* Pad - operand-1
+ SPACE
+CC2TA DS 0F
+ DC X'2A' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'41' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(5*MB+(10*K32)),A(500) Op-1 & length
+ DC A(6*MB+(10*K32)),A(512) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(10*K32)+500),A(000) OP-1
+ DC A(6*MB+(10*K32)+512),A(000) OP-2
+ SPACE
+* Pad - operand-2
+ SPACE
+CC2TB DS 0F
+ DC X'2B' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'41' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(5*MB+(11*K32)),A(512) Op-1 & length
+ DC A(6*MB+(11*K32)),A(500) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(11*K32)+512),A(000) OP-1
+ DC A(6*MB+(11*K32)+500),A(000) OP-2
+ SPACE
+* PAD and Cross page bounday tests
+ SPACE
+* Pad - operand-1 ; Cross page bounday - operand-1
+ SPACE
+CC2TC DS 0F
+ DC X'2C' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'41' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(5*MB+(12*K32)-96),A(500) Op-1 & length
+ DC A(6*MB+(12*K32)),A(512) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(12*K32)+500-96),A(000) OP-1
+ DC A(6*MB+(12*K32)+512),A(000) OP-2
+ SPACE
+* Pad - operand-1 ; Cross page bounday - operand-2
+ SPACE
+CC2TD DS 0F
+ DC X'2D' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'41' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(5*MB+(13*K32)),A(500) Op-1 & length
+ DC A(6*MB+(13*K32)-96),A(512) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(13*K32)+500),A(000) OP-1
+ DC A(6*MB+(13*K32)+512-96),A(000) OP-2
+ SPACE
+* Pad - operand-2 ; Cross page bounday - operand-1
+ SPACE
+CC2TE DS 0F
+ DC X'2E' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'41' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(5*MB+(14*K32)-96),A(512) Op-1 & length
+ DC A(6*MB+(14*K32)),A(500) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(14*K32)+512-96),A(000) OP-1
+ DC A(6*MB+(14*K32)+500),A(000) OP-2
+ SPACE
+* Pad - operand-2 ; Cross page bounday - operand-2
+ SPACE
+CC2TF DS 0F
+ DC X'2F' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'41' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(062) Op-1 SS & length
+ DC A(COP2B),A(062) OP-2 SS & length
+* Target
+ DC A(5*MB+(15*K32)),A(512) Op-1 & length
+ DC A(6*MB+(15*K32)-96),A(500) Op-2 & length
+*
+ DC A(13) not CC2 Fail mask
+* Ending register values
+ DC A(5*MB+(15*K32)+512),A(000) OP-1
+ DC A(6*MB+(15*K32)+500-96),A(000) OP-2
+ EJECT
+***********************************************************************
+* tests with CC=3
+***********************************************************************
+ SPACE
+CC3T1 DS 0F
+ DC X'31' Test Num
+ DC XL3'00'
+*
+ DC AL1(1) SS Length
+ DC X'00' Pad Byte
+ DC X'AA' First-Operand SS last byte
+ DC X'AA' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(1) Op-1 SS & length
+ DC A(COP2A),A(1) OP-2 SS & length
+* Target
+ DC A(7*MB+(1*K32)),A(4096+128) Op-1 & length
+ DC A(8*MB+(1*K32)),A(4096+128) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(7*MB+(1*K32)+4096+128-1),A(001) OP-1
+ DC A(8*MB+(1*K32)+4096+128-1),A(001) OP-2
+ SPACE 2
+CC3T3 DS 0F
+ DC X'33' Test Num
+ DC XL3'00'
+*
+ DC AL1(6) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(004) Op-1 SS & length
+ DC A(COP2A),A(004) OP-2 SS & length
+* Target
+ DC A(7*MB+(3*K32)),A(4096+128) Op-1 & length
+ DC A(8*MB+(3*K32)),A(4096+128) Op-2 & length
+*
+ DC A(10) not CC1 or CC3 Fail mask
+* Ending register values
+ DC A(7*MB+(3*K32)+(4096+128-4)),A(004) OP-1
+ DC A(8*MB+(3*K32)+(4096+128-4)),A(004) OP-2
+ SPACE 2
+CC3T4 DS 0F
+ DC X'34' Test Num
+ DC XL3'00'
+*
+ DC AL1(18) SS Length
+ DC X'00' Pad Byte
+ DC X'DD' First-Operand SS last byte
+ DC X'DE' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(013) Op-1 SS & length
+ DC A(COP2A),A(013) OP-2 SS & length
+* Target
+ DC A(7*MB+(4*K32)),A(4096+63) Op-1 & length
+ DC A(8*MB+(4*K32)),A(4096+63) Op-2 & length
+*
+ DC A(12) not CC2 or CC3 Fail mask
+* Ending register values
+ DC A(7*MB+(4*K32)+4096+63),A(000) OP-1
+ DC A(8*MB+(4*K32)+4096+63),A(000) OP-2
+ SPACE
+* Cross page bounday tests
+ SPACE
+* Cross page bounday - operand-1
+ SPACE
+CC3T7 DS 0F
+ DC X'37' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'00' Pad Byte
+ DC X'55' First-Operand SS last byte
+ DC X'55' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(7*MB+(7*K32)-128),A(4096+128) Op-1 & length
+ DC A(8*MB+(7*K32)),A(4096+128) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(7*MB+(7*K32)+(4096+128-62)-128),A(062) OP-1
+ DC A(8*MB+(7*K32)+(4096+128-62)),A(062) OP-2
+ SPACE
+* Cross page bounday - operand-2
+ SPACE
+CC3T8 DS 0F
+ DC X'38' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'00' Pad Byte
+ DC X'66' First-Operand SS last byte
+ DC X'66' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(7*MB+(8*K32)),A(4096+128) Op-1 & length
+ DC A(8*MB+(8*K32)-128),A(4096+128) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(7*MB+(8*K32)+(4096+128-62)),A(062) OP-1
+ DC A(8*MB+(8*K32)+(4096+128-62)-128),A(062) OP-2
+ SPACE
+* Cross page bounday - operand-1 and operand-2
+ SPACE
+CC3T9 DS 0F
+ DC X'39' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(7*MB+(9*K32)-96),A(4096+128) Op-1 & length
+ DC A(8*MB+(9*K32)-128),A(4096+128) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(7*MB+(9*K32)+(4096+128-62)-96),A(062) OP-1
+ DC A(8*MB+(9*K32)+(4096+128-62)-128),A(062) OP-2
+ EJECT
+***********************************************************************
+* tests - special pad test
+***********************************************************************
+ SPACE
+* Op-1 - length=0
+PAD4T1 DS 0F
+ DC X'41' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(000) Op-1 SS & length
+ DC A(COP2B),A(4) OP-2 SS & length
+* Target
+ DC A(9*MB+(1*K32)),A(000) Op-1 & length
+ DC A(10*MB+(1*K32)),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(1*K32)),A(000) OP-1
+ DC A(10*MB+(1*K32)+(512-4)),A(004) OP-2
+ SPACE 2
+* Op-2 - length=0
+PAD4T2 DS 0F
+ DC X'42' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'40' Pad Byte
+ DC X'40' First-Operand SS last byte
+ DC X'40' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(4) Op-1 SS & length
+ DC A(COP2B),A(000) OP-2 SS & length
+* Target
+ DC A(9*MB+(2*K32)),A(512) Op-1 & length
+ DC A(10*MB+(2*K32)),A(0) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(2*K32)+(512-4)),A(004) OP-1
+ DC A(10*MB+(2*K32)),A(000) OP-2
+ EJECT
+***********************************************************************
+* tests for Special Cases Optimizations
+***********************************************************************
+ SPACE 2
+* tests for Special Cases Optimizations
+ SPACE
+SC5T1 DS 0F
+ DC X'51' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1C),A(032) Op-1 SS & length
+ DC A(COP2C),A(032) OP-2 SS & length
+* Target
+ DC A(9*MB+(7*K32)-96),A(512) Op-1 & length
+ DC A(10*MB+(7*K32)-128),A(512) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(9*MB+(7*K32)+(512-32)-96-3),A(032+3) OP-1
+ DC A(10*MB+(7*K32)+(512-32)-128-3),A(032+3) OP-2
+ SPACE
+SC5T2 DS 0F
+ DC X'52' Test Num
+ DC XL3'00'
+*
+ DC AL1(7) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1C),A(027) Op-1 SS & length
+ DC A(COP2C),A(027) OP-2 SS & length
+* Target
+ DC A(9*MB+(8*K32)-96),A(512) Op-1 & length
+ DC A(10*MB+(8*K32)-128),A(512) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(9*MB+(8*K32)+(512-27)-96-3),A(027+3) OP-1
+ DC A(10*MB+(8*K32)+(512-27)-128-3),A(027+3) OP-2
+ SPACE
+SC5T3 DS 0F
+ DC X'53' Test Num
+ DC XL3'00'
+*
+ DC AL1(1) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1B),A(027) Op-1 SS & length
+ DC A(COP2B),A(027) OP-2 SS & length
+* Target
+ DC A(9*MB+(9*K32)-96),A(512) Op-1 & length
+ DC A(10*MB+(9*K32)-128),A(512) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(9*MB+(9*K32)+(512-27)-96),A(027) OP-1
+ DC A(10*MB+(9*K32)+(512-27)-128),A(027) OP-2
+ SPACE
+SC5T4 DS 0F
+ DC X'54' Test Num
+ DC XL3'00'
+*
+ DC AL1(3) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1D),A(027) Op-1 SS & length
+ DC A(COP2D),A(027) OP-2 SS & length
+* Target
+ DC A(9*MB+(10*K32)-96),A(512) Op-1 & length
+ DC A(10*MB+(10*K32)-128),A(512) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(9*MB+(10*K32)+(512-27)-96),A(27) OP-1
+ DC A(10*MB+(10*K32)+(512-27)-128),A(27) OP-2
+ SPACE
+* subtring starts on a page boundary
+ SPACE
+SC5T5 DS 0F
+ DC X'55' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(004) Op-1 SS & length
+ DC A(COP2A),A(004) OP-2 SS & length
+* Target
+ DC A(9*MB+(11*K32)-4),A(8) Op-1 & length
+ DC A(10*MB+(11*K32)-4),A(8) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(11*K32)-4+(8-4)),A(004) OP-1
+ DC A(10*MB+(11*K32)-4+(8-4)),A(004) OP-2
+ SPACE
+* subtring starts on a byte before page boundary
+ SPACE
+SC5T6 DS 0F
+ DC X'56' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(004) Op-1 SS & length
+ DC A(COP2A),A(004) OP-2 SS & length
+* Target
+ DC A(9*MB+(12*K32)-5),A(8) Op-1 & length
+ DC A(10*MB+(12*K32)-5),A(8) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(12*K32)-5+(8-4)),A(004) OP-1
+ DC A(10*MB+(12*K32)-5+(8-4)),A(004) OP-2
+ SPACE
+* subtring starts on a byte after page boundary
+ SPACE
+SC5T7 DS 0F
+ DC X'57' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(004) Op-1 SS & length
+ DC A(COP2A),A(004) OP-2 SS & length
+* Target
+ DC A(9*MB+(13*K32)-3),A(8) Op-1 & length
+ DC A(10*MB+(13*K32)-3),A(8) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(13*K32)-3+(8-4)),A(004) OP-1
+ DC A(10*MB+(13*K32)-3+(8-4)),A(004) OP-2
+ SPACE
+* Strings with multiple equal bytes
+* subtring starts on a page boundary
+ SPACE
+SC5T8 DS 0F
+ DC X'58' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1C),A(004) Op-1 SS & length
+ DC A(COP2C),A(004) OP-2 SS & length
+* Target
+ DC A(9*MB+(14*K32)-4),A(8) Op-1 & length
+ DC A(10*MB+(14*K32)-4),A(8) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(14*K32)-4+(8-7)),A(007) OP-1
+ DC A(10*MB+(14*K32)-4+(8-7)),A(007) OP-2
+ SPACE
+* subtring starts on a byte before page boundary
+ SPACE
+SC5T9 DS 0F
+ DC X'59' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1C),A(004) Op-1 SS & length
+ DC A(COP2C),A(004) OP-2 SS & length
+* Target
+ DC A(9*MB+(15*K32)-5),A(8) Op-1 & length
+ DC A(10*MB+(15*K32)-5),A(8) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(15*K32)-5+(8-7)),A(007) OP-1
+ DC A(10*MB+(15*K32)-5+(8-7)),A(007) OP-2
+ SPACE
+* subtring starts on a byte after page boundary
+ SPACE
+SC5TA DS 0F
+ DC X'5A' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1C),A(004) Op-1 SS & length
+ DC A(COP2C),A(004) OP-2 SS & length
+* Target
+ DC A(9*MB+(16*K32)-3),A(8) Op-1 & length
+ DC A(10*MB+(16*K32)-3),A(8) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(16*K32)-3+(8-7)),A(007) OP-1
+ DC A(10*MB+(16*K32)-3+(8-7)),A(007) OP-2
+ SPACE
+* Strings with multiple equal bytes
+* subtring starts on a page boundary
+ SPACE
+SC5TB DS 0F
+ DC X'5B' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1D),A(004) Op-1 SS & length
+ DC A(COP2D),A(004) OP-2 SS & length
+* Target
+ DC A(9*MB+(17*K32)-4),A(8) Op-1 & length
+ DC A(10*MB+(17*K32)-4),A(8) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(17*K32)-4+(8-4)),A(004) OP-1
+ DC A(10*MB+(17*K32)-4+(8-4)),A(004) OP-2
+ SPACE
+* subtring starts on a byte before page boundary
+ SPACE
+SC5TC DS 0F
+ DC X'5C' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1D),A(004) Op-1 SS & length
+ DC A(COP2D),A(004) OP-2 SS & length
+* Target
+ DC A(9*MB+(18*K32)-5),A(8) Op-1 & length
+ DC A(10*MB+(18*K32)-5),A(8) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(18*K32)-5+(8-4)),A(004) OP-1
+ DC A(10*MB+(18*K32)-5+(8-4)),A(004) OP-2
+ SPACE
+* subtring starts on a byte after page boundary
+ SPACE
+SC5TD DS 0F
+ DC X'5D' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'CC' First-Operand SS last byte
+ DC X'CC' Second-Operand SS last byte
+* Source
+ DC A(COP1D),A(004) Op-1 SS & length
+ DC A(COP2D),A(004) OP-2 SS & length
+* Target
+ DC A(9*MB+(19*K32)-3),A(8) Op-1 & length
+ DC A(10*MB+(19*K32)-3),A(8) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(9*MB+(19*K32)-3+(8-4)),A(004) OP-1
+ DC A(10*MB+(19*K32)-3+(8-4)),A(004) OP-2
+
+ EJECT
+***********************************************************************
+* potential tests for CUSE-02-performance
+***********************************************************************
+ SPACE
+* Cross page bounday - operand-1 and operand-2
+ SPACE
+PTE1 DS 0F
+ DC X'E1' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'EE' First-Operand SS last byte
+ DC X'EE' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(004) Op-1 SS & length
+ DC A(COP2A),A(004) OP-2 SS & length
+* Target
+ DC A(11*MB+(1*K32)-63),A(512) Op-1 & length
+ DC A(12*MB+(1*K32)-56),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(11*MB+(1*K32)-63+(512-4)),A(004) OP-1
+ DC A(12*MB+(1*K32)-56+(512-4)),A(004) OP-2
+ SPACE
+PTE2 DS 0F
+ DC X'E2' Test Num
+ DC XL3'00'
+*
+ DC AL1(8) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(008) Op-1 SS & length
+ DC A(COP2A),A(008) OP-2 SS & length
+* Target
+ DC A(11*MB+(2*K32)-96),A(512) Op-1 & length
+ DC A(12*MB+(2*K32)-128),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(11*MB+(2*K32)+(512-8)-96),A(008) OP-1
+ DC A(12*MB+(2*K32)+(512-8)-128),A(008) OP-2
+ SPACE 2
+PTE3 DS 0F
+ DC X'E3' Test Num
+ DC XL3'00'
+*
+ DC AL1(16) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(016) Op-1 SS & length
+ DC A(COP2A),A(016) OP-2 SS & length
+* Target
+ DC A(11*MB+(3*K32)-96),A(512) Op-1 & length
+ DC A(12*MB+(3*K32)-128),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(11*MB+(3*K32)+(512-16)-96),A(016) OP-1
+ DC A(12*MB+(3*K32)+(512-16)-128),A(016) OP-2
+ SPACE 2
+PTE4 DS 0F
+ DC X'E4' Test Num
+ DC XL3'00'
+*
+ DC AL1(32) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(032) Op-1 SS & length
+ DC A(COP2A),A(032) OP-2 SS & length
+* Target
+ DC A(11*MB+(4*K32)-96),A(512) Op-1 & length
+ DC A(12*MB+(4*K32)-128),A(512) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(11*MB+(4*K32)+(512-32)-96),A(032) OP-1
+ DC A(12*MB+(4*K32)+(512-32)-128),A(032) OP-2
+ SPACE 2
+PTE5 DS 0F
+ DC X'E5' Test Num
+ DC XL3'00'
+*
+ DC AL1(64) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(064) Op-1 SS & length
+ DC A(COP2A),A(064) OP-2 SS & length
+* Target
+ DC A(11*MB+(5*K32)-96),A(512) Op-1 & length
+ DC A(12*MB+(5*K32)-128),A(512) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(11*MB+(5*K32)+(512-64)-96),A(064) OP-1
+ DC A(12*MB+(5*K32)+(512-64)-128),A(064) OP-2
+ SPACE 2
+PTE6 DS 0F
+ DC X'E6' Test Num
+ DC XL3'00'
+*
+ DC AL1(1) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(032) Op-1 SS & length
+ DC A(COP2A),A(032) OP-2 SS & length
+* Target
+ DC A(11*MB+(6*K32)-96),A(512) Op-1 & length
+ DC A(12*MB+(6*K32)-128),A(512) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(11*MB+(6*K32)+(512-32)-96),A(032) OP-1
+ DC A(12*MB+(6*K32)+(512-32)-128),A(032) OP-2
+ SPACE 2
+PTE7 DS 0F
+ DC X'E7' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1C),A(032) Op-1 SS & length
+ DC A(COP2C),A(032) OP-2 SS & length
+* Target
+ DC A(11*MB+(7*K32)-96),A(512) Op-1 & length
+ DC A(12*MB+(7*K32)-128),A(512) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(11*MB+(7*K32)+(512-32)-96-3),A(032+3) OP-1
+ DC A(12*MB+(7*K32)+(512-32)-128-3),A(032+3) OP-2
+ EJECT
+***********************************************************************
+* potential tests for CUSE-02-performance
+***********************************************************************
+ SPACE
+PTF1 DS 0F
+ DC X'F1' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'00' Pad Byte
+ DC X'EE' First-Operand SS last byte
+ DC X'EE' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(13*MB+(1*K32)),A(512) Op-1 & length
+ DC A(14*MB+(1*K32)),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(13*MB+(1*K32)+(512-62)),A(062) OP-1
+ DC A(14*MB+(1*K32)+(512-62)),A(062) OP-2
+ SPACE
+* Cross page bounday - operand-1 and operand-2
+ SPACE
+PTF2 DS 0F
+ DC X'F2' Test Num
+ DC XL3'00'
+*
+ DC AL1(32) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(032) Op-1 SS & length
+ DC A(COP2A),A(032) OP-2 SS & length
+* Target
+ DC A(13*MB+(2*K32)-96),A(512) Op-1 & length
+ DC A(14*MB+(2*K32)-128),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(13*MB+(2*K32)+(512-32)-96),A(032) OP-1
+ DC A(14*MB+(2*K32)+(512-32)-128),A(032) OP-2
+ SPACE 2
+PTF3 DS 0F
+ DC X'F3' Test Num
+ DC XL3'00'
+*
+ DC AL1(62) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(062) Op-1 SS & length
+ DC A(COP2A),A(062) OP-2 SS & length
+* Target
+ DC A(13*MB+(3*K32)-96),A(2048) Op-1 & length
+ DC A(14*MB+(3*K32)-128),A(2048) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(13*MB+(3*K32)+(2048-62)-96),A(062) OP-1
+ DC A(14*MB+(3*K32)+(2048-62)-128),A(062) OP-2
+ SPACE 2
+PTF4 DS 0F
+ DC X'F4' Test Num
+ DC XL3'00'
+*
+ DC AL1(32) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(032) Op-1 SS & length
+ DC A(COP2A),A(032) OP-2 SS & length
+* Target
+ DC A(13*MB+(4*K32)-96),A(4096-128) Op-1 & length
+ DC A(14*MB+(4*K32)-128),A(4096-128) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(13*MB+(4*K32)+(4096-128-32)-96),A(032) OP-1
+ DC A(14*MB+(4*K32)+(4096-128-32)-128),A(032) OP-2
+ SPACE 3
+ DC A(0) end of table
+ DC A(0) end of table
+ EJECT
+***********************************************************************
+* CUSE Operand-1 scan data...
+***********************************************************************
+ SPACE
+ DS 0F
+ DC 2048XL4'98765432'
+COP1A DC 256XL4'111111F0'
+ SPACE
+ DS 0F
+ DC 2048XL4'98765432'
+COP1B DC 256XL4'40404040'
+ SPACE
+ DS 0F
+ DC 2048XL4'11223344'
+COP1C DC 256XL4'40404040'
+ SPACE
+ DS 0F
+ DC 2048XL4'11223344'
+COP1D DC 256XL4'40404040'
+ SPACE 4
+***********************************************************************
+* CUSE Operand-2 scan data
+***********************************************************************
+ SPACE
+ DS 0F
+ DC 2048XL4'89ABCDEF'
+COP2A DC 256XL4'111111F0'
+ SPACE
+ DS 0F
+ DC 2048XL4'89ABCDEF'
+COP2B DC 256XL4'40404040'
+ SPACE
+ DS 0F
+ DC 2048XL4'FF1223344'
+COP2C DC 256XL4'40404040'
+ SPACE
+ DS 0F
+ DC 2048XL4'FF223377'
+COP2D DC 256XL4'40404040'
+ SPACE 4
+***********************************************************************
+* Register equates
+***********************************************************************
+ SPACE 2
+R0 EQU 0
+R1 EQU 1
+R2 EQU 2
+R3 EQU 3
+R4 EQU 4
+R5 EQU 5
+R6 EQU 6
+R7 EQU 7
+R8 EQU 8
+R9 EQU 9
+R10 EQU 10
+R11 EQU 11
+R12 EQU 12
+R13 EQU 13
+R14 EQU 14
+R15 EQU 15
+ SPACE 2
+ END
diff --git a/tests/CUSE-01-basic.core b/tests/CUSE-01-basic.core
new file mode 100644
index 000000000..3cfab1aa5
Binary files /dev/null and b/tests/CUSE-01-basic.core differ
diff --git a/tests/CUSE-01-basic.list b/tests/CUSE-01-basic.list
new file mode 100644
index 000000000..60a8dcd3f
--- /dev/null
+++ b/tests/CUSE-01-basic.list
@@ -0,0 +1,2510 @@
+ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 1
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 2 ***********************************************************************
+ 3 *
+ 4 * CUSE basic instruction tests
+ 5 *
+ 6 ***********************************************************************
+ 7 *
+ 8 * This program tests proper functioning of the CUSE instruction.
+ 9 * Specification Exceptions are not tested.
+ 10 *
+ 11 * PLEASE NOTE that the tests are very SIMPLE TESTS designed to catch
+ 12 * obvious coding errors. None of the tests are thorough. They are
+ 13 * NOT designed to test all aspects of the instruction.
+ 14 *
+ 15 * NOTE: This test is based on the CLCL-et-al Test but modified to
+ 16 * only test the CUSE instruction. -- James Wekel November 2022
+ 17 *
+ 18 ***********************************************************************
+ 19 *
+ 20 * Example Hercules Testcase:
+ 21 *
+ 22 *
+ 23 * *Testcase CUSE-01-basic (Test CUSE instructions)
+ 24 *
+ 25 * # ------------------------------------------------------------
+ 26 * # This tests only the basic function of the CUSE instruction.
+ 27 * # Specification Exceptions are NOT tested.
+ 28 * # ------------------------------------------------------------
+ 29 *
+ 30 * mainsize 16
+ 31 * numcpu 1
+ 32 * sysclear
+ 33 * archlvl z/Arch
+ 34 * loadcore "$(testpath)/CUSE-01-basic.core" 0x0
+ 35 * runtest 1
+ 36 * *Done
+ 37 *
+ 38 *
+ 39 ***********************************************************************
+
+
+ 00000000 0001380B 41 CUSE1TST START 0
+00000000 00000000 42 USING CUSE1TST,R0 Low core addressability
+
+
+00000000 00000000 000001A0 44 ORG CUSE1TST+X'1A0' z/Architecure RESTART PSW
+000001A0 00000001 80000000 45 DC X'0000000180000000'
+000001A8 00000000 00000200 46 DC AD(BEGIN)
+
+
+000001B0 000001B0 000001D0 48 ORG CUSE1TST+X'1D0' z/Architecure PROGRAM CHECK PSW
+000001D0 00020001 80000000 49 DC X'0002000180000000'
+000001D8 00000000 0000DEAD 50 DC AD(X'DEAD')
+
+
+
+000001E0 000001E0 00000200 52 ORG CUSE1TST+X'200' Start of actual test program...
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 2
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 54 ***********************************************************************
+ 55 * The actual "CUSE1TST" program itself...
+ 56 ***********************************************************************
+ 57 *
+ 58 * Architecture Mode: z/Arch
+ 59 * Register Usage:
+ 60 *
+ 61 * R0 CUSE - SS length
+ 62 * R1 CUSE - Pad byte
+ 63 * R2 CUSE - First-Operand Address
+ 64 * R3 CUSE - First-Operand Length
+ 65 * R4 CUSE - Second-Operand Address
+ 66 * R5 CUSE - Second-Operand Length
+ 67 * R6 Testing control table - base current entry
+ 68 * R7 (work)
+ 69 * R8 First base register
+ 70 * R9 Second base register
+ 71 * R10-R13 (work)
+ 72 * R14 Subroutine call
+ 73 * R15 Secondary Subroutine call or work
+ 74 *
+ 75 ***********************************************************************
+
+00000200 00000200 77 USING BEGIN,R8 FIRST Base Register
+00000200 00001200 78 USING BEGIN+4096,R9 SECOND Base Register
+
+00000200 0580 80 BEGIN BALR R8,0 Initalize FIRST base register
+00000202 0680 81 BCTR R8,0 Initalize FIRST base register
+00000204 0680 82 BCTR R8,0 Initalize FIRST base register
+
+00000206 4190 8800 00000800 84 LA R9,2048(,R8) Initalize SECOND base register
+0000020A 4190 9800 00000800 85 LA R9,2048(,R9) Initalize SECOND base register
+
+
+ 87 ***********************************************************************
+ 88 * Run the test(s)...
+ 89 ***********************************************************************
+
+0000020E 45E0 8302 00000502 91 BAL R14,TEST01 Test CUSE instruction
+
+
+ 93 ***********************************************************************
+ 94 * Test for normal or unexpected test completion...
+ 95 ***********************************************************************
+
+00000212 95F4 8200 00000400 97 CLI TESTNUM,X'F4' Did we end on expected test?
+00000216 4770 83F0 000005F0 98 BNE FAILTEST No?! Then FAIL the test!
+
+0000021A 9504 8201 00000401 100 CLI SUBTEST,X'04' Did we end on expected SUB-test?
+0000021E 4770 83F0 000005F0 101 BNE FAILTEST No?! Then FAIL the test!
+
+00000222 47F0 83D8 000005D8 103 B EOJ Yes, then normal completion!
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 3
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 105 ***********************************************************************
+ 106 * Fixed test storage locations ...
+ 107 ***********************************************************************
+
+
+00000226 00000226 00000400 109 ORG CUSE1TST+X'400'
+
+
+
+
+00000400 111 TESTADDR DS 0D Where test/subtest numbers will go
+00000400 99 112 TESTNUM DC X'99' Test number of active test
+00000401 99 113 SUBTEST DC X'99' Active test sub-test number
+
+
+
+
+00000402 00000402 00000502 115 ORG *+X'100'
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 4
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 117 ***********************************************************************
+ 118 * TEST01 Test CUSE instruction
+ 119 ***********************************************************************
+
+00000502 9201 8200 00000400 121 TEST01 MVI TESTNUM,X'01'
+
+00000506 4160 83F8 000005F8 123 LA R6,CUSECTL Point R6 --> testing control table
+0000050A 00000000 124 USING CUSETEST,R6 What each table entry looks like
+
+ 0000050A 00000001 126 TST1LOOP EQU *
+0000050A 43A0 6000 00000000 127 IC R10,TNUM Set test number
+0000050E 42A0 8200 00000400 128 STC R10,TESTNUM
+ 129 *
+ 130 ** Initialize operand data (move data to testing address)
+ 131 *
+ 132 * Build Operand-1
+
+00000512 5820 6018 00000018 134 L R2,OP1WHERE Where to move operand-1 data to
+00000516 5830 601C 0000001C 135 L R3,OP1LEN Get operand-1 length
+0000051A 58A0 6008 00000008 136 L R10,SS1ADDR Calculate OP 1 starting
+0000051E 1BA3 137 SR R10,R3 address
+00000520 5AA0 600C 0000000C 138 A R10,SS1LEN
+00000524 58B0 601C 0000001C 139 L R11,OP1LEN
+00000528 0E2A 140 MVCL R2,R10
+
+0000052A 0620 142 BCTR R2,0 less one for last char addr
+0000052C D200 2000 6006 00000000 00000006 143 MVC 0(0,R2),SS1LAST set last char
+
+ 145 * Build Operand-2
+
+00000532 5840 6020 00000020 147 L R4,OP2WHERE Where to move operand-1 data to
+00000536 5850 6024 00000024 148 L R5,OP2LEN Get operand-1 length
+0000053A 58A0 6010 00000010 149 L R10,SS2ADDR Calculate OP 2 starting
+0000053E 1BA5 150 SR R10,R5 address
+00000540 5AA0 6014 00000014 151 A R10,SS2LEN
+00000544 58B0 6024 00000024 152 L R11,OP2LEN
+00000548 0E4A 153 MVCL R4,R10
+
+0000054A 0640 155 BCTR R4,0 less one for last char addr
+0000054C D200 4000 6007 00000000 00000007 156 MVC 0(0,R4),SS2LAST set last char
+
+
+ 158 ** Execute CUSE instruction and check for expected condition code
+
+00000552 58B0 6028 00000028 160 L R11,FAILMASK (failure CC)
+00000556 89B0 0004 00000004 161 SLL R11,4 (shift to BC instr CC position)
+
+0000055A 4300 6004 00000004 163 IC R0,SSLEN Set SS length
+0000055E 4310 6005 00000005 164 IC R1,PAD Set SS Pad byte
+
+00000562 9825 6018 00000018 166 LM R2,R5,OPSWHERE
+
+00000566 9200 8201 00000401 168 MVI SUBTEST,X'00' (primary test)
+0000056A B257 0024 169 DOAGAIN CUSE R2,R4 Do Test
+
+0000056E 44B0 83BE 000005BE 171 EX R11,CUSEBC fail if...
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 5
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00000572 4710 836A 0000056A 172 BC B'0001',DOAGAIN cc=3, not finished
+
+
+ 174 *
+ 175 ** Verify R2,R3,R4,R5 contain (or still contain!) expected values
+ 176 *
+00000576 98AB 602C 0000002C 177 LM R10,R11,ENDOP1 end OP-1 address and length
+
+0000057A 9201 8201 00000401 179 MVI SUBTEST,X'01' (R2 result - op1 found addr)
+0000057E 152A 180 CLR R2,R10 R2 correct?
+00000580 4770 83B8 000005B8 181 BNE CUSEFAIL No, FAILTEST!
+
+00000584 9202 8201 00000401 183 MVI SUBTEST,X'02' (R3 result - op1 remaining len)
+00000588 153B 184 CLR R3,R11 R3 correct
+0000058A 4770 83B8 000005B8 185 BNE CUSEFAIL No, FAILTEST!
+
+0000058E 98AB 6034 00000034 187 LM R10,R11,ENDOP2 end OP-2 address and length
+
+00000592 9203 8201 00000401 189 MVI SUBTEST,X'03' (R4 result - op2 found addr)
+00000596 154A 190 CLR R4,R10 R4 correct
+00000598 4770 83B8 000005B8 191 BNE CUSEFAIL No, FAILTEST!
+
+0000059C 9204 8201 00000401 193 MVI SUBTEST,X'04' (R3 result - op2 remaining len)
+000005A0 155B 194 CLR R5,R11 R5 correct
+000005A2 4770 83B8 000005B8 195 BNE CUSEFAIL No, FAILTEST!
+
+000005A6 4160 603C 0000003C 197 LA R6,CUSENEXT Go on to next table entry
+000005AA D503 83F4 6000 000005F4 00000000 198 CLC =F'0',0(R6) End of table?
+000005B0 4770 830A 0000050A 199 BNE TST1LOOP No, loop...
+000005B4 47F0 83BC 000005BC 200 B CUSEDONE Done! (success!)
+
+
+000005B8 41E0 83F0 000005F0 202 CUSEFAIL LA R14,FAILTEST Unexpected results!
+000005BC 07FE 203 CUSEDONE BR R14 Return to caller or FAILTEST
+
+
+000005BE 4700 83B8 000005B8 205 CUSEBC BC 0,CUSEFAIL (fail if unexpected condition code)
+
+
+000005C2 207 DROP R6
+000005C2 208 DROP R15
+000005C2 00000200 209 USING BEGIN,R8
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 6
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 211 ***********************************************************************
+ 212 * Normal completion or Abnormal termination PSWs
+ 213 ***********************************************************************
+
+
+
+
+
+000005C8 00020001 80000000 215 EOJPSW DC 0D'0',X'0002000180000000',AD(0)
+
+000005D8 B2B2 83C8 000005C8 217 EOJ LPSWE EOJPSW Normal completion
+
+
+
+
+
+000005E0 00020001 80000000 219 FAILPSW DC 0D'0',X'0002000180000000',AD(X'BAD')
+
+000005F0 B2B2 83E0 000005E0 221 FAILTEST LPSWE FAILPSW Abnormal termination
+
+
+
+
+
+
+
+ 223 ***********************************************************************
+ 224 * Working Storage
+ 225 ***********************************************************************
+
+
+000005F4 227 LTORG , Literals pool
+000005F4 00000000 228 =F'0'
+
+
+
+ 00000400 00000001 230 K EQU 1024 One KB
+ 00001000 00000001 231 PAGE EQU (4*K) Size of one page
+ 00001000 00000001 232 K4 EQU (4*K) 4 KB
+ 00008000 00000001 233 K32 EQU (32*K) 32 KB
+ 00010000 00000001 234 K64 EQU (64*K) 64 KB
+ 00100000 00000001 235 MB EQU (K*K) 1 MB
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 7
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 00000000 0001380B 237 CUSE1TST CSECT ,
+
+
+ 239 ***********************************************************************
+ 240 * CUSETEST DSECT
+ 241 ***********************************************************************
+
+
+ 243 CUSETEST DSECT ,
+00000000 00 244 TNUM DC X'00' CUSE table number
+00000001 000000 245 DC XL3'00'
+
+
+00000004 00 247 SSLEN DC AL1(0) CUSE - SS length
+00000005 00 248 PAD DC X'00' CUSE - Pad byte
+00000006 00 249 SS1LAST DC X'00' First-Operand SS last byte
+00000007 00 250 SS2LAST DC X'00' Second-Operand SS last byte
+
+
+00000008 00000000 252 SS1ADDR DC A(0) First-Operand SS Address
+0000000C 00000000 253 SS1LEN DC A(0) First-Operand SS length
+00000010 00000000 254 SS2ADDR DC A(0) Second-Operand SS Address
+00000014 00000000 255 SS2LEN DC A(0) Second-Operand SS length
+
+
+ 00000018 00000001 257 OPSWHERE EQU *
+00000018 00000000 258 OP1WHERE DC A(0) Where Operand-1 data should be placed
+0000001C 00000000 259 OP1LEN DC F'0' CUSE - First-Operand Length
+00000020 00000000 260 OP2WHERE DC A(0) Where Operand-2 data should be placed
+00000024 00000000 261 OP2LEN DC F'0' CUSE - Second-Operand Length
+ 262
+
+
+00000028 00000000 264 FAILMASK DC A(0) Failure Branch on Condition mask
+
+
+ 266 * Ending register values
+0000002C 00000000 267 ENDOP1 DC A(0) Operand 1 address
+00000030 00000000 268 DC A(0) Operand 1 length
+00000034 00000000 269 ENDOP2 DC A(0) Operand 2 address
+00000038 00000000 270 DC A(0) Operand 2 length
+
+
+ 0000003C 00000001 272 CUSENEXT EQU * Start of next table entry...
+
+
+
+
+
+ AABBCCDD 00000001 274 REG2PATT EQU X'AABBCCDD' Polluted Register pattern
+ 000000DD 00000001 275 REG2LOW EQU X'DD' (last byte above)
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 8
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 277 ***********************************************************************
+ 278 * CUSE Testing Control tables (ref: CUSETEST DSECT)
+ 279 ***********************************************************************
+
+ 00000000 0001380B 281 CUSE1TST CSECT ,
+000005F8 282 CUSECTL DC 0A(0) start of table
+
+ 284 ***********************************************************************
+ 285 * tests with CC=0
+ 286 ***********************************************************************
+
+000005F8 288 CC0T1 DS 0F
+000005F8 01 289 DC X'01' Test Num
+000005F9 000000 290 DC XL3'00'
+ 291 *
+000005FC 01 292 DC AL1(1) SS Length
+000005FD 00 293 DC X'00' Pad Byte
+000005FE AA 294 DC X'AA' First-Operand SS last byte
+000005FF AA 295 DC X'AA' Second-Operand SS last byte
+ 296 * Source
+00000600 0000380C 00000001 297 DC A(COP1A),A(001) Op-1 SS & length
+00000608 0000C80C 00000001 298 DC A(COP2A),A(001) OP-2 SS & length
+ 299 * Target
+00000610 00108000 00000001 300 DC A(1*MB+(1*K32)),A(1) Op-1 & length
+00000618 00208000 00000001 301 DC A(2*MB+(1*K32)),A(1) Op-2 & length
+ 302 *
+00000620 00000007 303 DC A(7) CC0 Fail mask
+ 304 * Ending register values
+00000624 00108000 00000001 305 DC A(1*MB+(1*K32)+000),A(001) OP-1
+0000062C 00208000 00000001 306 DC A(2*MB+(1*K32)+000),A(001) OP-2
+
+
+00000634 308 CC0T2 DS 0F
+00000634 02 309 DC X'02' Test Num
+00000635 000000 310 DC XL3'00'
+ 311 *
+00000638 01 312 DC AL1(1) SS Length
+00000639 00 313 DC X'00' Pad Byte
+0000063A BB 314 DC X'BB' First-Operand SS last byte
+0000063B BB 315 DC X'BB' Second-Operand SS last byte
+ 316 * Source
+0000063C 0000380C 00000001 317 DC A(COP1A),A(001) Op-1 SS & length
+00000644 0000C80C 00000001 318 DC A(COP2A),A(001) OP-2 SS & length
+ 319 * Target
+0000064C 00110000 00000002 320 DC A(1*MB+(2*K32)),A(2) Op-1 & length
+00000654 00210000 00000002 321 DC A(2*MB+(2*K32)),A(2) Op-2 & length
+ 322 *
+0000065C 00000007 323 DC A(7) CC0 Fail mask
+ 324 * Ending register values
+00000660 00110001 00000001 325 DC A(1*MB+(2*K32)+001),A(001) OP-1
+00000668 00210001 00000001 326 DC A(2*MB+(2*K32)+001),A(001) OP-2
+
+
+00000670 328 CC0T3 DS 0F
+00000670 03 329 DC X'03' Test Num
+00000671 000000 330 DC XL3'00'
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 9
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 331 *
+00000674 04 332 DC AL1(4) SS Length
+00000675 00 333 DC X'00' Pad Byte
+00000676 CC 334 DC X'CC' First-Operand SS last byte
+00000677 CC 335 DC X'CC' Second-Operand SS last byte
+ 336 * Source
+00000678 0000380C 00000004 337 DC A(COP1A),A(004) Op-1 SS & length
+00000680 0000C80C 00000004 338 DC A(COP2A),A(004) OP-2 SS & length
+ 339 * Target
+00000688 00118000 00000008 340 DC A(1*MB+(3*K32)),A(8) Op-1 & length
+00000690 00218000 00000008 341 DC A(2*MB+(3*K32)),A(8) Op-2 & length
+ 342 *
+00000698 00000007 343 DC A(7) CC0 Fail mask
+ 344 * Ending register values
+0000069C 00118004 00000004 345 DC A(1*MB+(3*K32)+(8-4)),A(004) OP-1
+000006A4 00218004 00000004 346 DC A(2*MB+(3*K32)+(8-4)),A(004) OP-2
+
+
+000006AC 348 CC0T4 DS 0F
+000006AC 04 349 DC X'04' Test Num
+000006AD 000000 350 DC XL3'00'
+ 351 *
+000006B0 0D 352 DC AL1(13) SS Length
+000006B1 00 353 DC X'00' Pad Byte
+000006B2 DD 354 DC X'DD' First-Operand SS last byte
+000006B3 DD 355 DC X'DD' Second-Operand SS last byte
+ 356 * Source
+000006B4 0000380C 0000000D 357 DC A(COP1A),A(013) Op-1 SS & length
+000006BC 0000C80C 0000000D 358 DC A(COP2A),A(013) OP-2 SS & length
+ 359 * Target
+000006C4 00120000 0000003F 360 DC A(1*MB+(4*K32)),A(63) Op-1 & length
+000006CC 00220000 0000003F 361 DC A(2*MB+(4*K32)),A(63) Op-2 & length
+ 362 *
+000006D4 00000007 363 DC A(7) CC0 Fail mask
+ 364 * Ending register values
+000006D8 00120032 0000000D 365 DC A(1*MB+(4*K32)+(63-13)),A(013) OP-1
+000006E0 00220032 0000000D 366 DC A(2*MB+(4*K32)+(63-13)),A(013) OP-2
+
+
+000006E8 368 CC0T5 DS 0F
+000006E8 05 369 DC X'05' Test Num
+000006E9 000000 370 DC XL3'00'
+ 371 *
+000006EC 3E 372 DC AL1(62) SS Length
+000006ED 00 373 DC X'00' Pad Byte
+000006EE EE 374 DC X'EE' First-Operand SS last byte
+000006EF EE 375 DC X'EE' Second-Operand SS last byte
+ 376 * Source
+000006F0 0000380C 0000003E 377 DC A(COP1A),A(062) Op-1 SS & length
+000006F8 0000C80C 0000003E 378 DC A(COP2A),A(062) OP-2 SS & length
+ 379 * Target
+00000700 00128000 00000200 380 DC A(1*MB+(5*K32)),A(512) Op-1 & length
+00000708 00228000 00000200 381 DC A(2*MB+(5*K32)),A(512) Op-2 & length
+ 382 *
+00000710 00000007 383 DC A(7) CC0 Fail mask
+ 384 * Ending register values
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 10
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00000714 001281C2 0000003E 385 DC A(1*MB+(5*K32)+(512-62)),A(062) OP-1
+0000071C 002281C2 0000003E 386 DC A(2*MB+(5*K32)+(512-62)),A(062) OP-2
+
+
+00000724 388 CC0T6 DS 0F
+00000724 06 389 DC X'06' Test Num
+00000725 000000 390 DC XL3'00'
+ 391 *
+00000728 7F 392 DC AL1(127) SS Length
+00000729 00 393 DC X'00' Pad Byte
+0000072A FF 394 DC X'FF' First-Operand SS last byte
+0000072B FF 395 DC X'FF' Second-Operand SS last byte
+ 396 * Source
+0000072C 0000380C 0000007F 397 DC A(COP1A),A(127) Op-1 SS & length
+00000734 0000C80C 0000007F 398 DC A(COP2A),A(127) OP-2 SS & length
+ 399 * Target
+0000073C 00130000 00000800 400 DC A(1*MB+(6*K32)),A(2048) Op-1 & length
+00000744 00230000 00000800 401 DC A(2*MB+(6*K32)),A(2048) Op-2 & length
+ 402 *
+0000074C 00000007 403 DC A(7) CC0 Fail mask
+ 404 * Ending register values
+00000750 00130781 0000007F 405 DC A(1*MB+(6*K32)+(2048-127)),A(127) OP-1
+00000758 00230781 0000007F 406 DC A(2*MB+(6*K32)+(2048-127)),A(127) OP-2
+
+ 408 * Cross page bounday tests
+
+ 410 * Cross page bounday - operand-1
+
+00000760 412 CC0T7 DS 0F
+00000760 07 413 DC X'07' Test Num
+00000761 000000 414 DC XL3'00'
+ 415 *
+00000764 3E 416 DC AL1(62) SS Length
+00000765 00 417 DC X'00' Pad Byte
+00000766 55 418 DC X'55' First-Operand SS last byte
+00000767 55 419 DC X'55' Second-Operand SS last byte
+ 420 * Source
+00000768 0000380C 0000003E 421 DC A(COP1A),A(062) Op-1 SS & length
+00000770 0000C80C 0000003E 422 DC A(COP2A),A(062) OP-2 SS & length
+ 423 * Target
+00000778 00137F80 00000200 424 DC A(1*MB+(7*K32)-128),A(512) Op-1 & length
+00000780 00238000 00000200 425 DC A(2*MB+(7*K32)),A(512) Op-2 & length
+ 426 *
+00000788 00000007 427 DC A(7) CC0 Fail mask
+ 428 * Ending register values
+0000078C 00138142 0000003E 429 DC A(1*MB+(7*K32)+(512-62)-128),A(062) OP-1
+00000794 002381C2 0000003E 430 DC A(2*MB+(7*K32)+(512-62)),A(062) OP-2
+
+ 432 * Cross page bounday - operand-2
+
+0000079C 434 CC0T8 DS 0F
+0000079C 08 435 DC X'08' Test Num
+0000079D 000000 436 DC XL3'00'
+ 437 *
+000007A0 3E 438 DC AL1(62) SS Length
+000007A1 00 439 DC X'00' Pad Byte
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 11
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+000007A2 66 440 DC X'66' First-Operand SS last byte
+000007A3 66 441 DC X'66' Second-Operand SS last byte
+ 442 * Source
+000007A4 0000380C 0000003E 443 DC A(COP1A),A(062) Op-1 SS & length
+000007AC 0000C80C 0000003E 444 DC A(COP2A),A(062) OP-2 SS & length
+ 445 * Target
+000007B4 00140000 00000200 446 DC A(1*MB+(8*K32)),A(512) Op-1 & length
+000007BC 0023FF80 00000200 447 DC A(2*MB+(8*K32)-128),A(512) Op-2 & length
+ 448 *
+000007C4 00000007 449 DC A(7) CC0 Fail mask
+ 450 * Ending register values
+000007C8 001401C2 0000003E 451 DC A(1*MB+(8*K32)+(512-62)),A(062) OP-1
+000007D0 00240142 0000003E 452 DC A(2*MB+(8*K32)+(512-62)-128),A(062) OP-2
+
+ 454 * Cross page bounday - operand-1 and operand-2
+
+000007D8 456 CC0T9 DS 0F
+000007D8 09 457 DC X'09' Test Num
+000007D9 000000 458 DC XL3'00'
+ 459 *
+000007DC 3E 460 DC AL1(62) SS Length
+000007DD 00 461 DC X'00' Pad Byte
+000007DE 77 462 DC X'77' First-Operand SS last byte
+000007DF 77 463 DC X'77' Second-Operand SS last byte
+ 464 * Source
+000007E0 0000380C 0000003E 465 DC A(COP1A),A(062) Op-1 SS & length
+000007E8 0000C80C 0000003E 466 DC A(COP2A),A(062) OP-2 SS & length
+ 467 * Target
+000007F0 00147FA0 00000200 468 DC A(1*MB+(9*K32)-96),A(512) Op-1 & length
+000007F8 00247F80 00000200 469 DC A(2*MB+(9*K32)-128),A(512) Op-2 & length
+ 470 *
+00000800 00000007 471 DC A(7) CC0 Fail mask
+ 472 * Ending register values
+00000804 00148162 0000003E 473 DC A(1*MB+(9*K32)+(512-62)-96),A(062) OP-1
+0000080C 00248142 0000003E 474 DC A(2*MB+(9*K32)+(512-62)-128),A(062) OP-2
+
+ 476 * PAD tests
+
+ 478 * Pad - operand-1
+
+00000814 480 CC0TA DS 0F
+00000814 0A 481 DC X'0A' Test Num
+00000815 000000 482 DC XL3'00'
+ 483 *
+00000818 3E 484 DC AL1(62) SS Length
+00000819 40 485 DC X'40' Pad Byte
+0000081A 40 486 DC X'40' First-Operand SS last byte
+0000081B 40 487 DC X'40' Second-Operand SS last byte
+ 488 * Source
+0000081C 00005C0C 0000003E 489 DC A(COP1B),A(062) Op-1 SS & length
+00000824 0000EC0C 0000003E 490 DC A(COP2B),A(062) OP-2 SS & length
+ 491 * Target
+0000082C 00150000 000001F4 492 DC A(1*MB+(10*K32)),A(500) Op-1 & length
+00000834 00250000 00000200 493 DC A(2*MB+(10*K32)),A(512) Op-2 & length
+ 494 *
+0000083C 00000007 495 DC A(7) CC0 Fail mask
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 12
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 496 * Ending register values
+00000840 001501C2 00000032 497 DC A(1*MB+(10*K32)+(512-62)),A(062-(512-500)) OP-1
+00000848 002501C2 0000003E 498 DC A(2*MB+(10*K32)+(512-62)),A(062) OP-2
+
+ 500 * Pad - operand-2
+
+00000850 502 CC0TB DS 0F
+00000850 0B 503 DC X'0B' Test Num
+00000851 000000 504 DC XL3'00'
+ 505 *
+00000854 3E 506 DC AL1(62) SS Length
+00000855 40 507 DC X'40' Pad Byte
+00000856 40 508 DC X'40' First-Operand SS last byte
+00000857 40 509 DC X'40' Second-Operand SS last byte
+ 510 * Source
+00000858 00005C0C 0000003E 511 DC A(COP1B),A(062) Op-1 SS & length
+00000860 0000EC0C 0000003E 512 DC A(COP2B),A(062) OP-2 SS & length
+ 513 * Target
+00000868 00158000 00000200 514 DC A(1*MB+(11*K32)),A(512) Op-1 & length
+00000870 00258000 000001F4 515 DC A(2*MB+(11*K32)),A(500) Op-2 & length
+ 516 *
+00000878 00000007 517 DC A(7) CC0 Fail mask
+ 518 * Ending register values
+0000087C 001581C2 0000003E 519 DC A(1*MB+(11*K32)+(512-62)),A(062) OP-1
+00000884 002581C2 00000032 520 DC A(2*MB+(11*K32)+(512-62)),A(062-(512-500)) OP-2
+
+ 522 * PAD and Cross page bounday tests
+
+ 524 * Pad - operand-1 ; Cross page bounday - operand-1
+
+0000088C 526 CC0TC DS 0F
+0000088C 0C 527 DC X'0C' Test Num
+0000088D 000000 528 DC XL3'00'
+ 529 *
+00000890 3E 530 DC AL1(62) SS Length
+00000891 40 531 DC X'40' Pad Byte
+00000892 40 532 DC X'40' First-Operand SS last byte
+00000893 40 533 DC X'40' Second-Operand SS last byte
+ 534 * Source
+00000894 00005C0C 0000003E 535 DC A(COP1B),A(062) Op-1 SS & length
+0000089C 0000EC0C 0000003E 536 DC A(COP2B),A(062) OP-2 SS & length
+ 537 * Target
+000008A4 0015FFA0 000001F4 538 DC A(1*MB+(12*K32)-96),A(500) Op-1 & length
+000008AC 00260000 00000200 539 DC A(2*MB+(12*K32)),A(512) Op-2 & length
+ 540 *
+000008B4 00000007 541 DC A(7) CC0 Fail mask
+ 542 * Ending register values
+000008B8 00160162 00000032 543 DC A(1*MB+(12*K32)+(512-62)-96),A(062-(512-500)) OP-1
+000008C0 002601C2 0000003E 544 DC A(2*MB+(12*K32)+(512-62)),A(062) OP-2
+
+ 546 * Pad - operand-1 ; Cross page bounday - operand-2
+
+000008C8 548 CC0TD DS 0F
+000008C8 0D 549 DC X'0D' Test Num
+000008C9 000000 550 DC XL3'00'
+ 551 *
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 13
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+000008CC 3E 552 DC AL1(62) SS Length
+000008CD 40 553 DC X'40' Pad Byte
+000008CE 40 554 DC X'40' First-Operand SS last byte
+000008CF 40 555 DC X'40' Second-Operand SS last byte
+ 556 * Source
+000008D0 00005C0C 0000003E 557 DC A(COP1B),A(062) Op-1 SS & length
+000008D8 0000EC0C 0000003E 558 DC A(COP2B),A(062) OP-2 SS & length
+ 559 * Target
+000008E0 00168000 000001F4 560 DC A(1*MB+(13*K32)),A(500) Op-1 & length
+000008E8 00267FA0 00000200 561 DC A(2*MB+(13*K32)-96),A(512) Op-2 & length
+ 562 *
+000008F0 00000007 563 DC A(7) CC0 Fail mask
+ 564 * Ending register values
+000008F4 001681C2 00000032 565 DC A(1*MB+(13*K32)+(512-62)),A(062-(512-500)) OP-1
+000008FC 00268162 0000003E 566 DC A(2*MB+(13*K32)+(512-62)-96),A(062) OP-2
+
+ 568 * Pad - operand-2 ; Cross page bounday - operand-1
+
+00000904 570 CC0TE DS 0F
+00000904 0E 571 DC X'0E' Test Num
+00000905 000000 572 DC XL3'00'
+ 573 *
+00000908 3E 574 DC AL1(62) SS Length
+00000909 40 575 DC X'40' Pad Byte
+0000090A 40 576 DC X'40' First-Operand SS last byte
+0000090B 40 577 DC X'40' Second-Operand SS last byte
+ 578 * Source
+0000090C 00005C0C 0000003E 579 DC A(COP1B),A(062) Op-1 SS & length
+00000914 0000EC0C 0000003E 580 DC A(COP2B),A(062) OP-2 SS & length
+ 581 * Target
+0000091C 0016FFA0 00000200 582 DC A(1*MB+(14*K32)-96),A(512) Op-1 & length
+00000924 00270000 000001F4 583 DC A(2*MB+(14*K32)),A(500) Op-2 & length
+ 584 *
+0000092C 00000007 585 DC A(7) CC0 Fail mask
+ 586 * Ending register values
+00000930 00170162 0000003E 587 DC A(1*MB+(14*K32)+(512-62)-96),A(062) OP-1
+00000938 002701C2 00000032 588 DC A(2*MB+(14*K32)+(512-62)),A(062-(512-500)) OP-2
+
+ 590 * Pad - operand-2 ; Cross page bounday - operand-2
+
+00000940 592 CC0TF DS 0F
+00000940 0F 593 DC X'0F' Test Num
+00000941 000000 594 DC XL3'00'
+ 595 *
+00000944 3E 596 DC AL1(62) SS Length
+00000945 40 597 DC X'40' Pad Byte
+00000946 40 598 DC X'40' First-Operand SS last byte
+00000947 40 599 DC X'40' Second-Operand SS last byte
+ 600 * Source
+00000948 00005C0C 0000003E 601 DC A(COP1B),A(062) Op-1 SS & length
+00000950 0000EC0C 0000003E 602 DC A(COP2B),A(062) OP-2 SS & length
+ 603 * Target
+00000958 00178000 00000200 604 DC A(1*MB+(15*K32)),A(512) Op-1 & length
+00000960 00277FA0 000001F4 605 DC A(2*MB+(15*K32)-96),A(500) Op-2 & length
+ 606 *
+00000968 00000007 607 DC A(7) CC0 Fail mask
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 14
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 608 * Ending register values
+0000096C 001781C2 0000003E 609 DC A(1*MB+(15*K32)+(512-62)),A(062) OP-1
+00000974 00278162 00000032 610 DC A(2*MB+(15*K32)+(512-62)-96),A(062-(512-500)) OP-2
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 15
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 612 ***********************************************************************
+ 613 * tests with CC=1
+ 614 ***********************************************************************
+
+0000097C 616 CC1T1 DS 0F
+0000097C 11 617 DC X'11' Test Num
+0000097D 000000 618 DC XL3'00'
+ 619 *
+00000980 04 620 DC AL1(4) SS Length
+00000981 11 621 DC X'11' Pad Byte
+00000982 11 622 DC X'11' First-Operand SS last byte
+00000983 11 623 DC X'11' Second-Operand SS last byte
+ 624 * Source
+00000984 0000380C 00000001 625 DC A(COP1A),A(001) Op-1 SS & length
+0000098C 0000C80C 00000001 626 DC A(COP2A),A(001) OP-2 SS & length
+ 627 * Target
+00000994 00308000 00000001 628 DC A(3*MB+(1*K32)),A(1) Op-1 & length
+0000099C 00408000 00000001 629 DC A(4*MB+(1*K32)),A(1) Op-2 & length
+ 630 *
+000009A4 0000000B 631 DC A(11) CC1 Fail mask
+ 632 * Ending register values
+000009A8 00308000 00000001 633 DC A(3*MB+(1*K32)+000),A(001) OP-1
+000009B0 00408000 00000001 634 DC A(4*MB+(1*K32)+000),A(001) OP-2
+
+
+000009B8 636 CC1T2 DS 0F
+000009B8 12 637 DC X'12' Test Num
+000009B9 000000 638 DC XL3'00'
+ 639 *
+000009BC 02 640 DC AL1(2) SS Length
+000009BD 00 641 DC X'00' Pad Byte
+000009BE BB 642 DC X'BB' First-Operand SS last byte
+000009BF BB 643 DC X'BB' Second-Operand SS last byte
+ 644 * Source
+000009C0 0000380C 00000001 645 DC A(COP1A),A(001) Op-1 SS & length
+000009C8 0000C80C 00000001 646 DC A(COP2A),A(001) OP-2 SS & length
+ 647 * Target
+000009D0 00310000 00000002 648 DC A(3*MB+(2*K32)),A(2) Op-1 & length
+000009D8 00410000 00000002 649 DC A(4*MB+(2*K32)),A(2) Op-2 & length
+ 650 *
+000009E0 0000000B 651 DC A(11) CC1 Fail mask
+ 652 * Ending register values
+000009E4 00310001 00000001 653 DC A(3*MB+(2*K32)+001),A(001) OP-1
+000009EC 00410001 00000001 654 DC A(4*MB+(2*K32)+001),A(001) OP-2
+
+
+000009F4 656 CC1T3 DS 0F
+000009F4 13 657 DC X'13' Test Num
+000009F5 000000 658 DC XL3'00'
+ 659 *
+000009F8 06 660 DC AL1(6) SS Length
+000009F9 00 661 DC X'00' Pad Byte
+000009FA CC 662 DC X'CC' First-Operand SS last byte
+000009FB CC 663 DC X'CC' Second-Operand SS last byte
+ 664 * Source
+000009FC 0000380C 00000004 665 DC A(COP1A),A(004) Op-1 SS & length
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 16
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00000A04 0000C80C 00000004 666 DC A(COP2A),A(004) OP-2 SS & length
+ 667 * Target
+00000A0C 00318000 00000008 668 DC A(3*MB+(3*K32)),A(8) Op-1 & length
+00000A14 00418000 00000008 669 DC A(4*MB+(3*K32)),A(8) Op-2 & length
+ 670 *
+00000A1C 0000000B 671 DC A(11) CC1 Fail mask
+ 672 * Ending register values
+00000A20 00318004 00000004 673 DC A(3*MB+(3*K32)+(8-4)),A(004) OP-1
+00000A28 00418004 00000004 674 DC A(4*MB+(3*K32)+(8-4)),A(004) OP-2
+
+
+00000A30 676 CC1T4 DS 0F
+00000A30 14 677 DC X'14' Test Num
+00000A31 000000 678 DC XL3'00'
+ 679 *
+00000A34 12 680 DC AL1(18) SS Length
+00000A35 00 681 DC X'00' Pad Byte
+00000A36 DD 682 DC X'DD' First-Operand SS last byte
+00000A37 DD 683 DC X'DD' Second-Operand SS last byte
+ 684 * Source
+00000A38 0000380C 0000000D 685 DC A(COP1A),A(013) Op-1 SS & length
+00000A40 0000C80C 0000000D 686 DC A(COP2A),A(013) OP-2 SS & length
+ 687 * Target
+00000A48 00320000 0000003F 688 DC A(3*MB+(4*K32)),A(63) Op-1 & length
+00000A50 00420000 0000003F 689 DC A(4*MB+(4*K32)),A(63) Op-2 & length
+ 690 *
+00000A58 0000000B 691 DC A(11) CC1 Fail mask
+ 692 * Ending register values
+00000A5C 00320032 0000000D 693 DC A(3*MB+(4*K32)+(63-13)),A(013) OP-1
+00000A64 00420032 0000000D 694 DC A(4*MB+(4*K32)+(63-13)),A(013) OP-2
+
+
+00000A6C 696 CC1T5 DS 0F
+00000A6C 15 697 DC X'15' Test Num
+00000A6D 000000 698 DC XL3'00'
+ 699 *
+00000A70 40 700 DC AL1(64) SS Length
+00000A71 00 701 DC X'00' Pad Byte
+00000A72 EE 702 DC X'EE' First-Operand SS last byte
+00000A73 EE 703 DC X'EE' Second-Operand SS last byte
+ 704 * Source
+00000A74 0000380C 0000003E 705 DC A(COP1A),A(062) Op-1 SS & length
+00000A7C 0000C80C 0000003E 706 DC A(COP2A),A(062) OP-2 SS & length
+ 707 * Target
+00000A84 00328000 00000200 708 DC A(3*MB+(5*K32)),A(512) Op-1 & length
+00000A8C 00428000 00000200 709 DC A(4*MB+(5*K32)),A(512) Op-2 & length
+ 710 *
+00000A94 0000000B 711 DC A(11) CC1 Fail mask
+ 712 * Ending register values
+00000A98 003281C2 0000003E 713 DC A(3*MB+(5*K32)+(512-62)),A(062) OP-1
+00000AA0 004281C2 0000003E 714 DC A(4*MB+(5*K32)+(512-62)),A(062) OP-2
+
+
+00000AA8 716 CC1T6 DS 0F
+00000AA8 16 717 DC X'16' Test Num
+00000AA9 000000 718 DC XL3'00'
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 17
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 719 *
+00000AAC 80 720 DC AL1(128) SS Length
+00000AAD 00 721 DC X'00' Pad Byte
+00000AAE FF 722 DC X'FF' First-Operand SS last byte
+00000AAF FF 723 DC X'FF' Second-Operand SS last byte
+ 724 * Source
+00000AB0 0000380C 0000007F 725 DC A(COP1A),A(127) Op-1 SS & length
+00000AB8 0000C80C 0000007F 726 DC A(COP2A),A(127) OP-2 SS & length
+ 727 * Target
+00000AC0 00330000 00000800 728 DC A(3*MB+(6*K32)),A(2048) Op-1 & length
+00000AC8 00430000 00000800 729 DC A(4*MB+(6*K32)),A(2048) Op-2 & length
+ 730 *
+00000AD0 0000000B 731 DC A(11) CC1 Fail mask
+ 732 * Ending register values
+00000AD4 00330781 0000007F 733 DC A(3*MB+(6*K32)+(2048-127)),A(127) OP-1
+00000ADC 00430781 0000007F 734 DC A(4*MB+(6*K32)+(2048-127)),A(127) OP-2
+
+ 736 * Cross page bounday tests
+
+ 738 * Cross page bounday - operand-1
+
+00000AE4 740 CC1T7 DS 0F
+00000AE4 17 741 DC X'17' Test Num
+00000AE5 000000 742 DC XL3'00'
+ 743 *
+00000AE8 40 744 DC AL1(64) SS Length
+00000AE9 00 745 DC X'00' Pad Byte
+00000AEA 55 746 DC X'55' First-Operand SS last byte
+00000AEB 55 747 DC X'55' Second-Operand SS last byte
+ 748 * Source
+00000AEC 0000380C 0000003E 749 DC A(COP1A),A(062) Op-1 SS & length
+00000AF4 0000C80C 0000003E 750 DC A(COP2A),A(062) OP-2 SS & length
+ 751 * Target
+00000AFC 00337F80 00000200 752 DC A(3*MB+(7*K32)-128),A(512) Op-1 & length
+00000B04 00438000 00000200 753 DC A(4*MB+(7*K32)),A(512) Op-2 & length
+ 754 *
+00000B0C 0000000B 755 DC A(11) CC1 Fail mask
+ 756 * Ending register values
+00000B10 00338142 0000003E 757 DC A(3*MB+(7*K32)+(512-62)-128),A(062) OP-1
+00000B18 004381C2 0000003E 758 DC A(4*MB+(7*K32)+(512-62)),A(062) OP-2
+
+ 760 * Cross page bounday - operand-2
+
+00000B20 762 CC1T8 DS 0F
+00000B20 18 763 DC X'18' Test Num
+00000B21 000000 764 DC XL3'00'
+ 765 *
+00000B24 40 766 DC AL1(64) SS Length
+00000B25 00 767 DC X'00' Pad Byte
+00000B26 66 768 DC X'66' First-Operand SS last byte
+00000B27 66 769 DC X'66' Second-Operand SS last byte
+ 770 * Source
+00000B28 0000380C 0000003E 771 DC A(COP1A),A(062) Op-1 SS & length
+00000B30 0000C80C 0000003E 772 DC A(COP2A),A(062) OP-2 SS & length
+ 773 * Target
+00000B38 00340000 00000200 774 DC A(3*MB+(8*K32)),A(512) Op-1 & length
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 18
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00000B40 0043FF80 00000200 775 DC A(4*MB+(8*K32)-128),A(512) Op-2 & length
+ 776 *
+00000B48 0000000B 777 DC A(11) CC1 Fail mask
+ 778 * Ending register values
+00000B4C 003401C2 0000003E 779 DC A(3*MB+(8*K32)+(512-62)),A(062) OP-1
+00000B54 00440142 0000003E 780 DC A(4*MB+(8*K32)+(512-62)-128),A(062) OP-2
+
+ 782 * Cross page bounday - operand-1 and operand-2
+
+00000B5C 784 CC1T9 DS 0F
+00000B5C 19 785 DC X'19' Test Num
+00000B5D 000000 786 DC XL3'00'
+ 787 *
+00000B60 40 788 DC AL1(64) SS Length
+00000B61 00 789 DC X'00' Pad Byte
+00000B62 77 790 DC X'77' First-Operand SS last byte
+00000B63 77 791 DC X'77' Second-Operand SS last byte
+ 792 * Source
+00000B64 0000380C 0000003E 793 DC A(COP1A),A(062) Op-1 SS & length
+00000B6C 0000C80C 0000003E 794 DC A(COP2A),A(062) OP-2 SS & length
+ 795 * Target
+00000B74 00347FA0 00000200 796 DC A(3*MB+(9*K32)-96),A(512) Op-1 & length
+00000B7C 00447F80 00000200 797 DC A(4*MB+(9*K32)-128),A(512) Op-2 & length
+ 798 *
+00000B84 0000000B 799 DC A(11) CC1 Fail mask
+ 800 * Ending register values
+00000B88 00348162 0000003E 801 DC A(3*MB+(9*K32)+(512-62)-96),A(062) OP-1
+00000B90 00448142 0000003E 802 DC A(4*MB+(9*K32)+(512-62)-128),A(062) OP-2
+
+ 804 * PAD tests
+
+ 806 * Pad - operand-1
+
+00000B98 808 CC1TA DS 0F
+00000B98 1A 809 DC X'1A' Test Num
+00000B99 000000 810 DC XL3'00'
+ 811 *
+00000B9C 40 812 DC AL1(64) SS Length
+00000B9D 40 813 DC X'40' Pad Byte
+00000B9E 40 814 DC X'40' First-Operand SS last byte
+00000B9F 40 815 DC X'40' Second-Operand SS last byte
+ 816 * Source
+00000BA0 00005C0C 0000003E 817 DC A(COP1B),A(062) Op-1 SS & length
+00000BA8 0000EC0C 0000003E 818 DC A(COP2B),A(062) OP-2 SS & length
+ 819 * Target
+00000BB0 00350000 000001F4 820 DC A(3*MB+(10*K32)),A(500) Op-1 & length
+00000BB8 00450000 00000200 821 DC A(4*MB+(10*K32)),A(512) Op-2 & length
+ 822 *
+00000BC0 0000000B 823 DC A(11) CC1 Fail mask
+ 824 * Ending register values
+00000BC4 003501C2 00000032 825 DC A(3*MB+(10*K32)+(512-62)),A(062-(512-500)) OP-1
+00000BCC 004501C2 0000003E 826 DC A(4*MB+(10*K32)+(512-62)),A(062) OP-2
+
+ 828 * Pad - operand-2
+
+00000BD4 830 CC1TB DS 0F
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 19
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00000BD4 1B 831 DC X'1B' Test Num
+00000BD5 000000 832 DC XL3'00'
+ 833 *
+00000BD8 40 834 DC AL1(64) SS Length
+00000BD9 40 835 DC X'40' Pad Byte
+00000BDA 40 836 DC X'40' First-Operand SS last byte
+00000BDB 40 837 DC X'40' Second-Operand SS last byte
+ 838 * Source
+00000BDC 00005C0C 0000003E 839 DC A(COP1B),A(062) Op-1 SS & length
+00000BE4 0000EC0C 0000003E 840 DC A(COP2B),A(062) OP-2 SS & length
+ 841 * Target
+00000BEC 00358000 00000200 842 DC A(3*MB+(11*K32)),A(512) Op-1 & length
+00000BF4 00458000 000001F4 843 DC A(4*MB+(11*K32)),A(500) Op-2 & length
+ 844 *
+00000BFC 0000000B 845 DC A(11) CC1 Fail mask
+ 846 * Ending register values
+00000C00 003581C2 0000003E 847 DC A(3*MB+(11*K32)+(512-62)),A(062) OP-1
+00000C08 004581C2 00000032 848 DC A(4*MB+(11*K32)+(512-62)),A(062-(512-500)) OP-2
+
+ 850 * PAD and Cross page bounday tests
+
+ 852 * Pad - operand-1 ; Cross page bounday - operand-1
+
+00000C10 854 CC1TC DS 0F
+00000C10 1C 855 DC X'1C' Test Num
+00000C11 000000 856 DC XL3'00'
+ 857 *
+00000C14 40 858 DC AL1(64) SS Length
+00000C15 40 859 DC X'40' Pad Byte
+00000C16 40 860 DC X'40' First-Operand SS last byte
+00000C17 40 861 DC X'40' Second-Operand SS last byte
+ 862 * Source
+00000C18 00005C0C 0000003E 863 DC A(COP1B),A(062) Op-1 SS & length
+00000C20 0000EC0C 0000003E 864 DC A(COP2B),A(062) OP-2 SS & length
+ 865 * Target
+00000C28 0035FFA0 000001F4 866 DC A(3*MB+(12*K32)-96),A(500) Op-1 & length
+00000C30 00460000 00000200 867 DC A(4*MB+(12*K32)),A(512) Op-2 & length
+ 868 *
+00000C38 0000000B 869 DC A(11) CC1 Fail mask
+ 870 * Ending register values
+00000C3C 00360162 00000032 871 DC A(3*MB+(12*K32)+(512-62)-96),A(062-(512-500)) OP-1
+00000C44 004601C2 0000003E 872 DC A(4*MB+(12*K32)+(512-62)),A(062) OP-2
+
+ 874 * Pad - operand-1 ; Cross page bounday - operand-2
+
+00000C4C 876 CC1TD DS 0F
+00000C4C 1D 877 DC X'1D' Test Num
+00000C4D 000000 878 DC XL3'00'
+ 879 *
+00000C50 40 880 DC AL1(64) SS Length
+00000C51 40 881 DC X'40' Pad Byte
+00000C52 40 882 DC X'40' First-Operand SS last byte
+00000C53 40 883 DC X'40' Second-Operand SS last byte
+ 884 * Source
+00000C54 00005C0C 0000003E 885 DC A(COP1B),A(062) Op-1 SS & length
+00000C5C 0000EC0C 0000003E 886 DC A(COP2B),A(062) OP-2 SS & length
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 20
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 887 * Target
+00000C64 00368000 000001F4 888 DC A(3*MB+(13*K32)),A(500) Op-1 & length
+00000C6C 00467FA0 00000200 889 DC A(4*MB+(13*K32)-96),A(512) Op-2 & length
+ 890 *
+00000C74 0000000B 891 DC A(11) CC1 Fail mask
+ 892 * Ending register values
+00000C78 003681C2 00000032 893 DC A(3*MB+(13*K32)+(512-62)),A(062-(512-500)) OP-1
+00000C80 00468162 0000003E 894 DC A(4*MB+(13*K32)+(512-62)-96),A(062) OP-2
+
+ 896 * Pad - operand-2 ; Cross page bounday - operand-1
+
+00000C88 898 CC1TE DS 0F
+00000C88 1E 899 DC X'1E' Test Num
+00000C89 000000 900 DC XL3'00'
+ 901 *
+00000C8C 40 902 DC AL1(64) SS Length
+00000C8D 40 903 DC X'40' Pad Byte
+00000C8E 40 904 DC X'40' First-Operand SS last byte
+00000C8F 40 905 DC X'40' Second-Operand SS last byte
+ 906 * Source
+00000C90 00005C0C 0000003E 907 DC A(COP1B),A(062) Op-1 SS & length
+00000C98 0000EC0C 0000003E 908 DC A(COP2B),A(062) OP-2 SS & length
+ 909 * Target
+00000CA0 0036FFA0 00000200 910 DC A(3*MB+(14*K32)-96),A(512) Op-1 & length
+00000CA8 00470000 000001F4 911 DC A(4*MB+(14*K32)),A(500) Op-2 & length
+ 912 *
+00000CB0 0000000B 913 DC A(11) CC1 Fail mask
+ 914 * Ending register values
+00000CB4 00370162 0000003E 915 DC A(3*MB+(14*K32)+(512-62)-96),A(062) OP-1
+00000CBC 004701C2 00000032 916 DC A(4*MB+(14*K32)+(512-62)),A(062-(512-500)) OP-2
+
+ 918 * Pad - operand-2 ; Cross page bounday - operand-2
+
+00000CC4 920 CC1TF DS 0F
+00000CC4 1F 921 DC X'1F' Test Num
+00000CC5 000000 922 DC XL3'00'
+ 923 *
+00000CC8 40 924 DC AL1(64) SS Length
+00000CC9 40 925 DC X'40' Pad Byte
+00000CCA 40 926 DC X'40' First-Operand SS last byte
+00000CCB 40 927 DC X'40' Second-Operand SS last byte
+ 928 * Source
+00000CCC 00005C0C 0000003E 929 DC A(COP1B),A(062) Op-1 SS & length
+00000CD4 0000EC0C 0000003E 930 DC A(COP2B),A(062) OP-2 SS & length
+ 931 * Target
+00000CDC 00378000 00000200 932 DC A(3*MB+(15*K32)),A(512) Op-1 & length
+00000CE4 00477FA0 000001F4 933 DC A(4*MB+(15*K32)-96),A(500) Op-2 & length
+ 934 *
+00000CEC 0000000B 935 DC A(11) CC1 Fail mask
+ 936 * Ending register values
+00000CF0 003781C2 0000003E 937 DC A(3*MB+(15*K32)+(512-62)),A(062) OP-1
+00000CF8 00478162 00000032 938 DC A(4*MB+(15*K32)+(512-62)-96),A(062-(512-500)) OP-2
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 21
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 940 ***********************************************************************
+ 941 * tests with CC=2
+ 942 ***********************************************************************
+
+00000D00 944 CC2T1 DS 0F
+00000D00 21 945 DC X'21' Test Num
+00000D01 000000 946 DC XL3'00'
+ 947 *
+00000D04 04 948 DC AL1(4) SS Length
+00000D05 11 949 DC X'11' Pad Byte
+00000D06 11 950 DC X'11' First-Operand SS last byte
+00000D07 12 951 DC X'12' Second-Operand SS last byte
+ 952 * Source
+00000D08 0000380C 00000001 953 DC A(COP1A),A(001) Op-1 SS & length
+00000D10 0000C80C 00000001 954 DC A(COP2A),A(001) OP-2 SS & length
+ 955 * Target
+00000D18 00508000 00000001 956 DC A(5*MB+(1*K32)),A(1) Op-1 & length
+00000D20 00608000 00000001 957 DC A(6*MB+(1*K32)),A(1) Op-2 & length
+ 958 *
+00000D28 0000000D 959 DC A(13) not CC2 Fail mask
+ 960 * Ending register values
+00000D2C 00508001 00000000 961 DC A(5*MB+(1*K32)+001),A(000) OP-1
+00000D34 00608001 00000000 962 DC A(6*MB+(1*K32)+001),A(000) OP-2
+
+
+00000D3C 964 CC2T2 DS 0F
+00000D3C 22 965 DC X'22' Test Num
+00000D3D 000000 966 DC XL3'00'
+ 967 *
+00000D40 02 968 DC AL1(2) SS Length
+00000D41 00 969 DC X'00' Pad Byte
+00000D42 BB 970 DC X'BB' First-Operand SS last byte
+00000D43 BC 971 DC X'BC' Second-Operand SS last byte
+ 972 * Source
+00000D44 0000380C 00000001 973 DC A(COP1A),A(001) Op-1 SS & length
+00000D4C 0000C80C 00000001 974 DC A(COP2A),A(001) OP-2 SS & length
+ 975 * Target
+00000D54 00510000 00000002 976 DC A(5*MB+(2*K32)),A(2) Op-1 & length
+00000D5C 00610000 00000002 977 DC A(6*MB+(2*K32)),A(2) Op-2 & length
+ 978 *
+00000D64 0000000D 979 DC A(13) not CC2 Fail mask
+ 980 * Ending register values
+00000D68 00510002 00000000 981 DC A(5*MB+(2*K32)+002),A(000) OP-1
+00000D70 00610002 00000000 982 DC A(6*MB+(2*K32)+002),A(000) OP-2
+
+
+00000D78 984 CC2T3 DS 0F
+00000D78 23 985 DC X'23' Test Num
+00000D79 000000 986 DC XL3'00'
+ 987 *
+00000D7C 06 988 DC AL1(6) SS Length
+00000D7D 00 989 DC X'00' Pad Byte
+00000D7E CC 990 DC X'CC' First-Operand SS last byte
+00000D7F CD 991 DC X'CD' Second-Operand SS last byte
+ 992 * Source
+00000D80 0000380C 00000004 993 DC A(COP1A),A(004) Op-1 SS & length
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 22
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00000D88 0000C80C 00000004 994 DC A(COP2A),A(004) OP-2 SS & length
+ 995 * Target
+00000D90 00518000 00000008 996 DC A(5*MB+(3*K32)),A(8) Op-1 & length
+00000D98 00618000 00000008 997 DC A(6*MB+(3*K32)),A(8) Op-2 & length
+ 998 *
+00000DA0 0000000D 999 DC A(13) not CC2 Fail mask
+ 1000 * Ending register values
+00000DA4 00518008 00000000 1001 DC A(5*MB+(3*K32)+8),A(000) OP-1
+00000DAC 00618008 00000000 1002 DC A(6*MB+(3*K32)+8),A(000) OP-2
+
+
+00000DB4 1004 CC2T4 DS 0F
+00000DB4 24 1005 DC X'24' Test Num
+00000DB5 000000 1006 DC XL3'00'
+ 1007 *
+00000DB8 12 1008 DC AL1(18) SS Length
+00000DB9 00 1009 DC X'00' Pad Byte
+00000DBA DD 1010 DC X'DD' First-Operand SS last byte
+00000DBB DE 1011 DC X'DE' Second-Operand SS last byte
+ 1012 * Source
+00000DBC 0000380C 0000000D 1013 DC A(COP1A),A(013) Op-1 SS & length
+00000DC4 0000C80C 0000000D 1014 DC A(COP2A),A(013) OP-2 SS & length
+ 1015 * Target
+00000DCC 00520000 0000003F 1016 DC A(5*MB+(4*K32)),A(63) Op-1 & length
+00000DD4 00620000 0000003F 1017 DC A(6*MB+(4*K32)),A(63) Op-2 & length
+ 1018 *
+00000DDC 0000000D 1019 DC A(13) not CC2 Fail mask
+ 1020 * Ending register values
+00000DE0 0052003F 00000000 1021 DC A(5*MB+(4*K32)+63),A(000) OP-1
+00000DE8 0062003F 00000000 1022 DC A(6*MB+(4*K32)+63),A(000) OP-2
+
+
+00000DF0 1024 CC2T5 DS 0F
+00000DF0 25 1025 DC X'25' Test Num
+00000DF1 000000 1026 DC XL3'00'
+ 1027 *
+00000DF4 40 1028 DC AL1(64) SS Length
+00000DF5 00 1029 DC X'00' Pad Byte
+00000DF6 EE 1030 DC X'EE' First-Operand SS last byte
+00000DF7 EF 1031 DC X'EF' Second-Operand SS last byte
+ 1032 * Source
+00000DF8 0000380C 0000003E 1033 DC A(COP1A),A(062) Op-1 SS & length
+00000E00 0000C80C 0000003E 1034 DC A(COP2A),A(062) OP-2 SS & length
+ 1035 * Target
+00000E08 00528000 00000200 1036 DC A(5*MB+(5*K32)),A(512) Op-1 & length
+00000E10 00628000 00000200 1037 DC A(6*MB+(5*K32)),A(512) Op-2 & length
+ 1038 *
+00000E18 0000000D 1039 DC A(13) not CC2 Fail mask
+ 1040 * Ending register values
+00000E1C 00528200 00000000 1041 DC A(5*MB+(5*K32)+512),A(000) OP-1
+00000E24 00628200 00000000 1042 DC A(6*MB+(5*K32)+512),A(000) OP-2
+
+
+00000E2C 1044 CC2T6 DS 0F
+00000E2C 26 1045 DC X'26' Test Num
+00000E2D 000000 1046 DC XL3'00'
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 23
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1047 *
+00000E30 80 1048 DC AL1(128) SS Length
+00000E31 00 1049 DC X'00' Pad Byte
+00000E32 FF 1050 DC X'FF' First-Operand SS last byte
+00000E33 F0 1051 DC X'F0' Second-Operand SS last byte
+ 1052 * Source
+00000E34 0000380C 0000007F 1053 DC A(COP1A),A(127) Op-1 SS & length
+00000E3C 0000C80C 0000007F 1054 DC A(COP2A),A(127) OP-2 SS & length
+ 1055 * Target
+00000E44 00530000 00000800 1056 DC A(5*MB+(6*K32)),A(2048) Op-1 & length
+00000E4C 00630000 00000800 1057 DC A(6*MB+(6*K32)),A(2048) Op-2 & length
+ 1058 *
+00000E54 0000000D 1059 DC A(13) not CC2 Fail mask
+ 1060 * Ending register values
+00000E58 00530800 00000000 1061 DC A(5*MB+(6*K32)+2048),A(000) OP-1
+00000E60 00630800 00000000 1062 DC A(6*MB+(6*K32)+2048),A(000) OP-2
+
+ 1064 * Cross page bounday tests
+
+ 1066 * Cross page bounday - operand-1
+
+00000E68 1068 CC2T7 DS 0F
+00000E68 27 1069 DC X'27' Test Num
+00000E69 000000 1070 DC XL3'00'
+ 1071 *
+00000E6C 40 1072 DC AL1(64) SS Length
+00000E6D 00 1073 DC X'00' Pad Byte
+00000E6E 55 1074 DC X'55' First-Operand SS last byte
+00000E6F 56 1075 DC X'56' Second-Operand SS last byte
+ 1076 * Source
+00000E70 0000380C 0000003E 1077 DC A(COP1A),A(062) Op-1 SS & length
+00000E78 0000C80C 0000003E 1078 DC A(COP2A),A(062) OP-2 SS & length
+ 1079 * Target
+00000E80 00537F80 00000200 1080 DC A(5*MB+(7*K32)-128),A(512) Op-1 & length
+00000E88 00638000 00000200 1081 DC A(6*MB+(7*K32)),A(512) Op-2 & length
+ 1082 *
+00000E90 0000000D 1083 DC A(13) not CC2 Fail mask
+ 1084 * Ending register values
+00000E94 00538180 00000000 1085 DC A(5*MB+(7*K32)+512-128),A(000) OP-1
+00000E9C 00638200 00000000 1086 DC A(6*MB+(7*K32)+512),A(000) OP-2
+
+ 1088 * Cross page bounday - operand-2
+
+00000EA4 1090 CC2T8 DS 0F
+00000EA4 28 1091 DC X'28' Test Num
+00000EA5 000000 1092 DC XL3'00'
+ 1093 *
+00000EA8 40 1094 DC AL1(64) SS Length
+00000EA9 00 1095 DC X'00' Pad Byte
+00000EAA 67 1096 DC X'67' First-Operand SS last byte
+00000EAB 66 1097 DC X'66' Second-Operand SS last byte
+ 1098 * Source
+00000EAC 0000380C 0000003E 1099 DC A(COP1A),A(062) Op-1 SS & length
+00000EB4 0000C80C 0000003E 1100 DC A(COP2A),A(062) OP-2 SS & length
+ 1101 * Target
+00000EBC 00540000 00000200 1102 DC A(5*MB+(8*K32)),A(512) Op-1 & length
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 24
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00000EC4 0063FF80 00000200 1103 DC A(6*MB+(8*K32)-128),A(512) Op-2 & length
+ 1104 *
+00000ECC 0000000D 1105 DC A(13) not CC2 Fail mask
+ 1106 * Ending register values
+00000ED0 00540200 00000000 1107 DC A(5*MB+(8*K32)+512),A(000) OP-1
+00000ED8 00640180 00000000 1108 DC A(6*MB+(8*K32)+512-128),A(000) OP-2
+
+ 1110 * Cross page bounday - operand-1 and operand-2
+
+00000EE0 1112 CC2T9 DS 0F
+00000EE0 29 1113 DC X'29' Test Num
+00000EE1 000000 1114 DC XL3'00'
+ 1115 *
+00000EE4 40 1116 DC AL1(64) SS Length
+00000EE5 00 1117 DC X'00' Pad Byte
+00000EE6 78 1118 DC X'78' First-Operand SS last byte
+00000EE7 77 1119 DC X'77' Second-Operand SS last byte
+ 1120 * Source
+00000EE8 0000380C 0000003E 1121 DC A(COP1A),A(062) Op-1 SS & length
+00000EF0 0000C80C 0000003E 1122 DC A(COP2A),A(062) OP-2 SS & length
+ 1123 * Target
+00000EF8 00547FA0 00000200 1124 DC A(5*MB+(9*K32)-96),A(512) Op-1 & length
+00000F00 00647F80 00000200 1125 DC A(6*MB+(9*K32)-128),A(512) Op-2 & length
+ 1126 *
+00000F08 0000000D 1127 DC A(13) not CC2 Fail mask
+ 1128 * Ending register values
+00000F0C 005481A0 00000000 1129 DC A(5*MB+(9*K32)+512-96),A(000) OP-1
+00000F14 00648180 00000000 1130 DC A(6*MB+(9*K32)+512-128),A(000) OP-2
+
+ 1132 * PAD tests
+
+ 1134 * Pad - operand-1
+
+00000F1C 1136 CC2TA DS 0F
+00000F1C 2A 1137 DC X'2A' Test Num
+00000F1D 000000 1138 DC XL3'00'
+ 1139 *
+00000F20 40 1140 DC AL1(64) SS Length
+00000F21 41 1141 DC X'41' Pad Byte
+00000F22 40 1142 DC X'40' First-Operand SS last byte
+00000F23 40 1143 DC X'40' Second-Operand SS last byte
+ 1144 * Source
+00000F24 00005C0C 0000003E 1145 DC A(COP1B),A(062) Op-1 SS & length
+00000F2C 0000EC0C 0000003E 1146 DC A(COP2B),A(062) OP-2 SS & length
+ 1147 * Target
+00000F34 00550000 000001F4 1148 DC A(5*MB+(10*K32)),A(500) Op-1 & length
+00000F3C 00650000 00000200 1149 DC A(6*MB+(10*K32)),A(512) Op-2 & length
+ 1150 *
+00000F44 0000000D 1151 DC A(13) not CC2 Fail mask
+ 1152 * Ending register values
+00000F48 005501F4 00000000 1153 DC A(5*MB+(10*K32)+500),A(000) OP-1
+00000F50 00650200 00000000 1154 DC A(6*MB+(10*K32)+512),A(000) OP-2
+
+ 1156 * Pad - operand-2
+
+00000F58 1158 CC2TB DS 0F
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 25
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00000F58 2B 1159 DC X'2B' Test Num
+00000F59 000000 1160 DC XL3'00'
+ 1161 *
+00000F5C 40 1162 DC AL1(64) SS Length
+00000F5D 41 1163 DC X'41' Pad Byte
+00000F5E 40 1164 DC X'40' First-Operand SS last byte
+00000F5F 40 1165 DC X'40' Second-Operand SS last byte
+ 1166 * Source
+00000F60 00005C0C 0000003E 1167 DC A(COP1B),A(062) Op-1 SS & length
+00000F68 0000EC0C 0000003E 1168 DC A(COP2B),A(062) OP-2 SS & length
+ 1169 * Target
+00000F70 00558000 00000200 1170 DC A(5*MB+(11*K32)),A(512) Op-1 & length
+00000F78 00658000 000001F4 1171 DC A(6*MB+(11*K32)),A(500) Op-2 & length
+ 1172 *
+00000F80 0000000D 1173 DC A(13) not CC2 Fail mask
+ 1174 * Ending register values
+00000F84 00558200 00000000 1175 DC A(5*MB+(11*K32)+512),A(000) OP-1
+00000F8C 006581F4 00000000 1176 DC A(6*MB+(11*K32)+500),A(000) OP-2
+
+ 1178 * PAD and Cross page bounday tests
+
+ 1180 * Pad - operand-1 ; Cross page bounday - operand-1
+
+00000F94 1182 CC2TC DS 0F
+00000F94 2C 1183 DC X'2C' Test Num
+00000F95 000000 1184 DC XL3'00'
+ 1185 *
+00000F98 40 1186 DC AL1(64) SS Length
+00000F99 41 1187 DC X'41' Pad Byte
+00000F9A 40 1188 DC X'40' First-Operand SS last byte
+00000F9B 40 1189 DC X'40' Second-Operand SS last byte
+ 1190 * Source
+00000F9C 00005C0C 0000003E 1191 DC A(COP1B),A(062) Op-1 SS & length
+00000FA4 0000EC0C 0000003E 1192 DC A(COP2B),A(062) OP-2 SS & length
+ 1193 * Target
+00000FAC 0055FFA0 000001F4 1194 DC A(5*MB+(12*K32)-96),A(500) Op-1 & length
+00000FB4 00660000 00000200 1195 DC A(6*MB+(12*K32)),A(512) Op-2 & length
+ 1196 *
+00000FBC 0000000D 1197 DC A(13) not CC2 Fail mask
+ 1198 * Ending register values
+00000FC0 00560194 00000000 1199 DC A(5*MB+(12*K32)+500-96),A(000) OP-1
+00000FC8 00660200 00000000 1200 DC A(6*MB+(12*K32)+512),A(000) OP-2
+
+ 1202 * Pad - operand-1 ; Cross page bounday - operand-2
+
+00000FD0 1204 CC2TD DS 0F
+00000FD0 2D 1205 DC X'2D' Test Num
+00000FD1 000000 1206 DC XL3'00'
+ 1207 *
+00000FD4 40 1208 DC AL1(64) SS Length
+00000FD5 41 1209 DC X'41' Pad Byte
+00000FD6 40 1210 DC X'40' First-Operand SS last byte
+00000FD7 40 1211 DC X'40' Second-Operand SS last byte
+ 1212 * Source
+00000FD8 00005C0C 0000003E 1213 DC A(COP1B),A(062) Op-1 SS & length
+00000FE0 0000EC0C 0000003E 1214 DC A(COP2B),A(062) OP-2 SS & length
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 26
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1215 * Target
+00000FE8 00568000 000001F4 1216 DC A(5*MB+(13*K32)),A(500) Op-1 & length
+00000FF0 00667FA0 00000200 1217 DC A(6*MB+(13*K32)-96),A(512) Op-2 & length
+ 1218 *
+00000FF8 0000000D 1219 DC A(13) not CC2 Fail mask
+ 1220 * Ending register values
+00000FFC 005681F4 00000000 1221 DC A(5*MB+(13*K32)+500),A(000) OP-1
+00001004 006681A0 00000000 1222 DC A(6*MB+(13*K32)+512-96),A(000) OP-2
+
+ 1224 * Pad - operand-2 ; Cross page bounday - operand-1
+
+0000100C 1226 CC2TE DS 0F
+0000100C 2E 1227 DC X'2E' Test Num
+0000100D 000000 1228 DC XL3'00'
+ 1229 *
+00001010 40 1230 DC AL1(64) SS Length
+00001011 41 1231 DC X'41' Pad Byte
+00001012 40 1232 DC X'40' First-Operand SS last byte
+00001013 40 1233 DC X'40' Second-Operand SS last byte
+ 1234 * Source
+00001014 00005C0C 0000003E 1235 DC A(COP1B),A(062) Op-1 SS & length
+0000101C 0000EC0C 0000003E 1236 DC A(COP2B),A(062) OP-2 SS & length
+ 1237 * Target
+00001024 0056FFA0 00000200 1238 DC A(5*MB+(14*K32)-96),A(512) Op-1 & length
+0000102C 00670000 000001F4 1239 DC A(6*MB+(14*K32)),A(500) Op-2 & length
+ 1240 *
+00001034 0000000D 1241 DC A(13) not CC2 Fail mask
+ 1242 * Ending register values
+00001038 005701A0 00000000 1243 DC A(5*MB+(14*K32)+512-96),A(000) OP-1
+00001040 006701F4 00000000 1244 DC A(6*MB+(14*K32)+500),A(000) OP-2
+
+ 1246 * Pad - operand-2 ; Cross page bounday - operand-2
+
+00001048 1248 CC2TF DS 0F
+00001048 2F 1249 DC X'2F' Test Num
+00001049 000000 1250 DC XL3'00'
+ 1251 *
+0000104C 40 1252 DC AL1(64) SS Length
+0000104D 41 1253 DC X'41' Pad Byte
+0000104E 40 1254 DC X'40' First-Operand SS last byte
+0000104F 40 1255 DC X'40' Second-Operand SS last byte
+ 1256 * Source
+00001050 00005C0C 0000003E 1257 DC A(COP1B),A(062) Op-1 SS & length
+00001058 0000EC0C 0000003E 1258 DC A(COP2B),A(062) OP-2 SS & length
+ 1259 * Target
+00001060 00578000 00000200 1260 DC A(5*MB+(15*K32)),A(512) Op-1 & length
+00001068 00677FA0 000001F4 1261 DC A(6*MB+(15*K32)-96),A(500) Op-2 & length
+ 1262 *
+00001070 0000000D 1263 DC A(13) not CC2 Fail mask
+ 1264 * Ending register values
+00001074 00578200 00000000 1265 DC A(5*MB+(15*K32)+512),A(000) OP-1
+0000107C 00678194 00000000 1266 DC A(6*MB+(15*K32)+500-96),A(000) OP-2
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 27
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1268 ***********************************************************************
+ 1269 * tests with CC=3
+ 1270 ***********************************************************************
+
+00001084 1272 CC3T1 DS 0F
+00001084 31 1273 DC X'31' Test Num
+00001085 000000 1274 DC XL3'00'
+ 1275 *
+00001088 01 1276 DC AL1(1) SS Length
+00001089 00 1277 DC X'00' Pad Byte
+0000108A AA 1278 DC X'AA' First-Operand SS last byte
+0000108B AA 1279 DC X'AA' Second-Operand SS last byte
+ 1280 * Source
+0000108C 0000380C 00000001 1281 DC A(COP1A),A(1) Op-1 SS & length
+00001094 0000C80C 00000001 1282 DC A(COP2A),A(1) OP-2 SS & length
+ 1283 * Target
+0000109C 00708000 00001080 1284 DC A(7*MB+(1*K32)),A(4096+128) Op-1 & length
+000010A4 00808000 00001080 1285 DC A(8*MB+(1*K32)),A(4096+128) Op-2 & length
+ 1286 *
+000010AC 00000006 1287 DC A(6) not CC0 or CC3 Fail mask
+ 1288 * Ending register values
+000010B0 0070907F 00000001 1289 DC A(7*MB+(1*K32)+4096+128-1),A(001) OP-1
+000010B8 0080907F 00000001 1290 DC A(8*MB+(1*K32)+4096+128-1),A(001) OP-2
+
+
+000010C0 1292 CC3T3 DS 0F
+000010C0 33 1293 DC X'33' Test Num
+000010C1 000000 1294 DC XL3'00'
+ 1295 *
+000010C4 06 1296 DC AL1(6) SS Length
+000010C5 00 1297 DC X'00' Pad Byte
+000010C6 CC 1298 DC X'CC' First-Operand SS last byte
+000010C7 CC 1299 DC X'CC' Second-Operand SS last byte
+ 1300 * Source
+000010C8 0000380C 00000004 1301 DC A(COP1A),A(004) Op-1 SS & length
+000010D0 0000C80C 00000004 1302 DC A(COP2A),A(004) OP-2 SS & length
+ 1303 * Target
+000010D8 00718000 00001080 1304 DC A(7*MB+(3*K32)),A(4096+128) Op-1 & length
+000010E0 00818000 00001080 1305 DC A(8*MB+(3*K32)),A(4096+128) Op-2 & length
+ 1306 *
+000010E8 0000000A 1307 DC A(10) not CC1 or CC3 Fail mask
+ 1308 * Ending register values
+000010EC 0071907C 00000004 1309 DC A(7*MB+(3*K32)+(4096+128-4)),A(004) OP-1
+000010F4 0081907C 00000004 1310 DC A(8*MB+(3*K32)+(4096+128-4)),A(004) OP-2
+
+
+000010FC 1312 CC3T4 DS 0F
+000010FC 34 1313 DC X'34' Test Num
+000010FD 000000 1314 DC XL3'00'
+ 1315 *
+00001100 12 1316 DC AL1(18) SS Length
+00001101 00 1317 DC X'00' Pad Byte
+00001102 DD 1318 DC X'DD' First-Operand SS last byte
+00001103 DE 1319 DC X'DE' Second-Operand SS last byte
+ 1320 * Source
+00001104 0000380C 0000000D 1321 DC A(COP1A),A(013) Op-1 SS & length
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 28
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+0000110C 0000C80C 0000000D 1322 DC A(COP2A),A(013) OP-2 SS & length
+ 1323 * Target
+00001114 00720000 0000103F 1324 DC A(7*MB+(4*K32)),A(4096+63) Op-1 & length
+0000111C 00820000 0000103F 1325 DC A(8*MB+(4*K32)),A(4096+63) Op-2 & length
+ 1326 *
+00001124 0000000C 1327 DC A(12) not CC2 or CC3 Fail mask
+ 1328 * Ending register values
+00001128 0072103F 00000000 1329 DC A(7*MB+(4*K32)+4096+63),A(000) OP-1
+00001130 0082103F 00000000 1330 DC A(8*MB+(4*K32)+4096+63),A(000) OP-2
+
+ 1332 * Cross page bounday tests
+
+ 1334 * Cross page bounday - operand-1
+
+00001138 1336 CC3T7 DS 0F
+00001138 37 1337 DC X'37' Test Num
+00001139 000000 1338 DC XL3'00'
+ 1339 *
+0000113C 3E 1340 DC AL1(62) SS Length
+0000113D 00 1341 DC X'00' Pad Byte
+0000113E 55 1342 DC X'55' First-Operand SS last byte
+0000113F 55 1343 DC X'55' Second-Operand SS last byte
+ 1344 * Source
+00001140 0000380C 0000003E 1345 DC A(COP1A),A(062) Op-1 SS & length
+00001148 0000C80C 0000003E 1346 DC A(COP2A),A(062) OP-2 SS & length
+ 1347 * Target
+00001150 00737F80 00001080 1348 DC A(7*MB+(7*K32)-128),A(4096+128) Op-1 & length
+00001158 00838000 00001080 1349 DC A(8*MB+(7*K32)),A(4096+128) Op-2 & length
+ 1350 *
+00001160 00000006 1351 DC A(6) not CC0 or CC3 Fail mask
+ 1352 * Ending register values
+00001164 00738FC2 0000003E 1353 DC A(7*MB+(7*K32)+(4096+128-62)-128),A(062) OP-1
+0000116C 00839042 0000003E 1354 DC A(8*MB+(7*K32)+(4096+128-62)),A(062) OP-2
+
+ 1356 * Cross page bounday - operand-2
+
+00001174 1358 CC3T8 DS 0F
+00001174 38 1359 DC X'38' Test Num
+00001175 000000 1360 DC XL3'00'
+ 1361 *
+00001178 3E 1362 DC AL1(62) SS Length
+00001179 00 1363 DC X'00' Pad Byte
+0000117A 66 1364 DC X'66' First-Operand SS last byte
+0000117B 66 1365 DC X'66' Second-Operand SS last byte
+ 1366 * Source
+0000117C 0000380C 0000003E 1367 DC A(COP1A),A(062) Op-1 SS & length
+00001184 0000C80C 0000003E 1368 DC A(COP2A),A(062) OP-2 SS & length
+ 1369 * Target
+0000118C 00740000 00001080 1370 DC A(7*MB+(8*K32)),A(4096+128) Op-1 & length
+00001194 0083FF80 00001080 1371 DC A(8*MB+(8*K32)-128),A(4096+128) Op-2 & length
+ 1372 *
+0000119C 00000006 1373 DC A(6) not CC0 or CC3 Fail mask
+ 1374 * Ending register values
+000011A0 00741042 0000003E 1375 DC A(7*MB+(8*K32)+(4096+128-62)),A(062) OP-1
+000011A8 00840FC2 0000003E 1376 DC A(8*MB+(8*K32)+(4096+128-62)-128),A(062) OP-2
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 29
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1378 * Cross page bounday - operand-1 and operand-2
+
+000011B0 1380 CC3T9 DS 0F
+000011B0 39 1381 DC X'39' Test Num
+000011B1 000000 1382 DC XL3'00'
+ 1383 *
+000011B4 3E 1384 DC AL1(62) SS Length
+000011B5 00 1385 DC X'00' Pad Byte
+000011B6 77 1386 DC X'77' First-Operand SS last byte
+000011B7 77 1387 DC X'77' Second-Operand SS last byte
+ 1388 * Source
+000011B8 0000380C 0000003E 1389 DC A(COP1A),A(062) Op-1 SS & length
+000011C0 0000C80C 0000003E 1390 DC A(COP2A),A(062) OP-2 SS & length
+ 1391 * Target
+000011C8 00747FA0 00001080 1392 DC A(7*MB+(9*K32)-96),A(4096+128) Op-1 & length
+000011D0 00847F80 00001080 1393 DC A(8*MB+(9*K32)-128),A(4096+128) Op-2 & length
+ 1394 *
+000011D8 00000006 1395 DC A(6) not CC0 or CC3 Fail mask
+ 1396 * Ending register values
+000011DC 00748FE2 0000003E 1397 DC A(7*MB+(9*K32)+(4096+128-62)-96),A(062) OP-1
+000011E4 00848FC2 0000003E 1398 DC A(8*MB+(9*K32)+(4096+128-62)-128),A(062) OP-2
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 30
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1400 ***********************************************************************
+ 1401 * tests - special pad test
+ 1402 ***********************************************************************
+
+ 1404 * Op-1 - length=0
+000011EC 1405 PAD4T1 DS 0F
+000011EC 41 1406 DC X'41' Test Num
+000011ED 000000 1407 DC XL3'00'
+ 1408 *
+000011F0 04 1409 DC AL1(4) SS Length
+000011F1 40 1410 DC X'40' Pad Byte
+000011F2 40 1411 DC X'40' First-Operand SS last byte
+000011F3 40 1412 DC X'40' Second-Operand SS last byte
+ 1413 * Source
+000011F4 00005C0C 00000000 1414 DC A(COP1B),A(000) Op-1 SS & length
+000011FC 0000EC0C 00000004 1415 DC A(COP2B),A(4) OP-2 SS & length
+ 1416 * Target
+00001204 00908000 00000000 1417 DC A(9*MB+(1*K32)),A(000) Op-1 & length
+0000120C 00A08000 00000200 1418 DC A(10*MB+(1*K32)),A(512) Op-2 & length
+ 1419 *
+00001214 00000007 1420 DC A(7) CC0 Fail mask
+ 1421 * Ending register values
+00001218 00908000 00000000 1422 DC A(9*MB+(1*K32)),A(000) OP-1
+00001220 00A081FC 00000004 1423 DC A(10*MB+(1*K32)+(512-4)),A(004) OP-2
+
+
+ 1425 * Op-2 - length=0
+00001228 1426 PAD4T2 DS 0F
+00001228 42 1427 DC X'42' Test Num
+00001229 000000 1428 DC XL3'00'
+ 1429 *
+0000122C 04 1430 DC AL1(4) SS Length
+0000122D 40 1431 DC X'40' Pad Byte
+0000122E 40 1432 DC X'40' First-Operand SS last byte
+0000122F 40 1433 DC X'40' Second-Operand SS last byte
+ 1434 * Source
+00001230 00005C0C 00000004 1435 DC A(COP1B),A(4) Op-1 SS & length
+00001238 0000EC0C 00000000 1436 DC A(COP2B),A(000) OP-2 SS & length
+ 1437 * Target
+00001240 00910000 00000200 1438 DC A(9*MB+(2*K32)),A(512) Op-1 & length
+00001248 00A10000 00000000 1439 DC A(10*MB+(2*K32)),A(0) Op-2 & length
+ 1440 *
+00001250 00000007 1441 DC A(7) CC0 Fail mask
+ 1442 * Ending register values
+00001254 009101FC 00000004 1443 DC A(9*MB+(2*K32)+(512-4)),A(004) OP-1
+0000125C 00A10000 00000000 1444 DC A(10*MB+(2*K32)),A(000) OP-2
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 31
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1446 ***********************************************************************
+ 1447 * tests for Special Cases Optimizations
+ 1448 ***********************************************************************
+
+
+ 1450 * tests for Special Cases Optimizations
+
+00001264 1452 SC5T1 DS 0F
+00001264 51 1453 DC X'51' Test Num
+00001265 000000 1454 DC XL3'00'
+ 1455 *
+00001268 04 1456 DC AL1(4) SS Length
+00001269 00 1457 DC X'00' Pad Byte
+0000126A 77 1458 DC X'77' First-Operand SS last byte
+0000126B 77 1459 DC X'77' Second-Operand SS last byte
+ 1460 * Source
+0000126C 0000800C 00000020 1461 DC A(COP1C),A(032) Op-1 SS & length
+00001274 0001100C 00000020 1462 DC A(COP2C),A(032) OP-2 SS & length
+ 1463 * Target
+0000127C 00937FA0 00000200 1464 DC A(9*MB+(7*K32)-96),A(512) Op-1 & length
+00001284 00A37F80 00000200 1465 DC A(10*MB+(7*K32)-128),A(512) Op-2 & length
+ 1466 *
+0000128C 00000006 1467 DC A(6) not CC0 or CC3 Fail mask
+ 1468 * Ending register values
+00001290 0093817D 00000023 1469 DC A(9*MB+(7*K32)+(512-32)-96-3),A(032+3) OP-1
+00001298 00A3815D 00000023 1470 DC A(10*MB+(7*K32)+(512-32)-128-3),A(032+3) OP-2
+
+000012A0 1472 SC5T2 DS 0F
+000012A0 52 1473 DC X'52' Test Num
+000012A1 000000 1474 DC XL3'00'
+ 1475 *
+000012A4 07 1476 DC AL1(7) SS Length
+000012A5 00 1477 DC X'00' Pad Byte
+000012A6 77 1478 DC X'77' First-Operand SS last byte
+000012A7 77 1479 DC X'77' Second-Operand SS last byte
+ 1480 * Source
+000012A8 0000800C 0000001B 1481 DC A(COP1C),A(027) Op-1 SS & length
+000012B0 0001100C 0000001B 1482 DC A(COP2C),A(027) OP-2 SS & length
+ 1483 * Target
+000012B8 0093FFA0 00000200 1484 DC A(9*MB+(8*K32)-96),A(512) Op-1 & length
+000012C0 00A3FF80 00000200 1485 DC A(10*MB+(8*K32)-128),A(512) Op-2 & length
+ 1486 *
+000012C8 00000006 1487 DC A(6) not CC0 or CC3 Fail mask
+ 1488 * Ending register values
+000012CC 00940182 0000001E 1489 DC A(9*MB+(8*K32)+(512-27)-96-3),A(027+3) OP-1
+000012D4 00A40162 0000001E 1490 DC A(10*MB+(8*K32)+(512-27)-128-3),A(027+3) OP-2
+
+000012DC 1492 SC5T3 DS 0F
+000012DC 53 1493 DC X'53' Test Num
+000012DD 000000 1494 DC XL3'00'
+ 1495 *
+000012E0 01 1496 DC AL1(1) SS Length
+000012E1 00 1497 DC X'00' Pad Byte
+000012E2 77 1498 DC X'77' First-Operand SS last byte
+000012E3 77 1499 DC X'77' Second-Operand SS last byte
+ 1500 * Source
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 32
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+000012E4 00005C0C 0000001B 1501 DC A(COP1B),A(027) Op-1 SS & length
+000012EC 0000EC0C 0000001B 1502 DC A(COP2B),A(027) OP-2 SS & length
+ 1503 * Target
+000012F4 00947FA0 00000200 1504 DC A(9*MB+(9*K32)-96),A(512) Op-1 & length
+000012FC 00A47F80 00000200 1505 DC A(10*MB+(9*K32)-128),A(512) Op-2 & length
+ 1506 *
+00001304 00000006 1507 DC A(6) not CC0 or CC3 Fail mask
+ 1508 * Ending register values
+00001308 00948185 0000001B 1509 DC A(9*MB+(9*K32)+(512-27)-96),A(027) OP-1
+00001310 00A48165 0000001B 1510 DC A(10*MB+(9*K32)+(512-27)-128),A(027) OP-2
+
+00001318 1512 SC5T4 DS 0F
+00001318 54 1513 DC X'54' Test Num
+00001319 000000 1514 DC XL3'00'
+ 1515 *
+0000131C 03 1516 DC AL1(3) SS Length
+0000131D 00 1517 DC X'00' Pad Byte
+0000131E 77 1518 DC X'77' First-Operand SS last byte
+0000131F 77 1519 DC X'77' Second-Operand SS last byte
+ 1520 * Source
+00001320 0000A40C 0000001B 1521 DC A(COP1D),A(027) Op-1 SS & length
+00001328 0001340C 0000001B 1522 DC A(COP2D),A(027) OP-2 SS & length
+ 1523 * Target
+00001330 0094FFA0 00000200 1524 DC A(9*MB+(10*K32)-96),A(512) Op-1 & length
+00001338 00A4FF80 00000200 1525 DC A(10*MB+(10*K32)-128),A(512) Op-2 & length
+ 1526 *
+00001340 00000006 1527 DC A(6) not CC0 or CC3 Fail mask
+ 1528 * Ending register values
+00001344 00950185 0000001B 1529 DC A(9*MB+(10*K32)+(512-27)-96),A(27) OP-1
+0000134C 00A50165 0000001B 1530 DC A(10*MB+(10*K32)+(512-27)-128),A(27) OP-2
+
+ 1532 * subtring starts on a page boundary
+
+00001354 1534 SC5T5 DS 0F
+00001354 55 1535 DC X'55' Test Num
+00001355 000000 1536 DC XL3'00'
+ 1537 *
+00001358 04 1538 DC AL1(4) SS Length
+00001359 00 1539 DC X'00' Pad Byte
+0000135A CC 1540 DC X'CC' First-Operand SS last byte
+0000135B CC 1541 DC X'CC' Second-Operand SS last byte
+ 1542 * Source
+0000135C 0000380C 00000004 1543 DC A(COP1A),A(004) Op-1 SS & length
+00001364 0000C80C 00000004 1544 DC A(COP2A),A(004) OP-2 SS & length
+ 1545 * Target
+0000136C 00957FFC 00000008 1546 DC A(9*MB+(11*K32)-4),A(8) Op-1 & length
+00001374 00A57FFC 00000008 1547 DC A(10*MB+(11*K32)-4),A(8) Op-2 & length
+ 1548 *
+0000137C 00000007 1549 DC A(7) CC0 Fail mask
+ 1550 * Ending register values
+00001380 00958000 00000004 1551 DC A(9*MB+(11*K32)-4+(8-4)),A(004) OP-1
+00001388 00A58000 00000004 1552 DC A(10*MB+(11*K32)-4+(8-4)),A(004) OP-2
+
+ 1554 * subtring starts on a byte before page boundary
+
+00001390 1556 SC5T6 DS 0F
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 33
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00001390 56 1557 DC X'56' Test Num
+00001391 000000 1558 DC XL3'00'
+ 1559 *
+00001394 04 1560 DC AL1(4) SS Length
+00001395 00 1561 DC X'00' Pad Byte
+00001396 CC 1562 DC X'CC' First-Operand SS last byte
+00001397 CC 1563 DC X'CC' Second-Operand SS last byte
+ 1564 * Source
+00001398 0000380C 00000004 1565 DC A(COP1A),A(004) Op-1 SS & length
+000013A0 0000C80C 00000004 1566 DC A(COP2A),A(004) OP-2 SS & length
+ 1567 * Target
+000013A8 0095FFFB 00000008 1568 DC A(9*MB+(12*K32)-5),A(8) Op-1 & length
+000013B0 00A5FFFB 00000008 1569 DC A(10*MB+(12*K32)-5),A(8) Op-2 & length
+ 1570 *
+000013B8 00000007 1571 DC A(7) CC0 Fail mask
+ 1572 * Ending register values
+000013BC 0095FFFF 00000004 1573 DC A(9*MB+(12*K32)-5+(8-4)),A(004) OP-1
+000013C4 00A5FFFF 00000004 1574 DC A(10*MB+(12*K32)-5+(8-4)),A(004) OP-2
+
+ 1576 * subtring starts on a byte after page boundary
+
+000013CC 1578 SC5T7 DS 0F
+000013CC 57 1579 DC X'57' Test Num
+000013CD 000000 1580 DC XL3'00'
+ 1581 *
+000013D0 04 1582 DC AL1(4) SS Length
+000013D1 00 1583 DC X'00' Pad Byte
+000013D2 CC 1584 DC X'CC' First-Operand SS last byte
+000013D3 CC 1585 DC X'CC' Second-Operand SS last byte
+ 1586 * Source
+000013D4 0000380C 00000004 1587 DC A(COP1A),A(004) Op-1 SS & length
+000013DC 0000C80C 00000004 1588 DC A(COP2A),A(004) OP-2 SS & length
+ 1589 * Target
+000013E4 00967FFD 00000008 1590 DC A(9*MB+(13*K32)-3),A(8) Op-1 & length
+000013EC 00A67FFD 00000008 1591 DC A(10*MB+(13*K32)-3),A(8) Op-2 & length
+ 1592 *
+000013F4 00000007 1593 DC A(7) CC0 Fail mask
+ 1594 * Ending register values
+000013F8 00968001 00000004 1595 DC A(9*MB+(13*K32)-3+(8-4)),A(004) OP-1
+00001400 00A68001 00000004 1596 DC A(10*MB+(13*K32)-3+(8-4)),A(004) OP-2
+
+ 1598 * Strings with multiple equal bytes
+ 1599 * subtring starts on a page boundary
+
+00001408 1601 SC5T8 DS 0F
+00001408 58 1602 DC X'58' Test Num
+00001409 000000 1603 DC XL3'00'
+ 1604 *
+0000140C 04 1605 DC AL1(4) SS Length
+0000140D 00 1606 DC X'00' Pad Byte
+0000140E CC 1607 DC X'CC' First-Operand SS last byte
+0000140F CC 1608 DC X'CC' Second-Operand SS last byte
+ 1609 * Source
+00001410 0000800C 00000004 1610 DC A(COP1C),A(004) Op-1 SS & length
+00001418 0001100C 00000004 1611 DC A(COP2C),A(004) OP-2 SS & length
+ 1612 * Target
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 34
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00001420 0096FFFC 00000008 1613 DC A(9*MB+(14*K32)-4),A(8) Op-1 & length
+00001428 00A6FFFC 00000008 1614 DC A(10*MB+(14*K32)-4),A(8) Op-2 & length
+ 1615 *
+00001430 00000007 1616 DC A(7) CC0 Fail mask
+ 1617 * Ending register values
+00001434 0096FFFD 00000007 1618 DC A(9*MB+(14*K32)-4+(8-7)),A(007) OP-1
+0000143C 00A6FFFD 00000007 1619 DC A(10*MB+(14*K32)-4+(8-7)),A(007) OP-2
+
+ 1621 * subtring starts on a byte before page boundary
+
+00001444 1623 SC5T9 DS 0F
+00001444 59 1624 DC X'59' Test Num
+00001445 000000 1625 DC XL3'00'
+ 1626 *
+00001448 04 1627 DC AL1(4) SS Length
+00001449 00 1628 DC X'00' Pad Byte
+0000144A CC 1629 DC X'CC' First-Operand SS last byte
+0000144B CC 1630 DC X'CC' Second-Operand SS last byte
+ 1631 * Source
+0000144C 0000800C 00000004 1632 DC A(COP1C),A(004) Op-1 SS & length
+00001454 0001100C 00000004 1633 DC A(COP2C),A(004) OP-2 SS & length
+ 1634 * Target
+0000145C 00977FFB 00000008 1635 DC A(9*MB+(15*K32)-5),A(8) Op-1 & length
+00001464 00A77FFB 00000008 1636 DC A(10*MB+(15*K32)-5),A(8) Op-2 & length
+ 1637 *
+0000146C 00000007 1638 DC A(7) CC0 Fail mask
+ 1639 * Ending register values
+00001470 00977FFC 00000007 1640 DC A(9*MB+(15*K32)-5+(8-7)),A(007) OP-1
+00001478 00A77FFC 00000007 1641 DC A(10*MB+(15*K32)-5+(8-7)),A(007) OP-2
+
+ 1643 * subtring starts on a byte after page boundary
+
+00001480 1645 SC5TA DS 0F
+00001480 5A 1646 DC X'5A' Test Num
+00001481 000000 1647 DC XL3'00'
+ 1648 *
+00001484 04 1649 DC AL1(4) SS Length
+00001485 00 1650 DC X'00' Pad Byte
+00001486 CC 1651 DC X'CC' First-Operand SS last byte
+00001487 CC 1652 DC X'CC' Second-Operand SS last byte
+ 1653 * Source
+00001488 0000800C 00000004 1654 DC A(COP1C),A(004) Op-1 SS & length
+00001490 0001100C 00000004 1655 DC A(COP2C),A(004) OP-2 SS & length
+ 1656 * Target
+00001498 0097FFFD 00000008 1657 DC A(9*MB+(16*K32)-3),A(8) Op-1 & length
+000014A0 00A7FFFD 00000008 1658 DC A(10*MB+(16*K32)-3),A(8) Op-2 & length
+ 1659 *
+000014A8 00000007 1660 DC A(7) CC0 Fail mask
+ 1661 * Ending register values
+000014AC 0097FFFE 00000007 1662 DC A(9*MB+(16*K32)-3+(8-7)),A(007) OP-1
+000014B4 00A7FFFE 00000007 1663 DC A(10*MB+(16*K32)-3+(8-7)),A(007) OP-2
+
+ 1665 * Strings with multiple equal bytes
+ 1666 * subtring starts on a page boundary
+
+000014BC 1668 SC5TB DS 0F
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 35
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+000014BC 5B 1669 DC X'5B' Test Num
+000014BD 000000 1670 DC XL3'00'
+ 1671 *
+000014C0 04 1672 DC AL1(4) SS Length
+000014C1 00 1673 DC X'00' Pad Byte
+000014C2 CC 1674 DC X'CC' First-Operand SS last byte
+000014C3 CC 1675 DC X'CC' Second-Operand SS last byte
+ 1676 * Source
+000014C4 0000A40C 00000004 1677 DC A(COP1D),A(004) Op-1 SS & length
+000014CC 0001340C 00000004 1678 DC A(COP2D),A(004) OP-2 SS & length
+ 1679 * Target
+000014D4 00987FFC 00000008 1680 DC A(9*MB+(17*K32)-4),A(8) Op-1 & length
+000014DC 00A87FFC 00000008 1681 DC A(10*MB+(17*K32)-4),A(8) Op-2 & length
+ 1682 *
+000014E4 00000007 1683 DC A(7) CC0 Fail mask
+ 1684 * Ending register values
+000014E8 00988000 00000004 1685 DC A(9*MB+(17*K32)-4+(8-4)),A(004) OP-1
+000014F0 00A88000 00000004 1686 DC A(10*MB+(17*K32)-4+(8-4)),A(004) OP-2
+
+ 1688 * subtring starts on a byte before page boundary
+
+000014F8 1690 SC5TC DS 0F
+000014F8 5C 1691 DC X'5C' Test Num
+000014F9 000000 1692 DC XL3'00'
+ 1693 *
+000014FC 04 1694 DC AL1(4) SS Length
+000014FD 00 1695 DC X'00' Pad Byte
+000014FE CC 1696 DC X'CC' First-Operand SS last byte
+000014FF CC 1697 DC X'CC' Second-Operand SS last byte
+ 1698 * Source
+00001500 0000A40C 00000004 1699 DC A(COP1D),A(004) Op-1 SS & length
+00001508 0001340C 00000004 1700 DC A(COP2D),A(004) OP-2 SS & length
+ 1701 * Target
+00001510 0098FFFB 00000008 1702 DC A(9*MB+(18*K32)-5),A(8) Op-1 & length
+00001518 00A8FFFB 00000008 1703 DC A(10*MB+(18*K32)-5),A(8) Op-2 & length
+ 1704 *
+00001520 00000007 1705 DC A(7) CC0 Fail mask
+ 1706 * Ending register values
+00001524 0098FFFF 00000004 1707 DC A(9*MB+(18*K32)-5+(8-4)),A(004) OP-1
+0000152C 00A8FFFF 00000004 1708 DC A(10*MB+(18*K32)-5+(8-4)),A(004) OP-2
+
+ 1710 * subtring starts on a byte after page boundary
+
+00001534 1712 SC5TD DS 0F
+00001534 5D 1713 DC X'5D' Test Num
+00001535 000000 1714 DC XL3'00'
+ 1715 *
+00001538 04 1716 DC AL1(4) SS Length
+00001539 00 1717 DC X'00' Pad Byte
+0000153A CC 1718 DC X'CC' First-Operand SS last byte
+0000153B CC 1719 DC X'CC' Second-Operand SS last byte
+ 1720 * Source
+0000153C 0000A40C 00000004 1721 DC A(COP1D),A(004) Op-1 SS & length
+00001544 0001340C 00000004 1722 DC A(COP2D),A(004) OP-2 SS & length
+ 1723 * Target
+0000154C 00997FFD 00000008 1724 DC A(9*MB+(19*K32)-3),A(8) Op-1 & length
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 36
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00001554 00A97FFD 00000008 1725 DC A(10*MB+(19*K32)-3),A(8) Op-2 & length
+ 1726 *
+0000155C 00000007 1727 DC A(7) CC0 Fail mask
+ 1728 * Ending register values
+00001560 00998001 00000004 1729 DC A(9*MB+(19*K32)-3+(8-4)),A(004) OP-1
+00001568 00A98001 00000004 1730 DC A(10*MB+(19*K32)-3+(8-4)),A(004) OP-2
+ 1731
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 37
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1733 ***********************************************************************
+ 1734 * potential tests for CUSE-02-performance
+ 1735 ***********************************************************************
+
+ 1737 * Cross page bounday - operand-1 and operand-2
+
+00001570 1739 PTE1 DS 0F
+00001570 E1 1740 DC X'E1' Test Num
+00001571 000000 1741 DC XL3'00'
+ 1742 *
+00001574 04 1743 DC AL1(4) SS Length
+00001575 00 1744 DC X'00' Pad Byte
+00001576 EE 1745 DC X'EE' First-Operand SS last byte
+00001577 EE 1746 DC X'EE' Second-Operand SS last byte
+ 1747 * Source
+00001578 0000380C 00000004 1748 DC A(COP1A),A(004) Op-1 SS & length
+00001580 0000C80C 00000004 1749 DC A(COP2A),A(004) OP-2 SS & length
+ 1750 * Target
+00001588 00B07FC1 00000200 1751 DC A(11*MB+(1*K32)-63),A(512) Op-1 & length
+00001590 00C07FC8 00000200 1752 DC A(12*MB+(1*K32)-56),A(512) Op-2 & length
+ 1753 *
+00001598 00000007 1754 DC A(7) CC0 Fail mask
+ 1755 * Ending register values
+0000159C 00B081BD 00000004 1756 DC A(11*MB+(1*K32)-63+(512-4)),A(004) OP-1
+000015A4 00C081C4 00000004 1757 DC A(12*MB+(1*K32)-56+(512-4)),A(004) OP-2
+
+000015AC 1759 PTE2 DS 0F
+000015AC E2 1760 DC X'E2' Test Num
+000015AD 000000 1761 DC XL3'00'
+ 1762 *
+000015B0 08 1763 DC AL1(8) SS Length
+000015B1 00 1764 DC X'00' Pad Byte
+000015B2 77 1765 DC X'77' First-Operand SS last byte
+000015B3 77 1766 DC X'77' Second-Operand SS last byte
+ 1767 * Source
+000015B4 0000380C 00000008 1768 DC A(COP1A),A(008) Op-1 SS & length
+000015BC 0000C80C 00000008 1769 DC A(COP2A),A(008) OP-2 SS & length
+ 1770 * Target
+000015C4 00B0FFA0 00000200 1771 DC A(11*MB+(2*K32)-96),A(512) Op-1 & length
+000015CC 00C0FF80 00000200 1772 DC A(12*MB+(2*K32)-128),A(512) Op-2 & length
+ 1773 *
+000015D4 00000007 1774 DC A(7) CC0 Fail mask
+ 1775 * Ending register values
+000015D8 00B10198 00000008 1776 DC A(11*MB+(2*K32)+(512-8)-96),A(008) OP-1
+000015E0 00C10178 00000008 1777 DC A(12*MB+(2*K32)+(512-8)-128),A(008) OP-2
+
+
+000015E8 1779 PTE3 DS 0F
+000015E8 E3 1780 DC X'E3' Test Num
+000015E9 000000 1781 DC XL3'00'
+ 1782 *
+000015EC 10 1783 DC AL1(16) SS Length
+000015ED 00 1784 DC X'00' Pad Byte
+000015EE 77 1785 DC X'77' First-Operand SS last byte
+000015EF 77 1786 DC X'77' Second-Operand SS last byte
+ 1787 * Source
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 38
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+000015F0 0000380C 00000010 1788 DC A(COP1A),A(016) Op-1 SS & length
+000015F8 0000C80C 00000010 1789 DC A(COP2A),A(016) OP-2 SS & length
+ 1790 * Target
+00001600 00B17FA0 00000200 1791 DC A(11*MB+(3*K32)-96),A(512) Op-1 & length
+00001608 00C17F80 00000200 1792 DC A(12*MB+(3*K32)-128),A(512) Op-2 & length
+ 1793 *
+00001610 00000007 1794 DC A(7) CC0 Fail mask
+ 1795 * Ending register values
+00001614 00B18190 00000010 1796 DC A(11*MB+(3*K32)+(512-16)-96),A(016) OP-1
+0000161C 00C18170 00000010 1797 DC A(12*MB+(3*K32)+(512-16)-128),A(016) OP-2
+
+
+00001624 1799 PTE4 DS 0F
+00001624 E4 1800 DC X'E4' Test Num
+00001625 000000 1801 DC XL3'00'
+ 1802 *
+00001628 20 1803 DC AL1(32) SS Length
+00001629 00 1804 DC X'00' Pad Byte
+0000162A 77 1805 DC X'77' First-Operand SS last byte
+0000162B 77 1806 DC X'77' Second-Operand SS last byte
+ 1807 * Source
+0000162C 0000380C 00000020 1808 DC A(COP1A),A(032) Op-1 SS & length
+00001634 0000C80C 00000020 1809 DC A(COP2A),A(032) OP-2 SS & length
+ 1810 * Target
+0000163C 00B1FFA0 00000200 1811 DC A(11*MB+(4*K32)-96),A(512) Op-1 & length
+00001644 00C1FF80 00000200 1812 DC A(12*MB+(4*K32)-128),A(512) Op-2 & length
+ 1813 *
+0000164C 00000006 1814 DC A(6) not CC0 or CC3 Fail mask
+ 1815 * Ending register values
+00001650 00B20180 00000020 1816 DC A(11*MB+(4*K32)+(512-32)-96),A(032) OP-1
+00001658 00C20160 00000020 1817 DC A(12*MB+(4*K32)+(512-32)-128),A(032) OP-2
+
+
+00001660 1819 PTE5 DS 0F
+00001660 E5 1820 DC X'E5' Test Num
+00001661 000000 1821 DC XL3'00'
+ 1822 *
+00001664 40 1823 DC AL1(64) SS Length
+00001665 00 1824 DC X'00' Pad Byte
+00001666 77 1825 DC X'77' First-Operand SS last byte
+00001667 77 1826 DC X'77' Second-Operand SS last byte
+ 1827 * Source
+00001668 0000380C 00000040 1828 DC A(COP1A),A(064) Op-1 SS & length
+00001670 0000C80C 00000040 1829 DC A(COP2A),A(064) OP-2 SS & length
+ 1830 * Target
+00001678 00B27FA0 00000200 1831 DC A(11*MB+(5*K32)-96),A(512) Op-1 & length
+00001680 00C27F80 00000200 1832 DC A(12*MB+(5*K32)-128),A(512) Op-2 & length
+ 1833 *
+00001688 00000006 1834 DC A(6) not CC0 or CC3 Fail mask
+ 1835 * Ending register values
+0000168C 00B28160 00000040 1836 DC A(11*MB+(5*K32)+(512-64)-96),A(064) OP-1
+00001694 00C28140 00000040 1837 DC A(12*MB+(5*K32)+(512-64)-128),A(064) OP-2
+
+
+0000169C 1839 PTE6 DS 0F
+0000169C E6 1840 DC X'E6' Test Num
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 39
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+0000169D 000000 1841 DC XL3'00'
+ 1842 *
+000016A0 01 1843 DC AL1(1) SS Length
+000016A1 00 1844 DC X'00' Pad Byte
+000016A2 77 1845 DC X'77' First-Operand SS last byte
+000016A3 77 1846 DC X'77' Second-Operand SS last byte
+ 1847 * Source
+000016A4 0000380C 00000020 1848 DC A(COP1A),A(032) Op-1 SS & length
+000016AC 0000C80C 00000020 1849 DC A(COP2A),A(032) OP-2 SS & length
+ 1850 * Target
+000016B4 00B2FFA0 00000200 1851 DC A(11*MB+(6*K32)-96),A(512) Op-1 & length
+000016BC 00C2FF80 00000200 1852 DC A(12*MB+(6*K32)-128),A(512) Op-2 & length
+ 1853 *
+000016C4 00000006 1854 DC A(6) not CC0 or CC3 Fail mask
+ 1855 * Ending register values
+000016C8 00B30180 00000020 1856 DC A(11*MB+(6*K32)+(512-32)-96),A(032) OP-1
+000016D0 00C30160 00000020 1857 DC A(12*MB+(6*K32)+(512-32)-128),A(032) OP-2
+
+
+000016D8 1859 PTE7 DS 0F
+000016D8 E7 1860 DC X'E7' Test Num
+000016D9 000000 1861 DC XL3'00'
+ 1862 *
+000016DC 04 1863 DC AL1(4) SS Length
+000016DD 00 1864 DC X'00' Pad Byte
+000016DE 77 1865 DC X'77' First-Operand SS last byte
+000016DF 77 1866 DC X'77' Second-Operand SS last byte
+ 1867 * Source
+000016E0 0000800C 00000020 1868 DC A(COP1C),A(032) Op-1 SS & length
+000016E8 0001100C 00000020 1869 DC A(COP2C),A(032) OP-2 SS & length
+ 1870 * Target
+000016F0 00B37FA0 00000200 1871 DC A(11*MB+(7*K32)-96),A(512) Op-1 & length
+000016F8 00C37F80 00000200 1872 DC A(12*MB+(7*K32)-128),A(512) Op-2 & length
+ 1873 *
+00001700 00000006 1874 DC A(6) not CC0 or CC3 Fail mask
+ 1875 * Ending register values
+00001704 00B3817D 00000023 1876 DC A(11*MB+(7*K32)+(512-32)-96-3),A(032+3) OP-1
+0000170C 00C3815D 00000023 1877 DC A(12*MB+(7*K32)+(512-32)-128-3),A(032+3) OP-2
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 40
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1879 ***********************************************************************
+ 1880 * potential tests for CUSE-02-performance
+ 1881 ***********************************************************************
+
+00001714 1883 PTF1 DS 0F
+00001714 F1 1884 DC X'F1' Test Num
+00001715 000000 1885 DC XL3'00'
+ 1886 *
+00001718 3E 1887 DC AL1(62) SS Length
+00001719 00 1888 DC X'00' Pad Byte
+0000171A EE 1889 DC X'EE' First-Operand SS last byte
+0000171B EE 1890 DC X'EE' Second-Operand SS last byte
+ 1891 * Source
+0000171C 0000380C 0000003E 1892 DC A(COP1A),A(062) Op-1 SS & length
+00001724 0000C80C 0000003E 1893 DC A(COP2A),A(062) OP-2 SS & length
+ 1894 * Target
+0000172C 00D08000 00000200 1895 DC A(13*MB+(1*K32)),A(512) Op-1 & length
+00001734 00E08000 00000200 1896 DC A(14*MB+(1*K32)),A(512) Op-2 & length
+ 1897 *
+0000173C 00000007 1898 DC A(7) CC0 Fail mask
+ 1899 * Ending register values
+00001740 00D081C2 0000003E 1900 DC A(13*MB+(1*K32)+(512-62)),A(062) OP-1
+00001748 00E081C2 0000003E 1901 DC A(14*MB+(1*K32)+(512-62)),A(062) OP-2
+
+ 1903 * Cross page bounday - operand-1 and operand-2
+
+00001750 1905 PTF2 DS 0F
+00001750 F2 1906 DC X'F2' Test Num
+00001751 000000 1907 DC XL3'00'
+ 1908 *
+00001754 20 1909 DC AL1(32) SS Length
+00001755 00 1910 DC X'00' Pad Byte
+00001756 77 1911 DC X'77' First-Operand SS last byte
+00001757 77 1912 DC X'77' Second-Operand SS last byte
+ 1913 * Source
+00001758 0000380C 00000020 1914 DC A(COP1A),A(032) Op-1 SS & length
+00001760 0000C80C 00000020 1915 DC A(COP2A),A(032) OP-2 SS & length
+ 1916 * Target
+00001768 00D0FFA0 00000200 1917 DC A(13*MB+(2*K32)-96),A(512) Op-1 & length
+00001770 00E0FF80 00000200 1918 DC A(14*MB+(2*K32)-128),A(512) Op-2 & length
+ 1919 *
+00001778 00000007 1920 DC A(7) CC0 Fail mask
+ 1921 * Ending register values
+0000177C 00D10180 00000020 1922 DC A(13*MB+(2*K32)+(512-32)-96),A(032) OP-1
+00001784 00E10160 00000020 1923 DC A(14*MB+(2*K32)+(512-32)-128),A(032) OP-2
+
+
+0000178C 1925 PTF3 DS 0F
+0000178C F3 1926 DC X'F3' Test Num
+0000178D 000000 1927 DC XL3'00'
+ 1928 *
+00001790 3E 1929 DC AL1(62) SS Length
+00001791 00 1930 DC X'00' Pad Byte
+00001792 77 1931 DC X'77' First-Operand SS last byte
+00001793 77 1932 DC X'77' Second-Operand SS last byte
+ 1933 * Source
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 41
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00001794 0000380C 0000003E 1934 DC A(COP1A),A(062) Op-1 SS & length
+0000179C 0000C80C 0000003E 1935 DC A(COP2A),A(062) OP-2 SS & length
+ 1936 * Target
+000017A4 00D17FA0 00000800 1937 DC A(13*MB+(3*K32)-96),A(2048) Op-1 & length
+000017AC 00E17F80 00000800 1938 DC A(14*MB+(3*K32)-128),A(2048) Op-2 & length
+ 1939 *
+000017B4 00000007 1940 DC A(7) CC0 Fail mask
+ 1941 * Ending register values
+000017B8 00D18762 0000003E 1942 DC A(13*MB+(3*K32)+(2048-62)-96),A(062) OP-1
+000017C0 00E18742 0000003E 1943 DC A(14*MB+(3*K32)+(2048-62)-128),A(062) OP-2
+
+
+000017C8 1945 PTF4 DS 0F
+000017C8 F4 1946 DC X'F4' Test Num
+000017C9 000000 1947 DC XL3'00'
+ 1948 *
+000017CC 20 1949 DC AL1(32) SS Length
+000017CD 00 1950 DC X'00' Pad Byte
+000017CE 77 1951 DC X'77' First-Operand SS last byte
+000017CF 77 1952 DC X'77' Second-Operand SS last byte
+ 1953 * Source
+000017D0 0000380C 00000020 1954 DC A(COP1A),A(032) Op-1 SS & length
+000017D8 0000C80C 00000020 1955 DC A(COP2A),A(032) OP-2 SS & length
+ 1956 * Target
+000017E0 00D1FFA0 00000F80 1957 DC A(13*MB+(4*K32)-96),A(4096-128) Op-1 & length
+000017E8 00E1FF80 00000F80 1958 DC A(14*MB+(4*K32)-128),A(4096-128) Op-2 & length
+ 1959 *
+000017F0 00000006 1960 DC A(6) not CC0 or CC3 Fail mask
+ 1961 * Ending register values
+000017F4 00D20F00 00000020 1962 DC A(13*MB+(4*K32)+(4096-128-32)-96),A(032) OP-1
+000017FC 00E20EE0 00000020 1963 DC A(14*MB+(4*K32)+(4096-128-32)-128),A(032) OP-2
+
+
+
+00001804 00000000 1965 DC A(0) end of table
+00001808 00000000 1966 DC A(0) end of table
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 42
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1968 ***********************************************************************
+ 1969 * CUSE Operand-1 scan data...
+ 1970 ***********************************************************************
+
+0000180C 1972 DS 0F
+0000180C 98765432 98765432 1973 DC 2048XL4'98765432'
+0000380C 111111F0 111111F0 1974 COP1A DC 256XL4'111111F0'
+
+00003C0C 1976 DS 0F
+00003C0C 98765432 98765432 1977 DC 2048XL4'98765432'
+00005C0C 40404040 40404040 1978 COP1B DC 256XL4'40404040'
+
+0000600C 1980 DS 0F
+0000600C 11223344 11223344 1981 DC 2048XL4'11223344'
+0000800C 40404040 40404040 1982 COP1C DC 256XL4'40404040'
+
+0000840C 1984 DS 0F
+0000840C 11223344 11223344 1985 DC 2048XL4'11223344'
+0000A40C 40404040 40404040 1986 COP1D DC 256XL4'40404040'
+
+
+
+
+ 1988 ***********************************************************************
+ 1989 * CUSE Operand-2 scan data
+ 1990 ***********************************************************************
+
+0000A80C 1992 DS 0F
+0000A80C 89ABCDEF 89ABCDEF 1993 DC 2048XL4'89ABCDEF'
+0000C80C 111111F0 111111F0 1994 COP2A DC 256XL4'111111F0'
+
+0000CC0C 1996 DS 0F
+0000CC0C 89ABCDEF 89ABCDEF 1997 DC 2048XL4'89ABCDEF'
+0000EC0C 40404040 40404040 1998 COP2B DC 256XL4'40404040'
+
+0000F00C 2000 DS 0F
+0000F00C F1223344 F1223344 2001 DC 2048XL4'FF1223344'
+0001100C 40404040 40404040 2002 COP2C DC 256XL4'40404040'
+
+0001140C 2004 DS 0F
+0001140C FF223377 FF223377 2005 DC 2048XL4'FF223377'
+0001340C 40404040 40404040 2006 COP2D DC 256XL4'40404040'
+
+
+
+
+ 2008 ***********************************************************************
+ 2009 * Register equates
+ 2010 ***********************************************************************
+
+
+ 00000000 00000001 2012 R0 EQU 0
+ 00000001 00000001 2013 R1 EQU 1
+ 00000002 00000001 2014 R2 EQU 2
+ 00000003 00000001 2015 R3 EQU 3
+ 00000004 00000001 2016 R4 EQU 4
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 43
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 00000005 00000001 2017 R5 EQU 5
+ 00000006 00000001 2018 R6 EQU 6
+ 00000007 00000001 2019 R7 EQU 7
+ 00000008 00000001 2020 R8 EQU 8
+ 00000009 00000001 2021 R9 EQU 9
+ 0000000A 00000001 2022 R10 EQU 10
+ 0000000B 00000001 2023 R11 EQU 11
+ 0000000C 00000001 2024 R12 EQU 12
+ 0000000D 00000001 2025 R13 EQU 13
+ 0000000E 00000001 2026 R14 EQU 14
+ 0000000F 00000001 2027 R15 EQU 15
+
+
+ 2029 END
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 44
+
+ SYMBOL TYPE VALUE LENGTH DEFN REFERENCES
+
+BEGIN I 00000200 2 80 46 77 78 209
+CC0T1 F 000005F8 4 288
+CC0T2 F 00000634 4 308
+CC0T3 F 00000670 4 328
+CC0T4 F 000006AC 4 348
+CC0T5 F 000006E8 4 368
+CC0T6 F 00000724 4 388
+CC0T7 F 00000760 4 412
+CC0T8 F 0000079C 4 434
+CC0T9 F 000007D8 4 456
+CC0TA F 00000814 4 480
+CC0TB F 00000850 4 502
+CC0TC F 0000088C 4 526
+CC0TD F 000008C8 4 548
+CC0TE F 00000904 4 570
+CC0TF F 00000940 4 592
+CC1T1 F 0000097C 4 616
+CC1T2 F 000009B8 4 636
+CC1T3 F 000009F4 4 656
+CC1T4 F 00000A30 4 676
+CC1T5 F 00000A6C 4 696
+CC1T6 F 00000AA8 4 716
+CC1T7 F 00000AE4 4 740
+CC1T8 F 00000B20 4 762
+CC1T9 F 00000B5C 4 784
+CC1TA F 00000B98 4 808
+CC1TB F 00000BD4 4 830
+CC1TC F 00000C10 4 854
+CC1TD F 00000C4C 4 876
+CC1TE F 00000C88 4 898
+CC1TF F 00000CC4 4 920
+CC2T1 F 00000D00 4 944
+CC2T2 F 00000D3C 4 964
+CC2T3 F 00000D78 4 984
+CC2T4 F 00000DB4 4 1004
+CC2T5 F 00000DF0 4 1024
+CC2T6 F 00000E2C 4 1044
+CC2T7 F 00000E68 4 1068
+CC2T8 F 00000EA4 4 1090
+CC2T9 F 00000EE0 4 1112
+CC2TA F 00000F1C 4 1136
+CC2TB F 00000F58 4 1158
+CC2TC F 00000F94 4 1182
+CC2TD F 00000FD0 4 1204
+CC2TE F 0000100C 4 1226
+CC2TF F 00001048 4 1248
+CC3T1 F 00001084 4 1272
+CC3T3 F 000010C0 4 1292
+CC3T4 F 000010FC 4 1312
+CC3T7 F 00001138 4 1336
+CC3T8 F 00001174 4 1358
+CC3T9 F 000011B0 4 1380
+COP1A X 0000380C 4 1974 297 317 337 357 377 397 421 443 465 625 645 665 685
+ 705 725 749 771 793 953 973 993 1013 1033 1053 1077 1099
+ 1121 1281 1301 1321 1345 1367 1389 1543 1565 1587 1748 1768 1788
+ 1808 1828 1848 1892 1914 1934 1954
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 45
+
+ SYMBOL TYPE VALUE LENGTH DEFN REFERENCES
+
+COP1B X 00005C0C 4 1978 489 511 535 557 579 601 817 839 863 885 907 929 1145
+ 1167 1191 1213 1235 1257 1414 1435 1501
+COP1C X 0000800C 4 1982 1461 1481 1610 1632 1654 1868
+COP1D X 0000A40C 4 1986 1521 1677 1699 1721
+COP2A X 0000C80C 4 1994 298 318 338 358 378 398 422 444 466 626 646 666 686
+ 706 726 750 772 794 954 974 994 1014 1034 1054 1078 1100
+ 1122 1282 1302 1322 1346 1368 1390 1544 1566 1588 1749 1769 1789
+ 1809 1829 1849 1893 1915 1935 1955
+COP2B X 0000EC0C 4 1998 490 512 536 558 580 602 818 840 864 886 908 930 1146
+ 1168 1192 1214 1236 1258 1415 1436 1502
+COP2C X 0001100C 4 2002 1462 1482 1611 1633 1655 1869
+COP2D X 0001340C 4 2006 1522 1678 1700 1722
+CUSE1TST J 00000000 79884 41 44 48 52 109 42
+CUSEBC I 000005BE 4 205 171
+CUSECTL A 000005F8 4 282 123
+CUSEDONE I 000005BC 2 203 200
+CUSEFAIL I 000005B8 4 202 181 185 191 195 205
+CUSENEXT U 0000003C 1 272 197
+CUSETEST 4 00000000 60 243 124
+DOAGAIN I 0000056A 4 169 172
+ENDOP1 A 0000002C 4 267 177
+ENDOP2 A 00000034 4 269 187
+EOJ I 000005D8 4 217 103
+EOJPSW D 000005C8 8 215 217
+FAILMASK A 00000028 4 264 160
+FAILPSW D 000005E0 8 219 221
+FAILTEST I 000005F0 4 221 98 101 202
+IMAGE 1 00000000 79884 0
+K U 00000400 1 230 231 232 233 234 235
+K32 U 00008000 1 233 300 301 305 306 320 321 325 326 340 341 345 346 360
+ 361 365 366 380 381 385 386 400 401 405 406 424 425
+ 429 430 446 447 451 452 468 469 473 474 492 493 497
+ 498 514 515 519 520 538 539 543 544 560 561 565 566
+ 582 583 587 588 604 605 609 610 628 629 633 634 648
+ 649 653 654 668 669 673 674 688 689 693 694 708 709
+ 713 714 728 729 733 734 752 753 757 758 774 775 779
+ 780 796 797 801 802 820 821 825 826 842 843 847 848
+ 866 867 871 872 888 889 893 894 910 911 915 916 932
+ 933 937 938 956 957 961 962 976 977 981 982 996 997
+ 1001 1002 1016 1017 1021 1022 1036 1037 1041 1042 1056 1057 1061
+ 1062 1080 1081 1085 1086 1102 1103 1107 1108 1124 1125 1129 1130
+ 1148 1149 1153 1154 1170 1171 1175 1176 1194 1195 1199 1200 1216
+ 1217 1221 1222 1238 1239 1243 1244 1260 1261 1265 1266 1284 1285
+ 1289 1290 1304 1305 1309 1310 1324 1325 1329 1330 1348 1349 1353
+ 1354 1370 1371 1375 1376 1392 1393 1397 1398 1417 1418 1422 1423
+ 1438 1439 1443 1444 1464 1465 1469 1470 1484 1485 1489 1490 1504
+ 1505 1509 1510 1524 1525 1529 1530 1546 1547 1551 1552 1568 1569
+ 1573 1574 1590 1591 1595 1596 1613 1614 1618 1619 1635 1636 1640
+ 1641 1657 1658 1662 1663 1680 1681 1685 1686 1702 1703 1707 1708
+ 1724 1725 1729 1730 1751 1752 1756 1757 1771 1772 1776 1777 1791
+ 1792 1796 1797 1811 1812 1816 1817 1831 1832 1836 1837 1851 1852
+ 1856 1857 1871 1872 1876 1877 1895 1896 1900 1901 1917 1918 1922
+ 1923 1937 1938 1942 1943 1957 1958 1962 1963
+K4 U 00001000 1 232
+K64 U 00010000 1 234
+MB U 00100000 1 235 300 301 305 306 320 321 325 326 340 341 345 346 360
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 46
+
+ SYMBOL TYPE VALUE LENGTH DEFN REFERENCES
+
+ 361 365 366 380 381 385 386 400 401 405 406 424 425
+ 429 430 446 447 451 452 468 469 473 474 492 493 497
+ 498 514 515 519 520 538 539 543 544 560 561 565 566
+ 582 583 587 588 604 605 609 610 628 629 633 634 648
+ 649 653 654 668 669 673 674 688 689 693 694 708 709
+ 713 714 728 729 733 734 752 753 757 758 774 775 779
+ 780 796 797 801 802 820 821 825 826 842 843 847 848
+ 866 867 871 872 888 889 893 894 910 911 915 916 932
+ 933 937 938 956 957 961 962 976 977 981 982 996 997
+ 1001 1002 1016 1017 1021 1022 1036 1037 1041 1042 1056 1057 1061
+ 1062 1080 1081 1085 1086 1102 1103 1107 1108 1124 1125 1129 1130
+ 1148 1149 1153 1154 1170 1171 1175 1176 1194 1195 1199 1200 1216
+ 1217 1221 1222 1238 1239 1243 1244 1260 1261 1265 1266 1284 1285
+ 1289 1290 1304 1305 1309 1310 1324 1325 1329 1330 1348 1349 1353
+ 1354 1370 1371 1375 1376 1392 1393 1397 1398 1417 1418 1422 1423
+ 1438 1439 1443 1444 1464 1465 1469 1470 1484 1485 1489 1490 1504
+ 1505 1509 1510 1524 1525 1529 1530 1546 1547 1551 1552 1568 1569
+ 1573 1574 1590 1591 1595 1596 1613 1614 1618 1619 1635 1636 1640
+ 1641 1657 1658 1662 1663 1680 1681 1685 1686 1702 1703 1707 1708
+ 1724 1725 1729 1730 1751 1752 1756 1757 1771 1772 1776 1777 1791
+ 1792 1796 1797 1811 1812 1816 1817 1831 1832 1836 1837 1851 1852
+ 1856 1857 1871 1872 1876 1877 1895 1896 1900 1901 1917 1918 1922
+ 1923 1937 1938 1942 1943 1957 1958 1962 1963
+OP1LEN F 0000001C 4 259 135 139
+OP1WHERE A 00000018 4 258 134
+OP2LEN F 00000024 4 261 148 152
+OP2WHERE A 00000020 4 260 147
+OPSWHERE U 00000018 1 257 166
+PAD X 00000005 1 248 164
+PAD4T1 F 000011EC 4 1405
+PAD4T2 F 00001228 4 1426
+PAGE U 00001000 1 231
+PTE1 F 00001570 4 1739
+PTE2 F 000015AC 4 1759
+PTE3 F 000015E8 4 1779
+PTE4 F 00001624 4 1799
+PTE5 F 00001660 4 1819
+PTE6 F 0000169C 4 1839
+PTE7 F 000016D8 4 1859
+PTF1 F 00001714 4 1883
+PTF2 F 00001750 4 1905
+PTF3 F 0000178C 4 1925
+PTF4 F 000017C8 4 1945
+R0 U 00000000 1 2012 42 163
+R1 U 00000001 1 2013 164
+R10 U 0000000A 1 2022 127 128 136 137 138 140 149 150 151 153 177 180 187
+ 190
+R11 U 0000000B 1 2023 139 152 160 161 171 177 184 187 194
+R12 U 0000000C 1 2024
+R13 U 0000000D 1 2025
+R14 U 0000000E 1 2026 91 202 203
+R15 U 0000000F 1 2027 208
+R2 U 00000002 1 2014 134 140 142 143 166 169 180
+R3 U 00000003 1 2015 135 137 184
+R4 U 00000004 1 2016 147 153 155 156 169 190
+R5 U 00000005 1 2017 148 150 166 194
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 47
+
+ SYMBOL TYPE VALUE LENGTH DEFN REFERENCES
+
+R6 U 00000006 1 2018 123 124 197 198 207
+R7 U 00000007 1 2019
+R8 U 00000008 1 2020 77 80 81 82 84 209
+R9 U 00000009 1 2021 78 84 85
+REG2LOW U 000000DD 1 275
+REG2PATT U AABBCCDD 1 274
+SC5T1 F 00001264 4 1452
+SC5T2 F 000012A0 4 1472
+SC5T3 F 000012DC 4 1492
+SC5T4 F 00001318 4 1512
+SC5T5 F 00001354 4 1534
+SC5T6 F 00001390 4 1556
+SC5T7 F 000013CC 4 1578
+SC5T8 F 00001408 4 1601
+SC5T9 F 00001444 4 1623
+SC5TA F 00001480 4 1645
+SC5TB F 000014BC 4 1668
+SC5TC F 000014F8 4 1690
+SC5TD F 00001534 4 1712
+SS1ADDR A 00000008 4 252 136
+SS1LAST X 00000006 1 249 143
+SS1LEN A 0000000C 4 253 138
+SS2ADDR A 00000010 4 254 149
+SS2LAST X 00000007 1 250 156
+SS2LEN A 00000014 4 255 151
+SSLEN R 00000004 1 247 163
+SUBTEST X 00000401 1 113 100 168 179 183 189 193
+TEST01 I 00000502 4 121 91
+TESTADDR D 00000400 8 111
+TESTNUM X 00000400 1 112 97 121 128
+TNUM X 00000000 1 244 127
+TST1LOOP U 0000050A 1 126 199
+=F'0' F 000005F4 4 228 198
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 48
+
+MACRO DEFN REFERENCES
+
+No defined macros
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 49
+
+ DESC SYMBOL SIZE POS ADDR
+
+Entry: 0
+
+Image IMAGE 79884 00000-1380B 00000-1380B
+ Region 79884 00000-1380B 00000-1380B
+ CSECT CUSE1TST 79884 00000-1380B 00000-1380B
+ ASMA Ver. 0.2.1 CUSE-01-basic (Test CUSE instruction) 09 Nov 2022 15:53:17 Page 50
+
+ STMT FILE NAME
+
+1 /devstor/dev/tests/CUSE-01-basic.asm
+
+
+** NO ERRORS FOUND **
+
+
\ No newline at end of file
diff --git a/tests/CUSE-01-basic.pdf b/tests/CUSE-01-basic.pdf
new file mode 100644
index 000000000..ba97dd33f
Binary files /dev/null and b/tests/CUSE-01-basic.pdf differ
diff --git a/tests/CUSE-01-basic.tst b/tests/CUSE-01-basic.tst
new file mode 100644
index 000000000..ea36ea81b
--- /dev/null
+++ b/tests/CUSE-01-basic.tst
@@ -0,0 +1,17 @@
+*Testcase CUSE-01-basic (Test CUSE instruction)
+
+# ---------------------------------------------------------------------
+# This tests only the basic function of the CUSE instruction.
+# Specification Exceptions are NOT tested.
+# ---------------------------------------------------------------------
+
+mainsize 16
+numcpu 1
+sysclear
+archlvl z/Arch
+
+loadcore "$(testpath)/CUSE-01-basic.core" 0x0
+
+runtest 1
+
+*Done
diff --git a/tests/CUSE-02-performance.asm b/tests/CUSE-02-performance.asm
new file mode 100644
index 000000000..faac99f5e
--- /dev/null
+++ b/tests/CUSE-02-performance.asm
@@ -0,0 +1,680 @@
+ TITLE ' CUSE-02-performance (Test CUSE instructions)'
+***********************************************************************
+*
+* CUSE Performance instruction tests
+*
+***********************************************************************
+*
+* This program ONLY tests the performance of the CUSE instructions.
+*
+*
+* ********************
+* ** IMPORTANT! **
+* ********************
+*
+* This test uses the Hercules Diagnose X'008' interface
+* to display messages and thus your .tst runtest script
+* MUST contain a "DIAG8CMD ENABLE" statement within it!
+*
+*
+* NOTE: This test is based on the CLCL-et-al Test but modified to
+* only test the CUSE instruction. -- James Wekel November 2022
+*
+***********************************************************************
+*
+* Example Hercules Testcase:
+*
+*
+* *Testcase CUSE-02-performance (Test CUSE instructions)
+*
+* mainsize 16
+* numcpu 1
+* sysclear
+* archlvl z/Arch
+* loadcore "$(testpath)/CUSE-02-performance.core" 0x0
+* diag8cmd enable # (needed for messages to Hercules console)
+* #r 408=ff # (enable timing tests)
+* runtest 500 # (test duration, depends on host)
+* diag8cmd disable # (reset back to default)
+* *Done
+*
+*
+***********************************************************************
+ EJECT
+***********************************************************************
+*
+* Tests:
+* Both opernand-1 and operand-2 cross a page boundary.
+*
+* 1. CUSE of 512 bytes - substring length 1
+* 2. CUSE of 512 bytes - substring length 4
+* 3. CUSE of 512 bytes - substring length 8
+* 4. CUSE of 512 bytes - substring length 32
+* 5. CUSE of 512 bytes - substring length 32 (different strings)
+* 6. CUSE of 4160 (4096+64) bytes - substring length 32
+* which results in a CC=3, and a branch back
+* to complete the CUSE instruction.
+*
+***********************************************************************
+ SPACE 3
+CUSE2TST START 0
+ USING CUSE2TST,R0 Low core addressability
+ SPACE 4
+ ORG CUSE2TST+X'1A0' z/Architecure RESTART PSW
+ DC X'0000000180000000'
+ DC AD(BEGIN)
+ SPACE 2
+ ORG CUSE2TST+X'1D0' z/Architecure PROGRAM CHECK PSW
+ DC X'0002000180000000'
+ DC AD(X'DEAD')
+ SPACE 4
+ ORG CUSE2TST+X'200' Start of actual test program...
+ EJECT
+***********************************************************************
+* The actual "CUSE2TST" program itself...
+***********************************************************************
+*
+* Architecture Mode: z/Arch
+* Register Usage:
+*
+* R0 (work)
+* R1 (work)
+* R2 (work) or MSG subroutine call
+* R3 (work)
+* R4 (work)
+* R6 CUSETEST Base (of current test)
+* R7 (work)
+* R8 First base register
+* R9 Second base register
+* R10-R13 (work)
+* R14 Subroutine call
+* R15 Secondary Subroutine call or work
+*
+***********************************************************************
+ SPACE
+ USING BEGIN,R8 FIRST Base Register
+ USING BEGIN+4096,R9 SECOND Base Register
+ SPACE
+BEGIN BALR R8,0 Initalize FIRST base register
+ BCTR R8,0 Initalize FIRST base register
+ BCTR R8,0 Initalize FIRST base register
+ SPACE
+ LA R9,2048(,R8) Initalize SECOND base register
+ LA R9,2048(,R9) Initalize SECOND base register
+ SPACE
+***********************************************************************
+* Run the performance test(s)...
+***********************************************************************
+ SPACE
+ BAL R14,TEST91 Time CUSE instruction (speed test)
+ SPACE 2
+***********************************************************************
+* Test for normal or unexpected test completion...
+***********************************************************************
+ SPACE
+ CLI TIMEOPT,X'FF' Was this a timing run?
+ BNE EOJ No, timing run; just go end normally
+ SPACE
+ CLI TESTNUM,X'F4' Did we end on expected test?
+ BNE FAILTEST No?! Then FAIL the test!
+ SPACE
+ CLI SUBTEST,X'99' Did we end on expected SUB-test?
+ BNE FAILTEST No?! Then FAIL the test!
+ SPACE
+ B EOJ Yes, then normal completion!
+ EJECT
+***********************************************************************
+* Fixed test storage locations ...
+***********************************************************************
+ SPACE 2
+ ORG CUSE2TST+X'400'
+ SPACE 4
+TESTADDR DS 0D Where test/subtest numbers will go
+TESTNUM DC X'99' Test number of active test
+SUBTEST DC X'99' Active test sub-test number
+ SPACE 2
+ DS 0D
+TIMEOPT DC X'00' Set to non-zero to run timing tests
+ SPACE 2
+ DS 0D
+SAVE2T5 DC 4F'0'
+SAVER2 DC F'0'
+SAVER6 DC F'0'
+ SPACE 4
+ ORG *+X'100'
+ EJECT
+***********************************************************************
+* TEST91 Time CUSE instruction (speed test)
+***********************************************************************
+ SPACE
+TEST91 TM TIMEOPT,X'FF' Is timing tests option enabled?
+ BZR R14 No, skip timing tests
+ SPACE
+ LA R6,CUSEPERF Point R5 --> testing control table
+ USING CUSETEST,R6 What each table entry looks like
+ SPACE
+TST91LOP EQU *
+ ST R6,SAVER6 Save current pref table base
+ SPACE
+ IC R7,TNUM Set test number
+ STC R7,TESTNUM
+*
+** Initialize operand data (move data to testing address)
+*
+* Build Operand-1
+ SPACE
+ L R2,OP1WHERE Where to move operand-1 data to
+ L R3,OP1LEN Get operand-1 length
+ L R10,SS1ADDR Calculate OP 1 starting
+ SR R10,R3 address
+ A R10,SS1LEN
+ L R11,OP1LEN
+ MVCL R2,R10
+ SPACE
+ BCTR R2,0 less one for last char addr
+ MVC 0(0,R2),SS1LAST set last char
+ SPACE
+* Build Operand-2
+ SPACE
+ L R4,OP2WHERE Where to move operand-1 data to
+ L R5,OP2LEN Get operand-1 length
+ L R10,SS2ADDR Calculate OP 2 starting
+ SR R10,R5 address
+ A R10,SS2LEN
+ L R11,OP2LEN
+ MVCL R4,R10
+ SPACE
+ BCTR R4,0 less one for last char addr
+ MVC 0(0,R4),SS2LAST set last char
+ SPACE
+* Set Substring length and pad byte
+ SPACE
+ IC R0,SSLEN Set SS length
+ IC R1,PAD Set SS Pad byte
+ EJECT
+***********************************************************************
+* Define come helpful macros to ensure our counts are correct
+***********************************************************************
+ SPACE 4
+ MACRO
+ OVERONLY &NUM &NUM = number of sets
+ LCLA &CTR
+&CTR SETA &NUM
+.LOOP ANOP
+.*
+*
+ LM R2,R5,OPSWHERE
+ BC B'0001',*+4
+.*
+&CTR SETA &CTR-1
+ AIF (&CTR GT 0).LOOP
+ MEND
+ SPACE 5
+ MACRO
+ DOINSTR &NUM &NUM = number of sets
+ LCLA &CTR
+&CTR SETA &NUM
+.LOOP ANOP
+.*
+*
+ LM R2,R5,OPSWHERE
+ CUSE R2,R4
+ BC B'0001',*-4
+.*
+&CTR SETA &CTR-1
+ AIF (&CTR GT 0).LOOP
+ MEND
+ EJECT
+***********************************************************************
+* Next, time the overhead...
+***********************************************************************
+ SPACE
+ L R7,NUMLOOPS
+ STCK BEGCLOCK
+ STM R2,R5,SAVE2T5
+ BALR R10,0
+* 100 sets of overhead
+ OVERONLY 2 (first 2)
+ SPACE
+* .........ETC.........
+ SPACE
+ PRINT OFF
+ OVERONLY 96 (3-98)
+ PRINT ON
+ SPACE
+ OVERONLY 2 (last 2)
+ SPACE
+ BCTR R7,R10
+ STCK ENDCLOCK
+ BAL R15,CALCDUR
+ MVC OVERHEAD,DURATION
+ EJECT
+***********************************************************************
+* Now do the actual timing run...
+***********************************************************************
+ SPACE
+ L R7,NUMLOOPS
+ STCK BEGCLOCK
+ BALR R10,0
+* 100 sets of instructions
+ DOINSTR 2 (first 2)
+ SPACE
+* .........ETC.........
+ SPACE
+ PRINT OFF
+ DOINSTR 96 (3-98)
+ PRINT ON
+ SPACE
+ DOINSTR 2 (last 2)
+ SPACE
+ BCTR R7,R10
+ STCK ENDCLOCK
+ SPACE
+ LM R2,R5,SAVE2T5
+ MVC PRTLINE+33(5),=CL5'CUSE'
+ BAL R15,RPTSPEED
+*
+** More performance tests?
+*
+ L R6,SAVER6 Restore perf table base
+ LA R6,CUSENEXT Go on to next table entry
+ CLC =F'0',0(R6) End of table?
+ BNE TST91LOP No, loop...
+ BR R14 Return to caller or FAILTEST
+ EJECT
+***********************************************************************
+* RPTSPEED Report instruction speed
+***********************************************************************
+ SPACE
+RPTSPEED ST R15,RPTSAVE Save return address
+ STM R5,R7,RPTSVR5T7 Save R5-7
+ SPACE
+ BAL R15,CALCDUR Calculate duration
+ SPACE
+ LA R5,OVERHEAD Subtract overhead
+ LA R6,DURATION From raw timing
+ LA R7,DURATION Yielding true instruction timing
+ BAL R15,SUBDWORD Do it
+ SPACE
+ LM R10,R11,DURATION Convert to...
+ SRDL R10,12 ... microseconds
+ SPACE
+ CVD R10,TICKSAAA Convert HIGH part to decimal
+ CVD R11,TICKSBBB Convert LOW part to decimal
+ SPACE
+ ZAP TICKSTOT,TICKSAAA Calculate...
+ MP TICKSTOT,=P'4294967296' ...decimal...
+ AP TICKSTOT,TICKSBBB ...microseconds
+ SPACE
+ MVC PRTLINE+43(L'EDIT),EDIT (edit into...
+ ED PRTLINE+43(L'EDIT),TICKSTOT+3 ...print line)
+ SPACE 3
+*
+* Use Hercules Diagnose for Message to console
+*
+ STM R0,R2,RPTDWSAV Save regs used by MSG
+ LA R0,PRTLNG Message length
+ LA R1,PRTLINE Message address
+ BAL R2,MSG Call Hercules console MSG display
+ LM R0,R2,RPTDWSAV Restore regs
+ SPACE 2
+ LM R5,R7,RPTSVR5T7 Restore R5-7
+ L R15,RPTSAVE Restore return address
+ BR R15 Return to caller
+ SPACE
+RPTSAVE DC F'0' R15 save area
+RPTSVR5T7 DC 3F'0' R5-R7 save area
+ SPACE
+RPTDWSAV DC 2D'0' R0-R2 save area for MSG call
+ EJECT
+***********************************************************************
+* CALCDUR Calculate DURATION
+***********************************************************************
+ SPACE
+CALCDUR ST R15,CALCRET Save return address
+ STM R5,R7,CALCWORK Save work registers
+ SPACE
+ LM R6,R7,BEGCLOCK Remove CPU number from clock value
+ SRDL R6,6 "
+ SLDL R6,6 "
+ STM R6,R7,BEGCLOCK "
+ SPACE
+ LM R6,R7,ENDCLOCK Remove CPU number from clock value
+ SRDL R6,6 "
+ SLDL R6,6 "
+ STM R6,R7,ENDCLOCK "
+ SPACE
+ LA R5,BEGCLOCK Starting time
+ LA R6,ENDCLOCK Ending time
+ LA R7,DURATION Difference
+ BAL R15,SUBDWORD Calculate duration
+ SPACE
+ LM R5,R7,CALCWORK Restore work registers
+ L R15,CALCRET Restore return address
+ BR R15 Return to caller
+ SPACE
+CALCRET DC F'0' R15 save area
+CALCWORK DC 3F'0' R5-R7 save area
+ SPACE 4
+***********************************************************************
+* SUBDWORD Subtract two doublewords
+* R5 --> subtrahend, R6 --> minuend, R7 --> result
+***********************************************************************
+ SPACE
+SUBDWORD STM R1,R4,SUBDWSAV Save registers
+ SPACE
+ LM R1,R2,0(R5) Subtrahend (value to subtract)
+ LM R3,R4,0(R6) Minuend (what to subtract FROM)
+ SLR R4,R2 Subtract LOW part
+ BNM *+4+4 (branch if no borrow)
+ SL R3,=F'1' (otherwise do borrow)
+ SLR R3,R1 Subtract HIGH part
+ STM R3,R4,0(R7) Store results
+ SPACE
+ LM R1,R4,SUBDWSAV Restore registers
+ BR R15 Return to caller
+ SPACE
+SUBDWSAV DC 2D'0' R1-R4 save area
+ EJECT
+***********************************************************************
+* Issue HERCULES MESSAGE pointed to by R1, length in R0
+* R2 = return address
+***********************************************************************
+ SPACE
+MSG CH R0,=H'0' Do we even HAVE a message?
+ BNHR R2 No, ignore
+ SPACE
+ STM R0,R2,MSGSAVE Save registers
+ SPACE
+ CH R0,=AL2(L'MSGMSG) Message length within limits?
+ BNH MSGOK Yes, continue
+ LA R0,L'MSGMSG No, set to maximum
+ SPACE
+MSGOK LR R2,R0 Copy length to work register
+ BCTR R2,0 Minus-1 for execute
+ EX R2,MSGMVC Copy message to O/P buffer
+ SPACE
+ LA R2,1+L'MSGCMD(,R2) Calculate true command length
+ LA R1,MSGCMD Point to true command
+ SPACE
+ DC X'83',X'12',X'0008' Issue Hercules Diagnose X'008'
+ BZ MSGRET Return if successful
+ DC H'0' CRASH for debugging purposes
+ SPACE
+MSGRET LM R0,R2,MSGSAVE Restore registers
+ BR R2 Return to caller
+ SPACE 6
+MSGSAVE DC 3F'0' Registers save area
+MSGMVC MVC MSGMSG(0),0(R1) Executed instruction
+ SPACE 2
+MSGCMD DC C'MSGNOH * ' *** HERCULES MESSAGE COMMAND ***
+MSGMSG DC CL95' ' The message text to be displayed
+ EJECT
+***********************************************************************
+* Normal completion or Abnormal termination PSWs
+***********************************************************************
+ SPACE 2
+EOJPSW DC 0D'0',X'0002000180000000',AD(0)
+ SPACE
+EOJ LPSWE EOJPSW Normal completion
+ SPACE 3
+FAILPSW DC 0D'0',X'0002000180000000',AD(X'BAD')
+ SPACE
+FAILTEST LPSWE FAILPSW Abnormal termination
+ SPACE 4
+***********************************************************************
+* Working Storage
+***********************************************************************
+ SPACE
+ LTORG , Literals pool
+ SPACE 2
+K EQU 1024 One KB
+PAGE EQU (4*K) Size of one page
+K32 EQU (32*K) 32 KB
+K64 EQU (64*K) 64 KB
+MB EQU (K*K) 1 MB
+ SPACE
+NUMLOOPS DC F'10000' 10,000 * 100 = 1,000,000
+ SPACE
+BEGCLOCK DC 0D'0',8X'BB' Begin
+ENDCLOCK DC 0D'0',8X'EE' End
+DURATION DC 0D'0',8X'DD' Diff
+OVERHEAD DC 0D'0',8X'FF' Overhead
+ SPACE
+TICKSAAA DC PL8'0' Clock ticks high part
+TICKSBBB DC PL8'0' Clock ticks low part
+TICKSTOT DC PL8'0' Total clock ticks
+ SPACE
+PRTLINE DC C' 1,000,000 iterations of XXXXX'
+ DC C' took 999,999,999 microseconds'
+PRTLNG EQU *-PRTLINE
+EDIT DC X'402020206B2020206B202120'
+ EJECT
+***********************************************************************
+* CUSETEST DSECT
+***********************************************************************
+ SPACE 2
+CUSETEST DSECT ,
+TNUM DC X'00' CUSE table number
+ DC XL3'00'
+ SPACE 2
+SSLEN DC AL1(0) CUSE - SS length
+PAD DC X'00' CUSE - Pad byte
+SS1LAST DC X'00' First-Operand SS last byte
+SS2LAST DC X'00' Second-Operand SS last byte
+ SPACE 2
+SS1ADDR DC A(0) First-Operand SS Address
+SS1LEN DC A(0) First-Operand SS length
+SS2ADDR DC A(0) Second-Operand SS Address
+SS2LEN DC A(0) Second-Operand SS length
+ SPACE 2
+OPSWHERE EQU *
+OP1WHERE DC A(0) Where Operand-1 data should be placed
+OP1LEN DC F'0' CUSE - First-Operand Length
+OP2WHERE DC A(0) Where Operand-2 data should be placed
+OP2LEN DC F'0' CUSE - Second-Operand Length
+
+ SPACE 2
+FAILMASK DC A(0) Failure Branch on Condition mask
+ SPACE 2
+* Ending register values
+ENDOP1 DC A(0) Operand 1 address
+ DC A(0) Operand 1 length
+ENDOP2 DC A(0) Operand 2 address
+ DC A(0) Operand 2 length
+ SPACE 2
+CUSENEXT EQU * Start of next table entry...
+ SPACE 6
+REG2PATT EQU X'AABBCCDD' Polluted Register pattern
+REG2LOW EQU X'DD' (last byte above)
+ EJECT
+***********************************************************************
+* CUSE Performace Test data...
+***********************************************************************
+ SPACE
+CUSE2TST CSECT ,
+CUSEPERF DC 0A(0) Start of table
+ SPACE 2
+***********************************************************************
+* performance test data
+***********************************************************************
+ SPACE
+* Cross page bounday - operand-1 and operand-2
+ SPACE
+PTE6 DS 0F
+ DC X'E6' Test Num
+ DC XL3'00'
+*
+ DC AL1(1) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(032) Op-1 SS & length
+ DC A(COP2A),A(032) OP-2 SS & length
+* Target
+ DC A(11*MB+(6*K32)-96),A(512) Op-1 & length
+ DC A(12*MB+(6*K32)-128),A(512) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(11*MB+(6*K32)+(512-32)-96),A(032) OP-1
+ DC A(12*MB+(6*K32)+(512-32)-128),A(032) OP-2
+ SPACE 2
+PTE1 DS 0F
+ DC X'E1' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'EE' First-Operand SS last byte
+ DC X'EE' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(004) Op-1 SS & length
+ DC A(COP2A),A(004) OP-2 SS & length
+* Target
+ DC A(11*MB+(1*K32)-63),A(512) Op-1 & length
+ DC A(12*MB+(1*K32)-56),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(11*MB+(1*K32)-63+(512-4)),A(004) OP-1
+ DC A(12*MB+(1*K32)-56+(512-4)),A(004) OP-2
+ SPACE
+PTE2 DS 0F
+ DC X'E2' Test Num
+ DC XL3'00'
+*
+ DC AL1(8) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(008) Op-1 SS & length
+ DC A(COP2A),A(008) OP-2 SS & length
+* Target
+ DC A(11*MB+(2*K32)-96),A(512) Op-1 & length
+ DC A(12*MB+(2*K32)-128),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(11*MB+(2*K32)+(512-8)-96),A(008) OP-1
+ DC A(12*MB+(2*K32)+(512-8)-128),A(008) OP-2
+ SPACE 2
+PTF2 DS 0F
+ DC X'F2' Test Num
+ DC XL3'00'
+*
+ DC AL1(32) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(032) Op-1 SS & length
+ DC A(COP2A),A(032) OP-2 SS & length
+* Target
+ DC A(13*MB+(2*K32)-96),A(512) Op-1 & length
+ DC A(14*MB+(2*K32)-128),A(512) Op-2 & length
+*
+ DC A(7) CC0 Fail mask
+* Ending register values
+ DC A(13*MB+(2*K32)+(512-32)-96),A(032) OP-1
+ DC A(14*MB+(2*K32)+(512-32)-128),A(032) OP-2
+ SPACE 2
+PTE7 DS 0F
+ DC X'E7' Test Num
+ DC XL3'00'
+*
+ DC AL1(4) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1C),A(032) Op-1 SS & length
+ DC A(COP2C),A(032) OP-2 SS & length
+* Target
+ DC A(11*MB+(7*K32)-96),A(512) Op-1 & length
+ DC A(12*MB+(7*K32)-128),A(512) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(11*MB+(7*K32)+(512-32)-96-3),A(032+3) OP-1
+ DC A(12*MB+(7*K32)+(512-32)-128-3),A(032+3) OP-2
+ SPACE 2
+PTF4 DS 0F
+ DC X'F4' Test Num
+ DC XL3'00'
+*
+ DC AL1(32) SS Length
+ DC X'00' Pad Byte
+ DC X'77' First-Operand SS last byte
+ DC X'77' Second-Operand SS last byte
+* Source
+ DC A(COP1A),A(032) Op-1 SS & length
+ DC A(COP2A),A(032) OP-2 SS & length
+* Target
+ DC A(13*MB+(4*K32)-96),A(4096-128) Op-1 & length
+ DC A(14*MB+(4*K32)-128),A(4096-128) Op-2 & length
+*
+ DC A(6) not CC0 or CC3 Fail mask
+* Ending register values
+ DC A(13*MB+(4*K32)+(4096-128-32)-96),A(032) OP-1
+ DC A(14*MB+(4*K32)+(4096-128-32)-128),A(032) OP-2
+ SPACE 3
+ DC A(0) end of table
+ DC A(0) end of table
+ EJECT
+***********************************************************************
+* CUSE Operand-1 scan data...
+***********************************************************************
+ SPACE
+ DS 0F
+ DC 2048XL4'98765432'
+COP1A DC 256XL4'111111F0'
+ SPACE
+ DS 0F
+ DC 2048XL4'98765432'
+COP1B DC 256XL4'40404040'
+ SPACE
+ DS 0F
+ DC 2048XL4'11223344'
+COP1C DC 256XL4'40404040'
+ SPACE 4
+***********************************************************************
+* CUSE Operand-2 scan data
+***********************************************************************
+ SPACE
+ DS 0F
+ DC 2048XL4'89ABCDEF'
+COP2A DC 256XL4'111111F0'
+ SPACE
+ DS 0F
+ DC 2048XL4'89ABCDEF'
+COP2B DC 256XL4'40404040'
+ SPACE
+ DS 0F
+ DC 2048XL4'FF223344'
+COP2C DC 256XL4'40404040'
+ SPACE 4
+***********************************************************************
+* Register equates
+***********************************************************************
+ SPACE 2
+R0 EQU 0
+R1 EQU 1
+R2 EQU 2
+R3 EQU 3
+R4 EQU 4
+R5 EQU 5
+R6 EQU 6
+R7 EQU 7
+R8 EQU 8
+R9 EQU 9
+R10 EQU 10
+R11 EQU 11
+R12 EQU 12
+R13 EQU 13
+R14 EQU 14
+R15 EQU 15
+ SPACE 2
+ END
diff --git a/tests/CUSE-02-performance.core b/tests/CUSE-02-performance.core
new file mode 100644
index 000000000..5fc4c62e7
Binary files /dev/null and b/tests/CUSE-02-performance.core differ
diff --git a/tests/CUSE-02-performance.list b/tests/CUSE-02-performance.list
new file mode 100644
index 000000000..6d4099f62
--- /dev/null
+++ b/tests/CUSE-02-performance.list
@@ -0,0 +1,1054 @@
+ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 1
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 2 ***********************************************************************
+ 3 *
+ 4 * CUSE Performance instruction tests
+ 5 *
+ 6 ***********************************************************************
+ 7 *
+ 8 * This program ONLY tests the performance of the CUSE instructions.
+ 9 *
+ 10 *
+ 11 * ********************
+ 12 * ** IMPORTANT! **
+ 13 * ********************
+ 14 *
+ 15 * This test uses the Hercules Diagnose X'008' interface
+ 16 * to display messages and thus your .tst runtest script
+ 17 * MUST contain a "DIAG8CMD ENABLE" statement within it!
+ 18 *
+ 19 *
+ 20 * NOTE: This test is based on the CLCL-et-al Test but modified to
+ 21 * only test the CUSE instruction. -- James Wekel November 2022
+ 22 *
+ 23 ***********************************************************************
+ 24 *
+ 25 * Example Hercules Testcase:
+ 26 *
+ 27 *
+ 28 * *Testcase CUSE-02-performance (Test CUSE instructions)
+ 29 *
+ 30 * mainsize 16
+ 31 * numcpu 1
+ 32 * sysclear
+ 33 * archlvl z/Arch
+ 34 * loadcore "$(testpath)/CUSE-02-performance.core" 0x0
+ 35 * diag8cmd enable # (needed for messages to Hercules console)
+ 36 * #r 408=ff # (enable timing tests)
+ 37 * runtest 500 # (test duration, depends on host)
+ 38 * diag8cmd disable # (reset back to default)
+ 39 * *Done
+ 40 *
+ 41 *
+ 42 ***********************************************************************
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 2
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 44 ***********************************************************************
+ 45 *
+ 46 * Tests:
+ 47 * Both opernand-1 and operand-2 cross a page boundary.
+ 48 *
+ 49 * 1. CUSE of 512 bytes - substring length 1
+ 50 * 2. CUSE of 512 bytes - substring length 4
+ 51 * 3. CUSE of 512 bytes - substring length 8
+ 52 * 4. CUSE of 512 bytes - substring length 32
+ 53 * 5. CUSE of 512 bytes - substring length 32 (different strings)
+ 54 * 6. CUSE of 4160 (4096+64) bytes - substring length 32
+ 55 * which results in a CC=3, and a branch back
+ 56 * to complete the CUSE instruction.
+ 57 *
+ 58 ***********************************************************************
+
+
+
+ 00000000 0000E9AF 60 CUSE2TST START 0
+00000000 00000000 61 USING CUSE2TST,R0 Low core addressability
+
+
+
+
+00000000 00000000 000001A0 63 ORG CUSE2TST+X'1A0' z/Architecure RESTART PSW
+000001A0 00000001 80000000 64 DC X'0000000180000000'
+000001A8 00000000 00000200 65 DC AD(BEGIN)
+
+
+000001B0 000001B0 000001D0 67 ORG CUSE2TST+X'1D0' z/Architecure PROGRAM CHECK PSW
+000001D0 00020001 80000000 68 DC X'0002000180000000'
+000001D8 00000000 0000DEAD 69 DC AD(X'DEAD')
+
+
+
+
+000001E0 000001E0 00000200 71 ORG CUSE2TST+X'200' Start of actual test program...
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 3
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 73 ***********************************************************************
+ 74 * The actual "CUSE2TST" program itself...
+ 75 ***********************************************************************
+ 76 *
+ 77 * Architecture Mode: z/Arch
+ 78 * Register Usage:
+ 79 *
+ 80 * R0 (work)
+ 81 * R1 (work)
+ 82 * R2 (work) or MSG subroutine call
+ 83 * R3 (work)
+ 84 * R4 (work)
+ 85 * R6 CUSETEST Base (of current test)
+ 86 * R7 (work)
+ 87 * R8 First base register
+ 88 * R9 Second base register
+ 89 * R10-R13 (work)
+ 90 * R14 Subroutine call
+ 91 * R15 Secondary Subroutine call or work
+ 92 *
+ 93 ***********************************************************************
+
+00000200 00000200 95 USING BEGIN,R8 FIRST Base Register
+00000200 00001200 96 USING BEGIN+4096,R9 SECOND Base Register
+
+00000200 0580 98 BEGIN BALR R8,0 Initalize FIRST base register
+00000202 0680 99 BCTR R8,0 Initalize FIRST base register
+00000204 0680 100 BCTR R8,0 Initalize FIRST base register
+
+00000206 4190 8800 00000800 102 LA R9,2048(,R8) Initalize SECOND base register
+0000020A 4190 9800 00000800 103 LA R9,2048(,R9) Initalize SECOND base register
+
+ 105 ***********************************************************************
+ 106 * Run the performance test(s)...
+ 107 ***********************************************************************
+
+0000020E 45E0 8328 00000528 109 BAL R14,TEST91 Time CUSE instruction (speed test)
+
+
+ 111 ***********************************************************************
+ 112 * Test for normal or unexpected test completion...
+ 113 ***********************************************************************
+
+00000212 95FF 8208 00000408 115 CLI TIMEOPT,X'FF' Was this a timing run?
+00000216 4770 8D80 00000F80 116 BNE EOJ No, timing run; just go end normally
+
+0000021A 95F4 8200 00000400 118 CLI TESTNUM,X'F4' Did we end on expected test?
+0000021E 4770 8D98 00000F98 119 BNE FAILTEST No?! Then FAIL the test!
+
+00000222 9599 8201 00000401 121 CLI SUBTEST,X'99' Did we end on expected SUB-test?
+00000226 4770 8D98 00000F98 122 BNE FAILTEST No?! Then FAIL the test!
+
+0000022A 47F0 8D80 00000F80 124 B EOJ Yes, then normal completion!
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 4
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 126 ***********************************************************************
+ 127 * Fixed test storage locations ...
+ 128 ***********************************************************************
+
+
+0000022E 0000022E 00000400 130 ORG CUSE2TST+X'400'
+
+
+
+
+00000400 132 TESTADDR DS 0D Where test/subtest numbers will go
+00000400 99 133 TESTNUM DC X'99' Test number of active test
+00000401 99 134 SUBTEST DC X'99' Active test sub-test number
+
+
+00000408 136 DS 0D
+00000408 00 137 TIMEOPT DC X'00' Set to non-zero to run timing tests
+
+
+00000410 139 DS 0D
+00000410 00000000 00000000 140 SAVE2T5 DC 4F'0'
+00000420 00000000 141 SAVER2 DC F'0'
+00000424 00000000 142 SAVER6 DC F'0'
+
+
+
+
+00000428 00000428 00000528 144 ORG *+X'100'
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 5
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 146 ***********************************************************************
+ 147 * TEST91 Time CUSE instruction (speed test)
+ 148 ***********************************************************************
+
+00000528 91FF 8208 00000408 150 TEST91 TM TIMEOPT,X'FF' Is timing tests option enabled?
+0000052C 078E 151 BZR R14 No, skip timing tests
+
+0000052E 4160 8E40 00001040 153 LA R6,CUSEPERF Point R5 --> testing control table
+00000532 00000000 154 USING CUSETEST,R6 What each table entry looks like
+
+ 00000532 00000001 156 TST91LOP EQU *
+00000532 5060 8224 00000424 157 ST R6,SAVER6 Save current pref table base
+
+00000536 4370 6000 00000000 159 IC R7,TNUM Set test number
+0000053A 4270 8200 00000400 160 STC R7,TESTNUM
+ 161 *
+ 162 ** Initialize operand data (move data to testing address)
+ 163 *
+ 164 * Build Operand-1
+
+0000053E 5820 6018 00000018 166 L R2,OP1WHERE Where to move operand-1 data to
+00000542 5830 601C 0000001C 167 L R3,OP1LEN Get operand-1 length
+00000546 58A0 6008 00000008 168 L R10,SS1ADDR Calculate OP 1 starting
+0000054A 1BA3 169 SR R10,R3 address
+0000054C 5AA0 600C 0000000C 170 A R10,SS1LEN
+00000550 58B0 601C 0000001C 171 L R11,OP1LEN
+00000554 0E2A 172 MVCL R2,R10
+
+00000556 0620 174 BCTR R2,0 less one for last char addr
+00000558 D200 2000 6006 00000000 00000006 175 MVC 0(0,R2),SS1LAST set last char
+
+ 177 * Build Operand-2
+
+0000055E 5840 6020 00000020 179 L R4,OP2WHERE Where to move operand-1 data to
+00000562 5850 6024 00000024 180 L R5,OP2LEN Get operand-1 length
+00000566 58A0 6010 00000010 181 L R10,SS2ADDR Calculate OP 2 starting
+0000056A 1BA5 182 SR R10,R5 address
+0000056C 5AA0 6014 00000014 183 A R10,SS2LEN
+00000570 58B0 6024 00000024 184 L R11,OP2LEN
+00000574 0E4A 185 MVCL R4,R10
+
+00000576 0640 187 BCTR R4,0 less one for last char addr
+00000578 D200 4000 6007 00000000 00000007 188 MVC 0(0,R4),SS2LAST set last char
+
+ 190 * Set Substring length and pad byte
+
+0000057E 4300 6004 00000004 192 IC R0,SSLEN Set SS length
+00000582 4310 6005 00000005 193 IC R1,PAD Set SS Pad byte
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 6
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 195 ***********************************************************************
+ 196 * Define come helpful macros to ensure our counts are correct
+ 197 ***********************************************************************
+
+
+
+
+ 199 MACRO
+ 200 OVERONLY &NUM &NUM = number of sets
+ 201 LCLA &CTR
+ 202 &CTR SETA &NUM
+ 203 .LOOP ANOP
+ 204 .*
+ 205 *
+ 206 LM R2,R5,OPSWHERE
+ 207 BC B'0001',*+4
+ 208 .*
+ 209 &CTR SETA &CTR-1
+ 210 AIF (&CTR GT 0).LOOP
+ 211 MEND
+
+
+
+
+
+ 213 MACRO
+ 214 DOINSTR &NUM &NUM = number of sets
+ 215 LCLA &CTR
+ 216 &CTR SETA &NUM
+ 217 .LOOP ANOP
+ 218 .*
+ 219 *
+ 220 LM R2,R5,OPSWHERE
+ 221 CUSE R2,R4
+ 222 BC B'0001',*-4
+ 223 .*
+ 224 &CTR SETA &CTR-1
+ 225 AIF (&CTR GT 0).LOOP
+ 226 MEND
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 7
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 228 ***********************************************************************
+ 229 * Next, time the overhead...
+ 230 ***********************************************************************
+
+00000586 5870 8DB4 00000FB4 232 L R7,NUMLOOPS
+0000058A B205 8DB8 00000FB8 233 STCK BEGCLOCK
+0000058E 9025 8210 00000410 234 STM R2,R5,SAVE2T5
+00000592 05A0 235 BALR R10,0
+ 236 * 100 sets of overhead
+ 237 OVERONLY 2 (first 2)
+ 238+*
+00000594 9825 6018 00000018 239+ LM R2,R5,OPSWHERE
+00000598 4710 839C 0000059C 240+ BC B'0001',*+4
+ 241+*
+0000059C 9825 6018 00000018 242+ LM R2,R5,OPSWHERE
+000005A0 4710 83A4 000005A4 243+ BC B'0001',*+4
+
+ 245 * .........ETC.........
+
+ 247 PRINT OFF
+ 537 PRINT ON
+
+ 539 OVERONLY 2 (last 2)
+ 540+*
+000008A4 9825 6018 00000018 541+ LM R2,R5,OPSWHERE
+000008A8 4710 86AC 000008AC 542+ BC B'0001',*+4
+ 543+*
+000008AC 9825 6018 00000018 544+ LM R2,R5,OPSWHERE
+000008B0 4710 86B4 000008B4 545+ BC B'0001',*+4
+
+000008B4 067A 547 BCTR R7,R10
+000008B6 B205 8DC0 00000FC0 548 STCK ENDCLOCK
+000008BA 45F0 8C30 00000E30 549 BAL R15,CALCDUR
+000008BE D207 8DD0 8DC8 00000FD0 00000FC8 550 MVC OVERHEAD,DURATION
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 8
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 552 ***********************************************************************
+ 553 * Now do the actual timing run...
+ 554 ***********************************************************************
+
+000008C4 5870 8DB4 00000FB4 556 L R7,NUMLOOPS
+000008C8 B205 8DB8 00000FB8 557 STCK BEGCLOCK
+000008CC 05A0 558 BALR R10,0
+ 559 * 100 sets of instructions
+ 560 DOINSTR 2 (first 2)
+ 561+*
+000008CE 9825 6018 00000018 562+ LM R2,R5,OPSWHERE
+000008D2 B257 0024 563+ CUSE R2,R4
+000008D6 4710 86D2 000008D2 564+ BC B'0001',*-4
+ 565+*
+000008DA 9825 6018 00000018 566+ LM R2,R5,OPSWHERE
+000008DE B257 0024 567+ CUSE R2,R4
+000008E2 4710 86DE 000008DE 568+ BC B'0001',*-4
+
+ 570 * .........ETC.........
+
+ 572 PRINT OFF
+ 958 PRINT ON
+
+ 960 DOINSTR 2 (last 2)
+ 961+*
+00000D66 9825 6018 00000018 962+ LM R2,R5,OPSWHERE
+00000D6A B257 0024 963+ CUSE R2,R4
+00000D6E 4710 8B6A 00000D6A 964+ BC B'0001',*-4
+ 965+*
+00000D72 9825 6018 00000018 966+ LM R2,R5,OPSWHERE
+00000D76 B257 0024 967+ CUSE R2,R4
+00000D7A 4710 8B76 00000D76 968+ BC B'0001',*-4
+
+00000D7E 067A 970 BCTR R7,R10
+00000D80 B205 8DC0 00000FC0 971 STCK ENDCLOCK
+
+00000D84 9825 8210 00000410 973 LM R2,R5,SAVE2T5
+00000D88 D204 8E11 8DA8 00001011 00000FA8 974 MVC PRTLINE+33(5),=CL5'CUSE'
+00000D8E 45F0 8BA6 00000DA6 975 BAL R15,RPTSPEED
+ 976 *
+ 977 ** More performance tests?
+ 978 *
+00000D92 5860 8224 00000424 979 L R6,SAVER6 Restore perf table base
+00000D96 4160 603C 0000003C 980 LA R6,CUSENEXT Go on to next table entry
+00000D9A D503 8D9C 6000 00000F9C 00000000 981 CLC =F'0',0(R6) End of table?
+00000DA0 4770 8332 00000532 982 BNE TST91LOP No, loop...
+00000DA4 07FE 983 BR R14 Return to caller or FAILTEST
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 9
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 985 ***********************************************************************
+ 986 * RPTSPEED Report instruction speed
+ 987 ***********************************************************************
+
+00000DA6 50F0 8C10 00000E10 989 RPTSPEED ST R15,RPTSAVE Save return address
+00000DAA 9057 8C14 00000E14 990 STM R5,R7,RPTSVR5T7 Save R5-7
+
+00000DAE 45F0 8C30 00000E30 992 BAL R15,CALCDUR Calculate duration
+
+00000DB2 4150 8DD0 00000FD0 994 LA R5,OVERHEAD Subtract overhead
+00000DB6 4160 8DC8 00000FC8 995 LA R6,DURATION From raw timing
+00000DBA 4170 8DC8 00000FC8 996 LA R7,DURATION Yielding true instruction timing
+00000DBE 45F0 8C84 00000E84 997 BAL R15,SUBDWORD Do it
+
+00000DC2 98AB 8DC8 00000FC8 999 LM R10,R11,DURATION Convert to...
+00000DC6 8CA0 000C 0000000C 1000 SRDL R10,12 ... microseconds
+
+00000DCA 4EA0 8DD8 00000FD8 1002 CVD R10,TICKSAAA Convert HIGH part to decimal
+00000DCE 4EB0 8DE0 00000FE0 1003 CVD R11,TICKSBBB Convert LOW part to decimal
+
+00000DD2 F877 8DE8 8DD8 00000FE8 00000FD8 1005 ZAP TICKSTOT,TICKSAAA Calculate...
+00000DD8 FC75 8DE8 8DAD 00000FE8 00000FAD 1006 MP TICKSTOT,=P'4294967296' ...decimal...
+00000DDE FA77 8DE8 8DE0 00000FE8 00000FE0 1007 AP TICKSTOT,TICKSBBB ...microseconds
+
+00000DE4 D20B 8E1B 8E34 0000101B 00001034 1009 MVC PRTLINE+43(L'EDIT),EDIT (edit into...
+00000DEA DE0B 8E1B 8DEB 0000101B 00000FEB 1010 ED PRTLINE+43(L'EDIT),TICKSTOT+3 ...print line)
+
+
+
+ 1012 *
+ 1013 * Use Hercules Diagnose for Message to console
+ 1014 *
+00000DF0 9002 8C20 00000E20 1015 STM R0,R2,RPTDWSAV Save regs used by MSG
+00000DF4 4100 0044 00000044 1016 LA R0,PRTLNG Message length
+00000DF8 4110 8DF0 00000FF0 1017 LA R1,PRTLINE Message address
+00000DFC 4520 8CB8 00000EB8 1018 BAL R2,MSG Call Hercules console MSG display
+00000E00 9802 8C20 00000E20 1019 LM R0,R2,RPTDWSAV Restore regs
+
+
+00000E04 9857 8C14 00000E14 1021 LM R5,R7,RPTSVR5T7 Restore R5-7
+00000E08 58F0 8C10 00000E10 1022 L R15,RPTSAVE Restore return address
+00000E0C 07FF 1023 BR R15 Return to caller
+
+00000E10 00000000 1025 RPTSAVE DC F'0' R15 save area
+00000E14 00000000 00000000 1026 RPTSVR5T7 DC 3F'0' R5-R7 save area
+
+00000E20 00000000 00000000 1028 RPTDWSAV DC 2D'0' R0-R2 save area for MSG call
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 10
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1030 ***********************************************************************
+ 1031 * CALCDUR Calculate DURATION
+ 1032 ***********************************************************************
+
+00000E30 50F0 8C74 00000E74 1034 CALCDUR ST R15,CALCRET Save return address
+00000E34 9057 8C78 00000E78 1035 STM R5,R7,CALCWORK Save work registers
+
+00000E38 9867 8DB8 00000FB8 1037 LM R6,R7,BEGCLOCK Remove CPU number from clock value
+00000E3C 8C60 0006 00000006 1038 SRDL R6,6 "
+00000E40 8D60 0006 00000006 1039 SLDL R6,6 "
+00000E44 9067 8DB8 00000FB8 1040 STM R6,R7,BEGCLOCK "
+
+00000E48 9867 8DC0 00000FC0 1042 LM R6,R7,ENDCLOCK Remove CPU number from clock value
+00000E4C 8C60 0006 00000006 1043 SRDL R6,6 "
+00000E50 8D60 0006 00000006 1044 SLDL R6,6 "
+00000E54 9067 8DC0 00000FC0 1045 STM R6,R7,ENDCLOCK "
+
+00000E58 4150 8DB8 00000FB8 1047 LA R5,BEGCLOCK Starting time
+00000E5C 4160 8DC0 00000FC0 1048 LA R6,ENDCLOCK Ending time
+00000E60 4170 8DC8 00000FC8 1049 LA R7,DURATION Difference
+00000E64 45F0 8C84 00000E84 1050 BAL R15,SUBDWORD Calculate duration
+
+00000E68 9857 8C78 00000E78 1052 LM R5,R7,CALCWORK Restore work registers
+00000E6C 58F0 8C74 00000E74 1053 L R15,CALCRET Restore return address
+00000E70 07FF 1054 BR R15 Return to caller
+
+00000E74 00000000 1056 CALCRET DC F'0' R15 save area
+00000E78 00000000 00000000 1057 CALCWORK DC 3F'0' R5-R7 save area
+
+
+
+
+ 1059 ***********************************************************************
+ 1060 * SUBDWORD Subtract two doublewords
+ 1061 * R5 --> subtrahend, R6 --> minuend, R7 --> result
+ 1062 ***********************************************************************
+
+00000E84 9014 8CA8 00000EA8 1064 SUBDWORD STM R1,R4,SUBDWSAV Save registers
+
+00000E88 9812 5000 00000000 1066 LM R1,R2,0(R5) Subtrahend (value to subtract)
+00000E8C 9834 6000 00000000 1067 LM R3,R4,0(R6) Minuend (what to subtract FROM)
+00000E90 1F42 1068 SLR R4,R2 Subtract LOW part
+00000E92 47B0 8C9A 00000E9A 1069 BNM *+4+4 (branch if no borrow)
+00000E96 5F30 8DA0 00000FA0 1070 SL R3,=F'1' (otherwise do borrow)
+00000E9A 1F31 1071 SLR R3,R1 Subtract HIGH part
+00000E9C 9034 7000 00000000 1072 STM R3,R4,0(R7) Store results
+
+00000EA0 9814 8CA8 00000EA8 1074 LM R1,R4,SUBDWSAV Restore registers
+00000EA4 07FF 1075 BR R15 Return to caller
+
+00000EA8 00000000 00000000 1077 SUBDWSAV DC 2D'0' R1-R4 save area
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 11
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1079 ***********************************************************************
+ 1080 * Issue HERCULES MESSAGE pointed to by R1, length in R0
+ 1081 * R2 = return address
+ 1082 ***********************************************************************
+
+00000EB8 4900 8DA4 00000FA4 1084 MSG CH R0,=H'0' Do we even HAVE a message?
+00000EBC 07D2 1085 BNHR R2 No, ignore
+
+00000EBE 9002 8CF0 00000EF0 1087 STM R0,R2,MSGSAVE Save registers
+
+00000EC2 4900 8DA6 00000FA6 1089 CH R0,=AL2(L'MSGMSG) Message length within limits?
+00000EC6 47D0 8CCE 00000ECE 1090 BNH MSGOK Yes, continue
+00000ECA 4100 005F 0000005F 1091 LA R0,L'MSGMSG No, set to maximum
+
+00000ECE 1820 1093 MSGOK LR R2,R0 Copy length to work register
+00000ED0 0620 1094 BCTR R2,0 Minus-1 for execute
+00000ED2 4420 8CFC 00000EFC 1095 EX R2,MSGMVC Copy message to O/P buffer
+
+00000ED6 4120 200A 0000000A 1097 LA R2,1+L'MSGCMD(,R2) Calculate true command length
+00000EDA 4110 8D02 00000F02 1098 LA R1,MSGCMD Point to true command
+
+00000EDE 83120008 1100 DC X'83',X'12',X'0008' Issue Hercules Diagnose X'008'
+00000EE2 4780 8CE8 00000EE8 1101 BZ MSGRET Return if successful
+00000EE6 0000 1102 DC H'0' CRASH for debugging purposes
+
+00000EE8 9802 8CF0 00000EF0 1104 MSGRET LM R0,R2,MSGSAVE Restore registers
+00000EEC 07F2 1105 BR R2 Return to caller
+
+
+
+
+
+
+00000EF0 00000000 00000000 1107 MSGSAVE DC 3F'0' Registers save area
+00000EFC D200 8D0B 1000 00000F0B 00000000 1108 MSGMVC MVC MSGMSG(0),0(R1) Executed instruction
+
+
+00000F02 D4E2C7D5 D6C8405C 1110 MSGCMD DC C'MSGNOH * ' *** HERCULES MESSAGE COMMAND ***
+00000F0B 40404040 40404040 1111 MSGMSG DC CL95' ' The message text to be displayed
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 12
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1113 ***********************************************************************
+ 1114 * Normal completion or Abnormal termination PSWs
+ 1115 ***********************************************************************
+
+
+00000F70 00020001 80000000 1117 EOJPSW DC 0D'0',X'0002000180000000',AD(0)
+
+00000F80 B2B2 8D70 00000F70 1119 EOJ LPSWE EOJPSW Normal completion
+
+
+
+00000F88 00020001 80000000 1121 FAILPSW DC 0D'0',X'0002000180000000',AD(X'BAD')
+
+00000F98 B2B2 8D88 00000F88 1123 FAILTEST LPSWE FAILPSW Abnormal termination
+
+
+
+
+ 1125 ***********************************************************************
+ 1126 * Working Storage
+ 1127 ***********************************************************************
+
+00000F9C 1129 LTORG , Literals pool
+00000F9C 00000000 1130 =F'0'
+00000FA0 00000001 1131 =F'1'
+00000FA4 0000 1132 =H'0'
+00000FA6 005F 1133 =AL2(L'MSGMSG)
+00000FA8 C3E4E2C5 40 1134 =CL5'CUSE'
+00000FAD 04294967 296C 1135 =P'4294967296'
+
+
+ 00000400 00000001 1137 K EQU 1024 One KB
+ 00001000 00000001 1138 PAGE EQU (4*K) Size of one page
+ 00008000 00000001 1139 K32 EQU (32*K) 32 KB
+ 00010000 00000001 1140 K64 EQU (64*K) 64 KB
+ 00100000 00000001 1141 MB EQU (K*K) 1 MB
+
+00000FB4 00002710 1143 NUMLOOPS DC F'10000' 10,000 * 100 = 1,000,000
+
+00000FB8 BBBBBBBB BBBBBBBB 1145 BEGCLOCK DC 0D'0',8X'BB' Begin
+00000FC0 EEEEEEEE EEEEEEEE 1146 ENDCLOCK DC 0D'0',8X'EE' End
+00000FC8 DDDDDDDD DDDDDDDD 1147 DURATION DC 0D'0',8X'DD' Diff
+00000FD0 FFFFFFFF FFFFFFFF 1148 OVERHEAD DC 0D'0',8X'FF' Overhead
+
+00000FD8 00000000 0000000C 1150 TICKSAAA DC PL8'0' Clock ticks high part
+00000FE0 00000000 0000000C 1151 TICKSBBB DC PL8'0' Clock ticks low part
+00000FE8 00000000 0000000C 1152 TICKSTOT DC PL8'0' Total clock ticks
+
+00000FF0 40404040 40404040 1154 PRTLINE DC C' 1,000,000 iterations of XXXXX'
+00001016 40A39696 9240F9F9 1155 DC C' took 999,999,999 microseconds'
+ 00000044 00000001 1156 PRTLNG EQU *-PRTLINE
+00001034 40202020 6B202020 1157 EDIT DC X'402020206B2020206B202120'
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 13
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1159 ***********************************************************************
+ 1160 * CUSETEST DSECT
+ 1161 ***********************************************************************
+
+
+ 1163 CUSETEST DSECT ,
+00000000 00 1164 TNUM DC X'00' CUSE table number
+00000001 000000 1165 DC XL3'00'
+
+
+00000004 00 1167 SSLEN DC AL1(0) CUSE - SS length
+00000005 00 1168 PAD DC X'00' CUSE - Pad byte
+00000006 00 1169 SS1LAST DC X'00' First-Operand SS last byte
+00000007 00 1170 SS2LAST DC X'00' Second-Operand SS last byte
+
+
+00000008 00000000 1172 SS1ADDR DC A(0) First-Operand SS Address
+0000000C 00000000 1173 SS1LEN DC A(0) First-Operand SS length
+00000010 00000000 1174 SS2ADDR DC A(0) Second-Operand SS Address
+00000014 00000000 1175 SS2LEN DC A(0) Second-Operand SS length
+
+
+ 00000018 00000001 1177 OPSWHERE EQU *
+00000018 00000000 1178 OP1WHERE DC A(0) Where Operand-1 data should be placed
+0000001C 00000000 1179 OP1LEN DC F'0' CUSE - First-Operand Length
+00000020 00000000 1180 OP2WHERE DC A(0) Where Operand-2 data should be placed
+00000024 00000000 1181 OP2LEN DC F'0' CUSE - Second-Operand Length
+ 1182
+
+
+00000028 00000000 1184 FAILMASK DC A(0) Failure Branch on Condition mask
+
+
+ 1186 * Ending register values
+0000002C 00000000 1187 ENDOP1 DC A(0) Operand 1 address
+00000030 00000000 1188 DC A(0) Operand 1 length
+00000034 00000000 1189 ENDOP2 DC A(0) Operand 2 address
+00000038 00000000 1190 DC A(0) Operand 2 length
+
+
+ 0000003C 00000001 1192 CUSENEXT EQU * Start of next table entry...
+
+
+
+
+
+
+ AABBCCDD 00000001 1194 REG2PATT EQU X'AABBCCDD' Polluted Register pattern
+ 000000DD 00000001 1195 REG2LOW EQU X'DD' (last byte above)
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 14
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1197 ***********************************************************************
+ 1198 * CUSE Performace Test data...
+ 1199 ***********************************************************************
+
+ 00000000 0000E9AF 1201 CUSE2TST CSECT ,
+00001040 1202 CUSEPERF DC 0A(0) Start of table
+
+
+ 1204 ***********************************************************************
+ 1205 * performance test data
+ 1206 ***********************************************************************
+
+ 1208 * Cross page bounday - operand-1 and operand-2
+
+00001040 1210 PTE6 DS 0F
+00001040 E6 1211 DC X'E6' Test Num
+00001041 000000 1212 DC XL3'00'
+ 1213 *
+00001044 01 1214 DC AL1(1) SS Length
+00001045 00 1215 DC X'00' Pad Byte
+00001046 77 1216 DC X'77' First-Operand SS last byte
+00001047 77 1217 DC X'77' Second-Operand SS last byte
+ 1218 * Source
+00001048 000031B0 00000020 1219 DC A(COP1A),A(032) Op-1 SS & length
+00001050 00009DB0 00000020 1220 DC A(COP2A),A(032) OP-2 SS & length
+ 1221 * Target
+00001058 00B2FFA0 00000200 1222 DC A(11*MB+(6*K32)-96),A(512) Op-1 & length
+00001060 00C2FF80 00000200 1223 DC A(12*MB+(6*K32)-128),A(512) Op-2 & length
+ 1224 *
+00001068 00000006 1225 DC A(6) not CC0 or CC3 Fail mask
+ 1226 * Ending register values
+0000106C 00B30180 00000020 1227 DC A(11*MB+(6*K32)+(512-32)-96),A(032) OP-1
+00001074 00C30160 00000020 1228 DC A(12*MB+(6*K32)+(512-32)-128),A(032) OP-2
+
+
+0000107C 1230 PTE1 DS 0F
+0000107C E1 1231 DC X'E1' Test Num
+0000107D 000000 1232 DC XL3'00'
+ 1233 *
+00001080 04 1234 DC AL1(4) SS Length
+00001081 00 1235 DC X'00' Pad Byte
+00001082 EE 1236 DC X'EE' First-Operand SS last byte
+00001083 EE 1237 DC X'EE' Second-Operand SS last byte
+ 1238 * Source
+00001084 000031B0 00000004 1239 DC A(COP1A),A(004) Op-1 SS & length
+0000108C 00009DB0 00000004 1240 DC A(COP2A),A(004) OP-2 SS & length
+ 1241 * Target
+00001094 00B07FC1 00000200 1242 DC A(11*MB+(1*K32)-63),A(512) Op-1 & length
+0000109C 00C07FC8 00000200 1243 DC A(12*MB+(1*K32)-56),A(512) Op-2 & length
+ 1244 *
+000010A4 00000007 1245 DC A(7) CC0 Fail mask
+ 1246 * Ending register values
+000010A8 00B081BD 00000004 1247 DC A(11*MB+(1*K32)-63+(512-4)),A(004) OP-1
+000010B0 00C081C4 00000004 1248 DC A(12*MB+(1*K32)-56+(512-4)),A(004) OP-2
+
+000010B8 1250 PTE2 DS 0F
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 15
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+000010B8 E2 1251 DC X'E2' Test Num
+000010B9 000000 1252 DC XL3'00'
+ 1253 *
+000010BC 08 1254 DC AL1(8) SS Length
+000010BD 00 1255 DC X'00' Pad Byte
+000010BE 77 1256 DC X'77' First-Operand SS last byte
+000010BF 77 1257 DC X'77' Second-Operand SS last byte
+ 1258 * Source
+000010C0 000031B0 00000008 1259 DC A(COP1A),A(008) Op-1 SS & length
+000010C8 00009DB0 00000008 1260 DC A(COP2A),A(008) OP-2 SS & length
+ 1261 * Target
+000010D0 00B0FFA0 00000200 1262 DC A(11*MB+(2*K32)-96),A(512) Op-1 & length
+000010D8 00C0FF80 00000200 1263 DC A(12*MB+(2*K32)-128),A(512) Op-2 & length
+ 1264 *
+000010E0 00000007 1265 DC A(7) CC0 Fail mask
+ 1266 * Ending register values
+000010E4 00B10198 00000008 1267 DC A(11*MB+(2*K32)+(512-8)-96),A(008) OP-1
+000010EC 00C10178 00000008 1268 DC A(12*MB+(2*K32)+(512-8)-128),A(008) OP-2
+
+
+000010F4 1270 PTF2 DS 0F
+000010F4 F2 1271 DC X'F2' Test Num
+000010F5 000000 1272 DC XL3'00'
+ 1273 *
+000010F8 20 1274 DC AL1(32) SS Length
+000010F9 00 1275 DC X'00' Pad Byte
+000010FA 77 1276 DC X'77' First-Operand SS last byte
+000010FB 77 1277 DC X'77' Second-Operand SS last byte
+ 1278 * Source
+000010FC 000031B0 00000020 1279 DC A(COP1A),A(032) Op-1 SS & length
+00001104 00009DB0 00000020 1280 DC A(COP2A),A(032) OP-2 SS & length
+ 1281 * Target
+0000110C 00D0FFA0 00000200 1282 DC A(13*MB+(2*K32)-96),A(512) Op-1 & length
+00001114 00E0FF80 00000200 1283 DC A(14*MB+(2*K32)-128),A(512) Op-2 & length
+ 1284 *
+0000111C 00000007 1285 DC A(7) CC0 Fail mask
+ 1286 * Ending register values
+00001120 00D10180 00000020 1287 DC A(13*MB+(2*K32)+(512-32)-96),A(032) OP-1
+00001128 00E10160 00000020 1288 DC A(14*MB+(2*K32)+(512-32)-128),A(032) OP-2
+
+
+00001130 1290 PTE7 DS 0F
+00001130 E7 1291 DC X'E7' Test Num
+00001131 000000 1292 DC XL3'00'
+ 1293 *
+00001134 04 1294 DC AL1(4) SS Length
+00001135 00 1295 DC X'00' Pad Byte
+00001136 77 1296 DC X'77' First-Operand SS last byte
+00001137 77 1297 DC X'77' Second-Operand SS last byte
+ 1298 * Source
+00001138 000079B0 00000020 1299 DC A(COP1C),A(032) Op-1 SS & length
+00001140 0000E5B0 00000020 1300 DC A(COP2C),A(032) OP-2 SS & length
+ 1301 * Target
+00001148 00B37FA0 00000200 1302 DC A(11*MB+(7*K32)-96),A(512) Op-1 & length
+00001150 00C37F80 00000200 1303 DC A(12*MB+(7*K32)-128),A(512) Op-2 & length
+ 1304 *
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 16
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+00001158 00000006 1305 DC A(6) not CC0 or CC3 Fail mask
+ 1306 * Ending register values
+0000115C 00B3817D 00000023 1307 DC A(11*MB+(7*K32)+(512-32)-96-3),A(032+3) OP-1
+00001164 00C3815D 00000023 1308 DC A(12*MB+(7*K32)+(512-32)-128-3),A(032+3) OP-2
+
+
+0000116C 1310 PTF4 DS 0F
+0000116C F4 1311 DC X'F4' Test Num
+0000116D 000000 1312 DC XL3'00'
+ 1313 *
+00001170 20 1314 DC AL1(32) SS Length
+00001171 00 1315 DC X'00' Pad Byte
+00001172 77 1316 DC X'77' First-Operand SS last byte
+00001173 77 1317 DC X'77' Second-Operand SS last byte
+ 1318 * Source
+00001174 000031B0 00000020 1319 DC A(COP1A),A(032) Op-1 SS & length
+0000117C 00009DB0 00000020 1320 DC A(COP2A),A(032) OP-2 SS & length
+ 1321 * Target
+00001184 00D1FFA0 00000F80 1322 DC A(13*MB+(4*K32)-96),A(4096-128) Op-1 & length
+0000118C 00E1FF80 00000F80 1323 DC A(14*MB+(4*K32)-128),A(4096-128) Op-2 & length
+ 1324 *
+00001194 00000006 1325 DC A(6) not CC0 or CC3 Fail mask
+ 1326 * Ending register values
+00001198 00D20F00 00000020 1327 DC A(13*MB+(4*K32)+(4096-128-32)-96),A(032) OP-1
+000011A0 00E20EE0 00000020 1328 DC A(14*MB+(4*K32)+(4096-128-32)-128),A(032) OP-2
+
+
+
+000011A8 00000000 1330 DC A(0) end of table
+000011AC 00000000 1331 DC A(0) end of table
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 17
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 1333 ***********************************************************************
+ 1334 * CUSE Operand-1 scan data...
+ 1335 ***********************************************************************
+
+000011B0 1337 DS 0F
+000011B0 98765432 98765432 1338 DC 2048XL4'98765432'
+000031B0 111111F0 111111F0 1339 COP1A DC 256XL4'111111F0'
+
+000035B0 1341 DS 0F
+000035B0 98765432 98765432 1342 DC 2048XL4'98765432'
+000055B0 40404040 40404040 1343 COP1B DC 256XL4'40404040'
+
+000059B0 1345 DS 0F
+000059B0 11223344 11223344 1346 DC 2048XL4'11223344'
+000079B0 40404040 40404040 1347 COP1C DC 256XL4'40404040'
+
+
+
+
+ 1349 ***********************************************************************
+ 1350 * CUSE Operand-2 scan data
+ 1351 ***********************************************************************
+
+00007DB0 1353 DS 0F
+00007DB0 89ABCDEF 89ABCDEF 1354 DC 2048XL4'89ABCDEF'
+00009DB0 111111F0 111111F0 1355 COP2A DC 256XL4'111111F0'
+
+0000A1B0 1357 DS 0F
+0000A1B0 89ABCDEF 89ABCDEF 1358 DC 2048XL4'89ABCDEF'
+0000C1B0 40404040 40404040 1359 COP2B DC 256XL4'40404040'
+
+0000C5B0 1361 DS 0F
+0000C5B0 FF223344 FF223344 1362 DC 2048XL4'FF223344'
+0000E5B0 40404040 40404040 1363 COP2C DC 256XL4'40404040'
+
+
+
+
+ 1365 ***********************************************************************
+ 1366 * Register equates
+ 1367 ***********************************************************************
+
+
+ 00000000 00000001 1369 R0 EQU 0
+ 00000001 00000001 1370 R1 EQU 1
+ 00000002 00000001 1371 R2 EQU 2
+ 00000003 00000001 1372 R3 EQU 3
+ 00000004 00000001 1373 R4 EQU 4
+ 00000005 00000001 1374 R5 EQU 5
+ 00000006 00000001 1375 R6 EQU 6
+ 00000007 00000001 1376 R7 EQU 7
+ 00000008 00000001 1377 R8 EQU 8
+ 00000009 00000001 1378 R9 EQU 9
+ 0000000A 00000001 1379 R10 EQU 10
+ 0000000B 00000001 1380 R11 EQU 11
+ 0000000C 00000001 1381 R12 EQU 12
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 18
+
+ LOC OBJECT CODE ADDR1 ADDR2 STMT
+
+ 0000000D 00000001 1382 R13 EQU 13
+ 0000000E 00000001 1383 R14 EQU 14
+ 0000000F 00000001 1384 R15 EQU 15
+
+
+ 1386 END
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 19
+
+ SYMBOL TYPE VALUE LENGTH DEFN REFERENCES
+
+BEGCLOCK D 00000FB8 8 1145 233 557 1037 1040 1047
+BEGIN I 00000200 2 98 65 95 96
+CALCDUR I 00000E30 4 1034 549 992
+CALCRET F 00000E74 4 1056 1034 1053
+CALCWORK F 00000E78 4 1057 1035 1052
+COP1A X 000031B0 4 1339 1219 1239 1259 1279 1319
+COP1B X 000055B0 4 1343
+COP1C X 000079B0 4 1347 1299
+COP2A X 00009DB0 4 1355 1220 1240 1260 1280 1320
+COP2B X 0000C1B0 4 1359
+COP2C X 0000E5B0 4 1363 1300
+CUSE2TST J 00000000 59824 60 63 67 71 130 61
+CUSENEXT U 0000003C 1 1192 980
+CUSEPERF A 00001040 4 1202 153
+CUSETEST 4 00000000 60 1163 154
+DURATION D 00000FC8 8 1147 550 995 996 999 1049
+EDIT X 00001034 12 1157 1009 1010
+ENDCLOCK D 00000FC0 8 1146 548 971 1042 1045 1048
+ENDOP1 A 0000002C 4 1187
+ENDOP2 A 00000034 4 1189
+EOJ I 00000F80 4 1119 116 124
+EOJPSW D 00000F70 8 1117 1119
+FAILMASK A 00000028 4 1184
+FAILPSW D 00000F88 8 1121 1123
+FAILTEST I 00000F98 4 1123 119 122
+IMAGE 1 00000000 59824 0
+K U 00000400 1 1137 1138 1139 1140 1141
+K32 U 00008000 1 1139 1222 1223 1227 1228 1242 1243 1247 1248 1262 1263 1267 1268 1282
+ 1283 1287 1288 1302 1303 1307 1308 1322 1323 1327 1328
+K64 U 00010000 1 1140
+MB U 00100000 1 1141 1222 1223 1227 1228 1242 1243 1247 1248 1262 1263 1267 1268 1282
+ 1283 1287 1288 1302 1303 1307 1308 1322 1323 1327 1328
+MSG I 00000EB8 4 1084 1018
+MSGCMD C 00000F02 9 1110 1097 1098
+MSGMSG C 00000F0B 95 1111 1091 1108 1089
+MSGMVC I 00000EFC 6 1108 1095
+MSGOK I 00000ECE 2 1093 1090
+MSGRET I 00000EE8 4 1104 1101
+MSGSAVE F 00000EF0 4 1107 1087 1104
+NUMLOOPS F 00000FB4 4 1143 232 556
+OP1LEN F 0000001C 4 1179 167 171
+OP1WHERE A 00000018 4 1178 166
+OP2LEN F 00000024 4 1181 180 184
+OP2WHERE A 00000020 4 1180 179
+OPSWHERE U 00000018 1 1177 239 242 250 253 256 259 262 265 268 271 274 277 280
+ 283 286 289 292 295 298 301 304 307 310 313 316 319
+ 322 325 328 331 334 337 340 343 346 349 352 355 358
+ 361 364 367 370 373 376 379 382 385 388 391 394 397
+ 400 403 406 409 412 415 418 421 424 427 430 433 436
+ 439 442 445 448 451 454 457 460 463 466 469 472 475
+ 478 481 484 487 490 493 496 499 502 505 508 511 514
+ 517 520 523 526 529 532 535 541 544 562 566 575 579
+ 583 587 591 595 599 603 607 611 615 619 623 627 631
+ 635 639 643 647 651 655 659 663 667 671 675 679 683
+ 687 691 695 699 703 707 711 715 719 723 727 731 735
+ 739 743 747 751 755 759 763 767 771 775 779 783 787
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 20
+
+ SYMBOL TYPE VALUE LENGTH DEFN REFERENCES
+
+ 791 795 799 803 807 811 815 819 823 827 831 835 839
+ 843 847 851 855 859 863 867 871 875 879 883 887 891
+ 895 899 903 907 911 915 919 923 927 931 935 939 943
+ 947 951 955 962 966
+OVERHEAD D 00000FD0 8 1148 550 994
+PAD X 00000005 1 1168 193
+PAGE U 00001000 1 1138
+PRTLINE C 00000FF0 38 1154 1156 974 1009 1010 1017
+PRTLNG U 00000044 1 1156 1016
+PTE1 F 0000107C 4 1230
+PTE2 F 000010B8 4 1250
+PTE6 F 00001040 4 1210
+PTE7 F 00001130 4 1290
+PTF2 F 000010F4 4 1270
+PTF4 F 0000116C 4 1310
+R0 U 00000000 1 1369 61 192 1015 1016 1019 1084 1087 1089 1091 1093 1104
+R1 U 00000001 1 1370 193 1017 1064 1066 1071 1074 1098 1108
+R10 U 0000000A 1 1379 168 169 170 172 181 182 183 185 235 547 558 970 999
+ 1000 1002
+R11 U 0000000B 1 1380 171 184 999 1003
+R12 U 0000000C 1 1381
+R13 U 0000000D 1 1382
+R14 U 0000000E 1 1383 109 151 983
+R15 U 0000000F 1 1384 549 975 989 992 997 1022 1023 1034 1050 1053 1054 1075
+R2 U 00000002 1 1371 166 172 174 175 234 239 242 250 253 256 259 262 265
+ 268 271 274 277 280 283 286 289 292 295 298 301 304
+ 307 310 313 316 319 322 325 328 331 334 337 340 343
+ 346 349 352 355 358 361 364 367 370 373 376 379 382
+ 385 388 391 394 397 400 403 406 409 412 415 418 421
+ 424 427 430 433 436 439 442 445 448 451 454 457 460
+ 463 466 469 472 475 478 481 484 487 490 493 496 499
+ 502 505 508 511 514 517 520 523 526 529 532 535 541
+ 544 562 563 566 567 575 576 579 580 583 584 587 588
+ 591 592 595 596 599 600 603 604 607 608 611 612 615
+ 616 619 620 623 624 627 628 631 632 635 636 639 640
+ 643 644 647 648 651 652 655 656 659 660 663 664 667
+ 668 671 672 675 676 679 680 683 684 687 688 691 692
+ 695 696 699 700 703 704 707 708 711 712 715 716 719
+ 720 723 724 727 728 731 732 735 736 739 740 743 744
+ 747 748 751 752 755 756 759 760 763 764 767 768 771
+ 772 775 776 779 780 783 784 787 788 791 792 795 796
+ 799 800 803 804 807 808 811 812 815 816 819 820 823
+ 824 827 828 831 832 835 836 839 840 843 844 847 848
+ 851 852 855 856 859 860 863 864 867 868 871 872 875
+ 876 879 880 883 884 887 888 891 892 895 896 899 900
+ 903 904 907 908 911 912 915 916 919 920 923 924 927
+ 928 931 932 935 936 939 940 943 944 947 948 951 952
+ 955 956 962 963 966 967 973 1015 1018 1019 1066 1068 1085
+ 1087 1093 1094 1095 1097 1104 1105
+R3 U 00000003 1 1372 167 169 1067 1070 1071 1072
+R4 U 00000004 1 1373 179 185 187 188 563 567 576 580 584 588 592 596 600
+ 604 608 612 616 620 624 628 632 636 640 644 648 652
+ 656 660 664 668 672 676 680 684 688 692 696 700 704
+ 708 712 716 720 724 728 732 736 740 744 748 752 756
+ 760 764 768 772 776 780 784 788 792 796 800 804 808
+ 812 816 820 824 828 832 836 840 844 848 852 856 860
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 21
+
+ SYMBOL TYPE VALUE LENGTH DEFN REFERENCES
+
+ 864 868 872 876 880 884 888 892 896 900 904 908 912
+ 916 920 924 928 932 936 940 944 948 952 956 963 967
+ 1064 1067 1068 1072 1074
+R5 U 00000005 1 1374 180 182 234 239 242 250 253 256 259 262 265 268 271
+ 274 277 280 283 286 289 292 295 298 301 304 307 310
+ 313 316 319 322 325 328 331 334 337 340 343 346 349
+ 352 355 358 361 364 367 370 373 376 379 382 385 388
+ 391 394 397 400 403 406 409 412 415 418 421 424 427
+ 430 433 436 439 442 445 448 451 454 457 460 463 466
+ 469 472 475 478 481 484 487 490 493 496 499 502 505
+ 508 511 514 517 520 523 526 529 532 535 541 544 562
+ 566 575 579 583 587 591 595 599 603 607 611 615 619
+ 623 627 631 635 639 643 647 651 655 659 663 667 671
+ 675 679 683 687 691 695 699 703 707 711 715 719 723
+ 727 731 735 739 743 747 751 755 759 763 767 771 775
+ 779 783 787 791 795 799 803 807 811 815 819 823 827
+ 831 835 839 843 847 851 855 859 863 867 871 875 879
+ 883 887 891 895 899 903 907 911 915 919 923 927 931
+ 935 939 943 947 951 955 962 966 973 990 994 1021 1035
+ 1047 1052 1066
+R6 U 00000006 1 1375 153 154 157 979 980 981 995 1037 1038 1039 1040 1042 1043
+ 1044 1045 1048 1067
+R7 U 00000007 1 1376 159 160 232 547 556 970 990 996 1021 1035 1037 1040 1042
+ 1045 1049 1052 1072
+R8 U 00000008 1 1377 95 98 99 100 102
+R9 U 00000009 1 1378 96 102 103
+REG2LOW U 000000DD 1 1195
+REG2PATT U AABBCCDD 1 1194
+RPTDWSAV D 00000E20 8 1028 1015 1019
+RPTSAVE F 00000E10 4 1025 989 1022
+RPTSPEED I 00000DA6 4 989 975
+RPTSVR5T7 F 00000E14 4 1026 990 1021
+SAVE2T5 F 00000410 4 140 234 973
+SAVER2 F 00000420 4 141
+SAVER6 F 00000424 4 142 157 979
+SS1ADDR A 00000008 4 1172 168
+SS1LAST X 00000006 1 1169 175
+SS1LEN A 0000000C 4 1173 170
+SS2ADDR A 00000010 4 1174 181
+SS2LAST X 00000007 1 1170 188
+SS2LEN A 00000014 4 1175 183
+SSLEN R 00000004 1 1167 192
+SUBDWORD I 00000E84 4 1064 997 1050
+SUBDWSAV D 00000EA8 8 1077 1064 1074
+SUBTEST X 00000401 1 134 121
+TEST91 I 00000528 4 150 109
+TESTADDR D 00000400 8 132
+TESTNUM X 00000400 1 133 118 160
+TICKSAAA P 00000FD8 8 1150 1002 1005
+TICKSBBB P 00000FE0 8 1151 1003 1007
+TICKSTOT P 00000FE8 8 1152 1005 1006 1007 1010
+TIMEOPT X 00000408 1 137 115 150
+TNUM X 00000000 1 1164 159
+TST91LOP U 00000532 1 156 982
+=AL2(L'MSGMSG) R 00000FA6 2 1133 1089
+=CL5'CUSE' C 00000FA8 5 1134 974
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 22
+
+ SYMBOL TYPE VALUE LENGTH DEFN REFERENCES
+
+=F'0' F 00000F9C 4 1130 981
+=F'1' F 00000FA0 4 1131 1070
+=H'0' H 00000FA4 2 1132 1084
+=P'4294967296' P 00000FAD 6 1135 1006
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 23
+
+ MACRO DEFN REFERENCES
+
+DOINSTR 214 560 573 960
+OVERONLY 200 237 248 539
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 24
+
+ DESC SYMBOL SIZE POS ADDR
+
+Entry: 0
+
+Image IMAGE 59824 0000-E9AF 0000-E9AF
+ Region 59824 0000-E9AF 0000-E9AF
+ CSECT CUSE2TST 59824 0000-E9AF 0000-E9AF
+ ASMA Ver. 0.2.1 CUSE-02-performance (Test CUSE instructions) 09 Nov 2022 16:02:40 Page 25
+
+ STMT FILE NAME
+
+1 /devstor/dev/tests/CUSE-02-performance.asm
+
+
+** NO ERRORS FOUND **
+
+
\ No newline at end of file
diff --git a/tests/CUSE-02-performance.pdf b/tests/CUSE-02-performance.pdf
new file mode 100644
index 000000000..28d93c61f
Binary files /dev/null and b/tests/CUSE-02-performance.pdf differ
diff --git a/tests/CUSE-02-performance.tst b/tests/CUSE-02-performance.tst
new file mode 100644
index 000000000..21a7966e6
--- /dev/null
+++ b/tests/CUSE-02-performance.tst
@@ -0,0 +1,46 @@
+*Testcase CUSE-02-performance (Test CUSE instruction)
+
+# ------------------------------------------------------------------------------
+# This ONLY tests the performance of the CUSE instruction.
+#
+# The default is to NOT run performance tests. To enable this performance
+# test, uncomment the "#r 408=ff # (enable timing tests)" line below.
+#
+# Tests:
+# Both opernand-1 and operand-2 cross a page boundary.
+#
+# 1. CUSE of 512 bytes - substring length 1
+# 2. CUSE of 512 bytes - substring length 4
+# 3. CUSE of 512 bytes - substring length 8
+# 4. CUSE of 512 bytes - substring length 32
+# 5. CUSE of 512 bytes - substring length 32 (different strings)
+# 6. CUSE of 4160 (4096+64) bytes - substring length 32
+# which results in a CC=3, and a branch back
+# to complete the CUSE instruction.
+#
+# Output:
+#
+# For each test, a console line will the generated with timing
+# results, as follows:
+#
+# 1,000,000 iterations of CUSE took 406,437 microseconds
+# 1,000,000 iterations of CUSE took 2,496,775 microseconds
+# 1,000,000 iterations of CUSE took 1,205,304 microseconds
+# 1,000,000 iterations of CUSE took 340,440 microseconds
+# 1,000,000 iterations of CUSE took 2,210,040 microseconds
+# 1,000,000 iterations of CUSE took 2,313,153 microseconds
+# ------------------------------------------------------------------------------
+
+mainsize 16
+numcpu 1
+sysclear
+archlvl z/Arch
+
+loadcore "$(testpath)/CUSE-02-performance.core" 0x0
+
+diag8cmd enable # (needed for messages to Hercules console)
+#r 408=ff # (enable timing tests)
+runtest 300 # (test duration, depends on host)
+diag8cmd disable # (reset back to default)
+
+*Done
diff --git a/tests/Makefile.am b/tests/Makefile.am
index bf120aac0..a0986bff3 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -214,6 +214,16 @@ EXTRA_DIST = \
csxtr.assemble \
csxtr.listing \
csxtr.tst \
+ CUSE-01-basic.asm \
+ CUSE-01-basic.core \
+ CUSE-01-basic.list \
+ CUSE-01-basic.pdf \
+ CUSE-01-basic.tst \
+ CUSE-02-performance.asm \
+ CUSE-02-performance.core \
+ CUSE-02-performance.list \
+ CUSE-02-performance.pdf \
+ CUSE-02-performance.tst \
cxgbr.txt \
cxgtr.txt \
dc-float.asm \