diff --git a/.gitignore b/.gitignore index aa085cd807..37a37bc10a 100644 --- a/.gitignore +++ b/.gitignore @@ -1,3 +1,5 @@ Cargo.lock /target **/*.rs.bk +.idea +rusty-tags.vi diff --git a/avr-hal-generic/src/i2c.rs b/avr-hal-generic/src/i2c.rs index cbf39bea66..02cea9ec65 100644 --- a/avr-hal-generic/src/i2c.rs +++ b/avr-hal-generic/src/i2c.rs @@ -106,9 +106,9 @@ pub enum Error { AddressNack, /// Slave replied NACK to sent data DataNack, - /// A bus-error occured + /// A bus-error occurred BusError, - /// An unknown error occured. The bus might be in an unknown state. + /// An unknown error occurred. The bus might be in an unknown state. Unknown, } @@ -123,13 +123,15 @@ pub enum Direction { #[doc(hidden)] pub fn i2cdetect(s: &mut W, mut f: F) -> Result<(), W::Error> -where + where // Detection function - F: FnMut(u8) -> Result, + F: FnMut(u8) -> Result, { - s.write_str("\ + s.write_str( + "\ - 0 1 2 3 4 5 6 7 8 9 a b c d e f\r\n\ -00: ")?; +00: ", + )?; fn u4_to_hex(b: u8) -> char { match b { @@ -153,14 +155,14 @@ where s.write_char(' ')?; s.write_char(ah)?; s.write_char(al)?; - }, + } Ok(false) => { s.write_str(" --")?; - }, + } Err(e) => { s.write_str(" E")?; s.write_char(u4_to_hex(e as u8))?; - }, + } } } @@ -174,7 +176,12 @@ pub type I2cFloating = crate::port::mode::Input; #[doc(hidden)] pub type I2cPullUp = crate::port::mode::Input; -/// Implement I2C traits for a TWI peripheral +/// Implement I2C traits for a TWI peripheral. +/// +/// Macro generates the following structs: +/// +/// * I2c (master) +/// * I2cSlave (slave) #[macro_export] macro_rules! impl_twi_i2c { ( @@ -185,32 +192,18 @@ macro_rules! impl_twi_i2c { sda: $sdamod:ident::$SDA:ident, scl: $sclmod:ident::$SCL:ident, }, - registers: { - control: $twcr:ident { - enable: $twen:ident, - ack: $twea:ident, - int: $twint:ident, - start: $twstart:ident, - stop: $twstop:ident, - }, - status: $twsr:ident { - prescaler: $twps:ident, - status: $tws:ident, - }, - bitrate: $twbr:ident, - data: $twdr:ident, - }, } - ) => { + ) => {$crate::paste::paste! { + /// I2C Master $(#[$i2c_attr])* - pub struct $I2c { + pub struct [<$I2c Master>] { p: $I2C, _clock: ::core::marker::PhantomData, sda: $sdamod::$SDA, scl: $sclmod::$SCL, } - impl $I2c + impl [<$I2c Master>] where CLOCK: $crate::clock::Clock, { @@ -224,14 +217,12 @@ macro_rules! impl_twi_i2c { sda: $sdamod::$SDA<$crate::port::mode::Input<$crate::port::mode::PullUp>>, scl: $sclmod::$SCL<$crate::port::mode::Input<$crate::port::mode::PullUp>>, speed: u32, - ) -> $I2c { - // Calculate TWBR - let twbr = ((CLOCK::FREQ / speed) - 16) / 2; - p.$twbr.write(|w| unsafe { w.bits(twbr as u8) }); - // Disable prescaler - p.$twsr.write(|w| w.$twps().prescaler_1()); + ) -> [<$I2c Master>] { - $I2c { + // init i2c + [<$I2c Master>]::::initialize_i2c(&p, &speed); + + [<$I2c Master>] { p, sda, scl, @@ -240,7 +231,7 @@ macro_rules! impl_twi_i2c { } } - impl $I2c + impl [<$I2c Master>] where CLOCK: $crate::clock::Clock, { @@ -254,14 +245,12 @@ macro_rules! impl_twi_i2c { sda: $sdamod::$SDA<$crate::port::mode::Input<$crate::port::mode::Floating>>, scl: $sclmod::$SCL<$crate::port::mode::Input<$crate::port::mode::Floating>>, speed: u32, - ) -> $I2c { - // Calculate TWBR - let twbr = ((CLOCK::FREQ / speed) - 16) / 2; - p.$twbr.write(|w| unsafe { w.bits(twbr as u8) }); - // Disable prescaler - p.$twsr.write(|w| w.$twps().prescaler_1()); + ) -> [<$I2c Master>] { - $I2c { + // init i2c + [<$I2c Master>]::::initialize_i2c(&p, &speed); + + [<$I2c Master>] { p, sda, scl, @@ -270,10 +259,20 @@ macro_rules! impl_twi_i2c { } } - impl $I2c + impl [<$I2c Master>] where CLOCK: $crate::clock::Clock, { + /// Initialize I2C + pub fn initialize_i2c( p: &$I2C, speed: &u32,){ + // calculate the bit rate + let twbr = ((CLOCK::FREQ / speed) - 16) / 2; + p.twbr.write(|w| unsafe { w.bits(twbr as u8) }); + + // disable the prescaler + p.twsr.write(|w| w.twps().prescaler_1()); + } + /// Check whether a slave answers ACK for a given address /// /// Note that some devices might not respond to both read and write @@ -293,21 +292,18 @@ macro_rules! impl_twi_i2c { } } - fn start( - &mut self, - addr: u8, - dir: $crate::i2c::Direction, - ) -> Result<(), $crate::i2c::Error> { + fn start( &mut self, addr: u8, dir: $crate::i2c::Direction,) -> Result<(), + $crate::i2c::Error> { // Write start condition - self.p.$twcr.write(|w| w - .$twen().set_bit() - .$twint().set_bit() - .$twstart().set_bit() + self.p.twcr.write(|w| w + .twen().set_bit() + .twint().set_bit() + .twsta().set_bit() ); self.wait(); // Validate status - match self.p.$twsr.read().$tws().bits() { + match self.p.twsr.read().tws().bits() { $crate::i2c::twi_status::TW_START | $crate::i2c::twi_status::TW_REP_START => (), $crate::i2c::twi_status::TW_MT_ARB_LOST @@ -322,14 +318,14 @@ macro_rules! impl_twi_i2c { }, } - // Send slave address + // Create and write rawaddr (address with direction bit) let dirbit = if dir == $crate::i2c::Direction::Read { 1 } else { 0 }; let rawaddr = (addr << 1) | dirbit; - self.p.$twdr.write(|w| unsafe { w.bits(rawaddr) }); + self.p.twdr.write(|w| unsafe { w.bits(rawaddr) }); self.transact(); // Check if the slave responded - match self.p.$twsr.read().$tws().bits() { + match self.p.twsr.read().tws().bits() { $crate::i2c::twi_status::TW_MT_SLA_ACK | $crate::i2c::twi_status::TW_MR_SLA_ACK => (), $crate::i2c::twi_status::TW_MT_SLA_NACK @@ -354,20 +350,19 @@ macro_rules! impl_twi_i2c { } fn wait(&mut self) { - while self.p.$twcr.read().$twint().bit_is_clear() { } - } + while self.p.twcr.read().twint().bit_is_clear() { } } fn transact(&mut self) { - self.p.$twcr.write(|w| w.$twen().set_bit().$twint().set_bit()); - while self.p.$twcr.read().$twint().bit_is_clear() { } + self.p.twcr.write(|w| w.twen().set_bit().twint().set_bit()); + while self.p.twcr.read().twint().bit_is_clear() { } } fn write_data(&mut self, bytes: &[u8]) -> Result<(), $crate::i2c::Error> { for byte in bytes { - self.p.$twdr.write(|w| unsafe { w.bits(*byte) }); + self.p.twdr.write(|w| unsafe { w.bits(*byte) }); self.transact(); - match self.p.$twsr.read().$tws().bits() { + match self.p.twsr.read().tws().bits() { $crate::i2c::twi_status::TW_MT_DATA_ACK => (), $crate::i2c::twi_status::TW_MT_DATA_NACK => { self.stop(); @@ -388,17 +383,21 @@ macro_rules! impl_twi_i2c { } fn read_data(&mut self, buffer: &mut [u8]) -> Result<(), $crate::i2c::Error> { + // Caller must end transfer with either a STOP or repeated START condition. let last = buffer.len() - 1; for (i, byte) in buffer.iter_mut().enumerate() { if i != last { - self.p.$twcr.write(|w| w.$twint().set_bit().$twen().set_bit().$twea().set_bit()); + // ACK each byte + self.p.twcr.write(|w| w.twint().set_bit().twen().set_bit().twea().set_bit()); self.wait(); } else { - self.p.$twcr.write(|w| w.$twint().set_bit().$twen().set_bit()); + // No ACK sent. The calling function must trigger a NACK with + // either a STOP or repeated START condition. + self.p.twcr.write(|w| w.twint().set_bit().twen().set_bit()); self.wait(); } - match self.p.$twsr.read().$tws().bits() { + match self.p.twsr.read().tws().bits() { $crate::i2c::twi_status::TW_MR_DATA_ACK | $crate::i2c::twi_status::TW_MR_DATA_NACK => (), $crate::i2c::twi_status::TW_MR_ARB_LOST => { @@ -412,22 +411,21 @@ macro_rules! impl_twi_i2c { }, } - *byte = self.p.$twdr.read().bits(); + *byte = self.p.twdr.read().bits(); } Ok(()) } fn stop(&mut self) { - // Send stop - self.p.$twcr.write(|w| w - .$twen().set_bit() - .$twint().set_bit() - .$twstop().set_bit() + self.p.twcr.write(|w| w + .twen().set_bit() + .twint().set_bit() + .twsto().set_bit() ); } } - impl $I2c + impl [<$I2c Master>] where CLOCK: $crate::clock::Clock, $crate::delay::Delay: $crate::hal::blocking::delay::DelayMs, @@ -451,7 +449,7 @@ macro_rules! impl_twi_i2c { } - impl $crate::hal::blocking::i2c::Write for $I2c + impl $crate::hal::blocking::i2c::Write for [<$I2c Master>] where CLOCK: $crate::clock::Clock, { @@ -465,7 +463,7 @@ macro_rules! impl_twi_i2c { } } - impl $crate::hal::blocking::i2c::Read for $I2c + impl $crate::hal::blocking::i2c::Read for [<$I2c Master>] where CLOCK: $crate::clock::Clock, { @@ -479,7 +477,7 @@ macro_rules! impl_twi_i2c { } } - impl $crate::hal::blocking::i2c::WriteRead for $I2c + impl $crate::hal::blocking::i2c::WriteRead for [<$I2c Master>] where CLOCK: $crate::clock::Clock, { @@ -499,5 +497,326 @@ macro_rules! impl_twi_i2c { Ok(()) } } - }; -} + + /// I2C Slave + /// + /// I2C Slave is similar to the I2C Master. The similarities are that both structs have the + /// `new()` and `new_with_external_pullup()` constructors. However the Slave constructors + /// do not need to pass the speed/bitrate as that is determined by the Master. However, the + /// Slave constructors do need to pass the slave address and the flag to enable/disable the + /// General Call Address. + /// + /// Example (pseudocode): + /// + /// let s = [<$I2c Slave>]::new(...) + /// s.start() + /// TODO: need feedback from Rahix on how they want this API to look + $(#[$i2c_attr])* + pub struct [<$I2c Slave>] { + /// Peripherals + p: $I2C, + /// Serial data (SDA) + sda: $sdamod::$SDA, + /// Serial clock (SDC) + scl: $sclmod::$SCL, + /// Slave address (only 7 LSB of address field are used) + address: u8, + /// Enable General Call Address + twgce: bool, + } + + impl [<$I2c Slave>]<$crate::i2c::I2cPullUp> + { + /// Initialize the I2C bus + /// + /// `new()` will enable the internal pull-ups to comply with the I2C + /// specification. If you have external pull-ups connected, please + /// use `new_with_external_pullup()` instead. + pub fn new( + p: $I2C, + sda: $sdamod::$SDA<$crate::port::mode::Input<$crate::port::mode::PullUp>>, + scl: $sclmod::$SCL<$crate::port::mode::Input<$crate::port::mode::PullUp>>, + address: u8, + twgce: bool, + ) -> [<$I2c Slave>]<$crate::i2c::I2cPullUp> { + [<$I2c Slave>] { + p, + sda, + scl, + address, + twgce, + } + } + } + + impl [<$I2c Slave>]<$crate::i2c::I2cFloating> + { + /// Initialize the I2C bus, without enabling internal pull-ups + /// + /// This function should be used if your hardware design includes + /// pull-up resistors outside the MCU. If you do not have these, + /// please use `new()` instead. + pub fn new_with_external_pullup( + p: $I2C, + sda: $sdamod::$SDA<$crate::port::mode::Input<$crate::port::mode::Floating>>, + scl: $sclmod::$SCL<$crate::port::mode::Input<$crate::port::mode::Floating>>, + address: u8, + twgce: bool, + ) -> [<$I2c Slave>]<$crate::i2c::I2cFloating> { + [<$I2c Slave>] { + p, + sda, + scl, + address, + twgce, + } + } + } + + impl [<$I2c Slave>]{ + /// Start the slave listening for messages on the I2C bus + pub fn start(self) -> Result<[<$I2c SlaveStateUninitialized>], $crate::i2c::Error>{ + [<$I2c SlaveState>]::new(self) + } + + fn ack(self) -> [<$I2c Slave>]{ + self.p.twcr.write(|w| w + .twea().set_bit() + .twsto().clear_bit() + .twint().set_bit() + .twen().set_bit() + ); + self + } + + fn nack(self) -> [<$I2c Slave>] { + self.p.twcr.write(|w| w + .twea().set_bit() + .twsto().clear_bit() + .twint().set_bit() + .twen().clear_bit() + ); + self + } + } + // Slave States + pub enum [<$I2c SlaveState>] { + /// Uninitialized state machine + Uninitialized([<$I2c SlaveStateUninitialized>]), + + /// Initialized state machine + Initialized([<$I2c SlaveStateInitialized>]), + + /// Address sent by master has been matched + AddressMatched([<$I2c SlaveStateAddressMatched>]), + + /// Data has been received from master + RxReady([<$I2c SlaveStateRxReady>]), + + /// Ready to transmit data to master + TxReady([<$I2c SlaveStateTxReady>]), + + /// Error State + Error([<$I2c SlaveStateError>]), + } + + pub struct [<$I2c SlaveStateUninitialized>]{ + slave: [<$I2c Slave>], + } + + pub struct [<$I2c SlaveStateInitialized>]{ + slave: [<$I2c Slave>], + } + + pub struct [<$I2c SlaveStateAddressMatched>]{ + slave: [<$I2c Slave>], + } + + pub struct [<$I2c SlaveStateRxReady>]{ + slave: [<$I2c Slave>], + } + + pub struct [<$I2c SlaveStateTxReady>]{ + slave: [<$I2c Slave>], + } + + pub struct [<$I2c SlaveStateError>]{ + slave: [<$I2c Slave>], + } + + impl [<$I2c SlaveState>] + { + /// Create new slave state machine in the un-initialized state + /// + /// # Arguments + /// + /// * `slave` - slave instance + pub fn new(slave: [<$I2c Slave>] + ) -> Result<[<$I2c SlaveStateUninitialized>], $crate::i2c::Error>{ + Ok([<$I2c SlaveStateUninitialized>]:: { + slave: slave, + }) + } + } + + /// Transitions from Uninitialized to Initialized + impl [<$I2c SlaveStateUninitialized>] { + /// Init the state machine + pub fn init(self + ) -> Result<[<$I2c SlaveStateInitialized>], $crate::i2c::Error>{ + let gce_mask = if self.slave.twgce {1} else {0}; + let rawaddr = (self.slave.address << 1) | gce_mask; + self.slave.p.twar.write(|w| unsafe {w.bits(self.slave.address)}); + self.slave.p.twcr.write(|w| w + .twen().set_bit() + .twea().set_bit() + .twsta().clear_bit() + .twsto().clear_bit() + .twint().set_bit() + ); + Ok([<$I2c SlaveStateInitialized>]:: { + slave: self.slave, + }) + } + } + + /// Transitions from Initialized to AddressMatched + impl [<$I2c SlaveStateInitialized>] { + + /// Wait until TWINT has been triggered. TWINT is triggered if a message appears on + /// the I2C bus and the address matches this slave's address, or if a message appears + /// on the I2C bus and this slave has TWGCE enabled. + pub fn wait(self + ) -> Result<[<$I2c SlaveState>], $crate::i2c::Error>{ + while self.slave.p.twcr.read().twint().bit_is_clear() { }; + match self.slave.p.twsr.read().tws().bits() { + | $crate::i2c::twi_status::TW_SR_SLA_ACK + | $crate::i2c::twi_status::TW_SR_ARB_LOST_SLA_ACK + | $crate::i2c::twi_status::TW_SR_ARB_LOST_GCALL_ACK + => return Ok([<$I2c SlaveState>]::AddressMatched([<$I2c SlaveStateAddressMatched>]:: { + slave: self.slave, + })), + $crate::i2c::twi_status::TW_SR_GCALL_ACK + => { + return if self.slave.twgce { + Ok([<$I2c SlaveState>]::AddressMatched([<$I2c SlaveStateAddressMatched>]:: { + slave: self.slave, + })) + }else{ + Ok([<$I2c SlaveState>]::Initialized([<$I2c SlaveStateInitialized>]:: { + slave: self.slave, + })) + } + }, + _ => { + return Err($crate::i2c::Error::Unknown); + }, + } + } + } + + /// Transitions from AddressMatched to RxReady | TxReady + impl [<$I2c SlaveStateAddressMatched>] { + + /// Return the received address + pub fn address(&self) -> u8 { + self.slave.p.twdr.read().bits() >> 1 + } + + pub fn ack(self) -> [<$I2c SlaveState>] { + [<$I2c SlaveStateAddressMatched>]::next(self.slave.ack()) + } + + pub fn nack(self) -> [<$I2c SlaveState>] { + [<$I2c SlaveStateAddressMatched>]::next(self.slave.nack()) + } + + fn next(slave: [<$I2c Slave>]) -> [<$I2c SlaveState>]{ + let byte = slave.p.twdr.read().bits(); + if byte & 1 == 1 { + // direction bit == 1 (read from slave) + [<$I2c SlaveState>]::RxReady([<$I2c SlaveStateRxReady>]:: { + slave: slave, + }) + }else{ + // direction bit == 0 (write to slave) + [<$I2c SlaveState>]::TxReady([<$I2c SlaveStateTxReady>]:: { + slave: slave, + }) + } + } + } + /// Transitions from RxReady to Initialized + impl [<$I2c SlaveStateRxReady>]{ + + pub fn ack(self) -> Result<[<$I2c SlaveState>], $crate::i2c::Error> { + [<$I2c SlaveStateRxReady>]::next(self.slave.ack()) + } + + pub fn nack(self) -> Result<[<$I2c SlaveState>], $crate::i2c::Error> { + [<$I2c SlaveStateRxReady>]::next(self.slave.nack()) + } + + pub fn read(self) -> u8{ + self.slave.p.twdr.read().bits() + } + + fn next(slave: [<$I2c Slave>]) -> Result<[<$I2c SlaveState>], $crate::i2c::Error>{ + while slave.p.twcr.read().twint().bit_is_clear() { }; + match slave.p.twsr.read().tws().bits() { + | $crate::i2c::twi_status::TW_SR_DATA_ACK + | $crate::i2c::twi_status::TW_SR_GCALL_DATA_ACK + => return Ok([<$I2c SlaveState>]::RxReady([<$I2c SlaveStateRxReady>]:: { + slave: slave, + })), + | $crate::i2c::twi_status::TW_SR_DATA_NACK + | $crate::i2c::twi_status::TW_SR_GCALL_DATA_NACK + | $crate::i2c::twi_status::TW_SR_STOP + => return Ok([<$I2c SlaveState>]::Initialized([<$I2c SlaveStateInitialized>]:: { + slave: slave, + })), + _ => { + return Err($crate::i2c::Error::Unknown); + }, + } + } + } + + /// Transitions from TxReady to Initialized + impl[<$I2c SlaveStateTxReady>]{ + + pub fn ack(self) -> Result<[<$I2c SlaveState>], $crate::i2c::Error> { + [<$I2c SlaveStateTxReady>]::next(self.slave.ack()) + } + + pub fn nack(self) -> Result<[<$I2c SlaveState>], $crate::i2c::Error> { + [<$I2c SlaveStateTxReady>]::next(self.slave.nack()) + } + + pub fn write(self, data: u8) -> [<$I2c SlaveStateTxReady>]{ + self.slave.p.twdr.write(|w| unsafe { w.bits(data)}); + self + } + + fn next(slave: [<$I2c Slave>]) -> Result<[<$I2c SlaveState>], $crate::i2c::Error>{ + while slave.p.twcr.read().twint().bit_is_clear() { }; + match slave.p.twsr.read().tws().bits() { + | $crate::i2c::twi_status::TW_ST_SLA_ACK + | $crate::i2c::twi_status::TW_ST_ARB_LOST_SLA_ACK + | $crate::i2c::twi_status::TW_ST_DATA_ACK + => return Ok([<$I2c SlaveState>]::TxReady([<$I2c SlaveStateTxReady>]:: { + slave: slave, + })), + | $crate::i2c::twi_status::TW_ST_DATA_NACK + | $crate::i2c::twi_status::TW_ST_LAST_DATA + => return Ok([<$I2c SlaveState>]::Initialized([<$I2c SlaveStateInitialized>]:: { + slave: slave, + })), + _ => { + return Err($crate::i2c::Error::Unknown); + }, + } + } + } + }}; +} \ No newline at end of file diff --git a/boards/arduino-diecimila/src/lib.rs b/boards/arduino-diecimila/src/lib.rs index ede3c75e5c..da6ca91d4f 100644 --- a/boards/arduino-diecimila/src/lib.rs +++ b/boards/arduino-diecimila/src/lib.rs @@ -17,4 +17,5 @@ pub use atmega168_hal::spi; pub type Delay = hal::delay::Delay; pub type Serial = hal::usart::Usart0; -pub type I2c = hal::i2c::I2c; +pub type I2cMaster = hal::i2c::I2cMaster; +pub type I2cSlave = hal::i2c::I2cSlave; diff --git a/boards/arduino-leonardo/src/lib.rs b/boards/arduino-leonardo/src/lib.rs index 98317cd279..02cb9399ed 100644 --- a/boards/arduino-leonardo/src/lib.rs +++ b/boards/arduino-leonardo/src/lib.rs @@ -212,7 +212,8 @@ pub type Serial = hal::usart::Usart1; /// ``` /// /// [ex-i2c]: https://github.com/Rahix/avr-hal/blob/master/boards/arduino-leonardo/examples/leonardo-i2cdetect.rs -pub type I2c = hal::i2c::I2c; +pub type I2cMaster = hal::i2c::I2cMaster; +pub type I2cSlave = hal::i2c::I2cSlave; /// Support for the Watchdog Timer /// diff --git a/boards/arduino-mega2560/src/lib.rs b/boards/arduino-mega2560/src/lib.rs index 94dad64dc2..0b89dd0420 100644 --- a/boards/arduino-mega2560/src/lib.rs +++ b/boards/arduino-mega2560/src/lib.rs @@ -16,7 +16,8 @@ pub use crate::pins::*; pub type Delay = hal::delay::Delay; pub type Serial = atmega2560_hal::usart::Usart0; -pub type I2c = hal::i2c::I2c; +pub type I2cMaster = hal::i2c::I2cMaster; +pub type I2cSlave = hal::i2c::I2cSlave; /// Support for PWM pins /// @@ -63,4 +64,4 @@ pub type I2c = hal::i2c::I2c; /// [ex-pwm]: https://github.com/sepotvin/avr-hal/blob/master/boards/arduino-mega2560/examples/mega2560-pwm.rs pub mod pwm { pub use atmega2560_hal::pwm::*; -} \ No newline at end of file +} diff --git a/boards/arduino-uno/src/lib.rs b/boards/arduino-uno/src/lib.rs index 94603c78be..b2bae0533b 100644 --- a/boards/arduino-uno/src/lib.rs +++ b/boards/arduino-uno/src/lib.rs @@ -216,7 +216,8 @@ pub type Serial = hal::usart::Usart0; /// ``` /// /// [ex-i2c]: https://github.com/Rahix/avr-hal/blob/master/boards/arduino-uno/examples/uno-i2cdetect.rs -pub type I2c = hal::i2c::I2c; +pub type I2cMaster = hal::i2c::I2cMaster; +pub type I2cSlave = hal::i2c::I2cSlave; /// Support for the WatchDog Timer /// diff --git a/boards/bigavr6/src/lib.rs b/boards/bigavr6/src/lib.rs index db28430ab2..00d5909b2c 100644 --- a/boards/bigavr6/src/lib.rs +++ b/boards/bigavr6/src/lib.rs @@ -11,4 +11,5 @@ pub use atmega1280_hal::prelude; pub type Delay = hal::delay::Delay; pub type Serial = atmega1280_hal::usart::Usart0; -pub type I2c = hal::i2c::I2c; +pub type I2cMaster = hal::i2c::I2cMaster; +pub type I2cSlave = hal::i2c::I2cSlave; diff --git a/boards/sparkfun-pro-micro/src/lib.rs b/boards/sparkfun-pro-micro/src/lib.rs index 3107d348c3..64ad564337 100644 --- a/boards/sparkfun-pro-micro/src/lib.rs +++ b/boards/sparkfun-pro-micro/src/lib.rs @@ -209,4 +209,5 @@ pub type Serial = hal::usart::Usart1; /// ``` /// /// [ex-i2c]: https://github.com/Rahix/avr-hal/blob/master/boards/sparkfun-pro-micro/examples/pro-micro-i2cdetect.rs -pub type I2c = hal::i2c::I2c; +pub type I2cMaster = hal::i2c::I2cMaster; +pub type I2cSlave = hal::i2c::I2cSlave; diff --git a/chips/atmega1280-hal/src/lib.rs b/chips/atmega1280-hal/src/lib.rs index ca16a4b23c..d2ab69bda2 100644 --- a/chips/atmega1280-hal/src/lib.rs +++ b/chips/atmega1280-hal/src/lib.rs @@ -29,21 +29,6 @@ pub mod i2c { sda: portd::PD1, scl: portd::PD0, }, - registers: { - control: twcr { - enable: twen, - ack: twea, - int: twint, - start: twsta, - stop: twsto, - }, - status: twsr { - prescaler: twps, - status: tws, - }, - bitrate: twbr, - data: twdr, - }, } } } diff --git a/chips/atmega168-hal/src/lib.rs b/chips/atmega168-hal/src/lib.rs index 16c3be5803..974b07bcd8 100644 --- a/chips/atmega168-hal/src/lib.rs +++ b/chips/atmega168-hal/src/lib.rs @@ -37,21 +37,6 @@ pub mod i2c { sda: portc::PC4, scl: portc::PC5, }, - registers: { - control: twcr { - enable: twen, - ack: twea, - int: twint, - start: twsta, - stop: twsto, - }, - status: twsr { - prescaler: twps, - status: tws, - }, - bitrate: twbr, - data: twdr, - }, } } } diff --git a/chips/atmega2560-hal/src/lib.rs b/chips/atmega2560-hal/src/lib.rs index b0cd8c0500..5e3c6d2e3c 100644 --- a/chips/atmega2560-hal/src/lib.rs +++ b/chips/atmega2560-hal/src/lib.rs @@ -32,21 +32,6 @@ pub mod i2c { sda: portd::PD1, scl: portd::PD0, }, - registers: { - control: twcr { - enable: twen, - ack: twea, - int: twint, - start: twsta, - stop: twsto, - }, - status: twsr { - prescaler: twps, - status: tws, - }, - bitrate: twbr, - data: twdr, - }, } } } diff --git a/chips/atmega328p-hal/src/lib.rs b/chips/atmega328p-hal/src/lib.rs index f3c7ddf8ba..aa892b1516 100644 --- a/chips/atmega328p-hal/src/lib.rs +++ b/chips/atmega328p-hal/src/lib.rs @@ -34,21 +34,6 @@ pub mod i2c { sda: portc::PC4, scl: portc::PC5, }, - registers: { - control: twcr { - enable: twen, - ack: twea, - int: twint, - start: twsta, - stop: twsto, - }, - status: twsr { - prescaler: twps, - status: tws, - }, - bitrate: twbr, - data: twdr, - }, } } } diff --git a/chips/atmega32u4-hal/src/lib.rs b/chips/atmega32u4-hal/src/lib.rs index c913b15813..2def95cbb7 100644 --- a/chips/atmega32u4-hal/src/lib.rs +++ b/chips/atmega32u4-hal/src/lib.rs @@ -33,21 +33,6 @@ pub mod i2c { sda: portd::PD1, scl: portd::PD0, }, - registers: { - control: twcr { - enable: twen, - ack: twea, - int: twint, - start: twsta, - stop: twsto, - }, - status: twsr { - prescaler: twps, - status: tws, - }, - bitrate: twbr, - data: twdr, - }, } } } diff --git a/chips/atmega48p-hal/src/lib.rs b/chips/atmega48p-hal/src/lib.rs index b24183defa..6f25b23f8a 100644 --- a/chips/atmega48p-hal/src/lib.rs +++ b/chips/atmega48p-hal/src/lib.rs @@ -35,21 +35,6 @@ pub mod i2c { sda: portc::PC4, scl: portc::PC5, }, - registers: { - control: twcr { - enable: twen, - ack: twea, - int: twint, - start: twsta, - stop: twsto, - }, - status: twsr { - prescaler: twps, - status: tws, - }, - bitrate: twbr, - data: twdr, - }, } } } diff --git a/chips/attiny88-hal/src/lib.rs b/chips/attiny88-hal/src/lib.rs index e04e3eaeb4..42f618f1b7 100644 --- a/chips/attiny88-hal/src/lib.rs +++ b/chips/attiny88-hal/src/lib.rs @@ -32,21 +32,6 @@ pub mod i2c { sda: portc::PC4, scl: portc::PC5, }, - registers: { - control: twcr { - enable: twen, - ack: twea, - int: twint, - start: twsta, - stop: twsto, - }, - status: twsr { - prescaler: twps, - status: tws, - }, - bitrate: twbr, - data: twdr, - }, } } } diff --git a/foo b/foo new file mode 100644 index 0000000000..e69de29bb2