Wrong order of gate definitions in QASM

[MattePalte]

Environment

• Qiskit Terra version: 0.19.1
• Python version: 3.8
• Operating system: Ubuntu 18.04.6 LTS

What is happening?

If we export to qasm a circuit with a subcircuit with an ECRGate and the inverse of this subcircuit, then we get a qasm which has an invilid order of the gate definition: ecr_dg comes before the the definition of rzx it uses.

How can we reproduce the issue?

Run this program:

from qiskit import QuantumCircuit, ClassicalRegister, QuantumRegister
from qiskit.circuit.library.standard_gates import *
qr = QuantumRegister(2, name='qr')
cr = ClassicalRegister(2, name='cr')
qc = QuantumCircuit(qr, cr, name='qc')
subcircuit = QuantumCircuit(qr, name='subcircuit')
subcircuit.append(ECRGate(), qargs=[qr[0], qr[1]], cargs=[])
qc.append(subcircuit, qargs=qr)
qc.append(subcircuit.inverse(), qargs=qr)
qc.measure(qr, cr)
qc.qasm(formatted=True)

Output:

OPENQASM 2.0;
include "qelib1.inc";
gate ecr_dg q0,q1 { rzx(pi/4) q0,q1; x q0; rzx(-pi/4) q0,q1; }
gate rzx(param0) q0,q1 { h q1; cx q0,q1; rz(-pi/4) q1; cx q0,q1; h q1; }
gate rzx(param0) q0,q1 { h q1; cx q0,q1; rz(pi/4) q1; cx q0,q1; h q1; }
gate ecr q0,q1 { rzx(pi/4) q0,q1; x q0; rzx(-pi/4) q0,q1; }
gate subcircuit q0,q1 { ecr q0,q1; }
gate subcircuit_dg q0,q1 { ecr_dg q0,q1; }
qreg qr[2];
creg cr[2];
subcircuit qr[0],qr[1];
subcircuit_dg qr[0],qr[1];
measure qr[0] -> cr[0];
measure qr[1] -> cr[1];

Calling the conversion back to circuit gives the error QasmError: "Cannot find gate definition for 'rzx', line 3 file "

qc = QuantumCircuit.from_qasm_str(qc.qasm())

What should happen?

The QASM exporter should have given a qasm where the simpler gates (i.e. rzx) are defined before being used by more complex ones (i.e. ecr_dg).

Any suggestions?

Although there are already a couple of issues on handling exotic gates during QASM exporter (#7335 and #7749), this seems a bit different because those are related to the fact that sometimes the gate definitions are hardcoded with parameters, making them less reusable and sometimes prone to errors (e.g. #7749).
In this case the order is wrong: a complex gate is declare before its subcomponent.

An option could be adding a general post processing step before outputting the qasm, that scans the definition of gates and makes sure that they are in the right order.

Anyway, regardless of the addition of this further check, I am looking for a confirmation that this manifestation of bug has the same root cause that the #7624 is addressing, so that this issue can be closed and used for a test case of that improvement.

Looking forward to hearing your feedback on this situation, thanks in advance