From fc46f504b918fd78940efe3a1e84c57d5c1c19a9 Mon Sep 17 00:00:00 2001 From: Pako2 Date: Sun, 15 Aug 2021 11:49:19 +0200 Subject: [PATCH] 0.6.5 Use of pins belonging to PL bank fixed. --- source/boards.c | 2 +- source/c_gpio.c | 72 ++++++++++++++++++++++++++++++++++------------ source/c_gpio.h | 11 +++++-- source/constants.c | 2 +- 4 files changed, 65 insertions(+), 22 deletions(-) diff --git a/source/boards.c b/source/boards.c index 9033133..a9eafcb 100644 --- a/source/boards.c +++ b/source/boards.c @@ -72,7 +72,7 @@ const int pin_to_gpio_three[41] = -1, -1, // 1, 2 122, -1, 121, -1, - 118, 364, + 118, 354, -1, 355, 120, 114, 119, -1, diff --git a/source/c_gpio.c b/source/c_gpio.c index f2b686b..d455d4a 100644 --- a/source/c_gpio.c +++ b/source/c_gpio.c @@ -28,15 +28,25 @@ SOFTWARE. #include "c_gpio.h" static volatile uint32_t *gpio_map; +static volatile uint32_t *r_gpio_map; uint32_t readl(uint32_t addr) { uint32_t val = 0; uint32_t mmap_base = (addr & ~MAP_MASK); uint32_t mmap_seek = ((addr - mmap_base) >> 2); - val = *(gpio_map + mmap_seek); - if(OPiGPIODebug) - printf("mmap_base = 0x%x\t mmap_seek = 0x%x\t gpio_map = 0x%x\t total = 0x%x\n",mmap_base,mmap_seek,gpio_map,(gpio_map + mmap_seek)); + if (addr> 2); - *(gpio_map + mmap_seek) = val; + if (addr> 5; int index = gpio - (bank << 5); int offset = ((index - ((index >> 3) << 3)) << 2); - uint32_t phyaddr = SUNXI_GPIO_BASE + (bank * 36) + ((index >> 3) << 2); - + if (bank>10) + { + base = DUMMY_PIO_BASE; + } + uint32_t phyaddr = base + (bank * 36) + ((index >> 3) << 2); regval = readl(phyaddr); if (OPiGPIODebug) printf("read reg val: 0x%x offset:%d\n",regval,offset); @@ -98,12 +116,16 @@ int gpio_function(int gpio) void set_pullupdn(int gpio, int pud)//void sunxi_pullUpDnControl (int pin, int pud) { uint32_t regval = 0; + uint32_t base = SUNXI_PIO_BASE; int bank = gpio >> 5; - int index = gpio - (bank << 5); + int index = gpio - (bank << 5); int sub = index >> 4; int sub_index = index - 16*sub; - uint32_t phyaddr = SUNXI_GPIO_BASE + (bank * 36) + 0x1C + 4*sub; // +0x1c -> pullUpDn reg - + if (bank>10) + { + base = DUMMY_PIO_BASE; + } + uint32_t phyaddr = base + (bank * 36) + 0x1C + 4*sub; // +0x1c -> pullUpDn reg if (OPiGPIODebug) printf("func:%s pin:%d,bank:%d index:%d sub:%d phyaddr:0x%x\n",__func__, gpio,bank,index,sub,phyaddr); @@ -123,13 +145,17 @@ void set_pullupdn(int gpio, int pud)//void sunxi_pullUpDnControl (int pin, int p void setup_gpio(int gpio, int direction, int pud)//void sunxi_set_gpio_mode(int pin,int mode) { uint32_t regval = 0; + uint32_t base = SUNXI_PIO_BASE; int bank = gpio >> 5; - int index = gpio - (bank << 5); + int index = gpio - (bank << 5); int offset = ((index - ((index >> 3) << 3)) << 2); - uint32_t phyaddr = SUNXI_GPIO_BASE + (bank * 36) + ((index >> 3) << 2); + if (bank>10) + { + base = DUMMY_PIO_BASE; + } + uint32_t phyaddr = base + (bank * 36) + ((index >> 3) << 2); if (OPiGPIODebug) printf("func:%s pin:%d, direction:%d bank:%d index:%d phyaddr:0x%x\n",__func__, gpio , direction,bank,index,phyaddr); - regval = readl(phyaddr); if (OPiGPIODebug) printf("read reg val: 0x%x offset:%d\n",regval,offset); @@ -164,9 +190,14 @@ void setup_gpio(int gpio, int direction, int pud)//void sunxi_set_gpio_mode(int void output_gpio(int gpio, int value) //void sunxi_digitalWrite(int pin, int value) { uint32_t regval = 0; + uint32_t base = SUNXI_PIO_BASE; int bank = gpio >> 5; - int index = gpio - (bank << 5); - uint32_t phyaddr = SUNXI_GPIO_BASE + (bank * 36) + 0x10; // +0x10 -> data reg + int index = gpio - (bank << 5); + if (bank>10) + { + base = DUMMY_PIO_BASE; + } + uint32_t phyaddr = base + (bank * 36) + 0x10; // +0x10 -> data reg if (OPiGPIODebug) printf("func:%s pin:%d, value:%d bank:%d index:%d phyaddr:0x%x\n",__func__, gpio , value,bank,index,phyaddr); @@ -194,9 +225,14 @@ void output_gpio(int gpio, int value) //void sunxi_digitalWrite(int pin, int val int input_gpio(int gpio)//int sunxi_digitalRead(int pin) { uint32_t regval = 0; + uint32_t base = SUNXI_PIO_BASE; int bank = gpio >> 5; - int index = gpio - (bank << 5); - uint32_t phyaddr = SUNXI_GPIO_BASE + (bank * 36) + 0x10; // +0x10 -> data reg + int index = gpio - (bank << 5); + if (bank>10) + { + base = DUMMY_PIO_BASE; + } + uint32_t phyaddr = base + (bank * 36) + 0x10; // +0x10 -> data reg if (OPiGPIODebug) printf("func:%s pin:%d,bank:%d index:%d phyaddr:0x%x\n",__func__, gpio,bank,index,phyaddr); diff --git a/source/c_gpio.h b/source/c_gpio.h index 3c6aab4..3615c17 100644 --- a/source/c_gpio.h +++ b/source/c_gpio.h @@ -21,18 +21,25 @@ SOFTWARE. */ + #ifdef FORCE_H6 //USE define_macros=[('FORCE_H6','1')] as argument in distutils.core.Extension !!! #define GPIO_BASE_OPI (0x0300B000) -#define SUNXI_GPIO_BASE (0x0300B000) +#define SUNXI_PIO_BASE (0x0300B000) +#define SUNXI_R_PIO_BASE (0x07022000) +#define DUMMY_PIO_BASE (SUNXI_R_PIO_BASE - 11 * 36) //(0x07021E74) #define SUNXI_PWM_BASE (0x0300A000) #define MAP_SIZE (4096*1) #else #define GPIO_BASE_OPI (0x01C20000) -#define SUNXI_GPIO_BASE (0x01C20800) +#define SUNXI_PIO_BASE (0x01C20800) +#define SUNXI_R_PIO_BASE (0x01F02C00) +#define DUMMY_PIO_BASE (SUNXI_R_PIO_BASE - 11 * 36) //(0x01F02A74) #define SUNXI_PWM_BASE (0x01C21400) #define MAP_SIZE (4096*2) #endif +#define SUNXI_GPIO_REG_OFFSET (0x800) + #define PAGE_SIZE (4*1024) #define BLOCK_SIZE (4*1024) #define MAP_MASK (MAP_SIZE - 1) diff --git a/source/constants.c b/source/constants.c index 7257d6f..f11873a 100644 --- a/source/constants.c +++ b/source/constants.c @@ -98,7 +98,7 @@ void define_constants(PyObject *module) bthree = Py_BuildValue("i", THREE); PyModule_AddObject(module, "THREE", bthree); - version = Py_BuildValue("s", "0.6.4.0"); + version = Py_BuildValue("s", "0.6.5"); PyModule_AddObject(module, "VERSION", version); PyModule_AddObject(module, "PA", Py_BuildValue("i", 0));