diff --git a/CHANGELOG.md b/CHANGELOG.md
index a40a9b2f..f0abd165 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -6,6 +6,27 @@
 
 # Changelog
 
+[@tomjnixon](https://github.com/tomjnixon)	- fixed ignored G53 introduced by #791 (#793)
+																						- fixed status report mask setting introduced in v1.11 (#789)
+
+## [1.11.1] - 13-12-2024
+
+### Changed
+
+- minor improvements the the AVR ini file and better comments (#784)
+- change to the parser to unify G92 and G10 processing path (#791)
+
+### Fixed
+
+- fixed M2/M30 command behavior to match LinuxCNC (#786)
+- fixed status report Tool info (#787)
+- fixed status report mask setting introduced in v1.11 (#789)
+- fixed G10 L20 behavior when the current modal distance mode is in incremental mode (#791)
+- fixed cycle feed and spindle update in a canned cycle (#788)
+- fixed/improved motion mode validation (#792)
+- fixed ignored G53 introduced by #791 (#793)
+- fixed step generation ISR algorithm for LPC17XX (#794)
+
 ## [1.11.0] - 20-11-2024
 
 ### Added
@@ -1805,6 +1826,7 @@ Version 1.1.0 comes with many added features and improvements over the previous
 
 ### Initial release
 
+[1.11.1]: https://github.com/Paciente8159/uCNC/releases/tag/v1.11.1
 [1.11.0]: https://github.com/Paciente8159/uCNC/releases/tag/v1.11.0
 [1.11.0-rc]: https://github.com/Paciente8159/uCNC/releases/tag/v1.11.0-rc
 [1.10.2]: https://github.com/Paciente8159/uCNC/releases/tag/v1.10.2
diff --git a/uCNC/src/cnc_build.h b/uCNC/src/cnc_build.h
index 4abf3bce..c0ee4812 100644
--- a/uCNC/src/cnc_build.h
+++ b/uCNC/src/cnc_build.h
@@ -25,7 +25,7 @@ extern "C"
 #endif
 
 #define CNC_MAJOR_MINOR_VERSION "1.11"
-#define CNC_PATCH_VERSION ".0"
+#define CNC_PATCH_VERSION ".1"
 
 #define CNC_VERSION CNC_MAJOR_MINOR_VERSION CNC_PATCH_VERSION
 
diff --git a/uCNC/src/core/interpolator.c b/uCNC/src/core/interpolator.c
index d0a6cb1d..490bc036 100644
--- a/uCNC/src/core/interpolator.c
+++ b/uCNC/src/core/interpolator.c
@@ -764,6 +764,7 @@ void itp_stop(void)
 		cnc_set_exec_state(EXEC_UNHOMED);
 	}
 
+	mcu_delay_us(10);
 	io_set_steps(g_settings.step_invert_mask);
 #if TOOL_COUNT > 0
 	if (g_settings.laser_mode)
diff --git a/uCNC/src/hal/mcus/lpc176x/mcu_lpc176x.c b/uCNC/src/hal/mcus/lpc176x/mcu_lpc176x.c
index de5cdd60..202d4e63 100644
--- a/uCNC/src/hal/mcus/lpc176x/mcu_lpc176x.c
+++ b/uCNC/src/hal/mcus/lpc176x/mcu_lpc176x.c
@@ -126,7 +126,7 @@ static FORCEINLINE void mcu_set_servos()
 void servo_timer_init(void)
 {
 	LPC_SC->PCONP |= SERVO_PCONP;
-	LPC_SC->SERVO_PCLKSEL_REG &= ~SERVO_PCLKSEL_VAL; // system clk/4
+	LPC_SC->SERVO_PCLKSEL_REG &= ~SERVO_PCLKSEL_MASK; // system clk/4
 
 	SERVO_TIMER_REG->CTCR = 0;
 	SERVO_TIMER_REG->CCR &= ~0x03;
@@ -166,10 +166,6 @@ void MCU_SERVO_ISR(void)
 		SETBIT(SERVO_TIMER_REG->IR, TIM_MR0_INT);
 	}
 	mcu_enable_global_isr();
-	// mcu_clear_servos();
-	// TIM_ClearIntPending(SERVO_TIMER_REG, SERVO_INT_FLAG);
-	// NVIC_ClearPendingIRQ(SERVO_TIMER_IRQ);
-	// TIM_Cmd(SERVO_TIMER_REG, DISABLE);
 }
 
 #endif
@@ -185,17 +181,21 @@ void MCU_RTC_ISR(void)
 void MCU_ITP_ISR(void)
 {
 	mcu_disable_global_isr();
+	NVIC_ClearPendingIRQ(ITP_TIMER_IRQ);
 
-	if (CHECKBIT(ITP_TIMER_REG->IR, TIM_MR1_INT))
-	{
-		mcu_step_reset_cb();
-		SETBIT(ITP_TIMER_REG->IR, TIM_MR1_INT);
-	}
-
+	static bool resetstep = false;
 	if (CHECKBIT(ITP_TIMER_REG->IR, TIM_MR0_INT))
 	{
-		mcu_step_cb();
 		SETBIT(ITP_TIMER_REG->IR, TIM_MR0_INT);
+		if (!resetstep)
+		{
+			mcu_step_cb();
+		}
+		else
+		{
+			mcu_step_reset_cb();
+		}
+		resetstep = !resetstep;
 	}
 
 	mcu_enable_global_isr();
@@ -743,7 +743,7 @@ void mcu_freq_to_clocks(float frequency, uint16_t *ticks, uint16_t *prescaller)
 {
 	frequency = CLAMP((float)F_STEP_MIN, frequency, (float)F_STEP_MAX);
 	// up and down counter (generates half the step rate at each event)
-	uint32_t totalticks = (uint32_t)((float)1000000UL / frequency);
+	uint32_t totalticks = (uint32_t)((float)(F_CPU >> 3) / frequency);
 	// *prescaller = 0;
 	// *ticks = (uint16_t)totalticks;
 	*prescaller = 0;
@@ -758,7 +758,7 @@ void mcu_freq_to_clocks(float frequency, uint16_t *ticks, uint16_t *prescaller)
 
 float mcu_clocks_to_freq(uint16_t ticks, uint16_t prescaller)
 {
-	return (1000000.0f / (float)(((uint32_t)ticks) << prescaller));
+	return ((F_CPU >> 3) / (float)(((uint32_t)ticks) << prescaller));
 }
 
 /**
@@ -768,8 +768,9 @@ void mcu_start_itp_isr(uint16_t ticks, uint16_t prescaller)
 {
 	uint32_t val = (uint32_t)ticks;
 	val <<= prescaller;
+
 	LPC_SC->PCONP |= ITP_PCONP;
-	LPC_SC->ITP_PCLKSEL_REG &= ~ITP_PCLKSEL_VAL; // system clk/4
+	LPC_SC->ITP_PCLKSEL_REG &= ~ITP_PCLKSEL_MASK; // system clk/4
 
 	ITP_TIMER_REG->CTCR = 0;
 	ITP_TIMER_REG->CCR &= ~0x03;
@@ -780,12 +781,11 @@ void mcu_start_itp_isr(uint16_t ticks, uint16_t prescaller)
 	ITP_TIMER_REG->TCR &= ~TIM_RESET; // release reset
 	ITP_TIMER_REG->EMR = 0;
 
-	ITP_TIMER_REG->PR = ((F_CPU >> 2) / 1000000UL) - 1; // for 1us
+	ITP_TIMER_REG->PR = 0; // for higher resolution use PR = 0 that means that the timer will tick at (F_CPU/4)
 	ITP_TIMER_REG->IR = 0xFFFFFFFF;
 
-	ITP_TIMER_REG->MR1 = val >> 1;
 	ITP_TIMER_REG->MR0 = val;
-	ITP_TIMER_REG->MCR = 0x0B; // Interrupt on MC0 and MC1 and reset on MC0
+	ITP_TIMER_REG->MCR = 0x03; // Interrupt on MC0 and MC1 and reset on MC0
 
 	NVIC_SetPriority(ITP_TIMER_IRQ, 1);
 	NVIC_ClearPendingIRQ(ITP_TIMER_IRQ);
@@ -803,7 +803,6 @@ void mcu_change_itp_isr(uint16_t ticks, uint16_t prescaller)
 	uint32_t val = (uint32_t)ticks;
 	val <<= prescaller;
 	ITP_TIMER_REG->TCR &= ~TIM_ENABLE;
-	ITP_TIMER_REG->MR1 = val >> 1;
 	ITP_TIMER_REG->MR0 = val;
 	ITP_TIMER_REG->TCR |= TIM_RESET;
 	ITP_TIMER_REG->TCR &= ~TIM_RESET;
@@ -992,7 +991,7 @@ void mcu_dotasks()
  * */
 uint8_t mcu_eeprom_getc(uint16_t address)
 {
-	DBGMSG("EEPROM invalid address @ %u",address);
+	DBGMSG("EEPROM invalid address @ %u", address);
 	return 0;
 }
 
@@ -1001,7 +1000,7 @@ uint8_t mcu_eeprom_getc(uint16_t address)
  * */
 void mcu_eeprom_putc(uint16_t address, uint8_t value)
 {
-	DBGMSG("EEPROM invalid address @ %u",address);
+	DBGMSG("EEPROM invalid address @ %u", address);
 }
 
 /**
@@ -1707,7 +1706,7 @@ void mcu_config_timeout(mcu_timeout_delgate fp, uint32_t timeout)
 {
 	mcu_timeout_cb = fp;
 	LPC_SC->PCONP |= ONESHOT_PCONP;
-	LPC_SC->ONESHOT_PCLKSEL_REG &= ~ONESHOT_PCLKSEL_VAL; // system clk/4
+	LPC_SC->ONESHOT_PCLKSEL_REG &= ~ONESHOT_PCLKSEL_MASK; // system clk/4
 
 	ONESHOT_TIMER_REG->CTCR = 0;
 	ONESHOT_TIMER_REG->CCR &= ~0x03;
diff --git a/uCNC/src/hal/mcus/lpc176x/mcumap_lpc176x.h b/uCNC/src/hal/mcus/lpc176x/mcumap_lpc176x.h
index 8095469b..c637317e 100644
--- a/uCNC/src/hal/mcus/lpc176x/mcumap_lpc176x.h
+++ b/uCNC/src/hal/mcus/lpc176x/mcumap_lpc176x.h
@@ -4602,7 +4602,7 @@ extern "C"
 #else
 #define ITP_PCLKSEL_REG PCLKSEL1
 #endif
-#define ITP_PCLKSEL_VAL (1 << (__helper__(CLKPWR_PCLKSEL_TIMER, ITP_TIMER, ) & 0x1F))
+#define ITP_PCLKSEL_MASK (3UL << (__helper__(CLKPWR_PCLKSEL_TIMER, ITP_TIMER, ) & 0x1F))
 
 #define MCU_RTC_ISR SysTick_Handler
 
@@ -4619,7 +4619,7 @@ extern "C"
 #else
 #define SERVO_PCLKSEL_REG PCLKSEL1
 #endif
-#define SERVO_PCLKSEL_VAL (1 << (__helper__(CLKPWR_PCLKSEL_TIMER, SERVO_TIMER, ) & 0x1F))
+#define SERVO_PCLKSEL_MASK (3UL << (__helper__(CLKPWR_PCLKSEL_TIMER, SERVO_TIMER, ) & 0x1F))
 
 #ifdef ONESHOT_TIMER
 #define MCU_HAS_ONESHOT_TIMER
@@ -4633,7 +4633,7 @@ extern "C"
 #else
 #define ONESHOT_PCLKSEL_REG PCLKSEL1
 #endif
-#define ONESHOT_PCLKSEL_VAL (1 << (__helper__(CLKPWR_PCLKSEL_TIMER, ONESHOT_TIMER, ) & 0x1F))
+#define ONESHOT_PCLKSEL_MASK (3UL << (__helper__(CLKPWR_PCLKSEL_TIMER, ONESHOT_TIMER, ) & 0x1F))
 #endif
 
 // Indirect macro access