From ec0e05b6c46495c455d486769a4ed25a269b2ee2 Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 00:47:25 -0500 Subject: [PATCH 01/16] px4_fmu-v4: cleanup board_dma_map.h --- .../nuttx-config/include/board_dma_map.h | 71 +++++++++++++------ boards/px4/fmu-v4/src/board_config.h | 2 +- 2 files changed, 52 insertions(+), 21 deletions(-) diff --git a/boards/px4/fmu-v4/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v4/nuttx-config/include/board_dma_map.h index 07befe094e12..375b794f5a8f 100644 --- a/boards/px4/fmu-v4/nuttx-config/include/board_dma_map.h +++ b/boards/px4/fmu-v4/nuttx-config/include/board_dma_map.h @@ -1,23 +1,54 @@ -#pragma once - -/* DMA Channel/Stream Selections +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. * - * DMAMAP_USART3_RX = DMA1, Stream 1, Channel 4 - * DMAMAP_UART4_RX = DMA1, Stream 2, Channel 4 - * DMAMAP_UART7_RX = DMA1, Stream 3, Channel 5 - * DMAMAP_USART2_RX = DMA1, Stream 5, Channel 4 - * DMAMAP_TIM4_UP = DMA1, Stream 6, Channel 2 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. * - *   DMAMAP_SPI1_RX_1 = DMA2, Stream 0, Channel 3 - *   DMAMAP_USART6_RX_1 = DMA2, Stream 1, Channel 4 - *   DMAMAP_USART1_RX_1 = DMA2, Stream 2, Channel 4 - *   DMAMAP_SPI1_TX_1 = DMA2, Stream 3, Channel 3 - * DMAMAP_TIM1_UP = DMA2, Stream 5, Channel 6 - *   DMAMAP_SDIO_2 = DMA2, Stream 6, Channel 4 - */ + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 +// DMAMAP_UART7_RX // DMA1, Stream 3, Channel 5 +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 +// DMAMAP_TIM4_UP // DMA1, Stream 6, Channel 2 (DSHOT) + -#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_1 -#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 -#define DMAMAP_SDIO DMAMAP_SDIO_2 +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI sensors RX) +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 // DMA2, Stream 1, Channel 4 +#define DMAMAP_USART1_RX DMAMAP_USART1_RX_1 // DMA2, Stream 2, Channel 4 +#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX) +// AVAILABLE // DMA2, Stream 4 +// DMAMAP_TIM1_UP // DMA2, Stream 5, Channel 6 (DSHOT) +#define DMAMAP_SDIO DMAMAP_SDIO_2 // DMA2, Stream 6, Channel 4 diff --git a/boards/px4/fmu-v4/src/board_config.h b/boards/px4/fmu-v4/src/board_config.h index 1d4368bb277e..c3bca4eb2529 100644 --- a/boards/px4/fmu-v4/src/board_config.h +++ b/boards/px4/fmu-v4/src/board_config.h @@ -278,7 +278,7 @@ #define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS /* This board provides a DMA pool and APIs. */ -#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 1008) // 5120 fat + 512 + 1008 spi +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 1024) // 5120 fat + 512 + 1024 spi #define BOARD_HAS_ON_RESET 1 From a60d18ab01a706eb50f7c225f4c5613f98e79c4d Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 00:47:56 -0500 Subject: [PATCH 02/16] px4_fmu-v4pro: cleanup board_dma_map.h --- .../nuttx-config/include/board_dma_map.h | 75 +++++++++++++------ boards/px4/fmu-v4pro/src/board_config.h | 6 +- 2 files changed, 57 insertions(+), 24 deletions(-) diff --git a/boards/px4/fmu-v4pro/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v4pro/nuttx-config/include/board_dma_map.h index 884b4a423f34..36aed893bfc3 100644 --- a/boards/px4/fmu-v4pro/nuttx-config/include/board_dma_map.h +++ b/boards/px4/fmu-v4pro/nuttx-config/include/board_dma_map.h @@ -1,23 +1,56 @@ -#pragma once - -/* DMA Channel/Stream Selections +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. * - * DMAMAP_USART3_RX = DMA1, Stream 1, Channel 4 - * DMAMAP_UART4_RX = DMA1, Stream 2, Channel 4 - * DMAMAP_UART7_RX = DMA1, Stream 3, Channel 5 - * DMAMAP_USART2_RX = DMA1, Stream 5, Channel 4 - * DMAMAP_UART8_RX = DMA1, Stream 6, Channel 5 + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: * - *   DMAMAP_SPI1_RX_1 = DMA2, Stream 0, Channel 3 - *   DMAMAP_USART6_RX_2 = DMA2, Stream 2, Channel 5 - *   DMAMAP_SPI1_TX_1 = DMA2, Stream 3, Channel 3 - * DMAMAP_USART1_RX_2 = DMA2, Stream 5, Channel 4 - *   DMAMAP_SDIO_2 = DMA2, Stream 6, Channel 4 - * DMAMAP_USART6_TX_2 = DMA2, Stream 7, Channel 5 - */ -#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 -#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 -#define DMAMAP_SDIO DMAMAP_SDIO_2 -#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 +// DMAMAP_UART7_RX // DMA1, Stream 3, Channel 5 +// AVAILABLE // DMA1, Stream 4 +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 +// DMAMAP_UART8_RX // DMA1, Stream 6, Channel 5 + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI sensors RX) +// AVAILABLE // DMA2, Stream 1 +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 // DMA2, Stream 2, Channel 5 (PX4IO TX) +#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX) +// AVAILABLE // DMA2, Stream 4 +#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 // DMA2, Stream 5, Channel 4 +#define DMAMAP_SDIO DMAMAP_SDIO_2 // DMA2, Stream 6, Channel 4 +#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 (PX4IO TX) diff --git a/boards/px4/fmu-v4pro/src/board_config.h b/boards/px4/fmu-v4pro/src/board_config.h index fc118cac9f09..cc1f5ea319b9 100644 --- a/boards/px4/fmu-v4pro/src/board_config.h +++ b/boards/px4/fmu-v4pro/src/board_config.h @@ -58,8 +58,8 @@ #define PX4IO_SERIAL_RX_GPIO GPIO_USART6_RX #define PX4IO_SERIAL_BASE STM32_USART6_BASE /* hardwired on the board */ #define PX4IO_SERIAL_VECTOR STM32_IRQ_USART6 -#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX_2 -#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX_2 +#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX +#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX #define PX4IO_SERIAL_RCC_REG STM32_RCC_APB2ENR #define PX4IO_SERIAL_RCC_EN RCC_APB2ENR_USART6EN #define PX4IO_SERIAL_CLOCK STM32_PCLK2_FREQUENCY @@ -285,7 +285,7 @@ #define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS /* This board provides a DMA pool and APIs. */ -#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 1008) // 5120 fat + 512 + 1008 spi +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 1024) // 5120 fat + 512 + 1024 spi #define BOARD_HAS_ON_RESET 1 From 6d30af090d769660fee9ff405ec018cea408c4ca Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 00:51:20 -0500 Subject: [PATCH 03/16] px4_fmu-v5: add board_dma_map.h and enable SPI1 DMA --- boards/px4/fmu-v5/init/rc.board_sensors | 2 + .../px4/fmu-v5/nuttx-config/include/board.h | 20 +------ .../nuttx-config/include/board_dma_map.h | 56 +++++++++++++++++++ boards/px4/fmu-v5/nuttx-config/nsh/defconfig | 2 + boards/px4/fmu-v5/src/board_config.h | 2 +- 5 files changed, 62 insertions(+), 20 deletions(-) create mode 100644 boards/px4/fmu-v5/nuttx-config/include/board_dma_map.h diff --git a/boards/px4/fmu-v5/init/rc.board_sensors b/boards/px4/fmu-v5/init/rc.board_sensors index 2ec5f112813d..be35e1b0c852 100644 --- a/boards/px4/fmu-v5/init/rc.board_sensors +++ b/boards/px4/fmu-v5/init/rc.board_sensors @@ -7,9 +7,11 @@ adc start # Internal SPI bus ICM-20602 mpu6000 -R 8 -s -T 20602 start +#icm20602 -R 6 start # Internal SPI bus ICM-20689 mpu6000 -R 8 -z -T 20689 start +#icm20689 -R 6 start # new sensor drivers (in testing) #icm20602 start diff --git a/boards/px4/fmu-v5/nuttx-config/include/board.h b/boards/px4/fmu-v5/nuttx-config/include/board.h index c41f2bef316a..cf31ee09408f 100644 --- a/boards/px4/fmu-v5/nuttx-config/include/board.h +++ b/boards/px4/fmu-v5/nuttx-config/include/board.h @@ -38,6 +38,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include @@ -242,20 +243,6 @@ # define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * if we set aside more DMA channels/streams. - * - * SDMMC DMA is on DMA2 - * - * SDMMC1 DMA - * DMAMAP_SDMMC1_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - * DMAMAP_SDMMC1_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1 - - /* FLASH wait states * * --------- ---------- ----------- @@ -352,11 +339,6 @@ * GPIO_UART8_TX PE1[CN11-61] */ -/* UART RX DMA configurations */ - -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 -#define DMAMAP_USART3_TX DMAMAP_USART3_TX_1 -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 /* CAN * * CAN1 is routed to transceiver. diff --git a/boards/px4/fmu-v5/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v5/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..97323a338b71 --- /dev/null +++ b/boards/px4/fmu-v5/nuttx-config/include/board_dma_map.h @@ -0,0 +1,56 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_UART8_TX // DMA1, Stream 0, Channel 5 (PX4IO TX) +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 (TELEM2 RX) +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 (TELEM4 RX) +#define DMAMAP_USART3_TX DMAMAP_USART3_TX_1 // DMA1, Stream 3, Channel 4 (TELEM2 TX) +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 (TELEM1 RX) +// DMAMAP_UART8_RX // DMA1, Stream 6, Channel 5 (PX4IO RX) + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMAMAP_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI sensors RX) +// AVAILABLE // DMA2, Stream 1 +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 // DMA2, Stream 2, Channel 5 +#define DMAMAP_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX) +// AVAILABLE // DMA2, Stream 4 +// DMAMAP_TIM1_UP // DMA2, Stream 5, Channel 6 (DSHOT) +#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_2 // DMA2, Stream 6, Channel 4 +#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 diff --git a/boards/px4/fmu-v5/nuttx-config/nsh/defconfig b/boards/px4/fmu-v5/nuttx-config/nsh/defconfig index 886c5108ac80..c3618a96e3df 100644 --- a/boards/px4/fmu-v5/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v5/nuttx-config/nsh/defconfig @@ -190,10 +190,12 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y CONFIG_STM32F7_SPI4=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI6=y +CONFIG_STM32F7_SPI_DMA=y CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_UART4=y diff --git a/boards/px4/fmu-v5/src/board_config.h b/boards/px4/fmu-v5/src/board_config.h index 32ae3ad8cc25..b727d0a57306 100644 --- a/boards/px4/fmu-v5/src/board_config.h +++ b/boards/px4/fmu-v5/src/board_config.h @@ -549,7 +549,7 @@ /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 1024 + 1024) // 5120 fat + 1024 + 1024 spi /* This board provides the board_on_reset interface */ From 94567bded9a9c22da1e98a1d7e867230292154eb Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 00:56:15 -0500 Subject: [PATCH 04/16] px4_fmu-v5x: add board_dma_map.h and enable SPI{1,2,3} DMA --- .../px4/fmu-v5x/nuttx-config/include/board.h | 26 +-------- .../nuttx-config/include/board_dma_map.h | 56 +++++++++++++++++++ boards/px4/fmu-v5x/nuttx-config/nsh/defconfig | 4 ++ boards/px4/fmu-v5x/src/board_config.h | 2 +- 4 files changed, 62 insertions(+), 26 deletions(-) create mode 100644 boards/px4/fmu-v5x/nuttx-config/include/board_dma_map.h diff --git a/boards/px4/fmu-v5x/nuttx-config/include/board.h b/boards/px4/fmu-v5x/nuttx-config/include/board.h index 1cdc8ce1f81f..c0eaf85117f3 100644 --- a/boards/px4/fmu-v5x/nuttx-config/include/board.h +++ b/boards/px4/fmu-v5x/nuttx-config/include/board.h @@ -38,6 +38,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include @@ -242,20 +243,6 @@ # define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channel/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * if we set aside more DMA channels/streams. - * - * SDMMC RX and TX DMA is on DMA2 - * - * SDMMC2 DMA - * DMAMAP_SDMMC2_1 = Channel 11, Stream 0 - * DMAMAP_SDMMC2_2 = Channel 11, Stream 5 <- Free for other devices - */ - -#define DMAMAP_SDMMC2 DMAMAP_SDMMC2_1 - - /* FLASH wait states * * --------- ---------- ----------- @@ -355,17 +342,6 @@ * GPIO_UART8_TX PE1 */ -/* U[x]ART DMA configurations */ - -// #define DMAMAP_UART5_RX - DMA1, STREAM 0, Chan 4 - not remapable -// #define DMAMAP_UART5_TX - DMA1, STREAM 7, Chan 4 - not remapable - -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 /* DMA2, STREAM 1, Chan 5 */ -#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 /* DMA2, STREAM 7, Chan 5 */ - -// #define DMAMAP_UART7_RX - DMA1, STREAM 3, Chan 5 - not remapable - -// #define DMAMAP_UART8_RX - DMA1, STREAM 6, Chan 5 - not remapable /* CAN * diff --git a/boards/px4/fmu-v5x/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v5x/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..bc9578bb532e --- /dev/null +++ b/boards/px4/fmu-v5x/nuttx-config/include/board_dma_map.h @@ -0,0 +1,56 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_UART5_RX // DMA1, Stream 0, Channel 4 (TELEM2 RX) +#define DMAMAP_SPI2_RX DMAMAP_SPI2_RX_1 // DMA1, Stream 1, Channel 9 (SPI2 RX) +#define DMAMAP_SPI3_RX DMAMAP_SPI3_RX_2 // DMA1, Stream 2, Channel 0 (SPI3 RX) +// DMAMAP_UART7_RX // DMA1, Stream 3, Channel 5 (TELEM1 RX) +#define DMAMAP_SPI2_TX DMAMAP_SPI2_TX_2 // DMA1, Stream 4, Channel 0 (SPI2 TX) +#define DMAMAP_SPI3_TX DMAMAP_SPI3_TX_1 // DMA1, Stream 5, Channel 0 (SPI3 TX) +// DMAMAP_TIM4_UP // DMA1, Stream 6, Channel 2 (DSHOT) + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMAMAP_SDMMC2 DMAMAP_SDMMC2_1 // DMA2, Stream 0, Channel 11 +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 // DMA2, Stream 1, Channel 5 (PX4IO) +#define DMAMAP_SPI1_RX DMAMAP_SPI1_RX_2 // DMA2, Stream 2, Channel 3 (SPI sensors RX) +#define DMAMAP_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX) +// AVAILABLE // DMA2, Stream 4 +// DMAMAP_TIM1_UP // DMA2, Stream 5, Channel 6 (DSHOT) +// AVAILABLE // DMA2, Stream 6 +#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 (PX4IO) diff --git a/boards/px4/fmu-v5x/nuttx-config/nsh/defconfig b/boards/px4/fmu-v5x/nuttx-config/nsh/defconfig index d7e719b73919..6c3dee8750ca 100644 --- a/boards/px4/fmu-v5x/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v5x/nuttx-config/nsh/defconfig @@ -220,10 +220,14 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y +CONFIG_STM32F7_SPI2_DMA=y CONFIG_STM32F7_SPI3=y +CONFIG_STM32F7_SPI3_DMA=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI6=y +CONFIG_STM32F7_SPI_DMA=y CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_TIM3=y diff --git a/boards/px4/fmu-v5x/src/board_config.h b/boards/px4/fmu-v5x/src/board_config.h index 9192f656431a..43d57b6df828 100644 --- a/boards/px4/fmu-v5x/src/board_config.h +++ b/boards/px4/fmu-v5x/src/board_config.h @@ -543,7 +543,7 @@ /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120+4096 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 4096 + 1024 + 1024) // 5120 fat + 4096 + 1024 + 1024 spi /* This board provides the board_on_reset interface */ From 7f4ae7942910dc546e8bdae993f4991b2809fe4f Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 00:59:20 -0500 Subject: [PATCH 05/16] px4_fmu-v2/v3: add board_dma_map.h and enable SPI1/SPI4 DMA --- .../px4/fmu-v2/nuttx-config/include/board.h | 16 +----- .../nuttx-config/include/board_dma_map.h | 56 +++++++++++++++++++ boards/px4/fmu-v2/nuttx-config/nsh/defconfig | 3 + boards/px4/fmu-v2/src/board_config.h | 6 +- .../px4/fmu-v3/nuttx-config/include/board.h | 16 +----- .../nuttx-config/include/board_dma_map.h | 56 +++++++++++++++++++ boards/px4/fmu-v3/nuttx-config/nsh/defconfig | 3 + boards/px4/fmu-v3/src/board_config.h | 6 +- 8 files changed, 126 insertions(+), 36 deletions(-) create mode 100644 boards/px4/fmu-v2/nuttx-config/include/board_dma_map.h create mode 100644 boards/px4/fmu-v3/nuttx-config/include/board_dma_map.h diff --git a/boards/px4/fmu-v2/nuttx-config/include/board.h b/boards/px4/fmu-v2/nuttx-config/include/board.h index f5ce3bb6e079..00cbe9f0f2a8 100644 --- a/boards/px4/fmu-v2/nuttx-config/include/board.h +++ b/boards/px4/fmu-v2/nuttx-config/include/board.h @@ -40,6 +40,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include #ifndef __ASSEMBLY__ @@ -195,17 +196,6 @@ # define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * is we set aside more DMA channels/streams. - * - * SDIO DMA - *   DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - *   DMAMAP_SDIO_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDIO DMAMAP_SDIO_1 - /* Alternate function pin selections ************************************************/ /* UARTs */ @@ -234,10 +224,6 @@ /* UART8 has no alternate pin config */ -/* UART RX DMA configurations */ - -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 - /* CAN * * CAN1 is routed to the onboard transceiver. diff --git a/boards/px4/fmu-v2/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v2/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..d8055e1dd8c5 --- /dev/null +++ b/boards/px4/fmu-v2/nuttx-config/include/board_dma_map.h @@ -0,0 +1,56 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 +// DMAMAP_UART7_RX // DMA1, Stream 3, Channel 5 +// AVAILABLE // DMA1, Stream 4 +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 +// DMAMAP_TIM4_UP // DMA1, Stream 6, Channel 2 (DSHOT) + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMACHAN_SPI4_RX DMAMAP_SPI4_RX_1 // DMA2, Stream 0, Channel 4 (SPI4 sensors RX) +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 // DMA2, Stream 1, Channel 4 (PX4IO RX) +#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_2 // DMA2, Stream 2, Channel 3 (SPI1 sensors RX) +#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI1 sensors TX) +#define DMACHAN_SPI4_TX DMAMAP_SPI4_TX_2 // DMA2, Stream 4, Channel 5 (SPI4 sensors TX) +// DMAMAP_TIM1_UP // DMA2, Stream 5, Channel 6 (DSHOT) +#define DMAMAP_SDIO DMAMAP_SDIO_2 // DMA2, Stream 6, Channel 4 +#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 (PX4IO TX) diff --git a/boards/px4/fmu-v2/nuttx-config/nsh/defconfig b/boards/px4/fmu-v2/nuttx-config/nsh/defconfig index a5251584e104..f9dc4a1c1e70 100644 --- a/boards/px4/fmu-v2/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v2/nuttx-config/nsh/defconfig @@ -188,8 +188,11 @@ CONFIG_STM32_SDIO_CARD=y CONFIG_STM32_SERIALBRK_BSDCOMPAT=y CONFIG_STM32_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_SPI1=y +CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y CONFIG_STM32_SPI4=y +CONFIG_STM32_SPI4_DMA=y +CONFIG_STM32_SPI_DMA=y CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM3=y diff --git a/boards/px4/fmu-v2/src/board_config.h b/boards/px4/fmu-v2/src/board_config.h index 9e8448baf662..8753c176ca71 100644 --- a/boards/px4/fmu-v2/src/board_config.h +++ b/boards/px4/fmu-v2/src/board_config.h @@ -74,8 +74,8 @@ #define PX4IO_SERIAL_RX_GPIO GPIO_USART6_RX #define PX4IO_SERIAL_BASE STM32_USART6_BASE /* hardwired on the board */ #define PX4IO_SERIAL_VECTOR STM32_IRQ_USART6 -#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX_2 -#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX_2 +#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX +#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX #define PX4IO_SERIAL_RCC_REG STM32_RCC_APB2ENR #define PX4IO_SERIAL_RCC_EN RCC_APB2ENR_USART6EN #define PX4IO_SERIAL_CLOCK STM32_PCLK2_FREQUENCY @@ -421,7 +421,7 @@ #define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 512) // 5120 fat + 512 + 512 spi #define BOARD_HAS_ON_RESET 1 diff --git a/boards/px4/fmu-v3/nuttx-config/include/board.h b/boards/px4/fmu-v3/nuttx-config/include/board.h index 45beb0712976..d61f0fab90a6 100644 --- a/boards/px4/fmu-v3/nuttx-config/include/board.h +++ b/boards/px4/fmu-v3/nuttx-config/include/board.h @@ -40,6 +40,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include #ifndef __ASSEMBLY__ @@ -195,17 +196,6 @@ # define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * is we set aside more DMA channels/streams. - * - * SDIO DMA - *   DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - *   DMAMAP_SDIO_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDIO DMAMAP_SDIO_1 - /* Alternate function pin selections ************************************************/ /* UARTs */ @@ -234,10 +224,6 @@ /* UART8 has no alternate pin config */ -/* UART RX DMA configurations */ - -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 - /* CAN * * CAN1 is routed to the onboard transceiver. diff --git a/boards/px4/fmu-v3/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v3/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..d8055e1dd8c5 --- /dev/null +++ b/boards/px4/fmu-v3/nuttx-config/include/board_dma_map.h @@ -0,0 +1,56 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 +// DMAMAP_UART7_RX // DMA1, Stream 3, Channel 5 +// AVAILABLE // DMA1, Stream 4 +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 +// DMAMAP_TIM4_UP // DMA1, Stream 6, Channel 2 (DSHOT) + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMACHAN_SPI4_RX DMAMAP_SPI4_RX_1 // DMA2, Stream 0, Channel 4 (SPI4 sensors RX) +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 // DMA2, Stream 1, Channel 4 (PX4IO RX) +#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_2 // DMA2, Stream 2, Channel 3 (SPI1 sensors RX) +#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI1 sensors TX) +#define DMACHAN_SPI4_TX DMAMAP_SPI4_TX_2 // DMA2, Stream 4, Channel 5 (SPI4 sensors TX) +// DMAMAP_TIM1_UP // DMA2, Stream 5, Channel 6 (DSHOT) +#define DMAMAP_SDIO DMAMAP_SDIO_2 // DMA2, Stream 6, Channel 4 +#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 (PX4IO TX) diff --git a/boards/px4/fmu-v3/nuttx-config/nsh/defconfig b/boards/px4/fmu-v3/nuttx-config/nsh/defconfig index 56a21ff76444..f7e2f63b71df 100644 --- a/boards/px4/fmu-v3/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v3/nuttx-config/nsh/defconfig @@ -187,8 +187,11 @@ CONFIG_STM32_SDIO_CARD=y CONFIG_STM32_SERIALBRK_BSDCOMPAT=y CONFIG_STM32_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_SPI1=y +CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y CONFIG_STM32_SPI4=y +CONFIG_STM32_SPI4_DMA=y +CONFIG_STM32_SPI_DMA=y CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM3=y diff --git a/boards/px4/fmu-v3/src/board_config.h b/boards/px4/fmu-v3/src/board_config.h index 9e8448baf662..8753c176ca71 100644 --- a/boards/px4/fmu-v3/src/board_config.h +++ b/boards/px4/fmu-v3/src/board_config.h @@ -74,8 +74,8 @@ #define PX4IO_SERIAL_RX_GPIO GPIO_USART6_RX #define PX4IO_SERIAL_BASE STM32_USART6_BASE /* hardwired on the board */ #define PX4IO_SERIAL_VECTOR STM32_IRQ_USART6 -#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX_2 -#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX_2 +#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX +#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX #define PX4IO_SERIAL_RCC_REG STM32_RCC_APB2ENR #define PX4IO_SERIAL_RCC_EN RCC_APB2ENR_USART6EN #define PX4IO_SERIAL_CLOCK STM32_PCLK2_FREQUENCY @@ -421,7 +421,7 @@ #define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 512) // 5120 fat + 512 + 512 spi #define BOARD_HAS_ON_RESET 1 From 11d9d67fcab04ad74f666bd3a091b438b17789f3 Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 01:03:46 -0500 Subject: [PATCH 06/16] uvify_core: add board_dma_map.h and enable SPI1 DMA - synced with px4_fmu-v4 --- .../uvify/core/nuttx-config/include/board.h | 16 +----- .../core/nuttx-config/include/board_dma_map.h | 54 +++++++++++++++++++ boards/uvify/core/nuttx-config/nsh/defconfig | 2 + boards/uvify/core/src/CMakeLists.txt | 1 + boards/uvify/core/src/board_config.h | 2 +- boards/uvify/core/src/init.c | 6 ++- boards/uvify/core/src/timer_config.cpp | 1 - 7 files changed, 63 insertions(+), 19 deletions(-) create mode 100644 boards/uvify/core/nuttx-config/include/board_dma_map.h diff --git a/boards/uvify/core/nuttx-config/include/board.h b/boards/uvify/core/nuttx-config/include/board.h index 0529569153c3..166a31723a8a 100644 --- a/boards/uvify/core/nuttx-config/include/board.h +++ b/boards/uvify/core/nuttx-config/include/board.h @@ -40,6 +40,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include #ifndef __ASSEMBLY__ @@ -195,17 +196,6 @@ # define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * is we set aside more DMA channels/streams. - * - * SDIO DMA - *   DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - *   DMAMAP_SDIO_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDIO DMAMAP_SDIO_1 - /* Alternate function pin selections ************************************************/ /* @@ -235,10 +225,6 @@ /* UART8 has no alternate pin config */ -/* UART RX DMA configurations */ -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_1 /*DMA2 Stream 2*/ -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 /*DMA2 Stream 1*/ - /* * CAN * diff --git a/boards/uvify/core/nuttx-config/include/board_dma_map.h b/boards/uvify/core/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..375b794f5a8f --- /dev/null +++ b/boards/uvify/core/nuttx-config/include/board_dma_map.h @@ -0,0 +1,54 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 +// DMAMAP_UART7_RX // DMA1, Stream 3, Channel 5 +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 +// DMAMAP_TIM4_UP // DMA1, Stream 6, Channel 2 (DSHOT) + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI sensors RX) +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 // DMA2, Stream 1, Channel 4 +#define DMAMAP_USART1_RX DMAMAP_USART1_RX_1 // DMA2, Stream 2, Channel 4 +#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX) +// AVAILABLE // DMA2, Stream 4 +// DMAMAP_TIM1_UP // DMA2, Stream 5, Channel 6 (DSHOT) +#define DMAMAP_SDIO DMAMAP_SDIO_2 // DMA2, Stream 6, Channel 4 diff --git a/boards/uvify/core/nuttx-config/nsh/defconfig b/boards/uvify/core/nuttx-config/nsh/defconfig index 556c38c7d094..1fe75a68e22b 100644 --- a/boards/uvify/core/nuttx-config/nsh/defconfig +++ b/boards/uvify/core/nuttx-config/nsh/defconfig @@ -186,8 +186,10 @@ CONFIG_STM32_SDIO_CARD=y CONFIG_STM32_SERIALBRK_BSDCOMPAT=y CONFIG_STM32_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_SPI1=y +CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y CONFIG_STM32_SPI4=y +CONFIG_STM32_SPI_DMA=y CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM8=y diff --git a/boards/uvify/core/src/CMakeLists.txt b/boards/uvify/core/src/CMakeLists.txt index 8e470f2ead15..f17f030cf284 100644 --- a/boards/uvify/core/src/CMakeLists.txt +++ b/boards/uvify/core/src/CMakeLists.txt @@ -48,4 +48,5 @@ target_link_libraries(drivers_board nuttx_arch # sdio nuttx_drivers # sdio px4_layer + arch_io_pins ) diff --git a/boards/uvify/core/src/board_config.h b/boards/uvify/core/src/board_config.h index b8f17cbd2166..202cb02e10e5 100644 --- a/boards/uvify/core/src/board_config.h +++ b/boards/uvify/core/src/board_config.h @@ -284,7 +284,7 @@ #define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS /* This board provides a DMA pool and APIs. */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 1024) // 5120 fat + 512 + 1024 spi #define BOARD_HAS_ON_RESET 1 diff --git a/boards/uvify/core/src/init.c b/boards/uvify/core/src/init.c index 41940559345f..04ae1f60a5e1 100644 --- a/boards/uvify/core/src/init.c +++ b/boards/uvify/core/src/init.c @@ -73,10 +73,12 @@ #include -#include #include #include +#include +#include + /**************************************************************************** * Pre-Processor Definitions ****************************************************************************/ @@ -146,7 +148,7 @@ __EXPORT void board_on_reset(int status) px4_arch_configgpio(io_timer_channel_get_gpio_output(i)); } - /* + /** * On resets invoked from system (not boot) insure we establish a low * output state (discharge the pins) on PWM pins before they become inputs. */ diff --git a/boards/uvify/core/src/timer_config.cpp b/boards/uvify/core/src/timer_config.cpp index 9c3b0e40eb7b..4b13297bcd66 100644 --- a/boards/uvify/core/src/timer_config.cpp +++ b/boards/uvify/core/src/timer_config.cpp @@ -57,4 +57,3 @@ constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { constexpr io_timers_channel_mapping_t io_timers_channel_mapping = initIOTimerChannelMapping(io_timers, timer_io_channels); - From faf03fda236333622da0698cc1448400bdeec7c9 Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 01:09:52 -0500 Subject: [PATCH 07/16] modalai_fc-v1: add board_dma_map.h and enable SPI1/SPI2 DMA --- .../fc-v1/nuttx-config/include/board.h | 27 +-------- .../nuttx-config/include/board_dma_map.h | 56 +++++++++++++++++++ .../modalai/fc-v1/nuttx-config/nsh/defconfig | 4 +- boards/modalai/fc-v1/src/board_config.h | 2 +- 4 files changed, 61 insertions(+), 28 deletions(-) create mode 100644 boards/modalai/fc-v1/nuttx-config/include/board_dma_map.h diff --git a/boards/modalai/fc-v1/nuttx-config/include/board.h b/boards/modalai/fc-v1/nuttx-config/include/board.h index b4cf80c42095..1687a91444a6 100644 --- a/boards/modalai/fc-v1/nuttx-config/include/board.h +++ b/boards/modalai/fc-v1/nuttx-config/include/board.h @@ -38,6 +38,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include @@ -242,20 +243,6 @@ # define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channel/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * if we set aside more DMA channels/streams. - * - * SDMMC RX and TX DMA is on DMA2 - * - * SDMMC2 DMA - * DMAMAP_SDMMC2_1 = Channel 11, Stream 0 - * DMAMAP_SDMMC2_2 = Channel 11, Stream 5 <- Free for other devices - */ - -#define DMAMAP_SDMMC2 DMAMAP_SDMMC2_1 - - /* FLASH wait states * * --------- ---------- ----------- @@ -355,18 +342,6 @@ * GPIO_UART8_TX PE1 */ -/* U[x]ART DMA configurations */ - -// #define DMAMAP_UART5_RX - DMA1, STREAM 0, Chan 4 - not remapable -// #define DMAMAP_UART5_TX - DMA1, STREAM 7, Chan 4 - not remapable - -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 /* DMA2, STREAM 1, Chan 5 */ -#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 /* DMA2, STREAM 7, Chan 5 */ - -// #define DMAMAP_UART7_RX - DMA1, STREAM 3, Chan 5 - not remapable - -// #define DMAMAP_UART8_RX - DMA1, STREAM 6, Chan 5 - not remapable - /* CAN * * CAN1 is routed to transceiver. diff --git a/boards/modalai/fc-v1/nuttx-config/include/board_dma_map.h b/boards/modalai/fc-v1/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..048797f71b40 --- /dev/null +++ b/boards/modalai/fc-v1/nuttx-config/include/board_dma_map.h @@ -0,0 +1,56 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_UART5_RX // DMA1, Stream 0, Channel 4 (TELEM2 RX) +#define DMAMAP_SPI2_RX DMAMAP_SPI2_RX_1 // DMA1, Stream 1, Channel 9 (SPI2 RX) +#define DMAMAP_SPI3_RX DMAMAP_SPI3_RX_2 // DMA1, Stream 2, Channel 0 (SPI3 RX) +// DMAMAP_UART7_RX // DMA1, Stream 3, Channel 5 (TELEM1 RX) +#define DMAMAP_SPI2_TX DMAMAP_SPI2_TX_2 // DMA1, Stream 4, Channel 0 (SPI2 TX) +#define DMAMAP_SPI3_TX DMAMAP_SPI3_TX_1 // DMA1, Stream 5, Channel 0 (SPI3 TX) +// DMAMAP_TIM4_UP // DMA1, Stream 6, Channel 2 (DSHOT) + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMAMAP_SDMMC2 DMAMAP_SDMMC2_1 // DMA2, Stream 0, Channel 11 +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 // DMA2, Stream 1, Channel 5 +#define DMAMAP_SPI1_RX DMAMAP_SPI1_RX_2 // DMA2, Stream 2, Channel 3 (SPI sensors RX) +#define DMAMAP_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX) +// AVAILABLE // DMA2, Stream 4 +// DMAMAP_TIM1_UP // DMA2, Stream 5, Channel 6 (DSHOT) +// AVAILABLE // DMA2, Stream 6 +#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 diff --git a/boards/modalai/fc-v1/nuttx-config/nsh/defconfig b/boards/modalai/fc-v1/nuttx-config/nsh/defconfig index 06f605159b92..1dc2d9562ad5 100644 --- a/boards/modalai/fc-v1/nuttx-config/nsh/defconfig +++ b/boards/modalai/fc-v1/nuttx-config/nsh/defconfig @@ -190,9 +190,12 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y +CONFIG_STM32F7_SPI2_DMA=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI6=y +CONFIG_STM32F7_SPI_DMA=y CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_TIM3=y @@ -230,7 +233,6 @@ CONFIG_UART7_RXDMA=y CONFIG_UART7_TXBUFSIZE=3000 CONFIG_UART8_BAUD=57600 CONFIG_UART8_RXBUFSIZE=600 -CONFIG_UART8_RXDMA=y CONFIG_UART8_TXBUFSIZE=1500 CONFIG_USART1_BAUD=57600 CONFIG_USART1_RXBUFSIZE=600 diff --git a/boards/modalai/fc-v1/src/board_config.h b/boards/modalai/fc-v1/src/board_config.h index d7d0f13d701a..6d071b130215 100644 --- a/boards/modalai/fc-v1/src/board_config.h +++ b/boards/modalai/fc-v1/src/board_config.h @@ -365,7 +365,7 @@ /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 1024 + 1024) // 5120 fat + 1024 + 1024 spi /* This board provides the board_on_reset interface */ From f51094bb3c048eab6217af9bffbaebe776397f8e Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 01:11:17 -0500 Subject: [PATCH 08/16] airmind_mindpx-v2: add board_dma_map.h and enable SPI1 DMA --- .../mindpx-v2/nuttx-config/include/board.h | 18 +------ .../nuttx-config/include/board_dma_map.h | 49 +++++++++++++++++++ .../mindpx-v2/nuttx-config/nsh/defconfig | 3 +- boards/airmind/mindpx-v2/src/board_config.h | 2 +- 4 files changed, 54 insertions(+), 18 deletions(-) create mode 100644 boards/airmind/mindpx-v2/nuttx-config/include/board_dma_map.h diff --git a/boards/airmind/mindpx-v2/nuttx-config/include/board.h b/boards/airmind/mindpx-v2/nuttx-config/include/board.h index c1470c922cdb..1649b00366b1 100644 --- a/boards/airmind/mindpx-v2/nuttx-config/include/board.h +++ b/boards/airmind/mindpx-v2/nuttx-config/include/board.h @@ -40,6 +40,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include #ifndef __ASSEMBLY__ @@ -195,17 +196,6 @@ # define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * is we set aside more DMA channels/streams. - * - * SDIO DMA - *   DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - *   DMAMAP_SDIO_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDIO DMAMAP_SDIO_1 - /* Alternate function pin selections ************************************************/ /* @@ -235,10 +225,6 @@ /* UART8 has no alternate pin config */ -/* UART RX DMA configurations */ -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 - /* * CAN * @@ -303,7 +289,7 @@ extern "C" { * * Description: * All STM32 architectures must provide the following entry point. This entry point - * is called early in the intitialization -- after all memory has been configured + * is called early in the initialization -- after all memory has been configured * and mapped but before any devices have been initialized. * ************************************************************************************/ diff --git a/boards/airmind/mindpx-v2/nuttx-config/include/board_dma_map.h b/boards/airmind/mindpx-v2/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..a62644aae01e --- /dev/null +++ b/boards/airmind/mindpx-v2/nuttx-config/include/board_dma_map.h @@ -0,0 +1,49 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI sensors RX) +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 // DMA2, Stream 1, Channel 4 +#define DMAMAP_USART1_RX DMAMAP_USART1_RX_1 // DMA2, Stream 2, Channel 4 +#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX) +// AVAILABLE // DMA2, Stream 4 +// AVAILABLE // DMA2, Stream 5, Channel 6 +#define DMAMAP_SDIO DMAMAP_SDIO_2 // DMA2, Stream 6, Channel 4 diff --git a/boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig b/boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig index c310b7c0d9cb..9457e22f3274 100644 --- a/boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig +++ b/boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig @@ -187,8 +187,10 @@ CONFIG_STM32_SDIO_CARD=y CONFIG_STM32_SERIALBRK_BSDCOMPAT=y CONFIG_STM32_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_SPI1=y +CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y CONFIG_STM32_SPI4=y +CONFIG_STM32_SPI_DMA=y CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM3=y @@ -218,7 +220,6 @@ CONFIG_UART7_SERIAL_CONSOLE=y CONFIG_UART7_TXBUFSIZE=300 CONFIG_UART8_BAUD=57600 CONFIG_UART8_RXBUFSIZE=300 -CONFIG_UART8_RXDMA=y CONFIG_UART8_TXBUFSIZE=300 CONFIG_USART1_RXBUFSIZE=128 CONFIG_USART1_RXDMA=y diff --git a/boards/airmind/mindpx-v2/src/board_config.h b/boards/airmind/mindpx-v2/src/board_config.h index 4237c83b7fa8..7122e7d2ced6 100644 --- a/boards/airmind/mindpx-v2/src/board_config.h +++ b/boards/airmind/mindpx-v2/src/board_config.h @@ -232,7 +232,7 @@ /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 512) // 5120 fat + 512 + 512 spi /* This board provides the board_on_reset interface */ From 66a53f61576061d73ea0f06cce3b5ebadfe4a995 Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 01:12:38 -0500 Subject: [PATCH 09/16] av_x-v1: add board_dma_map.h and enable SPI1/SPI2 DMA --- boards/av/x-v1/nuttx-config/include/board.h | 20 +------ .../x-v1/nuttx-config/include/board_dma_map.h | 55 +++++++++++++++++++ boards/av/x-v1/nuttx-config/nsh/defconfig | 4 +- boards/av/x-v1/src/board_config.h | 2 +- 4 files changed, 60 insertions(+), 21 deletions(-) create mode 100644 boards/av/x-v1/nuttx-config/include/board_dma_map.h diff --git a/boards/av/x-v1/nuttx-config/include/board.h b/boards/av/x-v1/nuttx-config/include/board.h index 4dd5ba546c68..f3a7045d0a87 100644 --- a/boards/av/x-v1/nuttx-config/include/board.h +++ b/boards/av/x-v1/nuttx-config/include/board.h @@ -37,6 +37,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include @@ -242,20 +243,6 @@ # define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * if we set aside more DMA channels/streams. - * - * SDMMC DMA is on DMA2 - * - * SDMMC1 DMA - * DMAMAP_SDMMC1_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - * DMAMAP_SDMMC1_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1 - - /* FLASH wait states * * --------- ---------- ----------- @@ -300,11 +287,6 @@ * GPIO_UART8_TX PE1 */ -/* UART RX DMA configurations */ - -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 - /* CAN * * CAN1 is routed to transceiver. diff --git a/boards/av/x-v1/nuttx-config/include/board_dma_map.h b/boards/av/x-v1/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..6b6c8dff0186 --- /dev/null +++ b/boards/av/x-v1/nuttx-config/include/board_dma_map.h @@ -0,0 +1,55 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_UART5_RX // DMA1, Stream 0, Channel 4 +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 +// AVAILABLE // DMA1, Stream 2, Channel 4 +#define DMAMAP_SPI2_RX DMAMAP_SPI2_RX_2 // DMA1, Stream 3, Channel 0 (SPI2 RX) +#define DMAMAP_SPI2_TX DMAMAP_SPI2_TX_2 // DMA1, Stream 4, Channel 0 (SPI2 TX) +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 +// DMAMAP_UART8_RX // DMA1, Stream 6, Channel 5 (CONSOLE) + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMAMAP_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI1 RX) +// AVAILABLE // DMA2, Stream 1 +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 // DMA2, Stream 2, Channel 5 +#define DMAMAP_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI1 TX) +// AVAILABLE // DMA2, Stream 4 +#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 // DMA2, Stream 5, Channel 4 +#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_2 // DMA2, Stream 6, Channel 4 diff --git a/boards/av/x-v1/nuttx-config/nsh/defconfig b/boards/av/x-v1/nuttx-config/nsh/defconfig index a55147624ddc..bd25b60c2450 100644 --- a/boards/av/x-v1/nuttx-config/nsh/defconfig +++ b/boards/av/x-v1/nuttx-config/nsh/defconfig @@ -210,9 +210,12 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y +CONFIG_STM32F7_SPI2_DMA=y CONFIG_STM32F7_SPI4=y CONFIG_STM32F7_SPI5=y +CONFIG_STM32F7_SPI_DMA=y CONFIG_STM32F7_TIM14=y CONFIG_STM32F7_TIM3=y CONFIG_STM32F7_UART4=y @@ -242,7 +245,6 @@ CONFIG_UART5_RXDMA=y CONFIG_UART5_TXBUFSIZE=1500 CONFIG_UART7_BAUD=57600 CONFIG_UART7_RXBUFSIZE=600 -CONFIG_UART7_RXDMA=y CONFIG_UART7_TXBUFSIZE=1500 CONFIG_UART8_BAUD=57600 CONFIG_UART8_RXBUFSIZE=600 diff --git a/boards/av/x-v1/src/board_config.h b/boards/av/x-v1/src/board_config.h index c21013d726dc..385930c2a068 100644 --- a/boards/av/x-v1/src/board_config.h +++ b/boards/av/x-v1/src/board_config.h @@ -236,7 +236,7 @@ /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 512) // 5120 fat + 512 + 512 spi /* This board provides the board_on_reset interface */ From 149c82125cc24be9e333e6a09259bf8a1dc94c10 Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 01:14:29 -0500 Subject: [PATCH 10/16] mro_ctrl-zero-f7: add board_dma_map.h and enable SPI1/SPI5 DMA --- .../ctrl-zero-f7/nuttx-config/include/board.h | 19 +------ .../nuttx-config/include/board_dma_map.h | 55 +++++++++++++++++++ .../ctrl-zero-f7/nuttx-config/nsh/defconfig | 3 + boards/mro/ctrl-zero-f7/src/board_config.h | 2 +- 4 files changed, 60 insertions(+), 19 deletions(-) create mode 100644 boards/mro/ctrl-zero-f7/nuttx-config/include/board_dma_map.h diff --git a/boards/mro/ctrl-zero-f7/nuttx-config/include/board.h b/boards/mro/ctrl-zero-f7/nuttx-config/include/board.h index f6a143f3bc96..4e9b3c0493c9 100644 --- a/boards/mro/ctrl-zero-f7/nuttx-config/include/board.h +++ b/boards/mro/ctrl-zero-f7/nuttx-config/include/board.h @@ -38,6 +38,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include @@ -241,20 +242,6 @@ # define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * if we set aside more DMA channels/streams. - * - * SDMMC DMA is on DMA2 - * - * SDMMC1 DMA - * DMAMAP_SDMMC1_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - * DMAMAP_SDMMC1_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1 - - /* FLASH wait states * * --------- ---------- ----------- @@ -296,10 +283,6 @@ * GPIO_UART8_TX PE1 */ -/* UART RX DMA configurations */ -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 - - /* CAN * * CAN1 is routed to transceiver. diff --git a/boards/mro/ctrl-zero-f7/nuttx-config/include/board_dma_map.h b/boards/mro/ctrl-zero-f7/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..5d13ca53d9f3 --- /dev/null +++ b/boards/mro/ctrl-zero-f7/nuttx-config/include/board_dma_map.h @@ -0,0 +1,55 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 +#define DMAMAP_USART3_TX DMAMAP_USART3_TX_1 // DMA1, Stream 3, Channel 4 +// AVAILABLE // DMA2, Stream 4 +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMAMAP_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI1 sensors RX) +// AVAILABLE // DMA2, Stream 1 +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 // DMA2, Stream 2, Channel 5 +#define DMAMAP_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI1 sensors TX) +#define DMAMAP_SPI5_TX DMAMAP_SPI5_TX_1 // DMA2, Stream 4, Channel 3 (SPI5 sensors TX) +#define DMAMAP_SPI5_RX DMAMAP_SPI5_RX_2 // DMA2, Stream 5, Channel 3 (SPI5 sensors RX) +#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_2 // DMA2, Stream 6, Channel 4 +#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 diff --git a/boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig b/boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig index 7b0972c0842c..89d47790209e 100644 --- a/boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig +++ b/boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig @@ -187,8 +187,11 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y CONFIG_STM32F7_SPI5=y +CONFIG_STM32F7_SPI5_DMA=y +CONFIG_STM32F7_SPI_DMA=y CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_TIM3=y diff --git a/boards/mro/ctrl-zero-f7/src/board_config.h b/boards/mro/ctrl-zero-f7/src/board_config.h index fce51dcfd440..17e1009d0511 100644 --- a/boards/mro/ctrl-zero-f7/src/board_config.h +++ b/boards/mro/ctrl-zero-f7/src/board_config.h @@ -248,7 +248,7 @@ #define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 512) // 5120 fat + 512 + 512 spi /* This board provides the board_on_reset interface */ #define BOARD_HAS_ON_RESET 1 From 62a40abbd46af63e79b5192a2c3185af63822110 Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 01:15:53 -0500 Subject: [PATCH 11/16] mro_x21: add board_dma_map.h and enable SPI1 DMA --- boards/mro/x21/nuttx-config/include/board.h | 16 +----- .../x21/nuttx-config/include/board_dma_map.h | 56 +++++++++++++++++++ boards/mro/x21/nuttx-config/nsh/defconfig | 2 + boards/mro/x21/src/board_config.h | 6 +- 4 files changed, 62 insertions(+), 18 deletions(-) create mode 100644 boards/mro/x21/nuttx-config/include/board_dma_map.h diff --git a/boards/mro/x21/nuttx-config/include/board.h b/boards/mro/x21/nuttx-config/include/board.h index cbada0ff36a0..0a469416e3db 100644 --- a/boards/mro/x21/nuttx-config/include/board.h +++ b/boards/mro/x21/nuttx-config/include/board.h @@ -41,6 +41,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include #ifndef __ASSEMBLY__ @@ -196,17 +197,6 @@ # define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * is we set aside more DMA channels/streams. - * - * SDIO DMA - *   DMAMAP_SDIO_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - *   DMAMAP_SDIO_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDIO DMAMAP_SDIO_1 - /* Alternate function pin selections ************************************************/ /* UARTs */ @@ -235,10 +225,6 @@ /* UART8 has no alternate pin config */ -/* UART RX DMA configurations */ - -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 - /* CAN * * CAN1 is routed to the onboard transceiver. diff --git a/boards/mro/x21/nuttx-config/include/board_dma_map.h b/boards/mro/x21/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..7425f02c9ba0 --- /dev/null +++ b/boards/mro/x21/nuttx-config/include/board_dma_map.h @@ -0,0 +1,56 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 +// DMAMAP_UART7_RX // DMA1, Stream 3, Channel 5 +// AVAILABLE // DMA1, Stream 4 +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 +// DMAMAP_TIM4_UP // DMA1, Stream 6, Channel 2 (DSHOT) + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// AVAILABLE // DMA2, Stream 0 +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 // DMA2, Stream 1, Channel 4 (PX4IO RX) +#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_2 // DMA2, Stream 2, Channel 3 (SPI1 sensors RX) +#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI1 sensors TX) +// AVAILABLE // DMA2, Stream 4 +// DMAMAP_TIM1_UP // DMA2, Stream 5, Channel 6 (DSHOT) +#define DMAMAP_SDIO DMAMAP_SDIO_2 // DMA2, Stream 6, Channel 4 +#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 (PX4IO TX) diff --git a/boards/mro/x21/nuttx-config/nsh/defconfig b/boards/mro/x21/nuttx-config/nsh/defconfig index 52c4375ac99b..22320c1b3e42 100644 --- a/boards/mro/x21/nuttx-config/nsh/defconfig +++ b/boards/mro/x21/nuttx-config/nsh/defconfig @@ -186,7 +186,9 @@ CONFIG_STM32_SDIO_CARD=y CONFIG_STM32_SERIALBRK_BSDCOMPAT=y CONFIG_STM32_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_SPI1=y +CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y +CONFIG_STM32_SPI_DMA=y CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM3=y diff --git a/boards/mro/x21/src/board_config.h b/boards/mro/x21/src/board_config.h index 1646687d5681..c68d98f21508 100644 --- a/boards/mro/x21/src/board_config.h +++ b/boards/mro/x21/src/board_config.h @@ -59,8 +59,8 @@ #define PX4IO_SERIAL_RX_GPIO GPIO_USART6_RX #define PX4IO_SERIAL_BASE STM32_USART6_BASE /* hardwired on the board */ #define PX4IO_SERIAL_VECTOR STM32_IRQ_USART6 -#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX_2 -#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX_2 +#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX +#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX #define PX4IO_SERIAL_RCC_REG STM32_RCC_APB2ENR #define PX4IO_SERIAL_RCC_EN RCC_APB2ENR_USART6EN #define PX4IO_SERIAL_CLOCK STM32_PCLK2_FREQUENCY @@ -176,7 +176,7 @@ #define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 512) // 5120 fat + 512 + 512 spi /* This board provides the board_on_reset interface */ From 9ad0dd6a07b84de5c68e1e266e895042e7e639ce Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 01:17:55 -0500 Subject: [PATCH 12/16] mro_x21-777: add board_dma_map.h and enable SPI1 DMA --- .../mro/x21-777/nuttx-config/include/board.h | 21 +------ .../nuttx-config/include/board_dma_map.h | 56 +++++++++++++++++++ boards/mro/x21-777/nuttx-config/nsh/defconfig | 2 + boards/mro/x21-777/src/board_config.h | 6 +- 4 files changed, 62 insertions(+), 23 deletions(-) create mode 100644 boards/mro/x21-777/nuttx-config/include/board_dma_map.h diff --git a/boards/mro/x21-777/nuttx-config/include/board.h b/boards/mro/x21-777/nuttx-config/include/board.h index 34a5f9a3eafc..c2b96ef8c4a2 100644 --- a/boards/mro/x21-777/nuttx-config/include/board.h +++ b/boards/mro/x21-777/nuttx-config/include/board.h @@ -38,6 +38,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include @@ -242,20 +243,6 @@ # define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) #endif -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * if we set aside more DMA channels/streams. - * - * SDMMC DMA is on DMA2 - * - * SDMMC1 DMA - * DMAMAP_SDMMC1_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - * DMAMAP_SDMMC1_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1 - - /* FLASH wait states * * --------- ---------- ----------- @@ -294,14 +281,8 @@ #define GPIO_UART7_RX GPIO_UART7_RX_1 #define GPIO_UART7_TX GPIO_UART7_TX_1 - /* UART8 has no alternate pin config */ -/* UART RX DMA configurations */ - -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 - /* * CAN * diff --git a/boards/mro/x21-777/nuttx-config/include/board_dma_map.h b/boards/mro/x21-777/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..67f34c7b854c --- /dev/null +++ b/boards/mro/x21-777/nuttx-config/include/board_dma_map.h @@ -0,0 +1,56 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_UART8_TX // DMA1, Stream 0, Channel 5 (PX4IO TX) +// DMAMAP_USART3_RX // DMA1, Stream 1, Channel 4 (TELEM2 RX) +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 (TELEM4 RX) +#define DMAMAP_USART3_TX DMAMAP_USART3_TX_1 // DMA1, Stream 3, Channel 4 (TELEM2 TX) +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 (TELEM1 RX) +// DMAMAP_UART8_RX // DMA1, Stream 6, Channel 5 (PX4IO RX) + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMAMAP_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI sensors RX) +// AVAILABLE // DMA2, Stream 1 +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 // DMA2, Stream 2, Channel 5 +#define DMAMAP_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX) +// AVAILABLE // DMA2, Stream 4 +#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 // DMA2, Stream 5, Channel 4 +#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_2 // DMA2, Stream 6, Channel 4 +#define DMAMAP_USART6_TX DMAMAP_USART6_TX_2 // DMA2, Stream 7, Channel 5 diff --git a/boards/mro/x21-777/nuttx-config/nsh/defconfig b/boards/mro/x21-777/nuttx-config/nsh/defconfig index 0f17540a053d..61ecc2e0f928 100644 --- a/boards/mro/x21-777/nuttx-config/nsh/defconfig +++ b/boards/mro/x21-777/nuttx-config/nsh/defconfig @@ -187,7 +187,9 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y +CONFIG_STM32F7_SPI_DMA=y CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM3=y CONFIG_STM32F7_TIM9=y diff --git a/boards/mro/x21-777/src/board_config.h b/boards/mro/x21-777/src/board_config.h index 8eb6a8c4c910..036ddc9f098f 100644 --- a/boards/mro/x21-777/src/board_config.h +++ b/boards/mro/x21-777/src/board_config.h @@ -61,8 +61,8 @@ #define PX4IO_SERIAL_RX_GPIO GPIO_USART6_RX #define PX4IO_SERIAL_BASE STM32_USART6_BASE #define PX4IO_SERIAL_VECTOR STM32_IRQ_USART6 -#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX_2 -#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX_2 +#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_USART6_TX +#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_USART6_RX #define PX4IO_SERIAL_RCC_REG STM32_RCC_APB2ENR #define PX4IO_SERIAL_RCC_EN RCC_APB2ENR_USART6EN #define PX4IO_SERIAL_CLOCK STM32_PCLK2_FREQUENCY @@ -178,7 +178,7 @@ #define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 +#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 512) // 5120 fat + 512 + 512 spi /* This board provides the board_on_reset interface */ From e11fa207ed8a1c0dfd6ac1c365e37c81441b735f Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 01:21:01 -0500 Subject: [PATCH 13/16] intel_aerofc-v1: add board_dma_map.h and enable SPI1 DMA --- .../aerofc-v1/nuttx-config/include/board.h | 3 +- .../nuttx-config/include/board_dma_map.h | 54 +++++++++++++++++++ .../aerofc-v1/nuttx-config/nsh/defconfig | 2 + 3 files changed, 57 insertions(+), 2 deletions(-) create mode 100644 boards/intel/aerofc-v1/nuttx-config/include/board_dma_map.h diff --git a/boards/intel/aerofc-v1/nuttx-config/include/board.h b/boards/intel/aerofc-v1/nuttx-config/include/board.h index 39c90659468d..a024bedd3c1f 100644 --- a/boards/intel/aerofc-v1/nuttx-config/include/board.h +++ b/boards/intel/aerofc-v1/nuttx-config/include/board.h @@ -40,6 +40,7 @@ /************************************************************************************ * Included Files ************************************************************************************/ +#include "board_dma_map.h" #include @@ -219,7 +220,6 @@ // ESC #define GPIO_USART1_TX GPIO_USART1_TX_2 #define GPIO_USART1_RX GPIO_USART1_RX_2 -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 // Companion #define GPIO_USART2_TX GPIO_USART2_TX_1 @@ -245,7 +245,6 @@ // Serial console #define GPIO_USART6_TX GPIO_USART6_TX_1 #define GPIO_USART6_RX GPIO_USART6_RX_1 -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 /* * I2C diff --git a/boards/intel/aerofc-v1/nuttx-config/include/board_dma_map.h b/boards/intel/aerofc-v1/nuttx-config/include/board_dma_map.h new file mode 100644 index 000000000000..4a9df104777c --- /dev/null +++ b/boards/intel/aerofc-v1/nuttx-config/include/board_dma_map.h @@ -0,0 +1,54 @@ +/**************************************************************************** + * + * Copyright (c) 2020 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#pragma once + + +// DMA1 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +// DMAMAP_UART5_RX // DMA1, Stream 0, Channel 4 +// AVAILABLE // DMA1, Stream 1 +// DMAMAP_UART4_RX // DMA1, Stream 2, Channel 4 +// DMAMAP_UART7_RX // DMA1, Stream 3, Channel 5 +// AVAILABLE // DMA1, Stream 4 +// DMAMAP_USART2_RX // DMA1, Stream 5, Channel 4 + + +// DMA2 Channel/Stream Selections +//--------------------------------------------//---------------------------//---------------- +#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1 // DMA2, Stream 0, Channel 3 (SPI sensors RX) +#define DMAMAP_USART6_RX DMAMAP_USART6_RX_1 // DMA2, Stream 1, Channel 4 (CONSOLE) +#define DMAMAP_USART1_RX DMAMAP_USART1_RX_1 // DMA2, Stream 2, Channel 4 +#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1 // DMA2, Stream 3, Channel 3 (SPI sensors TX) +// AVAILABLE // DMA2, Stream 4 +// AVAILABLE // DMA2, Stream 5 diff --git a/boards/intel/aerofc-v1/nuttx-config/nsh/defconfig b/boards/intel/aerofc-v1/nuttx-config/nsh/defconfig index 522610e1db9c..3edad3b3a29d 100644 --- a/boards/intel/aerofc-v1/nuttx-config/nsh/defconfig +++ b/boards/intel/aerofc-v1/nuttx-config/nsh/defconfig @@ -161,6 +161,8 @@ CONFIG_STM32_RTC_MAGIC_REG=1 CONFIG_STM32_SERIALBRK_BSDCOMPAT=y CONFIG_STM32_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_SPI1=y +CONFIG_STM32_SPI1_DMA=y +CONFIG_STM32_SPI_DMA=y CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM1=y From 1da3c8d178381f4217b14dd00fab0241961d7d86 Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Sat, 22 Feb 2020 10:08:40 -0500 Subject: [PATCH 14/16] px4_fmu-v2: leave SPI DMA disabled for now (flash space) --- boards/px4/fmu-v2/nuttx-config/nsh/defconfig | 3 --- boards/px4/fmu-v2/src/board_config.h | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/boards/px4/fmu-v2/nuttx-config/nsh/defconfig b/boards/px4/fmu-v2/nuttx-config/nsh/defconfig index f9dc4a1c1e70..a5251584e104 100644 --- a/boards/px4/fmu-v2/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v2/nuttx-config/nsh/defconfig @@ -188,11 +188,8 @@ CONFIG_STM32_SDIO_CARD=y CONFIG_STM32_SERIALBRK_BSDCOMPAT=y CONFIG_STM32_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_SPI1=y -CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y CONFIG_STM32_SPI4=y -CONFIG_STM32_SPI4_DMA=y -CONFIG_STM32_SPI_DMA=y CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM3=y diff --git a/boards/px4/fmu-v2/src/board_config.h b/boards/px4/fmu-v2/src/board_config.h index 8753c176ca71..2957922f5d00 100644 --- a/boards/px4/fmu-v2/src/board_config.h +++ b/boards/px4/fmu-v2/src/board_config.h @@ -421,7 +421,7 @@ #define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS /* This board provides a DMA pool and APIs */ -#define BOARD_DMA_ALLOC_POOL_SIZE (5120 + 512 + 512) // 5120 fat + 512 + 512 spi +#define BOARD_DMA_ALLOC_POOL_SIZE 5120 #define BOARD_HAS_ON_RESET 1 From c4a0ac487aa70a9f60e0dda5b49281bb89b45ad6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beat=20K=C3=BCng?= Date: Wed, 4 Mar 2020 16:20:33 +0100 Subject: [PATCH 15/16] board configs: extend board_dma_map.h with a table --- .../nuttx-config/include/board_dma_map.h | 38 ++++++++++++++++ .../x-v1/nuttx-config/include/board_dma_map.h | 37 ++++++++++++++++ .../nuttx-config/include/board_dma_map.h | 37 ++++++++++++++++ .../nuttx-config/include/board_dma_map.h | 43 +++++++++++++++++++ .../nuttx-config/include/board_dma_map.h | 43 +++++++++++++++++++ .../nuttx-config/include/board_dma_map.h | 43 +++++++++++++++++++ .../x21/nuttx-config/include/board_dma_map.h | 37 ++++++++++++++++ .../nuttx-config/include/board_dma_map.h | 37 ++++++++++++++++ .../nuttx-config/include/board_dma_map.h | 37 ++++++++++++++++ .../nuttx-config/include/board_dma_map.h | 37 ++++++++++++++++ .../nuttx-config/include/board_dma_map.h | 37 ++++++++++++++++ .../nuttx-config/include/board_dma_map.h | 43 +++++++++++++++++++ .../nuttx-config/include/board_dma_map.h | 43 +++++++++++++++++++ .../core/nuttx-config/include/board_dma_map.h | 37 ++++++++++++++++ 14 files changed, 549 insertions(+) diff --git a/boards/airmind/mindpx-v2/nuttx-config/include/board_dma_map.h b/boards/airmind/mindpx-v2/nuttx-config/include/board_dma_map.h index a62644aae01e..7f9f068fc09b 100644 --- a/boards/airmind/mindpx-v2/nuttx-config/include/board_dma_map.h +++ b/boards/airmind/mindpx-v2/nuttx-config/include/board_dma_map.h @@ -34,6 +34,44 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | - | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | - | SPI3_TX_2 | +| Channel 1 | I2C1_RX | - | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | I2C2_EXT_RX | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| | | | | | | | | | +| Usage | | | | | | | | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | - | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | - | SPI1_TX_2 | - | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDIO | - | USART1_RX_2 | SDIO | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| | | | | | | | | | +| Usage | SPI1_RX_1 | USART6_RX_1 | USART1_RX_1 | SPI1_TX_1 | | | SDIO | | + */ + // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/av/x-v1/nuttx-config/include/board_dma_map.h b/boards/av/x-v1/nuttx-config/include/board_dma_map.h index 6b6c8dff0186..bf44e5887158 100644 --- a/boards/av/x-v1/nuttx-config/include/board_dma_map.h +++ b/boards/av/x-v1/nuttx-config/include/board_dma_map.h @@ -33,6 +33,43 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | SPDIFRX_DT | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | SPDIFRX_CS | SPI3_TX_2 | +| Channel 1 | I2C1_RX | I2C3_RX | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | - | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| | | | | | | | | | +| Usage | UART5_RX | USART3_RX | | SPI2_RX | SPI2_TX | USART2_RX | UART8_RX | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | SAI2_B_2 | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | SAI2_A | SPI1_TX_2 | SAI2_B | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDMMC1_1 | - | USART1_RX_2 | SDMMC1_2 | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| | | | | | | | | | +| Usage | SPI1_RX_1 | | USART6_RX_2 | SPI1_TX_1 | | USART1_RX_2 | SDMMC1_2 | | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/intel/aerofc-v1/nuttx-config/include/board_dma_map.h b/boards/intel/aerofc-v1/nuttx-config/include/board_dma_map.h index 4a9df104777c..1d1f0e09ddeb 100644 --- a/boards/intel/aerofc-v1/nuttx-config/include/board_dma_map.h +++ b/boards/intel/aerofc-v1/nuttx-config/include/board_dma_map.h @@ -33,6 +33,43 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | - | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | - | SPI3_TX_2 | +| Channel 1 | I2C1_RX | - | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | I2C2_EXT_RX | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| | | | | | | | | | +| Usage | | | | | | | | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | - | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | - | SPI1_TX_2 | - | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDIO | - | USART1_RX_2 | SDIO | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| | | | | | | | | | +| Usage | SPI1_RX_1 | USART6_RX_1 | USART1_RX_1 | SPI1_TX_1 | | | | | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/modalai/fc-v1/nuttx-config/include/board_dma_map.h b/boards/modalai/fc-v1/nuttx-config/include/board_dma_map.h index 048797f71b40..249e6a056320 100644 --- a/boards/modalai/fc-v1/nuttx-config/include/board_dma_map.h +++ b/boards/modalai/fc-v1/nuttx-config/include/board_dma_map.h @@ -33,6 +33,49 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | SPDIFRX_DT | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | SPDIFRX_CS | SPI3_TX_2 | +| Channel 1 | I2C1_RX | I2C3_RX | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | - | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| Channel 8 | I2C3_TX | I2C4_RX | - | - | I2C2_TX | - | I2C4_TX | - | +| Channel 9 | - | SPI2_RX | - | - | - | - | SPI2_TX | - | +| | | | | | | | | | +| Usage | | SPI2_RX | SPI3_RX_2 | UART7_RX | SPI2_TX | SPI3_TX_1 | TIM4_UP | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | SAI2_B_2 | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | SAI2_A | SPI1_TX_2 | SAI2_B | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDMMC1_1 | - | USART1_RX_2 | SDMMC1_2 | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| Channel 8 | DSFDM1_FLT0 | DSFDM1_FLT1 | DSFDM1_FLT2 | DSFDM1_FLT3 | DSFDM1_FLT0 | DSFDM1_FLT1 | DSFDM1_FLT2 | DSFDM1_FLT3 | +| Channel 9 | JPEG_IN | JPEG_OUT | SPI4_TX | JPEG_IN | JPEG_OUT | SPI5_RX | - | - | +| Channel 10 | SAI1_B | SAI2_B | SAI2_A | - | - | - | SAI1_A | - | +| Channel 11 | SDMMC2 | - | QUADSPI | - | - | SDMMC2 | - | - | +| | | | | | | | | | +| Usage | SDMMC2 | USART6_RX_1 | SPI1_RX_2 | SPI1_TX_1 | | TIM1_UP | | USART6_TX_2 | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/mro/ctrl-zero-f7/nuttx-config/include/board_dma_map.h b/boards/mro/ctrl-zero-f7/nuttx-config/include/board_dma_map.h index 5d13ca53d9f3..9191b174b9d6 100644 --- a/boards/mro/ctrl-zero-f7/nuttx-config/include/board_dma_map.h +++ b/boards/mro/ctrl-zero-f7/nuttx-config/include/board_dma_map.h @@ -33,6 +33,49 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | SPDIFRX_DT | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | SPDIFRX_CS | SPI3_TX_2 | +| Channel 1 | I2C1_RX | I2C3_RX | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | - | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| Channel 8 | I2C3_TX | I2C4_RX | - | - | I2C2_TX | - | I2C4_TX | - | +| Channel 9 | - | SPI2_RX | - | - | - | - | SPI2_TX | - | +| | | | | | | | | | +| Usage | | USART3_RX | UART4_RX | USART3_TX_1 | | USART2_RX | | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | SAI2_B_2 | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | SAI2_A | SPI1_TX_2 | SAI2_B | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDMMC1_1 | - | USART1_RX_2 | SDMMC1_2 | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| Channel 8 | DSFDM1_FLT0 | DSFDM1_FLT1 | DSFDM1_FLT2 | DSFDM1_FLT3 | DSFDM1_FLT0 | DSFDM1_FLT1 | DSFDM1_FLT2 | DSFDM1_FLT3 | +| Channel 9 | JPEG_IN | JPEG_OUT | SPI4_TX | JPEG_IN | JPEG_OUT | SPI5_RX | - | - | +| Channel 10 | SAI1_B | SAI2_B | SAI2_A | - | - | - | SAI1_A | - | +| Channel 11 | SDMMC2 | - | QUADSPI | - | - | SDMMC2 | - | - | +| | | | | | | | | | +| Usage | SPI1_RX_1 | | USART6_RX_2 | SPI1_TX_1 | SPI5_TX_1 | SPI5_RX_2 | SDMMC1_2 | USART6_TX_2 | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/mro/x21-777/nuttx-config/include/board_dma_map.h b/boards/mro/x21-777/nuttx-config/include/board_dma_map.h index 67f34c7b854c..44f5c2fe7152 100644 --- a/boards/mro/x21-777/nuttx-config/include/board_dma_map.h +++ b/boards/mro/x21-777/nuttx-config/include/board_dma_map.h @@ -33,6 +33,49 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | SPDIFRX_DT | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | SPDIFRX_CS | SPI3_TX_2 | +| Channel 1 | I2C1_RX | I2C3_RX | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | - | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| Channel 8 | I2C3_TX | I2C4_RX | - | - | I2C2_TX | - | I2C4_TX | - | +| Channel 9 | - | SPI2_RX | - | - | - | - | SPI2_TX | - | +| | | | | | | | | | +| Usage | UART8_TX | USART3_RX | UART4_RX | USART3_TX_1 | | USART2_RX | UART8_RX | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | SAI2_B_2 | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | SAI2_A | SPI1_TX_2 | SAI2_B | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDMMC1_1 | - | USART1_RX_2 | SDMMC1_2 | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| Channel 8 | DSFDM1_FLT0 | DSFDM1_FLT1 | DSFDM1_FLT2 | DSFDM1_FLT3 | DSFDM1_FLT0 | DSFDM1_FLT1 | DSFDM1_FLT2 | DSFDM1_FLT3 | +| Channel 9 | JPEG_IN | JPEG_OUT | SPI4_TX | JPEG_IN | JPEG_OUT | SPI5_RX | - | - | +| Channel 10 | SAI1_B | SAI2_B | SAI2_A | - | - | - | SAI1_A | - | +| Channel 11 | SDMMC2 | - | QUADSPI | - | - | SDMMC2 | - | - | +| | | | | | | | | | +| Usage | SPI1_RX_1 | | USART6_RX_2 | SPI1_TX_1 | | USART1_RX_2 | SDMMC1_2 | USART6_TX_2 | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/mro/x21/nuttx-config/include/board_dma_map.h b/boards/mro/x21/nuttx-config/include/board_dma_map.h index 7425f02c9ba0..96a4c8151755 100644 --- a/boards/mro/x21/nuttx-config/include/board_dma_map.h +++ b/boards/mro/x21/nuttx-config/include/board_dma_map.h @@ -33,6 +33,43 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | - | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | - | SPI3_TX_2 | +| Channel 1 | I2C1_RX | - | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | I2C2_EXT_RX | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| | | | | | | | | | +| Usage | | USART3_RX | UART4_RX | UART7_RX | | USART2_RX | TIM4_UP | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | - | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | - | SPI1_TX_2 | - | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDIO | - | USART1_RX_2 | SDIO | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| | | | | | | | | | +| Usage | | USART6_RX_1 | SPI1_RX_2 | SPI1_TX_1 | | TIM1_UP | SDIO | USART6_TX_2 | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/px4/fmu-v2/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v2/nuttx-config/include/board_dma_map.h index d8055e1dd8c5..6cc4e241effb 100644 --- a/boards/px4/fmu-v2/nuttx-config/include/board_dma_map.h +++ b/boards/px4/fmu-v2/nuttx-config/include/board_dma_map.h @@ -33,6 +33,43 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | - | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | - | SPI3_TX_2 | +| Channel 1 | I2C1_RX | - | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | I2C2_EXT_RX | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| | | | | | | | | | +| Usage | | USART3_RX | UART4_RX | UART7_RX | | USART2_RX | TIM4_UP | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | - | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | - | SPI1_TX_2 | - | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDIO | - | USART1_RX_2 | SDIO | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| | | | | | | | | | +| Usage | SPI4_RX_1 | USART6_RX_1 | SPI1_RX_2 | SPI1_TX_1 | SPI4_TX_2 | TIM1_UP | SDIO | USART6_TX_2 | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/px4/fmu-v3/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v3/nuttx-config/include/board_dma_map.h index d8055e1dd8c5..6cc4e241effb 100644 --- a/boards/px4/fmu-v3/nuttx-config/include/board_dma_map.h +++ b/boards/px4/fmu-v3/nuttx-config/include/board_dma_map.h @@ -33,6 +33,43 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | - | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | - | SPI3_TX_2 | +| Channel 1 | I2C1_RX | - | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | I2C2_EXT_RX | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| | | | | | | | | | +| Usage | | USART3_RX | UART4_RX | UART7_RX | | USART2_RX | TIM4_UP | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | - | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | - | SPI1_TX_2 | - | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDIO | - | USART1_RX_2 | SDIO | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| | | | | | | | | | +| Usage | SPI4_RX_1 | USART6_RX_1 | SPI1_RX_2 | SPI1_TX_1 | SPI4_TX_2 | TIM1_UP | SDIO | USART6_TX_2 | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/px4/fmu-v4/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v4/nuttx-config/include/board_dma_map.h index 375b794f5a8f..a5fec3cdb355 100644 --- a/boards/px4/fmu-v4/nuttx-config/include/board_dma_map.h +++ b/boards/px4/fmu-v4/nuttx-config/include/board_dma_map.h @@ -33,6 +33,43 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | - | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | - | SPI3_TX_2 | +| Channel 1 | I2C1_RX | - | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | I2C2_EXT_RX | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| | | | | | | | | | +| Usage | | USART3_RX | UART4_RX | UART7_RX | | USART2_RX | TIM4_UP | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | - | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | - | SPI1_TX_2 | - | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDIO | - | USART1_RX_2 | SDIO | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| | | | | | | | | | +| Usage | SPI1_RX_1 | USART6_RX_1 | USART1_RX_1 | SPI1_TX_1 | | TIM1_UP | SDIO | | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/px4/fmu-v4pro/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v4pro/nuttx-config/include/board_dma_map.h index 36aed893bfc3..2a94fe85c0b6 100644 --- a/boards/px4/fmu-v4pro/nuttx-config/include/board_dma_map.h +++ b/boards/px4/fmu-v4pro/nuttx-config/include/board_dma_map.h @@ -33,6 +33,43 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | - | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | - | SPI3_TX_2 | +| Channel 1 | I2C1_RX | - | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | I2C2_EXT_RX | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| | | | | | | | | | +| Usage | | USART3_RX | UART4_RX | UART7_RX | | USART2_RX | UART8_RX | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | - | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | - | SPI1_TX_2 | - | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDIO | - | USART1_RX_2 | SDIO | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| | | | | | | | | | +| Usage | SPI1_RX_1 | | USART6_RX_2 | SPI1_TX_1 | | USART1_RX_2 | SDIO | USART6_TX_2 | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/px4/fmu-v5/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v5/nuttx-config/include/board_dma_map.h index 97323a338b71..b5b9e8ac0bf9 100644 --- a/boards/px4/fmu-v5/nuttx-config/include/board_dma_map.h +++ b/boards/px4/fmu-v5/nuttx-config/include/board_dma_map.h @@ -33,6 +33,49 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | SPDIFRX_DT | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | SPDIFRX_CS | SPI3_TX_2 | +| Channel 1 | I2C1_RX | I2C3_RX | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | - | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| Channel 8 | I2C3_TX | I2C4_RX | - | - | I2C2_TX | - | I2C4_TX | - | +| Channel 9 | - | SPI2_RX | - | - | - | - | SPI2_TX | - | +| | | | | | | | | | +| Usage | UART8_TX | USART3_RX | UART4_RX | USART3_TX_1 | | USART2_RX | UART8_RX | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | SAI2_B_2 | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | SAI2_A | SPI1_TX_2 | SAI2_B | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDMMC1_1 | - | USART1_RX_2 | SDMMC1_2 | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| Channel 8 | DSFDM1_FLT0 | DSFDM1_FLT1 | DSFDM1_FLT2 | DSFDM1_FLT3 | DSFDM1_FLT0 | DSFDM1_FLT1 | DSFDM1_FLT2 | DSFDM1_FLT3 | +| Channel 9 | JPEG_IN | JPEG_OUT | SPI4_TX | JPEG_IN | JPEG_OUT | SPI5_RX | - | - | +| Channel 10 | SAI1_B | SAI2_B | SAI2_A | - | - | - | SAI1_A | - | +| Channel 11 | SDMMC2 | - | QUADSPI | - | - | SDMMC2 | - | - | +| | | | | | | | | | +| Usage | SPI1_RX_1 | | USART6_RX_2 | SPI1_TX_1 | | TIM1_UP | SDMMC1_2 | USART6_TX_2 | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/px4/fmu-v5x/nuttx-config/include/board_dma_map.h b/boards/px4/fmu-v5x/nuttx-config/include/board_dma_map.h index bc9578bb532e..e8b5c3965846 100644 --- a/boards/px4/fmu-v5x/nuttx-config/include/board_dma_map.h +++ b/boards/px4/fmu-v5x/nuttx-config/include/board_dma_map.h @@ -33,6 +33,49 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | SPDIFRX_DT | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | SPDIFRX_CS | SPI3_TX_2 | +| Channel 1 | I2C1_RX | I2C3_RX | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | - | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| Channel 8 | I2C3_TX | I2C4_RX | - | - | I2C2_TX | - | I2C4_TX | - | +| Channel 9 | - | SPI2_RX | - | - | - | - | SPI2_TX | - | +| | | | | | | | | | +| Usage | UART5_RX | SPI2_RX | SPI3_RX_2 | UART7_RX | SPI2_TX | SPI3_TX_1 | TIM4_UP | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | SAI2_B_2 | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | SAI2_A | SPI1_TX_2 | SAI2_B | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDMMC1_1 | - | USART1_RX_2 | SDMMC1_2 | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| Channel 8 | DSFDM1_FLT0 | DSFDM1_FLT1 | DSFDM1_FLT2 | DSFDM1_FLT3 | DSFDM1_FLT0 | DSFDM1_FLT1 | DSFDM1_FLT2 | DSFDM1_FLT3 | +| Channel 9 | JPEG_IN | JPEG_OUT | SPI4_TX | JPEG_IN | JPEG_OUT | SPI5_RX | - | - | +| Channel 10 | SAI1_B | SAI2_B | SAI2_A | - | - | - | SAI1_A | - | +| Channel 11 | SDMMC2 | - | QUADSPI | - | - | SDMMC2 | - | - | +| | | | | | | | | | +| Usage | SDMMC2 | USART6_RX_1 | SPI1_RX_2 | SPI1_TX_1 | | TIM1_UP | | USART6_TX_2 | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- diff --git a/boards/uvify/core/nuttx-config/include/board_dma_map.h b/boards/uvify/core/nuttx-config/include/board_dma_map.h index 375b794f5a8f..a5fec3cdb355 100644 --- a/boards/uvify/core/nuttx-config/include/board_dma_map.h +++ b/boards/uvify/core/nuttx-config/include/board_dma_map.h @@ -33,6 +33,43 @@ #pragma once +/* +| DMA1 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | SPI3_RX_1 | - | SPI3_RX_2 | SPI2_RX | SPI2_TX | SPI3_TX_1 | - | SPI3_TX_2 | +| Channel 1 | I2C1_RX | - | TIM7_UP_1 | - | TIM7_UP_2 | I2C1_RX_1 | I2C1_TX | I2C1_TX_1 | +| Channel 2 | TIM4_CH1 | - | I2C4_RX | TIM4_CH2 | - | I2C4_RX | TIM4_UP | TIM4_CH3 | +| Channel 3 | - | TIM2_UP_1 | I2C3_RX_1 | I2C2_EXT_RX | I2C3_TX | TIM2_CH1 | TIM2_CH2 | TIM2_UP_2 | +| | | TIM2_CH3 | | | | | TIM2_CH4_1 | TIM2_CH4_2 | +| Channel 4 | UART5_RX | USART3_RX | UART4_RX | USART3_TX_1 | UART4_TX | USART2_RX | USART2_TX | UART5_TX | +| Channel 5 | UART8_TX | UART7_TX | TIM3_CH4 | UART7_RX | TIM3_CH1 | TIM3_CH2 | UART8_RX | TIM3_CH3 | +| | | | TIM3_UP | | TIM3_TRIG | | | | +| Channel 6 | TIM5_CH3 | TIM5_CH4_1 | TIM5_CH1 | TIM5_CH4_2 | TIM5_CH2 | - | TIM5_UP_2 | - | +| | TIM5_UP_1 | TIM5_TRIG_1 | | TIM5_TRIG_2 | | | | | +| Channel 7 | - | TIM6_UP | I2C2_RX | I2C2_RX_1 | USART3_TX_2 | DAC1 | DAC2 | I2C2_TX | +| | | | | | | | | | +| Usage | | USART3_RX | UART4_RX | UART7_RX | | USART2_RX | TIM4_UP | | + + +| DMA2 | Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | +|------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------|------------------| +| Channel 0 | ADC1_1 | SAI1_A | TIM8_CH1_1 | SAI1_A_1 | ADC1_2 | SAI1_B_1 | TIM1_CH1_1 | - | +| | | | TIM8_CH2_1 | | | | TIM1_CH2_1 | | +| | | | TIM8_CH3_1 | | | | TIM1_CH3_1 | | +| Channel 1 | - | DCMI_1 | ADC2_1 | ADC2_2 | SAI1_B | SPI6_TX | SPI6_RX | DCMI_2 | +| Channel 2 | ADC3_1 | ADC3_2 | - | SPI5_RX_1 | SPI5_TX_1 | CRYP_OUT | CRYP_IN | HASH_IN | +| Channel 3 | SPI1_RX_1 | - | SPI1_RX_2 | SPI1_TX_1 | - | SPI1_TX_2 | - | QUADSPI | +| Channel 4 | SPI4_RX_1 | SPI4_TX_1 | USART1_RX_1 | SDIO | - | USART1_RX_2 | SDIO | USART1_TX | +| Channel 5 | - | USART6_RX_1 | USART6_RX_2 | SPI4_RX_2 | SPI4_TX_2 | - | USART6_TX_1 | USART6_TX_2 | +| Channel 6 | TIM1_TRIG_1 | TIM1_CH1_2 | TIM1_CH2_2 | TIM1_CH1 | TIM1_CH4 | TIM1_UP | TIM1_CH3_2 | - | +| | | | | | TIM1_TRIG_2 | | | | +| | | | | | TIM1_COM | | | | +| Channel 7 | - | TIM8_UP | TIM8_CH1_2 | TIM8_CH2_2 | TIM8_CH3_2 | SPI5_RX_2 | SPI5_TX_2 | TIM8_CH4 | +| | | | | | | | | TIM8_TRIG | +| | | | | | | | | TIM8_COM | +| | | | | | | | | | +| Usage | SPI1_RX_1 | USART6_RX_1 | USART1_RX_1 | SPI1_TX_1 | | TIM1_UP | SDIO | | + */ // DMA1 Channel/Stream Selections //--------------------------------------------//---------------------------//---------------- From feaa576fbcfedddce34e4f23a64a51c833e9d074 Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Tue, 10 Mar 2020 18:15:53 -0400 Subject: [PATCH 16/16] boards: stm32f4/f7 enable SPI_DMATHRESHOLD=32 --- boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig | 1 + boards/av/x-v1/nuttx-config/nsh/defconfig | 1 + boards/intel/aerofc-v1/nuttx-config/nsh/defconfig | 1 + boards/modalai/fc-v1/nuttx-config/nsh/defconfig | 1 + boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig | 1 + boards/mro/x21-777/nuttx-config/nsh/defconfig | 1 + boards/mro/x21/nuttx-config/nsh/defconfig | 1 + boards/omnibus/f4sd/nuttx-config/nsh/defconfig | 1 + boards/px4/fmu-v3/nuttx-config/nsh/defconfig | 1 + boards/px4/fmu-v4/nuttx-config/nsh/defconfig | 1 + boards/px4/fmu-v4/nuttx-config/stackcheck/defconfig | 1 + boards/px4/fmu-v4pro/nuttx-config/nsh/defconfig | 1 + boards/px4/fmu-v5/nuttx-config/critmonitor/defconfig | 5 +++++ boards/px4/fmu-v5/nuttx-config/irqmonitor/defconfig | 5 +++++ boards/px4/fmu-v5/nuttx-config/nsh/defconfig | 1 + boards/px4/fmu-v5/nuttx-config/stackcheck/defconfig | 5 +++++ boards/px4/fmu-v5x/nuttx-config/nsh/defconfig | 1 + .../px4/fmu-v5x/nuttx-config/p2_base_phy_LAN8742Ai/defconfig | 5 +++++ boards/uvify/core/nuttx-config/nsh/defconfig | 1 + 19 files changed, 35 insertions(+) diff --git a/boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig b/boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig index 9457e22f3274..03d37b36fb3f 100644 --- a/boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig +++ b/boards/airmind/mindpx-v2/nuttx-config/nsh/defconfig @@ -191,6 +191,7 @@ CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y CONFIG_STM32_SPI4=y CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_SPI_DMATHRESHOLD=32 CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM3=y diff --git a/boards/av/x-v1/nuttx-config/nsh/defconfig b/boards/av/x-v1/nuttx-config/nsh/defconfig index bd25b60c2450..e9cc6a24f032 100644 --- a/boards/av/x-v1/nuttx-config/nsh/defconfig +++ b/boards/av/x-v1/nuttx-config/nsh/defconfig @@ -216,6 +216,7 @@ CONFIG_STM32F7_SPI2_DMA=y CONFIG_STM32F7_SPI4=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI_DMA=y +CONFIG_STM32F7_SPI_DMATHRESHOLD=32 CONFIG_STM32F7_TIM14=y CONFIG_STM32F7_TIM3=y CONFIG_STM32F7_UART4=y diff --git a/boards/intel/aerofc-v1/nuttx-config/nsh/defconfig b/boards/intel/aerofc-v1/nuttx-config/nsh/defconfig index 3edad3b3a29d..fb2b95f960d8 100644 --- a/boards/intel/aerofc-v1/nuttx-config/nsh/defconfig +++ b/boards/intel/aerofc-v1/nuttx-config/nsh/defconfig @@ -163,6 +163,7 @@ CONFIG_STM32_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_SPI1=y CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_SPI_DMATHRESHOLD=32 CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM1=y diff --git a/boards/modalai/fc-v1/nuttx-config/nsh/defconfig b/boards/modalai/fc-v1/nuttx-config/nsh/defconfig index 1dc2d9562ad5..de129b21d1ac 100644 --- a/boards/modalai/fc-v1/nuttx-config/nsh/defconfig +++ b/boards/modalai/fc-v1/nuttx-config/nsh/defconfig @@ -196,6 +196,7 @@ CONFIG_STM32F7_SPI2_DMA=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI6=y CONFIG_STM32F7_SPI_DMA=y +CONFIG_STM32F7_SPI_DMATHRESHOLD=32 CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_TIM3=y diff --git a/boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig b/boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig index 89d47790209e..7f3c31a445fc 100644 --- a/boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig +++ b/boards/mro/ctrl-zero-f7/nuttx-config/nsh/defconfig @@ -192,6 +192,7 @@ CONFIG_STM32F7_SPI2=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI5_DMA=y CONFIG_STM32F7_SPI_DMA=y +CONFIG_STM32F7_SPI_DMATHRESHOLD=32 CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_TIM3=y diff --git a/boards/mro/x21-777/nuttx-config/nsh/defconfig b/boards/mro/x21-777/nuttx-config/nsh/defconfig index 61ecc2e0f928..f9e762eea18f 100644 --- a/boards/mro/x21-777/nuttx-config/nsh/defconfig +++ b/boards/mro/x21-777/nuttx-config/nsh/defconfig @@ -190,6 +190,7 @@ CONFIG_STM32F7_SPI1=y CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y CONFIG_STM32F7_SPI_DMA=y +CONFIG_STM32F7_SPI_DMATHRESHOLD=32 CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM3=y CONFIG_STM32F7_TIM9=y diff --git a/boards/mro/x21/nuttx-config/nsh/defconfig b/boards/mro/x21/nuttx-config/nsh/defconfig index 22320c1b3e42..4f0290d7295f 100644 --- a/boards/mro/x21/nuttx-config/nsh/defconfig +++ b/boards/mro/x21/nuttx-config/nsh/defconfig @@ -189,6 +189,7 @@ CONFIG_STM32_SPI1=y CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_SPI_DMATHRESHOLD=32 CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM3=y diff --git a/boards/omnibus/f4sd/nuttx-config/nsh/defconfig b/boards/omnibus/f4sd/nuttx-config/nsh/defconfig index b5ce0ba28d4b..f717c9829347 100644 --- a/boards/omnibus/f4sd/nuttx-config/nsh/defconfig +++ b/boards/omnibus/f4sd/nuttx-config/nsh/defconfig @@ -170,6 +170,7 @@ CONFIG_STM32_SPI2=y CONFIG_STM32_SPI2_DMA=y CONFIG_STM32_SPI3=y CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_SPI_DMATHRESHOLD=32 CONFIG_STM32_TIM1=y CONFIG_STM32_TIM5=y CONFIG_STM32_UART4=y diff --git a/boards/px4/fmu-v3/nuttx-config/nsh/defconfig b/boards/px4/fmu-v3/nuttx-config/nsh/defconfig index f7e2f63b71df..f2210fa93d3a 100644 --- a/boards/px4/fmu-v3/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v3/nuttx-config/nsh/defconfig @@ -192,6 +192,7 @@ CONFIG_STM32_SPI2=y CONFIG_STM32_SPI4=y CONFIG_STM32_SPI4_DMA=y CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_SPI_DMATHRESHOLD=32 CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM3=y diff --git a/boards/px4/fmu-v4/nuttx-config/nsh/defconfig b/boards/px4/fmu-v4/nuttx-config/nsh/defconfig index 0ce1d1e0cd79..a4cf2576d40a 100644 --- a/boards/px4/fmu-v4/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v4/nuttx-config/nsh/defconfig @@ -190,6 +190,7 @@ CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y CONFIG_STM32_SPI4=y CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_SPI_DMATHRESHOLD=32 CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM8=y diff --git a/boards/px4/fmu-v4/nuttx-config/stackcheck/defconfig b/boards/px4/fmu-v4/nuttx-config/stackcheck/defconfig index a25141496869..c202431c3f4b 100644 --- a/boards/px4/fmu-v4/nuttx-config/stackcheck/defconfig +++ b/boards/px4/fmu-v4/nuttx-config/stackcheck/defconfig @@ -191,6 +191,7 @@ CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y CONFIG_STM32_SPI4=y CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_SPI_DMATHRESHOLD=32 CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM8=y diff --git a/boards/px4/fmu-v4pro/nuttx-config/nsh/defconfig b/boards/px4/fmu-v4pro/nuttx-config/nsh/defconfig index 7131c74a52c5..40112e47f493 100644 --- a/boards/px4/fmu-v4pro/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v4pro/nuttx-config/nsh/defconfig @@ -195,6 +195,7 @@ CONFIG_STM32_SPI2=y CONFIG_STM32_SPI5=y CONFIG_STM32_SPI6=y CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_SPI_DMATHRESHOLD=32 CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM8=y diff --git a/boards/px4/fmu-v5/nuttx-config/critmonitor/defconfig b/boards/px4/fmu-v5/nuttx-config/critmonitor/defconfig index 40a371a9b0b5..c5bc9d766ee3 100644 --- a/boards/px4/fmu-v5/nuttx-config/critmonitor/defconfig +++ b/boards/px4/fmu-v5/nuttx-config/critmonitor/defconfig @@ -151,6 +151,7 @@ CONFIG_SCHED_LPWORKSTACKSIZE=1600 CONFIG_SCHED_WAITPID=y CONFIG_SDCLONE_DISABLE=y CONFIG_SDMMC1_SDIO_MODE=y +CONFIG_SDMMC1_SDIO_PULLUP=y CONFIG_SEM_NNESTPRIO=8 CONFIG_SEM_PREALLOCHOLDERS=0 CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y @@ -190,10 +191,13 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y CONFIG_STM32F7_SPI4=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI6=y +CONFIG_STM32F7_SPI_DMA=y +CONFIG_STM32F7_SPI_DMATHRESHOLD=32 CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_UART4=y @@ -240,6 +244,7 @@ CONFIG_USART3_OFLOWCONTROL=y CONFIG_USART3_RXBUFSIZE=600 CONFIG_USART3_RXDMA=y CONFIG_USART3_TXBUFSIZE=3000 +CONFIG_USART3_TXDMA=y CONFIG_USART6_BAUD=57600 CONFIG_USART6_RXBUFSIZE=600 CONFIG_USART6_RXDMA=y diff --git a/boards/px4/fmu-v5/nuttx-config/irqmonitor/defconfig b/boards/px4/fmu-v5/nuttx-config/irqmonitor/defconfig index 014dae0b75de..528ca9717a34 100644 --- a/boards/px4/fmu-v5/nuttx-config/irqmonitor/defconfig +++ b/boards/px4/fmu-v5/nuttx-config/irqmonitor/defconfig @@ -151,6 +151,7 @@ CONFIG_SCHED_LPWORKSTACKSIZE=1600 CONFIG_SCHED_WAITPID=y CONFIG_SDCLONE_DISABLE=y CONFIG_SDMMC1_SDIO_MODE=y +CONFIG_SDMMC1_SDIO_PULLUP=y CONFIG_SEM_NNESTPRIO=8 CONFIG_SEM_PREALLOCHOLDERS=0 CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y @@ -190,10 +191,13 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y CONFIG_STM32F7_SPI4=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI6=y +CONFIG_STM32F7_SPI_DMA=y +CONFIG_STM32F7_SPI_DMATHRESHOLD=32 CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_UART4=y @@ -239,6 +243,7 @@ CONFIG_USART3_OFLOWCONTROL=y CONFIG_USART3_RXBUFSIZE=600 CONFIG_USART3_RXDMA=y CONFIG_USART3_TXBUFSIZE=3000 +CONFIG_USART3_TXDMA=y CONFIG_USART6_BAUD=57600 CONFIG_USART6_RXBUFSIZE=600 CONFIG_USART6_RXDMA=y diff --git a/boards/px4/fmu-v5/nuttx-config/nsh/defconfig b/boards/px4/fmu-v5/nuttx-config/nsh/defconfig index c3618a96e3df..dabde38d48a0 100644 --- a/boards/px4/fmu-v5/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v5/nuttx-config/nsh/defconfig @@ -196,6 +196,7 @@ CONFIG_STM32F7_SPI4=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI6=y CONFIG_STM32F7_SPI_DMA=y +CONFIG_STM32F7_SPI_DMATHRESHOLD=32 CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_UART4=y diff --git a/boards/px4/fmu-v5/nuttx-config/stackcheck/defconfig b/boards/px4/fmu-v5/nuttx-config/stackcheck/defconfig index bbb3258ea391..1ab0129fbf49 100644 --- a/boards/px4/fmu-v5/nuttx-config/stackcheck/defconfig +++ b/boards/px4/fmu-v5/nuttx-config/stackcheck/defconfig @@ -151,6 +151,7 @@ CONFIG_SCHED_LPWORKSTACKSIZE=1600 CONFIG_SCHED_WAITPID=y CONFIG_SDCLONE_DISABLE=y CONFIG_SDMMC1_SDIO_MODE=y +CONFIG_SDMMC1_SDIO_PULLUP=y CONFIG_SEM_NNESTPRIO=8 CONFIG_SEM_PREALLOCHOLDERS=0 CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y @@ -190,10 +191,13 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y CONFIG_STM32F7_SPI4=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI6=y +CONFIG_STM32F7_SPI_DMA=y +CONFIG_STM32F7_SPI_DMATHRESHOLD=32 CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_UART4=y @@ -239,6 +243,7 @@ CONFIG_USART3_OFLOWCONTROL=y CONFIG_USART3_RXBUFSIZE=600 CONFIG_USART3_RXDMA=y CONFIG_USART3_TXBUFSIZE=3000 +CONFIG_USART3_TXDMA=y CONFIG_USART6_BAUD=57600 CONFIG_USART6_RXBUFSIZE=600 CONFIG_USART6_RXDMA=y diff --git a/boards/px4/fmu-v5x/nuttx-config/nsh/defconfig b/boards/px4/fmu-v5x/nuttx-config/nsh/defconfig index 6c3dee8750ca..a9c7385efd81 100644 --- a/boards/px4/fmu-v5x/nuttx-config/nsh/defconfig +++ b/boards/px4/fmu-v5x/nuttx-config/nsh/defconfig @@ -228,6 +228,7 @@ CONFIG_STM32F7_SPI3_DMA=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI6=y CONFIG_STM32F7_SPI_DMA=y +CONFIG_STM32F7_SPI_DMATHRESHOLD=32 CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_TIM3=y diff --git a/boards/px4/fmu-v5x/nuttx-config/p2_base_phy_LAN8742Ai/defconfig b/boards/px4/fmu-v5x/nuttx-config/p2_base_phy_LAN8742Ai/defconfig index 0d673cb4f498..899aff94f8ea 100644 --- a/boards/px4/fmu-v5x/nuttx-config/p2_base_phy_LAN8742Ai/defconfig +++ b/boards/px4/fmu-v5x/nuttx-config/p2_base_phy_LAN8742Ai/defconfig @@ -221,10 +221,15 @@ CONFIG_STM32F7_SDMMC_DMA=y CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y CONFIG_STM32F7_SPI1=y +CONFIG_STM32F7_SPI1_DMA=y CONFIG_STM32F7_SPI2=y +CONFIG_STM32F7_SPI2_DMA=y CONFIG_STM32F7_SPI3=y +CONFIG_STM32F7_SPI3_DMA=y CONFIG_STM32F7_SPI5=y CONFIG_STM32F7_SPI6=y +CONFIG_STM32F7_SPI_DMA=y +CONFIG_STM32F7_SPI_DMATHRESHOLD=32 CONFIG_STM32F7_TIM10=y CONFIG_STM32F7_TIM11=y CONFIG_STM32F7_TIM3=y diff --git a/boards/uvify/core/nuttx-config/nsh/defconfig b/boards/uvify/core/nuttx-config/nsh/defconfig index 1fe75a68e22b..7743b9b3be3c 100644 --- a/boards/uvify/core/nuttx-config/nsh/defconfig +++ b/boards/uvify/core/nuttx-config/nsh/defconfig @@ -190,6 +190,7 @@ CONFIG_STM32_SPI1_DMA=y CONFIG_STM32_SPI2=y CONFIG_STM32_SPI4=y CONFIG_STM32_SPI_DMA=y +CONFIG_STM32_SPI_DMATHRESHOLD=32 CONFIG_STM32_TIM10=y CONFIG_STM32_TIM11=y CONFIG_STM32_TIM8=y