From 1389d90a702968e70052db5815a51145bc0b8753 Mon Sep 17 00:00:00 2001 From: Levin Li Date: Wed, 13 Mar 2019 07:21:29 -0600 Subject: [PATCH] arch/arm/src/nrf52: 1. added RNG device driver 2. added errdata to correct temp which will be used by RNG module 3. use general task_trigger / event_clear inline api for all driver. --- arch/arm/src/nrf52/Kconfig | 1 + arch/arm/src/nrf52/Make.defs | 11 +- arch/arm/src/nrf52/chip/nrf52_rng.h | 82 +++++ arch/arm/src/nrf52/chip/nrf52_utils.h | 126 ++++++++ arch/arm/src/nrf52/nrf52832_errdata.c | 155 +++++++++ arch/arm/src/nrf52/nrf52_rng.c | 301 ++++++++++++++++++ arch/arm/src/nrf52/nrf52_start.c | 16 +- .../nrf52/{nrf52_clrpend.c => nrf52_utils.c} | 3 +- 8 files changed, 688 insertions(+), 7 deletions(-) create mode 100644 arch/arm/src/nrf52/chip/nrf52_rng.h create mode 100644 arch/arm/src/nrf52/chip/nrf52_utils.h create mode 100644 arch/arm/src/nrf52/nrf52832_errdata.c create mode 100644 arch/arm/src/nrf52/nrf52_rng.c rename arch/arm/src/nrf52/{nrf52_clrpend.c => nrf52_utils.c} (97%) diff --git a/arch/arm/src/nrf52/Kconfig b/arch/arm/src/nrf52/Kconfig index bd3d22329de..a50e60bca4e 100644 --- a/arch/arm/src/nrf52/Kconfig +++ b/arch/arm/src/nrf52/Kconfig @@ -77,6 +77,7 @@ config NRF52_UART0 config NRF52_RNG bool "Random Generator" default n + select ARCH_HAVE_RNG config NRF52_QSPI bool "QSPI" diff --git a/arch/arm/src/nrf52/Make.defs b/arch/arm/src/nrf52/Make.defs index a607488f589..3e1bd43f854 100644 --- a/arch/arm/src/nrf52/Make.defs +++ b/arch/arm/src/nrf52/Make.defs @@ -76,9 +76,13 @@ CMN_CSRCS += up_copyarmstate.c endif CHIP_ASRCS = -CHIP_CSRCS = nrf52_start.c nrf52_clockconfig.c nrf52_irq.c nrf52_clrpend.c +CHIP_CSRCS = nrf52_start.c nrf52_clockconfig.c nrf52_irq.c nrf52_utils.c CHIP_CSRCS += nrf52_allocateheap.c nrf52_lowputc.c nrf52_gpio.c nrf52_nvmc.c +ifeq ($(CONFIG_ARCH_FAMILY_NRF52832),y) +CHIP_CSRCS += nrf52832_errdata.c +endif + ifneq ($(CONFIG_SCHED_TICKLESS),y) CHIP_CSRCS += nrf52_timerisr.c else @@ -104,3 +108,8 @@ endif ifeq ($(CONFIG_NRF52_WDT),y) CHIP_CSRCS += nrf52_wdt.c endif + +ifeq ($(CONFIG_NRF52_RNG),y) +CHIP_CSRCS += nrf52_rng.c +endif + diff --git a/arch/arm/src/nrf52/chip/nrf52_rng.h b/arch/arm/src/nrf52/chip/nrf52_rng.h new file mode 100644 index 00000000000..04046811f2f --- /dev/null +++ b/arch/arm/src/nrf52/chip/nrf52_rng.h @@ -0,0 +1,82 @@ +/************************************************************************************ + * arch/arm/src/nrf52/chip/nrf52_rng.h + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Zhiqiang Li + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_NRF52_CHIP_NRF52_RNG_H +#define __ARCH_ARM_SRC_NRF52_CHIP_NRF52_RNG_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include "chip/nrf52_memorymap.h" +#include "chip.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Register Offsets *****************************************************************/ + +#define NRF52_RNG_T_START_OFFSET 0x000 /* RNG Task Start */ +#define NRF52_RNG_T_STOP_OFFSET 0x004 /* RNG Task Stop */ +#define NRF52_RNG_EVENT_RDY_OFFSET 0x100 /* RNG Eevent ValRDY */ +#define NRF52_RNG_SHORT_OFFSET 0x200 /* RNG Short Register */ +#define NRF52_RNG_INT_SET_OFFSET 0x304 /* RNG INT SET Register */ +#define NRF52_RNG_INT_CLR_OFFSET 0x308 /* RNG INT CLR Register */ +#define NRF52_RNG_CONFIG_OFFSET 0x504 /* RNG CONFIG Register */ +#define NRF52_RNG_VALUE_OFFSET 0x508 /* RNG Value Register */ + +/* Register Addresses ***************************************************************/ + +#define NRF52_RNG_T_START (NRF52_RNG_BASE + NRF52_RNG_T_START_OFFSET) +#define NRF52_RNG_T_STOP (NRF52_RNG_BASE + NRF52_RNG_T_STOP_OFFSET) +#define NRF52_RNG_EVENT_RDY (NRF52_RNG_BASE + NRF52_RNG_EVENT_RDY_OFFSET) + +#define NRF52_RNG_SHORT (NRF52_RNG_BASE + NRF52_RNG_SHORT_OFFSET) +#define NRF52_RNG_INT_SET (NRF52_RNG_BASE + NRF52_RNG_INT_SET_OFFSET) +#define NRF52_RNG_INT_CLR (NRF52_RNG_BASE + NRF52_RNG_INT_CLR_OFFSET) + +#define NRF52_RNG_CONFIG (NRF52_RNG_BASE + NRF52_RNG_CONFIG_OFFSET) +#define NRF52_RNG_VALUE (NRF52_RNG_BASE + NRF52_RNG_VALUE_OFFSET) + +/* Register Bitfield Definitions ****************************************************/ + +/* IntEnSet / IntEnClr Register Bit */ + +#define NRF52_RNG_INT_EVENT_RDY (1<<0) + +#endif /* __ARCH_ARM_SRC_NRF52_CHIP_STM32_RNG_H */ + diff --git a/arch/arm/src/nrf52/chip/nrf52_utils.h b/arch/arm/src/nrf52/chip/nrf52_utils.h new file mode 100644 index 00000000000..1b127b90f1f --- /dev/null +++ b/arch/arm/src/nrf52/chip/nrf52_utils.h @@ -0,0 +1,126 @@ +/**************************************************************************** + * arch/arm/src/nrf52/nrf52_utils.h + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Zhiqiang Li + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_NRF52_CHIP_NRF52_UTILS_H +#define __ARCH_ARM_SRC_NRF52_CHIP_NRF52_UTILS_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Function Prototypes / Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nrf52_clrpend + * + * Description: + * Clear a pending interrupt at the NVIC. This does not seem to be + * required for most interrupts. + * + ****************************************************************************/ + +void nrf52_clrpend(int irq); + +/**************************************************************************** + * Name: nrf52832_errdata_init + * + * Description: + * ErrData correction for 52832 + * required for most interrupts. + * + ****************************************************************************/ + +void nrf52832_errdata_init(void); + +/**************************************************************************** + * Name: nrf52_task_trigger + * + * Description: + * trigger the special task which is passed from task parameter + * + ****************************************************************************/ + +static inline void nrf52_task_trigger(uint32_t task) +{ + putreg32(1, task); +} + +/**************************************************************************** + * Name: nrf52_event_clear + * + * Description: + * clear the Event + * + ****************************************************************************/ + +static inline void nrf52_event_clear(uint32_t event) +{ + putreg32(0, event); +} + +/**************************************************************************** + * Name: nrf52_interrupt_enable + * + * Description: + * Enable the bitfield interrupt + * + ****************************************************************************/ + +static inline void nrf52_interrupt_enable(uint32_t reg_intenset, + uint32_t bitfield) +{ + putreg32(bitfield, reg_intenset); +} + +/**************************************************************************** + * Name: nrf52_interrupt_disable + * + * Description: + * Disable the bitfield interrupt + * + ****************************************************************************/ + +static inline void nrf52_interrupt_disable(uint32_t reg_intenclr, + uint32_t bitfield) +{ + putreg32(bitfield, reg_intenclr); +} + +#endif /* __ARCH_ARM_SRC_NRF52_CHIP_NRF52_UTILS_H */ + diff --git a/arch/arm/src/nrf52/nrf52832_errdata.c b/arch/arm/src/nrf52/nrf52832_errdata.c new file mode 100644 index 00000000000..dc19565a9af --- /dev/null +++ b/arch/arm/src/nrf52/nrf52832_errdata.c @@ -0,0 +1,155 @@ +/**************************************************************************** + * arch/arm/src/nrf52/nrf52832_errdata.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Levin Li + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "chip/nrf52_utils.h" +#include "chip/nrf52_rng.h" +#include "up_internal.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static bool errata_16(void) +{ + if (((getreg32(0xf0000fe0) & 0xff) == 0x6) && + ((getreg32(0xf0000fe4) & 0x0f) == 0x0)) + { + if ((getreg32(0xf0000fe8) & 0xf0) == 0x30) + { + return true; + } + } + + return false; +} + +static bool errata_66(void) +{ + /* This piece of code is modifed from Nordic SDK , there is no document to + * describe how to get the errdata information + */ + + if (((getreg32(0xf0000fe0) & 0xff) == 0x6) && + ((getreg32(0xf0000fe4) & 0x0f) == 0x0)) + { + if ((getreg32(0xf0000fe8) & 0xf0) == 0x50) + { + return true; + } + } + + return false; +} + +static void nrf52832_errdata_16(void) +{ + if (errata_16()) + { + *(volatile uint32_t *)0x4007c074 = 3131961357ul; + } +} + +static void nrf52832_errdata_66_temp(void) +{ + /* Workaround for Errata 66 "TEMP: Linearity specification not met with + * default settings found at the Errata document for your device located + * at https://infocenter.nordicsemi.com/ + */ + + if (errata_66()) + { + uint32_t temp_offset = 0x520; + uint32_t temp_ficr_offset = 0x404; + + /* slot A : 6 totals */ + + for (int i = 0; i < 6; i++) + { + putreg32(getreg32(NRF52_FICR_BASE + temp_ficr_offset + i * 4), + NRF52_TEMP_BASE + temp_offset + i * 4); + } + + /* Slot B : 6 totals */ + + temp_offset = 0x540; + temp_ficr_offset = 0x41c; + for (int i = 0 ; i < 6; i++) + { + putreg32(getreg32(NRF52_FICR_BASE + temp_ficr_offset + i * 4), + NRF52_TEMP_BASE + temp_offset + i * 4); + } + + /* slot C : 5 totals */ + + temp_offset = 0x560; + temp_ficr_offset = 0x434; + for (int i = 0; i < 5; i++) + { + putreg32(getreg32(NRF52_FICR_BASE + temp_ficr_offset + i * 4), + NRF52_TEMP_BASE + temp_offset + i * 4); + } + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void nrf52832_errdata_init(void) +{ + nrf52832_errdata_16(); + + nrf52832_errdata_66_temp(); +} diff --git a/arch/arm/src/nrf52/nrf52_rng.c b/arch/arm/src/nrf52/nrf52_rng.c new file mode 100644 index 00000000000..991f4629957 --- /dev/null +++ b/arch/arm/src/nrf52/nrf52_rng.c @@ -0,0 +1,301 @@ +/**************************************************************************** + * arch/arm/src/nrf52/nrf52_rng.c + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Levin Li + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "chip/nrf52_utils.h" +#include "chip/nrf52_rng.h" +#include "up_internal.h" + +#if defined(CONFIG_NRF52_RNG) +#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH) + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int nrf52_rng_initialize(void); +static int nrf52_rng_irqhandler(int irq, void *context, FAR void *arg); +static ssize_t nrf52_rng_read(FAR struct file *filep, FAR char *buffer, + size_t buflen); +static int nrf52_rng_open(FAR struct file *filep); + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct rng_dev_s +{ + uint8_t *rd_buf; + size_t rd_count; + size_t buflen; + sem_t rd_sem; /* semphore for read RNG data */ + sem_t excl_sem; /* semphore for access RNG dev */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct rng_dev_s g_rngdev; + +static const struct file_operations g_rngops = +{ + .open = nrf52_rng_open, /* open */ + .read = nrf52_rng_read, /* read */ +}; + +/**************************************************************************** + * Private functions + ****************************************************************************/ + +static void nrf52_rng_start(void) +{ + irqstate_t flag; + flag = enter_critical_section(); + + nrf52_event_clear(NRF52_RNG_EVENT_RDY); + + putreg32(1, NRF52_RNG_CONFIG); + nrf52_interrupt_enable(NRF52_RNG_INT_SET, NRF52_RNG_INT_EVENT_RDY); + nrf52_task_trigger(NRF52_RNG_T_START); + + up_enable_irq(NRF52_IRQ_RNG); + + leave_critical_section(flag); +} + +static void nrf52_rng_stop(void) +{ + irqstate_t flag; + flag = enter_critical_section(); + + up_disable_irq(NRF52_IRQ_RNG); + + nrf52_task_trigger(NRF52_RNG_T_STOP); + nrf52_interrupt_disable(NRF52_RNG_INT_CLR, NRF52_RNG_INT_EVENT_RDY); + + nrf52_event_clear(NRF52_RNG_EVENT_RDY); + + leave_critical_section(flag); +} + +static int nrf52_rng_initialize(void) +{ + static bool first_flag = true; + + if (false == first_flag) + return OK; + + first_flag = false; + + _info("Initializing RNG\n"); + + memset(&g_rngdev, 0, sizeof(struct rng_dev_s)); + + sem_init(&g_rngdev.rd_sem, 0, 0); + sem_setprotocol(&g_rngdev.rd_sem, SEM_PRIO_NONE); + + sem_init(&g_rngdev.excl_sem, 0, 1); + sem_setprotocol(&g_rngdev.excl_sem, SEM_PRIO_NONE); + + _info("Ready to stop\n"); + nrf52_rng_stop(); + + if (irq_attach(NRF52_IRQ_RNG, nrf52_rng_irqhandler, NULL) != 0) + { + /* We could not attach the ISR to the interrupt */ + + _warn("Could not attach NRF52_IRQ_RNG.\n"); + + return -EAGAIN; + } + + return OK; +} + +static int nrf52_rng_irqhandler(int irq, FAR void *context, FAR void *arg) +{ + FAR struct rng_dev_s *priv = (struct rng_dev_s *) &g_rngdev; + uint8_t *addr; + + if (getreg32(NRF52_RNG_EVENT_RDY) == NRF52_RNG_INT_EVENT_RDY) + { + nrf52_event_clear(NRF52_RNG_EVENT_RDY); + if (priv->rd_count < priv->buflen) + { + addr = priv->rd_buf + priv->rd_count++; + *addr = getreg32(NRF52_RNG_VALUE); + irqwarn("%d\n", *addr); + } + + if (priv->rd_count == priv->buflen) + { + nrf52_rng_stop(); + sem_post(&priv->rd_sem); + } + } + + return OK; +} + +/**************************************************************************** + * Name: nrf52_rng_open + ****************************************************************************/ + +static int nrf52_rng_open(FAR struct file *filep) +{ + /* O_NONBLOCK is not supported */ + + if (filep->f_oflags & O_NONBLOCK) + { + _err("nRF52 rng didn't support O_NONBLOCK mode.\n"); + return -EPERM; + } + + return OK; +} + +/**************************************************************************** + * Name: nrf52_rng_read + ****************************************************************************/ + +static ssize_t nrf52_rng_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + FAR struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev; + ssize_t read_len; + + if (sem_wait(&priv->excl_sem) != OK) + { + errno = EBUSY; + return -errno; + } + + priv->rd_buf = (uint8_t *) buffer; + priv->buflen = buflen; + priv->rd_count = 0; + + /* start RNG and Wait until the buffer is filled */ + + nrf52_rng_start(); + + sem_wait(&priv->rd_sem); + read_len = priv->rd_count; + + if (priv->rd_count > priv->buflen) + { + _err("Bad rd_count: Too much data, exceeds buffer size: %d\n", + priv->rd_count); + } + + /* Now , got data, and release rd_sem for next read */ + + sem_post(&priv->excl_sem); + + return read_len; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: devrandom_register + * + * Description: + * Initialize the RNG hardware and register the /dev/random driver. + * Must be called BEFORE devurandom_register. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_RANDOM +void devrandom_register(void) +{ + nrf52_rng_initialize(); + (void)register_driver("/dev/random", FAR & g_rngops, 0444, NULL); +} +#endif + +/**************************************************************************** + * Name: devurandom_register + * + * Description: + * Register /dev/urandom + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_URANDOM_ARCH +void devurandom_register(void) +{ +#ifndef CONFIG_DEV_RANDOM + nrf52_rng_initialize(); +#endif + (void)register_driver("dev/urandom", FAR & g_rngops, 0444, NULL); +} +#endif + +#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */ +#endif /* CONFIG_NRF52_RNG */ diff --git a/arch/arm/src/nrf52/nrf52_start.c b/arch/arm/src/nrf52/nrf52_start.c index ff145f7b036..1ec79f0542c 100644 --- a/arch/arm/src/nrf52/nrf52_start.c +++ b/arch/arm/src/nrf52/nrf52_start.c @@ -48,9 +48,8 @@ #include "nvic.h" #include "nrf52_clockconfig.h" -//#include "nrf52_userspace.h" +#include "chip/nrf52_utils.h" #include "nrf52_lowputc.h" -//#include "nrf52_serial.h" #include "nrf52_start.h" #include "nrf52_gpio.h" #include "nrf52_serial.h" @@ -94,7 +93,8 @@ * done, the processor reserves space on the stack for the FP state, * but does not save that state information to the stack. * - * Software must not change the value of the ASPEN bit or LSPEN bit while either: + * Software must not change the value of the ASPEN bit or LSPEN bit while + * either: * - the CPACR permits access to CP10 and CP11, that give access to the FP * extension, or * - the CONTROL.FPCA bit is set to 1 @@ -218,6 +218,12 @@ void __start(void) showprogress('C'); +#if defined(CONFIG_ARCH_FAMILY_NRF52832) + /* Initialize the errdata work-around */ + + nrf52832_errdata_init(); +#endif + /* Initialize the FPU (if configured) */ nrf52_fpuconfig(); @@ -229,20 +235,20 @@ void __start(void) showprogress('D'); +#ifdef USE_EARLYSERIALINIT /* Perform early serial initialization */ -#ifdef USE_EARLYSERIALINIT nrf52_earlyserialinit(); #endif showprogress('E'); +#ifdef CONFIG_BUILD_PROTECTED /* For the case of the separate user-/kernel-space build, perform whatever * platform specific initialization of the user memory is required. * Normally this just means initializing the user space .data and .bss * segments. */ -#ifdef CONFIG_BUILD_PROTECTED nrf52_userspace(); showprogress('F'); #endif diff --git a/arch/arm/src/nrf52/nrf52_clrpend.c b/arch/arm/src/nrf52/nrf52_utils.c similarity index 97% rename from arch/arm/src/nrf52/nrf52_clrpend.c rename to arch/arm/src/nrf52/nrf52_utils.c index 018b4b475d7..83f92589f56 100644 --- a/arch/arm/src/nrf52/nrf52_clrpend.c +++ b/arch/arm/src/nrf52/nrf52_utils.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/nrf52/nrf52_clrpend.c + * arch/arm/src/nrf52/nrf52_utils.c * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -45,6 +45,7 @@ #include "up_arch.h" #include "nrf52_irq.h" +#include "chip/nrf52_utils.h" /**************************************************************************** * Public Functions