SDF Implementation (SystemVerilog LRM 32 section)

[likeamahoney]

It seems to me that support for checks from section 32 of the standard is needed. Add checks to determine which tasks are annotated and which are not, as well as loading and verifying information from a file when calling $sdf_annotate.

For this task, a parser for SDF annotations is needed. It seems to me that writing a parser from scratch in C++ and including its code in slang would be overhead.

I searched and found the most complete implementation of the parser (if considering it with my small fixes) in Python - https://github.com/chipsalliance/f4pga-sdf-timing.

The question is whether it is a good idea to call Python code from the C++ core of slang. Or how is it better to do it? The project seems dead (nothing has been uploaded for 2 years) - perhaps a fork and separate maintaining for it are needed (i think manually by @MikePopoloski)

[likeamahoney]

Or mb extract that project at tools and use it as separate tool for converting SDF to JSON and then parsing it at slang core?

Which solution is better?

[MikePopoloski]

I don't think this is necessary in order to implement compile time or elaboration time checks -- the $sdf_annotate task doesn't run until simulation control executes that task, which may be delayed or behind an if statement, etc.

That being said, I'm not against having an SDF parser in the slang library. I would not try to import a Python implementation; I would simply code up a parser in C++. I don't think it would be particularly hard.

[likeamahoney]

Much thanks! Working on it!