---?image=assets/images/gitpitch-audience.jpg @title[EDK_II_Porting_Projects_pres]

This slide deck has moved to: https://gitpitch.com/tianocore-training/EDK_II_Porting_Projects_pres/master#/

UEFI & EDK II Training

Porting an Existing Project

tianocore.org Note: PITCHME.md for UEFI / EDK II Training Porting an Existing Project with EDK II

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@title[Lesson Objective]

<p align="center"Lesson Objective

@fa[certificate gp-bullet-green] Define the porting task list for porting existing
platforms in EDK II in order to boot to the UEFI Shell
@fa[certificate gp-bullet-cyan] Explain the EDK II infrastructure, porting libraries,
library classes, PCDs, and directory structures
@fa[certificate gp-bullet-yellow] Determine the necessary porting for each phase
of a new EDK II platform Project

---?image=assets/images/binary-strings-black2.jpg @title[EDK II Infrastructure Section]

EDK II Infrastructure

Review of EDK II

@title[EDK II Infrastructure]

EDK II Infrastructure

@snap[north-west span-60 fragment]

@box[bg-gold2 text-white rounded my-box-pad2 ](

Directory Structure

)
@snapend

@snap[north-east span-65 fragment]

@box[bg-royal text-white rounded my-box-pad2 ](

Platform/Projects in Packages

)
@snapend

@snap[north-west span-70 fragment]

@box[bg-purple-pp text-white rounded my-box-pad2 ](

Library Class Name → Instance

)
@snapend

@snap[north-east span-80 fragment]

@box[bg-navy text-white rounded my-box-pad2 ](

Platform Configuration Database PCD

)
@snapend

Note:

First off we have the infrastructure.
So the infrastructure is what are the new things added for EDK II?
First, the directory structure, the directory structure for EDK II is now structured so that all of the platform package contents are in subdirectories under the platform package. So we will have a new platform package, and in that directory there will be subdirectories where we will have all of the reported modules and code for our new platform. Anything we update will be in this directory package. So what we will see is our build description files.
The other thing that is different is the libraries. We see with EDK II we have a library class and library instances. If we take our existing platform and look at the library instances we may have to update those for our new platform package.
The third thing that is different is the new platform configuration database or PCD. What we will see with this is to port our new platform we may only be changing a PCD value and we may not even change the source code.
Directory Structure
- The package for the platform contains subdirectories for ported modules
- Text files: FDF, DSC, DEC
Libraries – Library class and library instances may need to be ported for the platform
PCD – PCD helps with porting, and may mean not changing any of the source code

@title[EDK II Infrastructure Review]

EDK II Infrastructure - review

@snap[west span-30 ] @box[bg-royal text-white waved fragment](@color[yellow](Packages)
List of related modules ) @snapend

@snap[north-west span-45 fragment] @css[text-yellow](

+) @snapend

@snap[midpoint span-30 ] @box[bg-royal text-white waved fragment](@color[yellow](Libraries) Same name & interface) @snapend

@snap[north span-45 fragment] @css[text-yellow](

+) @snapend

@snap[east span-30] @box[bg-royal text-white waved fragment](@color[yellow](PCDs)
Platform Config. DB ) @snapend

Note:

Infrastructure Summary

Packages
- list of modules
Libraries
- Same Names with different implementation but same interface
PCD
- Platform configuration database

@title[New Package Directory]

New Package Directory

@snap[north-west span-50 ]

@box[bg-black text-white rounded my-box-pad2 ](

)
@snapend

@snap[north-west span-50 ]

   MyWorkSpace/
     . . .
       NewProjectPkg/
         Include/
         Library/
         . . .
       PlatformDrivers/

@snapend

@snap[north-west span-50 fragment]

   MyWorkSpace/
     . . .
       NewProjectPkg/
         Include/
         Library/
         . . .
       PlatformDrivers/
          NewProjectPkg.DSC

@snapend

@snap[north-east span-45 fragment ]

@box[bg-yellow text-black my-box-pad2 ](

  DSC
  Only one to build against
  Contains PCD platform values
  Defines library classes
  Includes other modules

) @snapend

@snap[north-west span-50 fragment]

   MyWorkSpace/
     . . .
       NewProjectPkg/
         Include/
         Library/
         . . .
       PlatformDrivers/
          NewProjectPkg.DSC
          NewProjectPkg.FDF

@snapend

@snap[north-east span-45 fragment ]

@box[bg-yellow text-black my-box-pad2 ](

  FDF
  File to define flash layout

) @snapend

@snap[north-west span-50 fragment]

   MyWorkSpace/
     . . .
       NewProjectPkg/
         Include/
         Library/
         . . .
       PlatformDrivers/
          NewProjectPkg.DSC
          NewProjectPkg.FDF
          NewProjectPkg.DEC

@snapend

@snap[north-east span-45 fragment ]

@box[bg-yellow text-black my-box-pad2 ](

  DEC
  File to define PCDS within the
   Platform Package

) @snapend

Note:

---?image=/assets/images/slides/Slide7_1.JPG @title[Libraries]

Libraries

@snap[north-east span-80 fragment ]

@color[yellow](DSC maps library class to library-instances)

@snapend

@snap[north-east span-80 fragment ]

Syntax in DSC File
[libraryclasses]
LibraryClassName|Path/To/@color[#00ffff](LibInstanceNameInstance1).inf

@snapend

@snap[south span-85 fragment ] @box[bg-purple-pp text-white rounded ](Search INF files for string: "LIBRARY_CLASS =" )
@snapend

Note:

DSC maps library-class to library-instances
Global, by type, individual override based on desired implimentation
Effected by size, speed, built in, binary distribution
PCI example
- PciCfg – Protocol function call by GUID (PEI)
- PciRootBridgeIo – Protocol function call by GUID (DXE)
- Syntax in DSC file
- ```
[libraryclasses] 
```
- ```
LibraryClassName|Path/To/LibInstanceNameInstance1.inf
```
another Note; Workspace relative paths!
- Check for existing library instances.
- Search workspace INF files for string: "LIBRARY_CLASS ="

@title[Library Classes in DSC ]

Library Classes Section in DSC

`DebugLib` class in `NewProjectPkg.dsc`

``` [LibraryClasses] DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf • • • [LibraryClasses.common.DXE_CORE] • • • DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/ PeiDxeDebugLibReportStatusCode.inf • • • [LibraryClasses.common.DXE_SMM_DRIVER] DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
<hr>

[Components] • • • MyPath/MyModule.inf { DebugLib|MdePkg/Library/BaseDebugLibSerialPort.inf }

@snap[north-east span-30 fragment ] @box[bg-purple-pp text-white my-box-pad2 ]( Library Class Section) @box[bg-green text-white my-box-pad2 ]( Components Section) @snapend Note: Example - <pre> DebugLib class in NewProjectPkg.dsc [LibraryClasses] DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf • • • [LibraryClasses.common.DXE_CORE] • • • DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/ PeiDxeDebugLibReportStatusCode.inf • • • [LibraryClasses.common.DXE_SMM_DRIVER] DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf [Components] • • • MyPath/MyModule.inf { <LibraryClasses> DebugLib|MdePkg/Library/BaseDebugLibSerialPort.inf } </pre> --- @title[PCD Types] PCD Types @snap[east span-35] @box[bg-lt-blue-pp text-white rounded my-box-pad2 ]( FeatureFlag) @snapend @snap[north-west span-35] @box[bg-yellow text-blue rounded my-box-pad2 ]( FixedAtBuild) @snapend @snap[north span-30] @box[bg-green-pp text-white rounded my-box-pad2 ]( Dynamic) @snapend @snap[north-east span-30] @box[bg-green-pp text-white rounded my-box-pad2 ]( DynamicEx) @snapend @snap[south-west span-30] @box[bg-green-pp text-white rounded my-box-pad2 ]( DynamicHii) @snapend @snap[south-east span-30] @box[bg-green-pp text-white rounded my-box-pad2 ]( DynamicVpd) @snapend @snap[west span-45] @box[bg-purple-pp text-white rounded my-box-pad2 ]( PatchableInModule) @snapend @snap[south-west span-100] @box[bg-navy text-white rounded my-box-pad2 fragment ]( Syntax Examples `[pcdsFeatureFlag.common] [pcdsFixedAtBuild.IA32]`  `[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]`  ) @snapend Note: - FeatureFlag - Replaces a switch MACRO to enable/disable a feature (TRUE or FALSE) - FixedAtBuild - Replaces a macro that produced a customizable value - Value of this PCD type is determined at build time and is stored in the code section of a module’s PE image - PatchableInModule - Value is stored in the data section, rather than the code section, of the module’s PE image. - Dynamic / DyanmicEx / DynamicHii / DynamicVpd - Value is assigned by one module and is accessed by other modules in execution time - Syntax Examples - [pcdsFeatureFlag.common] [pcdsFixedAtBuild.IA32] [pcdsFixedAtBuild.X64] [pcdsFixedAtBuild.IPF] [pcdsFixedAtBuild.EBC] [pcdsDynamic.IA32] [pcdsDynamicEx.X64] ---?image=/assets/images/slides/Slide10_1.JPG @title[PCD Syntax] PCD Syntax @snap[north-east span-90 fragment] PCD defined in the DEC file from any package @box[bg-black text-white my-box-pad2 ](  [Guids.common]   @color[red](PcdTokenSpaceGuidName)={ 0xXXXXXXXX, 0xXXXX, 0xXXXX, { 0xXX, . . .}}   . . .   [Pcds...]   PcdTokenSpaceGuidName.PcdTokenName|Value[|DatumType[|MaxSize]]|Token   ) @snapend @snap[north-east span-90 fragment] PCD usage listed in INF file for module @box[bg-black text-white my-box-pad2 ](  [...Pcds...]   PcdTokenSpaceGuidName.@color[red](PcdTokenName)|[Value]   ) @snapend @snap[north-east span-90 fragment] Value of PCD set in @color[yellow](`NewProject.dsc`) @box[bg-black text-white my-box-pad2 ](  [Pcds...]   PcdTokenSpaceGuidName.@color[red](PcdTokenName)|Value[|DatumType[|MaximumDatumSize]]   ) @snapend @snap[north-east span-90 fragment] ![ExamplePCD](/assets/images/ExamplePCD.png) @snapend Note: - PCD defined in the DEC file from any package - [Guids.common] - PcdTokenSpaceGuidName={ 0x914AEBE7, 0x4635, 0x459b, { 0xAA, . . .}} - [Pcds...] - PcdTokenSpaceGuidName.PcdTokenName|Value[|DatumType[|MaxSize]]|Token - PCD usage listed in INF file for module - […Pcd…] - PcdTokenSpaceGuidName.PcdTokenName|[Value] - Value of PCD set in NewPlatform.dsc - [Pcds...] - PcdTokenSpaceGuidName.PcdTokenName|Value[|DatumType[|MaximumDatumSize]] - Example used in NewProject.dsc - [PcdsFixedAtBuild.IA32] - gEfiIchTokenSpaceGuid.PcdIchAcpiIoPortBaseAddress|0x400 - gNewProjectTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFFF00000 - gNewProjectTokenSpaceGuid.PcdFlashAreaSize|0x100000 ---?image=assets/images/binary-strings-black2.jpg @title[Porting Task List Section] ###      Porting Task List         What is the best approach for how to port? ---?image=/assets/images/slides/Slide27_1.JPG @title[Porting Approach] ### Approach – Porting EDK II @snap[north-east span-45 fragment] @box[bg-gold2 text-white my-box-pad2 ]( Search Work Space  ) @snapend @snap[west span-60 fragment] @box[bg-royal text-white my-box-pad2 ](Find Similar EDK II Projects  ) @snapend @snap[south span-50 fragment] @box[bg-purple-pp text-white my-box-pad2 ]( Boot to UEFI Shell  ) @snapend Note: - Many examples of packages in the UDK / EDK II source base - Find a similar package or platform or project that meets target project needs - Build description files are text files using basic text editor to update – no GUI with the goal of booting to the UEFI Shell Porting_task_list.gif  ---?image=assets/images/binary-strings-black2.jpg  @title[Porting Task List Section] Porting Task List @snap[north-east span-90 ] @box[bg-grey-15 text-white rounded my-box-pad2 ](  ) @snapend @snap[north-east span-15] ![Porting_task_list.gif](/assets/images/tenor.gif) @snapend  @snap[north-west span-10] ❶ ❷ ❸ ❹ ❺ ❻ @snapend  @snap[north-west span-10 fragment] @color[yellow](❶) ❷ ❸ ❹ ❺ ❻ @snapend @snap[north-east span-90 fragment]  @color[white](Create a New Project package directory)           @snapend  @snap[north-west span-10 fragment] @color[yellow](❶ ❷) ❸ ❹ ❺ ❻ @snapend @snap[north-east span-90 fragment]  @color[white](Create a New Project package directory)  @color[white](Create Build Files (DSC, DEC, and FDF))       @snapend  @snap[north-west span-10 fragment] @color[yellow](❶ ❷ ❸) ❹ ❺ ❻ @snapend @snap[north-east span-90 fragment]  @color[white](Create a New Project package directory)  @color[white](Create Build Files (DSC, DEC, and FDF))  @color[white](Update target.txt to make your Project the default)     @snapend  @snap[north-west span-10 fragment] @color[yellow](❶ ❷ ❸ ❹) ❺ ❻ @snapend @snap[north-east span-90 fragment]  @color[white](Create a New Project package directory)  @color[white](Create Build Files (DSC, DEC, and FDF))  @color[white](Update target.txt to make your Project the default)  @color[white](Use UEFI PI phases to Port all project modules)   @snapend  @snap[north-west span-10 fragment] @color[yellow](❶ ❷ ❸ ❹ ❺) ❻ @snapend @snap[north-east span-90 fragment]  @color[white](Create a New Project package directory)  @color[white](Create Build Files (DSC, DEC, and FDF))  @color[white](Update target.txt to make your Project the default)  @color[white](Use UEFI PI phases to Port all project modules)  @color[white](Update DSC w/ new libraries, modules, and PCDs values)   @snapend  @snap[north-west span-10 fragment] @color[yellow](❶ ❷ ❸ ❹ ❺ ❻) @snapend @snap[north-east span-90 fragment]  @color[white](Create a New Project package directory)  @color[white](Create Build Files (DSC, DEC, and FDF))  @color[white](Update target.txt to make your Project the default)  @color[white](Use UEFI PI phases to Port all project modules)  @color[white](Update DSC w/ new libraries, modules, and PCDs values)  @color[white](Minimums for UEFI Shell) @snapend Note: 1. Create a New Project package directory 2. Create Build Files (DSC, DEC, and FDF) 3. Update conf/target.txt to make your Project the default build (optional) 4. Port all required modules for your project through all UEFI Platform initialization phases 5. Update build text (DSC, DEC, FDF) files with libraries, ported modules, and PCD values to configure modules 6. Minimums for UEFI Shell +++?image=assets/images/binary-strings-black2.jpg   @title[Porting Task List Section 02] Porting Task List @snap[north-east span-90 ] @box[bg-grey-15 text-white rounded my-box-pad2 ](  ) @snapend @snap[north-east span-15] ![Porting_task_list.gif](/assets/images/tenor.gif) @snapend  @snap[north-west span-10 ] @color[yellow](❶ ❷ ❸ )❹ ❺ ❻ @snapend @snap[north-east span-90 ]  @color[yellow](Create a New Project package directory)  @color[yellow](Create Build Files (DSC, DEC, and FDF))  @color[yellow](Update target.txt to make your Project the default)  @color[gray](Use UEFI PI phases to Port all project modules)  @color[gray](Update DSC w/ new libraries, modules, and PCDs values)  @color[gray](Minimums for UEFI Shell) @snapend Note: 1. Create a New Project package directory 2. Create Build Files (DSC, DEC, and FDF) 3. Update conf/target.txt to make your Project the default build (optional) 4. Port all required modules for your project through all UEFI Platform initialization phases 5. Update build text (DSC, DEC, FDF) files with libraries, ported modules, and PCD values to configure modules 6. Minimums for UEFI Shell  ---?image=/assets/images/slides/Slide39.JPG @title[New Directory Structure ] New Directory Structure Note: We will start with our example of Minnowboard Max and it's project directory Copy this directory ---?image=/assets/images/slides/Slide41_1.JPG  @title[Creating a New Project Directory] New Directory Structure Note: - The platform package directory contains project files - DEC - DSC - FDF - Specific platform directories have files for other functions - PEI - DXE - SMM - SIO - Setup - Library - Etc… Copy the project directory that is working to a new directory Our example is NewProjectPkg +++?image=/assets/images/slides/Slide41_2.JPG   @title[Creating a New Project Directory 02] New Directory Structure Note: - The platform package directory contains project files - DEC - DSC - FDF - Specific platform directories have files for other functions - PEI - DXE - SMM - SIO - Setup - Library - Etc… +++?image=/assets/images/slides/Slide41_3.JPG   @title[Creating a New Project Directory 03] New Directory Structure Note: - The platform package directory contains project files - DEC - DSC - FDF - Specific platform directories have files for other functions - PEI - DXE - SMM - SIO - Setup - Library - Etc… +++?image=/assets/images/slides/Slide41_4.JPG   @title[Creating a New Project Directory 04] New Directory Structure Note: - The platform package directory contains project files - DEC - DSC - FDF - Specific platform directories have files for other functions - PEI - DXE - SMM - SIO - Setup - Library - Etc… ---?image=/assets/images/slides/Slide42.JPG  @title[PCD Example with New Project ] PCD Example with New Project Note: - PCDs are declared in corresponding Silicon and Chipset Packages, according to how they are used with default values in the package DEC files. - PCDs are assigned values in the Project Package DSC file, overriding values in the DEC file. +++?image=/assets/images/slides/Slide43.JPG   @title[PCD Example with New Project 02] PCD Example with New Project Note: - PCDs are declared in corresponding Silicon and Chipset Packages, according to how they are used with default values in the package DEC files. - PCDs are assigned values in the Project Package DSC file, overriding values in the DEC file. ---?image=assets/images/binary-strings-black2.jpg  @title[Porting Task List Section 04] Porting Task List @snap[north-east span-90 ] @box[bg-grey-15 text-white rounded my-box-pad2 ](  ) @snapend @snap[north-east span-15] ![Porting_task_list.gif](/assets/images/tenor.gif) @snapend  @snap[north-west span-10 ] @color[yellow](❶ ❷ ❸ )@color[red](❹)@color[#808080]( ❺ ❻) @snapend @snap[north-east span-90 ]  @color[gray](Create a New Project package directory)  @color[gray](Create Build Files (DSC, DEC, and FDF))  @color[gray](Update target.txt to make your Project the default)  @color[yellow](Use UEFI PI phases to Port all project modules)  @color[gray](Update DSC w/ new libraries, modules, and PCDs values)  @color[gray](Minimums for UEFI Shell) @snapend Note: 1. Create a New Project package directory 2. Create Build Files (DSC, DEC, and FDF) 3. Update conf/target.txt to make your Project the default build (optional) 4. Port all required modules for your project through all UEFI Platform initialization phases 5. Update build text (DSC, DEC, FDF) files with libraries, ported modules, and PCD values to configure modules 6. Minimums for UEFI Shell +++?image=assets/images/binary-strings-black2.jpg   @title[Porting Task List Section 04-2] Porting Task List @snap[north-east span-90 ] @box[bg-grey-15 text-white rounded my-box-pad2 ](  ) @snapend @snap[north-east span-15] ![Porting_task_list.gif](/assets/images/tenor.gif) @snapend  @snap[north-west span-10 ] @color[yellow](❶ ❷ ❸ )@color[red](❹)@color[#808080]( ❺ ❻) @snapend @snap[north-east span-90 ]  @color[gray](Create a New Project package directory)  @color[gray](Create Build Files (DSC, DEC, and FDF))  @color[gray](Update target.txt to make your Project the default)  @color[yellow](Use UEFI PI phases to Port all project modules)  @color[gray](Update DSC w/ new libraries, modules, and PCDs values)  @color[gray](Minimums for UEFI Shell) @snapend @snap[midpoint span-85 ] ![boot-flow](/assets/images/boot-flow2.png) @snapend @snap[south span-100 fragment] @box[bg-purple-pp text-white rounded my-box-pad2 ](Port all required modules for your project using UEFI Platform Initialization phases as a guide  ) @snapend Note: 1. Create a New Project package directory 2. Create Build Files (DSC, DEC, and FDF) 3. Update conf/target.txt to make your Project the default build (optional) 4. Port all required modules for your project through all UEFI Platform initialization phases 5. Update build text (DSC, DEC, FDF) files with libraries, ported modules, and PCD values to configure modules 6. Minimums for UEFI Shell ### This will be the longest task and depending on the project may take several weeks ---?image=/assets/images/slides/Slide24_1.JPG @title[Platform Initialization: SEC Phase] Platform Initialization: SEC Phase @snap[north span-40 fragment] @box[bg-lt-blue-pp text-black my-box-pad2 ](@color[white](  x86 (IA32 & x64))     /MyWorkDir        /IA32FamilyCpuPkg          /SecCore/Ia32          /ResetVec.asm16   ) @snapend @snap[north span-40 fragment] @box[bg-gold2 text-black my-box-pad2 ](@color[white](  Itanium)     /MyWorkDir        /ItaniumFamilyCpuPkg          /SecCore/Ipf          /SecCore.s/ SALE_ENTRY   ) @snapend @snap[north span-40 fragment] @box[bg-grey-50 text-black my-box-pad2 ](@color[white](  Other Arch)     /MyWorkDir        /XCpuPkg          /SecCore/Xarch            ) @snapend Note: ### SEC phase - Minimal code - Execute in place (XIP) from flash - Execution started by reset vector - Enables temp memory for C code (data & stack) - Transfers control to PEI - Let’s start with the SEC phase. - What do we need to be current sermon about in the SEC? - We will have Minimal code and we are most likely in assembly language for the particular processor architecture. - We will be executing from flash , so this means the code will not be compressed. - A point to take especially if you are going to be using a hardware debugger, is we will start Execution at the reset vector - It’s job is to Enables temp memory - Set up the Data and Stack Cached areas . This sets up our cache as RAM or our cache as no eviction mode. - Which will Enable the C Code - And then it will finally Transfer control to PEI ### entry point for SEC - What we are showing at the right of the slide is the exact location in the EDK II source tree of the reset vector. For X86 Intel architecture all the code will be in the directory Ia32FamilyCpuPkg and the reset vector will be in the file ResetVec.asm16. for this particular file to reset Vector will start to execute the code in this file. There are approximately about three assembly language instructions before it will make a jump into a platform’s ported SEC library source code. This is where we would need to start to port our new platform code. - The Middle example is for Itanium and would be similar to the X86 example. In this example there is the SALE_ENTRY. - Currently we only have two processor architectures but if we had a third the “OtherArch” example would be where it would be located. ---?image=/assets/images/slides/Slide25_1.JPG @title[SEC Code Start] SEC Code Start @color[white]( - Source Code Example) Location for MinnowBoard MAX:     `IA32FamilyCpuPkg/SecCore/Ia32/ResetVec.nasmb` @snap[north-west span-35 fragment] Entry point   @color[yellow](       &rdca;) @snapend @snap[south-west span-20 fragment] Binary of the compiled Firmware image at 4GB @color[yellow](   &rdca;)   @snapend Note: Example: IA32FamilyCpuPkg/SecCore/Ia32/ResetVec.nasmb <pre> ; ; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte ; Execution starts here upon power-on/platform-reset. ; ResetHandler: nop nop ApStartup: ; ; Jmp Rel16 instruction ; Use machine code directly in case of the assembler optimization ; SEC entry point relatvie address will be fixed up by some build tool. ; ; Typically, SEC entry point is the function _ModuleEntryPoint() defined in ; SecEntry.asm ; DB 0e9h DW -3 </pre> --- @title[Platform SEC Lib for MinnowBoard MAX] Platform SEC Lib for MinnowBoard MAX @snap[north-west span-100 ] @box[bg-gold2 text-white rounded my-box-pad2 ](  ) @snapend @snap[north-west span-100 ]      NewProjectPkg/         Library/           PlatformSecLib/             PlatformSecLib.c             PlatformSecLib.h             PlatformSecLib.inf             IA32/               Chipset.inc               Flat32.asm               Platform.inc               SecCore.inc               Ia32.inc     @snapend @snap[north-east span-50 fragment]           `_ModuleEntryPoint` or           `Flat32Start` @color[red](&ldca;)   @snapend Note: - Entry point after reset vector is platform specific - SecEntry.asm - ModuleEntryPoint - SecNewProject.asm calls entry for setting up temporary memory and APs - SecPlatformInitTram - SecPlatformApEntryPoint - SecCPU.Asm sets cache for no eviction mode - CPU & MTRR register defines - Ia32.inc - NewProjectSecLib.c SEC platform main (i.e. enable FWH decode) - Of this slide we have what we need to port our new package platform for the SEC phase. - We find this code in our new platform package directory under the library directory under the directory called something like new platform SEC lib. Under this directory we see that we have a “C”, “H” and Inf files, And we also see another directory, in our case for our example platform, we have an IA32 directory. This directory would have assembly language source files for our port. - Let’s take a look at the details of these files: - After the reset vector and after those initial architecture specific instructions, a jump will be made into the new platform SEC library code. The Entry point after common reset vector is platform specific in SecEntry.asm with the label ModuleEntryPoint. - The file SecNewProject.asm – calls the entry for setting up our temporary memory and the Application Processors - We will need to look at the code at the label SecPlatformInitTram where we would make a call to set up our temporary memory. Probably the cache as RAM. But, it could be something different. - The label SecPlatformApEntryPoint is where we be setting up the entry point for our application processors. - The file SecCPU.Asm – is the actual code that Sets the Cache for no eviction mode or cache as RAM. - The include file Ia32.inc – has Defines for the MTRR registers and processor specific defines - Finally, the C. source code file NewProjectSecLib.c – and this file would have the Sec Platform MAIN entry– and it would be responsible for things like to Enable FWH decoding etc. ---?image=/assets/images/slides/Slide56.JPG @title[Temporary Memory Example] Temporary Memory Example Note: - This is an example!!!!! - SEC PCDs used to set up temp RAM size and location - PcdTemporaryRamSize - PcdTemporaryRamBase ---?image=/assets/images/slides/Slide28_1.JPG @title[SEC Lib, PCD Example ]  SEC Lib, PCD Example @snap[north-east span-90 fragment] Defined in Package DEC @color[yellow](`NewProjectPkg.dec`) @box[bg-black text-white my-box-pad2 ](  [PcdsFixedAtBuild]   gPlatformModulePkgTokenSpaceGuid.@color[red](PcdFlashMicroCodeAddress)|0xFFFF0000|UINT32|0x20x  ) @snapend @snap[north-east span-90 fragment] Module INF lists which PCDs get accessed @box[bg-black text-white my-box-pad2 ](  NewProjectPkg/Library/PlatformSecLib/PlatformSecLib.inf   [Pcd]   gPlatformModulePkgTokenSpaceGuid.@color[red](PcdFlashMicroCodeAddress)   ) @snapend @snap[north-east span-90 fragment] Value to use in Project @color[yellow](`NewProjectPkg.dsc`) @box[bg-black text-white my-box-pad2 ](  [PcdsFixedAtBuild]   gPlatformModulePkgTokenSpaceGuid.@color[red](PcdFlashMicroCodeAddress)|0xfff90000   ) @snapend @snap[north-east span-90 fragment] SEC - Referenced in the SEC library code @box[bg-black text-white my-box-pad2 ](  NewProjectPkg/Library/PlatformSecLib/Ia32/flat.asm    ; Get the Flash Microcode address    mov esi, PcdGet32 (@color[red](PcdFlashMicroCodeAddress))     ) @snapend Note: - SEC PCDs used to set up temp RAM size and location - PcdTemporaryRamSize - PcdTemporaryRamBase ---?image=/assets/images/slides/Slide29_1.JPG  @title[PEI Phase ] PEI Phase @snap[north-east span-80 fragment] @box[bg-royal text-white rounded my-box-pad2 ](Main platform PEI code is in `PlatformPei` and `PlatformInitPei`   ) @snapend @snap[north-east span-80 fragment] @box[bg-green-pp text-white rounded my-box-pad2 ](PEI code is dependent on the PEI drivers   ) @snapend @snap[north-east span-80 fragment] @box[bg-gold2 text-white rounded my-box-pad2 ](Platform PEI code can be divided into 3 phases   ) @snapend @snap[north-east span-50 fragment] @size[2.5](@color[#00ffff](➊))  Pre-Memory Initialization @size[2.5](@color[yellow](➋))  Memory Initialization (MRC) @size[2.5](@color[#87E2A9](➌))  Post-Memory Initialization   @snapend @snap[south-west span-100 fragment] @box[bg-purple-pp text-white rounded my-box-pad2 ](TIP : Check the DSC file for the PEI Modules used   ) @snapend Note: - The main platform PEI code is in a subdirectory of the platform package. (PlatformPei) - It references PEIMs in other packages - PEI code is dependant on the PEI drivers for the platform for communication to the devices - Determine boot mode - S3 and S5 are the most common modes - Recovery mode - Low-level initialization of the platform - Find FVs that contain DXE - Discover and initialize main memory - Transfer control according to boot mode - If S5 hands control to DXE - If S3 uses waking vector - Platform PEI code can be divided into 3 phases: 1. Pre-Memory Initialization - Initialize the memory controller - Detect boot mode. - Detect video adapter 2. Memory Initialization (MRC) - Install UEFI Memory. - Capsule coalesce, Capsule Boot. - Create HOB of system memory. 3. Post-Memory initialization - PCH initialization after MRC. - SIO initialization. - Install ResetSystem and FinvFv PPI, if recovery boot mode. - Set MTRR for PEI - Create FV HOB and Flash HOB - Install RecoveryModule and AtaController PPI if recovery boot mode. ---?image=/assets/images/slides/Slide29_1.JPG @title[PEI Phase – MAX has 2 PEIM Modules 01] PEI Phase – MAX has 2 PEIM Modules @snap[north-east span-85 ] @box[bg-black text-white rounded my-box-pad2 ](   ) @snapend @snap[north-east span-80 ] NewProjectPkg/    @color[cyan]( . . .) PlatformInitPei/    @color[red](PlatformEarlyInit.inf)    BootMode.c    CpuInitPeim.c    PchInitPeim.c    MchInit.c    MemoryCallback.c    MemoryPeim.c    @snapend @snap[north-east span-45 ]    @color[cyan]( . . .)    PlatformEarlyInit.c    PlatformEarlyInit.h    PlatformInfoInit.c    LegacySpeaker.c    LegacySpeaker.h    Stall.c    PowerFailureHandle.c    PlatformSsaInitPeim.c    IsctWakeReason.c    @snapend @snap[south-east span-85 fragment] @box[bg-blue-pp text-white rounded my-box-pad2 ](      @size[01.9em](NewProject.DSC file: )       `[Components.IA32]`       `NewProject/PlatformInitPei/PlatformEarlyInit.inf`   ) @snapend Note: - The main platform PEI code is in a subdirectory of the platform package. (PlatformPei) - It references PEIMs in other packages - PEI code is dependant on the PEI drivers for the platform for communication to the devices ---?image=/assets/images/slides/Slide29_1.JPG @title[PEI Phase – MAX has 2 PEIM Modules 02] PEI Phase – MAX has 2 PEIM Modules @snap[north-east span-85 ] @box[bg-black text-white rounded my-box-pad2 ](   ) @snapend @snap[north-east span-60 ] NewProjectPkg/    @color[cyan]( . . .) PlatformPei/    @color[red]( PlatformPeiBB.inf)    Platform.c    Platform.h    MemoryCallback.c    CommonHeader.h    Stall.c    BootMode.c    @snapend @snap[south-east span-85 fragment] @box[bg-blue-pp text-white rounded my-box-pad2 ](      @size[01.9em](NewProject.DSC file: )       `[Components.IA32]`       `NewProject/PlatformPei/PlatformBB.inf`   ) @snapend Note: - The main platform PEI code is in a subdirectory of the platform package. (PlatformPei) - It references PEIMs in other packages - PEI code is dependant on the PEI drivers for the platform for communication to the devices ---?image=/assets/images/slides/Slide75.JPG @title[Recommended PEI Addresses] @size[01.25em](Recommended PEI Addresses ) Note: - Platform information commonly used in PEI - Base addresses - GPIO addresses - SMBUS address - Memory configuration (channels, ports, etc…) - ACPI settings (base address register, etc…) - Goal is to extract these concepts in PCD entries and make them changeable through DSC without having to modify module source ---?image=/assets/images/slides/Slide77.JPG @title[How to search Workspace] How to search for Addresses in the Workspace Note: - How to search for GPIOs for NewProjectPkg - KEY - search the workspace for a string and work back to Data structures declaring then use the DSC for which modules are included ---?image=/assets/images/slides/Slide79.JPG  @title[How to search for GPIOs for NewProjectPkg] How to search for GPIOs for NewProjectPkg +++?image=/assets/images/slides/Slide80.JPG   @title[How to search for GPIOs for NewProjectPkg 02] How to search for GPIOs for NewProjectPkg Note: +++?image=/assets/images/slides/Slide81.JPG   @title[How to search for GPIOs for NewProjectPkg 03] How to search for GPIOs for NewProjectPkg Note: +++?image=/assets/images/slides/Slide82.JPG   @title[How to search for GPIOs for NewProjectPkg 04] How to search for GPIOs for NewProjectPkg Note: +++?image=/assets/images/slides/Slide83.JPG   @title[How to search for GPIOs for NewProjectPkg 05] How to search for GPIOs for NewProjectPkg Note: ---?image=/assets/images/slides/Slide28_1.JPG @title[PEI Memory Base Address, PCD Example ]  PEI Memory Base Address, PCD Example @snap[north-east span-90 fragment] Defined in Package DEC @color[yellow](`NewProjectPkg.dec`) @box[bg-black text-white my-box-pad2 ](  [PcdsFixedAtBuild]   gEfiIchPkgTokenSpaceGuid.@color[red](PcdPeiIchEhciControllerMemoryBaseAddress)|0|UINT32|0x03x  ) @snapend @snap[north-east span-90 fragment] Module INF lists which PCDs get accessed @box[bg-black text-white my-box-pad2 ](  PlatformInitPei/PlatformEarlyInit.inf   [Pcd]   gEfiIchTokenSpaceGuid.@color[red](PcdPeiIchEhciControllerMemoryBaseAddress)   ) @snapend @snap[north-east span-90 fragment] Value to use in Project @color[yellow](`NewProjectPkg.dsc`) @box[bg-black text-white my-box-pad2 ](  [PcdsFixedAtBuild]   gEifIchTokenSpaceGuid.@color[red](PcdPeiIchEhciControllerMemoryBaseAddress)|0xFC000000   ) @snapend @snap[north-east span-90 fragment] PEI - Referenced in the PEI code @box[bg-black text-white my-box-pad2 ](  /PlatformInitPei/PchInitPeim.c      InstallPeiPchUsbPolicy()      PeiPchUsbPolicyPpi->EhciMemBaseAddr =         PcdGet32(@color[red](PcdPeiIchEhciControllerMemoryBaseAddress));     ) @snapend Note: Lets take a look at a PEI PCD example Here we see that we are using the PEI Memory Base Address for PeiIchEhciControllerMemoryBaseAddress It IS Defined in ICH X Package DEC - [PcdsFixedAtBuild] - gEfiIchTokenSpaceGuid.PcdPeiIchEhciControllerMemoryBaseAddress|0|UINT32|0x39 The Module INF lists which PCDs get accessed in the PlatformInitPei/PlatformEarlyInit.inf - [Pcd] - gEfiIchTokenSpaceGuid.PcdPeiIchEhciControllerMemoryBaseAddress The Value to use is in the Project New Package DSC [PcdsFixedAtBuild] gEfiIchTokenSpaceGuid.PcdPeiIchEhciControllerMemoryBaseAddress|0xFC000000 The example in the code: PEI - Referenced in the PEI code - /PlatformInitPei/PchInitPeim.c in function InstallPeiPchUsbPolicy() - PeiPchUsbPolicyPpi->EhciMemBaseAddr = - PcdGet32(PcdPeiIchEhciControllerMemoryBaseAddress); ---?image=/assets/images/slides/Slide91.JPG @title[Critical PEIMs] Critical PEIMs Note: - So what are the Critical PEIMs? - These are the minimum set of PEI components that must be dispatched during the PEI. - The list here is those PEIMs that encapsulate those. The order shown here is not the dispatch order. The DXE IPL PEIM is dispatched last - The CPU PEIM installs the CPU_IO PPI that provides CPU IO functions - The DXE IPL PEIM hands off control from the PEI Core to DXE - The PCI PEIM provides basic PCI functions to PEI - The Stall PEIM provides a sleep or wait function - The Status Code PEIM is for debug messages (Port80) and serial port if in debug mode - The SMBUS PEIM initializes and provides SMBUS access - The Memory Control PEIMs read the SPD and initialize/configure memory - Additional platform PEIMs for flash map layout, boot policy determination, fan control and misc chipset initialization - Platform Configurations Database PCD - Porting Key with respect to the Copied Project/platform - The ones in green will typically not require changes if your platform is PCAT based. - The ones in orange will need attention if your platform is different that the reference platforms. ---?image=/assets/images/slides/Slide41_X.JPG @title[Initial Program Load (IPL) PEIM for DXE] Initial Program Load (IPL) PEIM for DXE <div class="left">   </div> <div class="right"> @ul[no-bullet] -   Creates HOBs -   Locates DXE main -   Switch Stacks -   → DxeMain() @ulend </div> Note: - The DXE IPL PEIM should not require porting, but knowing what is does it important. This is a good place for a breakpoint and starting to debug. For example, if porting didn’t work this is where it will fail. - The DXE IPL PEIM performs several tasks - Shadows DXE IPL into permanent memory to allow sharing of the decompression algorithm and several other library routines (e.g. security) - Allocates 128KB of stack for the DXE phase - Creates HOBs for passing library routines and the firmware volumes discovered during the PEI phase. Most commonly this is the main FV and any other FVs that DXE will use to load drivers from (for example backup block) - If S3, then the OS waking vector is called - Locate DXE Main in the FVs - If not S3 then switch stacks and call DXE Main - The last PEIM to execute - Shadows into permanent memory - Shares data from PEI phase with DXE - Creates a stack for DXE Phase - Creates HOBs - Calls S3 vector if appropriate - Locate DXE Main - Switch stack and call DXE Main ---?image=/assets/images/slides/Slide42_1.JPG @title[DXE Phase] DXE Phase <div class="left-1">   </div> <div class="right-1"> <ul style="list-style-type:none"> <li> Main platform DXE code in subdirectories of the platform package containing “DXE” in the name </li> <li>Establish Architectural Protocols </li> <li>Install any required DXE / UEFI Drivers </li> </ul> </div> Note: - The main platform DXE code is in subdirectories of the platform package having “DXE” in the directory name (i.e. PciPlatformDxe) - It will reference other packages DXE modules - Establish the architectural protocols - Isolate platform specific hardware (e.g., RTC) - Provide support for boot and runtime services - Low level protocols that support DXE APIs - Directly called by DXE core - Install any required DXE and then the UEFI Drivers ---?image=/assets/images/slides/Slide99.JPG @title[DXE Architectural Protocols ] DXE Architectural Protocols (AP) Note: - Isolate platform specific hardware (e.g., RTC) - Provide support for boot and runtime services - Low level protocols that support DXE APIs ---?image=/assets/images/slides/Slide101.JPG @title[How to Search for AP Modules top] How to Search for AP Modules ---?image=/assets/images/slides/Slide103.JPG  @title[How to Search for AP Modules 01 ] How to Search for AP Modules in the Project Note: - Search the Work Space .INF files for the Architectural Protocols - key word “Produces” - gEfiCpuArchProtocolGuid <pre> UefiCpuPkg/CpuDxe/ ##PRODUCES Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/CpuInit/Dxe/ IA32FamilyCpuPkg/CpuArchDxe ##PRODUCES </pre> - Find which module Install the protocol (.i.e Search .c ) - gEfiCpuArchProtocolGuid - Check the NewProjectPkg .DSC to see which .INF is included in the [Components] section - Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/CpuInit/Dxe/MpCpu.inf +++?image=/assets/images/slides/Slide104.JPG   @title[How to Search for AP Modules 02 ] How to Search for AP Modules in the Project Note: - Search the Work Space .INF files for the Architectural Protocols - key word “Produces” - gEfiCpuArchProtocolGuid <pre> UefiCpuPkg/CpuDxe/ ##PRODUCES Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/CpuInit/Dxe/ IA32FamilyCpuPkg/CpuArchDxe ##PRODUCES </pre> - Find which module Install the protocol (.i.e Search .c ) - gEfiCpuArchProtocolGuid - Check the NewProjectPkg .DSC to see which .INF is included in the [Components] section - Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/CpuInit/Dxe/MpCpu.inf +++?image=/assets/images/slides/Slide105.JPG   @title[How to Search for AP Modules 03 ] How to Search for AP Modules in the Project Note: - Search the Work Space .INF files for the Architectural Protocols - key word “Produces” - gEfiCpuArchProtocolGuid <pre> UefiCpuPkg/CpuDxe/ ##PRODUCES Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/CpuInit/Dxe/ IA32FamilyCpuPkg/CpuArchDxe ##PRODUCES </pre> - Find which module Install the protocol (.i.e Search .c ) - gEfiCpuArchProtocolGuid - Check the NewProjectPkg .DSC to see which .INF is included in the [Components] section - Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/CpuInit/Dxe/MpCpu.inf +++?image=/assets/images/slides/Slide106.JPG   @title[How to Search for AP Modules 04 ] How to Search for AP Modules in the Project Note: - Search the Work Space .INF files for the Architectural Protocols - key word “Produces” - gEfiCpuArchProtocolGuid <pre> UefiCpuPkg/CpuDxe/ ##PRODUCES Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/CpuInit/Dxe/ IA32FamilyCpuPkg/CpuArchDxe ##PRODUCES </pre> - Find which module Install the protocol (.i.e Search .c ) - gEfiCpuArchProtocolGuid - Check the NewProjectPkg .DSC to see which .INF is included in the [Components] section - Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/CpuInit/Dxe/MpCpu.inf ---?image=/assets/images/slides/Slide78_1.JPG @title[Location of APs for MAX] Location of Architectural Protocols for MAX Note: - gEfiBdsArchProtocolGuid MdeModulePkg/Universal/BdsDxe/ - gEfiCapsuleArchProtocolGuid MdeModulePkg/Universal/CapsuleRuntimeDxe - gEfiCpuArchProtocolGuid Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/CpuInit/Dxe/MpCpu - gEfiMetronomeArchProtocolGuid Vlv2TbltDevicePkg/Metronome - gEfiMonotonicCounterArchProtocolGuid MdeModulePkg/Universal/MonotonicCounterRuntimeDxe - gEfiRealTimeClockArchProtocolGuid PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe - gEfiResetArchProtocolGuid Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Reset/RuntimeDxe/ - gEfiRuntimeArchProtocolGuid MdeModulePkg/Core/RuntimeDxe - gEfiSecurityArchProtocolGuid MdeModulePkg/Universal/SecurityStubDxe - gEfiStatusCodeRuntimeProtocolGuid MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe - gEfiTimerArchProtocolGuid Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/ SmartTimer/Dxe - gEfiVariableArchProtocolGuid MdeModulePkg/Universal/Variable - gEfiVariableWriteArchProtocolGuid MdeModulePkg/Universal/Variable/RuntimeDxe - gEfiWatchdogTimerArchProtocolGuid MdeModulePkg/Universal/WatchdogTimerDxe ---  @title[Platform-Dependent DXE Drivers ] Platform-Dependent DXE Drivers @snap[north-west span-100 fragment] @color[cyan](Host Bridge Driver) @box[bg-lt-blue-pp text-white rounded my-box-pad2 ](     NewProjectPkg/PciPlatformDxe/PciPlatform.c      <@color[yellow](Memory Controller North)>Pkg/PciHostBridgeDxe/  ) @snapend @snap[north-west span-100 fragment]   @color[#87E2A9](PCH Initialize Driver) @box[bg-green2 text-white rounded my-box-pad2 ](     NewProjectPkg/LegacyBiosDxe/Platform.c      <@color[yellow](I/O Controller South)>Pkg/PchInitDxe/  ) @snapend @snap[north-west span-100 fragment]   @color[#00b0f0](SATA Controller Driver) @box[bg-royal text-white rounded my-box-pad2 ](    <@color[yellow](I/O Controller South)>Pkg/SataConrollerDxe/PchSataController  ) @snapend @snap[north-west span-100 fragment]     @color[gray](Super I/O Driver) @box[bg-grey-50 text-white rounded my-box-pad2 ](     <@color[yellow](XSioXVer)>Pkg/XSioXVerDxe/  ) @snapend @snap[south-east span-60 fragment]     @box[bg-grey-05 text-white my-box-pad2 ](  MinnowBoard Max Silicon   <Memory Cntrl North>     Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster   <I/O Cntrl South >     Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster     ) @snapend Note: - MinnowBoard Max - <Memory Cntrl> Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster - <PchX South> Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster --- @title[MinnowBoard Max SoC Specific Modules ] MinnowBoard Max SoC Specific Modules @snap[north span-30 ]    @box[bg-black text-white rounded my-box-pad2 ](@color[yellow](CPU)     ) @snapend @snap[north-east span-30 ]    @box[bg-black text-white rounded my-box-pad2 ](@color[yellow](North Cluster)     ) @snapend @snap[north-east span-70 ]     @box[bg-black text-white rounded my-box-pad2 ](@color[yellow](South Cluster)     ) @snapend @snap[north-west span-35 ]    `Vlv2DeviceRefCodePkg`/     `ValleyView2Soc`/         CPU /         `NorthCluster` /         `SouthCluster` / @snapend @snap[south-west span-35 ] @color[yellow](Other SOC )  -   Broxton Silicon     Reference package  `BroxtonSoc/BroxtonSiPkg`/ @snapend @snap[north span-30 ]             CpuInit        CpuS3        Dts        EcpOnly        PowerManagement      SmmAccess        SmmControl @snapend @snap[north-east span-30 ]           ISPDxe      MemoryInit      PciHostBridge      SmBiosMemory      VlvInit @snapend @snap[north-east span-65 ]        PchInit      Smbus      Spi      SmmControl      Usb      S3Support      SmartTimer      LegacyInterrupt      ActiveBios      @snapend @snap[north-east span-35 ]        Reset    PchSmiDispatcher    Pcie      Pnp      SDControllerDxe    SDMediaDeviceDxe    SataControler    SysFwUpdateCapsule    I2cStack @snapend Note: - Vlv2DeviceRefCodePkg/ - ValleyView2Soc/ - CPU - NorthCluster - SouthCluster - Other SOC - Broxton Silicon Ref package - BroxtonSoc/BroxtonSiPkg/ ---?image=/assets/images/slides/Slide28_1.JPG @title[DXE Base Address, PCD Example ]  DXE Base Address, PCD Example @snap[north-east span-90 fragment] Defined in Package `MdePkg` DEC @box[bg-black text-white my-box-pad2 ](  [PcdsFixedAtBuildPcds, PatchableInModule, PcdsDynamic, PcdsDynamicEx]   gEfiMdePkgTokenSpaceGuid.@color[red](PcdPciExpressBaseAddress)|0|UINT64|0x0000000a  ) @snapend @snap[north-east span-90 fragment] Module INF lists which PCDs get accessed @box[bg-black text-white my-box-pad2 ](  <Pchx>Pkg/Library/DxeRuntimePciLibPciExpress.inf   [Pcd]   gEfiMdeTokenSpaceGuid.@color[red](PcdPciExpressBaseAddress)   ) @snapend @snap[north-east span-90 fragment] Value to use in Project @color[yellow](`NewProjectPkg.dsc`) @box[bg-black text-white my-box-pad2 ](  [PcdsPatchableInModule]   gEifMdeTokenSpaceGuid.@color[red](PcdPciExpressBaseAddres)|0xE0000000   ) @snapend @snap[north-east span-90 fragment] DXE - Referenced in the DXE code in @box[bg-black text-white my-box-pad2 ](  <PchX>Pkg/Library/DxeRuntimePciLibPciExpress.c           mPciExpressBaseAddress = (UINTN) PatchPcdGet64         (@color[red](PcdPciExpressBaseAddress));     ) @snapend Note: - Example of a PCD during DXE - Defined in ICH X Package DEC - [PcdsDynamic.common] - gEfiIchTokenSpaceGuid.PcdIchSataPataConfigs|0|UINT8|0x40000016 - The Module INF lists which PCDs get accessed - [Pcd] - gEfiIchTokenSpaceGuid.PcdIchSataPataConfigs - The Value to use in New Project Package DSC - [PcdsDynamicDefault.common.DEFAULT] - gEfiIchTokenSpaceGuid.PcdIchSataPataConfigs|0 - Here is an example used in the CODE - DXE - Referenced in the DXE code in NewProjectPkg/ SetupDxe/Platform.c - IchSataPataConfigs.Uint8 = PcdGet8(PcdIchSataPataConfigs); - PcdSet8(PcdIchSataPataConfigs, IchSataPataConfigs.Uint8); ---?image=/assets/images/slides/Slide53_1.JPG @title[BDS Phase:] BDS Phase: <div class="left-2">   </div> <div class="right-2"> <ul style="list-style-type:none"> <li>Detect console devices (input and output) </li> <li>Check enumeration of all devices preset </li> <li>Detect boot policy </li> <li>Ensure BIOS “front page” is loaded </li> </ul> </div> Note: - Detect console devices (input and output) - Check enumeration of all devices preset - another Note; BIOS must have device drivers to enumerate - Detection of boot policy - Loading of BIOS “front page” - Splash screen logo, messages to user, etc. ---?image=/assets/images/slides/Slide128.JPG @title[BDS Phase - stack] BDS Phase Note: - Here is a picture of the protocol stack for the serial terminal console services. This details the protocols that are necessary for getting output on the serial terminal. - UEFI and the framework do not directly hard code input/output or console devices to another driver or program. They instead rely upon console devices to produce a Simple Text Input and Simple Text Output protocol. They consume from those protocols. Thus you can write your application free of worry where input and output will be going. - To allow many devices to produce input and output, there is a virtual console or console splitter that gathers input from different devices and sends output to different devices. Thus the BDS or UEFI Shell is not directly connected to VGA or serial port. It sends output to the virtual console which in turns send that output to any device that is connected to it that has published the Simple Text Output Protocol. - In the porting aspect, once ISA I/O protocol driver is ported and the underlying protocols it depends on, the Serial I/O driver can be ported and then the BDS and/or UEFI shell can be used as-is to continue with your porting and debugging effort. ---?image=/assets/images/slides/Slide130.JPG @title[Serial Terminal Console Drivers] Serial Terminal Console Drivers Note: - Here is a table of the drivers used. The drivers in green do not require any changes for your platform. You may have changes in your ISA serial if the UARTs are different than the normal PCAT UARTs - The Console splitter may require changes if your default serial port is not the same as the default one – baud rate, COM port, etc. - The orange ones (or chipset specific) are the base protocols that need platform porting if yours is different than our reference implementation ---? @title[Porting Serial Terminal Console] Porting Serial Terminal Console @snap[north-west span-90 ] @box[bg-black text-yellow rounded my-box-pad2 ](  @color[white](NewProjectPkg/)       PlatformDxe/        PlatformSetupDxe /        @color[red](. . .)        Library/          PlatformBdsLib/     ) @snapend @snap[north-west span-90 ] @box[bg-black text-white rounded my-box-pad2 ](  @color[white](MdeModulePkg/)      Universal/        Console/            ConPlatformDxe/            ConSplitterDxe/            GraphicsConsoleDxe/            TerminalDxe/     ) @snapend @snap[north-east span-30 fragment ] ![Platform](/assets/images/platform.png) ![OpenSource](/assets/images/OpenSource.png) @snapend Note: - Example platform - specific location - EDK II Open - Source location ---?image=assets/images/binary-strings-black2.jpg  @title[Porting Task List Section 05] Porting Task List @snap[north-east span-90 ] @box[bg-grey-15 text-white rounded my-box-pad2 ](  ) @snapend @snap[north-east span-15] ![Porting_task_list.gif](/assets/images/tenor.gif) @snapend  @snap[north-west span-10 ] @color[yellow](❶ ❷ ❸ ❹) @color[red](❺) @color[#808080](❻) @snapend @snap[north-east span-90 ]  @color[gray](Create a New Project package directory)  @color[gray](Create Build Files (DSC, DEC, and FDF))  @color[gray](Update target.txt to make your Project the default)  @color[gray](Use UEFI PI phases to Port all project modules)  @color[yellow](Update DSC w/ new libraries, modules, and PCDs values)  @color[gray](Minimums for UEFI Shell) @snapend @snap[south span-100 fragment] @box[bg-purple-pp text-white rounded my-box-pad2 ](Update build text files with libraries, ported modules, and PCD values to configure modules  ) @snapend Note: 1. Create a New Project package directory 2. Create Build Files (DSC, DEC, and FDF) 3. Update conf/target.txt to make your Project the default build (optional) 4. Port all required modules for your project through all UEFI Platform initialization phases 5. Update build text (DSC, DEC, FDF) files with libraries, ported modules, and PCD values to configure modules 6. Minimums for UEFI Shell ### Section 5 of the Porting Task List - Update build text files with libraries, ported modules, and PCD values to configure modules --- @title[Build Text Files for the Platform] Build Text Files for the Platform @snap[north span-50] @box[bg-black text-white rounded my-box-pad2 ](  MyWorkSpace/      NewProjectPkg/        Include/        Library/           PlatformDrivers/           NewProjectPkg.DSC        NewProjectPkg.FDF        NewProjectPkg.DEC     ) @snapend @snap[west span-40 fragment] @color[yellow](Flash Map Layout  →       ) @snapend @snap[east span-40 fragment] @color[yellow](         ←  PCD Values - Library)                                      @color[yellow](classes) @snapend @snap[south-east span-40 fragment] @color[yellow](         ←  Defines for a platform) @snapend @snap[south-west span-60 ] Check the <a href="https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Specifications">EDK II Specifications</a> @snapend Note: - Specs: - https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Specifications - PCD Values - Library classes - NewProjectPkg.DSC - Flash Map layout - NewProjectPkg.FDF - Defines for a platform - NewProjectPkg.DEC ---?image=/assets/images/slides/Slide139.JPG @title[Update the New Project DEC File] Update the New Project DEC File Example DEC file for NewProjectPkg - Next slide Note: - Update the PCD used by the New Project Package - Update for the Libraries and Protocols used by the New Project Package - See EDK II DEC File Specification for more details and examples +++?code=sample/NewProjectPORT/NewProjectPkg.dec&lang=shell&title=Example: DEC file Note: This is an example of the NewProjectPkg.dec file Look at the GUID, Protocol and PCD declarations ---?image=/assets/images/slides/Slide141.JPG @title[Update the New Project DSC File] Update the New Project DSC File Example DSC file for NewProjectPkg - Next slide Note: - Update to define all libraries, components and/or modules that will be used by the New Project package - Update the PCD Values for the New Project - Update any library classes - See EDK II DSC File Specification for more details and examples +++?code=sample/NewProjectPORT/NewProjectPkg.dsc&lang=shell&title=Example: DSC file Note: This is an example of the NewProjectPkg.dsc file ---?image=/assets/images/slides/Slide143.JPG  @title[Update the New Project FDF File] Update the New Project FDF File Example FDF file for NewProjectPkg - Next slides Note: - Rules for combining binaries (Firmware Image) built from a DSC file - PCDs set in the FDF file for Addresses, Sizes, and other "fixed" information needed to define or create the flash image - See EDK II FDF File Specification for more details and examples - Used to define what components or modules are placed within a flash device (FD) file - Defines order the components and modules are positioned within the image - Consists of define statements, set statements and module statements (INF files to be used) +++?image=/assets/images/slides/Slide145.JPG   @title[Update the New Project FDF File Layout] Update the New Project FDF File - Layout Note: Flash Device Configuration Common Layout File (.fdf) +++?code=sample/NewProjectPORT/NewProjectPkg.fdf&lang=shell&title=Example: FDF file Note: This is an example of the NewProjectPkg.fdf file +++ @title[FDF File Example] FDF File Example ```C [Fv.Root] FvAlignment = 64 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE . . . INF VERSION = "1" $(WS)/EdkNt32Pkg/ Dxe/WinNtThunk/Cpu/Cpu.inf FILE DXE_CORE = B5596C75-37A2-4. . .{ SECTION COMPRESS { . . .} DEFINE DC = $(WS)/Build/NewProjectPkg /DEBUG_MYTOOLS SECTION PE32 = $(DC)/B5596C75-3 . . . -DxeCore.efi SECTION VERSION "1.2.3" } } FILE FV_IMAGE = EF41A0E1-40B1-481 . . .{ FvAlignment = 512K WRITE_POLICY_RELIABLE = TRUE SECTION GUIDED 3EA022A4-1439-4 . . . { SECTION FV_IMAGE = Dxe { APRIORI DXE { INF NewProject/a/a.inf INF MdePkg/x/y/z.inf INF NewProject/a/b/b.inf } INF a/d/d.inf . . . } } DEFINE SAMPLE = MdeModulePkg/Sample INF $(SAMPLE)/Universal/Network/ Ip4Dxe/Ip4Dxe.inf INF $(SAMPLE)/Universal/Network/ Ip4ConfigDxe/Ip4ConfigDxe.inf INF $(SAMPLE)/Universal/Network/ Udp4Dxe/Udp4Dxe.inf INF $(SAMPLE)/Universal/Network/ Tcp4Dxe/Tcp4Dxe.inf INF $(SAMPLE)/Universal/Network/ Dhcp4Dxe/Dhcp4Dxe.inf INF $(SAMPLE)/Universal/Network/ Mtftp4Dxe/Mtftp4Dxe.inf INF $(SAMPLE)/Universal/Network/ SnpNt32Dxe/SnpNt32Dxe.inf

---?image=assets/images/binary-strings-black2.jpg @title[Porting Task List Section 06]

Porting Task List

@snap[north-east span-90 ]

@box[bg-grey-15 text-white rounded my-box-pad2 ](

) @snapend

@snap[north-east span-15] @snapend

@snap[north-west span-10 ]

@color[yellow](❶

❷

❸

❹

❺)

@color[red](❻)
@snapend
@snap[north-east span-90 ]

@color[gray](Create a New Project package directory)

@color[gray](Create Build Files (DSC, DEC, and FDF))

@color[gray](Update target.txt to make your Project the default)

@color[gray](Use UEFI PI phases to Port all project modules)

@color[gray](Update DSC w/ new libraries, modules, and PCDs values)

@color[yellow](Minimums for UEFI Shell)
@snapend
@snap[south span-100 fragment] @box[bg-purple-pp text-white rounded my-box-pad2 ](
Double check the Protocol, Driver dependencies and libraries
to boot to the UEFI Shell

) @snapend

Note:

Create a New Project package directory

Create Build Files (DSC, DEC, and FDF)

Update conf/target.txt to make your Project the default build (optional)

Port all required modules for your project through all UEFI Platform initialization phases

Update build text (DSC, DEC, FDF) files with libraries, ported modules, and PCD values to configure modules

Minimums for UEFI Shell

Section 6 of the Porting Task List

Minimums for UEFI Shell

---?image=/assets/images/slides/Slide150.JPG @title[Minimum Drivers for UEFI Shell]

Minimum Drivers for UEFI Shell

Note: Here we have a summary of the drivers that will most likely need changing for your port to a new platform to bring up the EFI shell. As you can see the list is not that long. If your platform is similar to one of our reference platforms (same chipset typically) then your porting effort will mostly be in the area of MRC, Super I/O and PCI infrastructure (servers may have multiple root bus bridges)

The goodness about this is that you can bring the shell up and then via serial port interact with the shell to load and test new drivers as well as your port to this point.

MinnowBoard Max

Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster

<I/O Cntrl South> Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster

---?image=/assets/images/slides/Slide152.JPG @title[Minimum Libraries for UEFI Shell]

Minimum Libraries for UEFI Shell

Note: Just be aware of Shell libraries that would be interfacing with the platform for porting

MinnowBoard Max

<I/O Cntrl South> Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster

---? @title[Porting Summary: New Package Directory]

Porting Summary: New Package Directory

@snap[north-west span-50]

@box[bg-black text-white rounded my-box-pad2 ](
 MyWorkSpace/
 NewProjectPkg/
 Include/
 Library/

 PlatformDrivers/


 NewProjectPkg.DSC

 NewProjectPkg.FDF

 NewProjectPkg.DEC

)
@snapend
@snap[north-east span-40]

Ported Package

@snapend
@snap[north-east span-50 fragment]

 @size[1.52em](@fa[star gp-bullet-ltgreen]) All ported libraries

@snapend
@snap[north-east span-50 fragment]



 @size[1.52em](@fa[star gp-bullet-gold]) All ported Drivers

@snapend
@snap[north-east span-50 fragment]





 @size[1.52em](@fa[star gp-bullet-magenta]) Values – Library classes

@snapend
@snap[north-east span-50 fragment]







 @size[1.52em](@fa[star gp-bullet-cyan]) Flash Map layout

@snapend
@snap[north-east span-50 fragment]









 @size[1.52em](@fa[star gp-bullet-blue]) Defines per platform

@snapend
Note:

@title[Summary]

Summary

@fa[certificate gp-bullet-green] Define the porting task list for porting existing
 platforms in EDK II in order to boot to the UEFI Shell

@fa[certificate gp-bullet-cyan] Explain the EDK II infrastructure, porting libraries,
 library classes, PCDs, and directory structures

@fa[certificate gp-bullet-yellow] Determine the necessary porting for each phase
 of a new EDK II platform Project

---?image=assets/images/gitpitch-audience.jpg @title[Questions]

---?image=assets/images/gitpitch-audience.jpg @title[Logo Slide]

![Logo Slide](/assets/images/TianocoreLogo.png =10x)

@title[Acknowledgements]

Acknowledgements

/** Redistribution and use in source (original document form) and 'compiled' forms (converted to PDF, epub, HTML and other formats) with or without modification, are permitted provided that the following conditions are met: Redistributions of source code (original document form) must retain the above copyright notice, this list of conditions and the following disclaimer as the first lines of this file unmodified. Redistributions in compiled form (transformed to other DTDs, converted to PDF, epub, HTML and other formats) must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. THIS DOCUMENTATION IS PROVIDED BY TIANOCORE PROJECT "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TIANOCORE PROJECT BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. Copyright (c) 2018, Intel Corporation. All rights reserved. **/

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PITCHME.md

PITCHME.md

UEFI & EDK II Training

Porting an Existing Project

<p align="center"Lesson Objective

EDK II Infrastructure

Section 6 of the Porting Task List

Summary

Acknowledgements

Files

PITCHME.md

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PITCHME.md

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UEFI & EDK II Training

Porting an Existing Project

<p align="center"Lesson Objective

EDK II Infrastructure

Section 6 of the Porting Task List

Summary

Acknowledgements