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TTL RGB OUTPUT Normallly High during VSYNC #3
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Have you tried the following sequence?
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Hi @KerJoe |
Hi @KerJoe So, I switched to your code and I am now able to compile and flash through Windows. As your code is not structured like the previous I was working on, could you please precise where to put the sequence in your code please? My goal is to put at the start of the power of the screen with a background screen in order to sniff signals with the USB analyser without need to input signal to the board (VGA, HDMI etc..).
thanks |
You can try inserting those 3 lines after |
Hi @KerJoe, Unfortunately, I compared before the new settings and after the new settings : these settings have no effect. In details : |
By the way, why do you need the data bus to be high during the VSYNC period? |
Hi @KerJoe Could we go further together with tests on your side for the RGB output matter ? Do the settings have effect on your side? This is weird that they change nothing on my signal. what I need to generate ("VSYNC PERIOD" on the picture may include the PORCHS) : |
Ok, I'll see what I can do on my board. |
For the high speed logic gates I thought about it but I conclude that will not work during the 2 PORCH periods. Without a firmware solution, my project is dead :( In still continue to search on my side but I explorered all ideas without success. And again, fornme the weird thing is that I do not understand why your proposal settings have no effect. It is like they are inhibited. Are you able to exchange with the RTD through a serial terminal for debugging ? I would like use some PRINTF functions to monitor values but don't know how. |
Ok, I've managed to recreate the output. The starting and ending hsync pulses in data bits are slightly cut short, but hopefully that won't be a problem.
Here's the code:
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As for my debugging setup I compile for PC using |
Hi @KerJoe. I am reading you during a job travel. I am impatient to go back home and be able to test your code this weekend. For the debug, I understand that you work under linux, do you? If not, how do you use core/i2c_native_iface.c? Through Windows WSL? Thanks a lot. Please share to me your paypal account, I woukd be pleased to offer you a beer/softdrink/whatever_you_drink. |
Hi @KerJoe, |
Sorry, I forgot about the clock output. The pin 96 should be assigned to the display clock signal just like the vsync pin.
I've also created a separate branch for this issue here. |
As for debugging, the |
The RTD2662 also supports switching to UART instead of the first i2c channel, which means you can't program through it or use it for EDID, after the switch. The code for it is in |
Hi @KerJoe Any new Idea? |
No, what you are meassuring is just noise from the data pins. I've missed enabling the clock output in the register SP_VDISP_TIMING. Here is the fix. |
Hi @KerJoe The code is looping with the |
Hi @KerJoe My goal is to input any HDMI resolution (1080p, 720p, etc..) and let the scaler scale the good resolution according to the panel settings. Is it possible? |
By the time the execution reaches this line, it should have already setup the HDMI input, measured it and set the appropriate scale up/down factors. |
Can you send me the video of what the "screen flickering" looks like, and also a photo of the screen with HDMI connected. |
Hi @KerJoe For the rest of the code, I also kept yours, I just adapted only few lines to fit my screen. Exemple: from So here are my tests through 2 videos Without HDMI connected > the screen flickers (OSD included) BUT is stable when the HDMI cable is connected to PC I still not well equiped for the debugging so I used the OSD_menu+delay in order to display the different step of the code. |
Can you please attach the video in the comment and not the google drive. |
EDIT : videos are too big. I shared to all in my GDrive
In the meantime, I just shared the links "to all" in my GDrive I try to display the values of
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1.webm2.webm |
It's getting late here, I'll try things on my board tomorrow, meanwhile... |
is it possible to modify/read/write scaler registers to the RTD while this one is running connected to the LCD_screen. Like if i want to tweak some parameters and notice immediatly in live the results on the LCD_screen? |
Well, yeah... It's a console app there is no GUI.
Yes. As I said you can use the |
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seems to be an issue between Windows and MSYS and/or MINGW installation about "Mldebuggerpath" . I am making some google searchs |
Try running |
That happens when there is no signal. |
Well.. pause it. |
Ok, then put the breakpoint on |
breakpoint on
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Oops, sorry I renamed |
OK so here is the result of both commands
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when I change values like
image udate immediatly on LCD_SCREEN |
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Great!!
and changing the last two parameters of SetCaptureWindow is making the image better. Perfect for the moment |
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The other firmware also changes the |
I finally found the parameters fitting the LCD_screen (one standard to understand what i am doing) playing with panel_config.h values + EDID in standard 1920x1080x60. |
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You can also try changing
What do you mean by that? |
At the beginning of our echange is for a project on an exotic, proprietary signal LSCD_SCREEN. |
It seems not to really work exactly like that. sometimes the behaviour is like you say, sometimes not, depending of the values.
Yes for hact, vact and VSync (in green) but not for HSync (in red). Very strange! I changed the
It the next test I will do |
AFAIK - no, but you can change it with The reason why horizontal values are different is because they are measured in master clock (27 MHz) ticks, meanwhile vertical ones are measured in lines. |
Hi @KerJoe . How are you? My next step it to check the HDCP compatibility. The Chromecast is 3 steps:
I checked all setting in your code like '_HDCP_SUPPORT' and '_TMDS_SUPPORT' to '_ON' but I only get the number 1 in sequence, then the rest is black screen. My conclusions are that the HDCP protocol not managed in you firmware. Do you confirm? |
Hi, Sorry for not writing for a while.
Just so you know, it's not the legal issues I am concerned about (the folder
No, there's no code dedicated to supporting HDCP in my firmware. And honestly I don't think there's any good in even trying to implement it, as the scaler only supports two ancient versions of HDCP: 1.1 and 1.0. This google help page mentions requiring at least HDCP 1.3 for chromecast to function: https://support.google.com/chromecast/answer/7022492. BTW, this IC's datasheet has HDCP registers matching the RTD2662 (while it does have the words 'HDCP' and '1.3' together on page 148, it's probably a mistake and they meant 'HDCP for HDMI 1.3'). |
Hi @KerJoe I worked a lot on another firmwares and now I am going back to your :).
I can't include properlly "alien" code in your code without compilation issues. example : for the interrupts wth
Any advice?
With other firmwares I successfully displayed my Chromast on my LCD_SCEEN (but picture not well fitting the screen), meaning that HDCP seems to work on my RTD2660 chip board. So related to my previous question (and the need to implement part of other firmwares in your), I think we could improve you code with HDCP support. What do yo think about? |
Hi @KerJoe
On RTD2660, and with TTL mode , I try to get all RGB output normally HIGH while now they are normally LOW.
I am turning around since weeks now without finding a solution.
Could someone help me to find the correct REGISTER setting from the RTD2660
It should be like an INVERSION setting like I did for the VSYNC and HSYNC signals but cant' find it for the RGB outputs.
See in the example here, RED signal is currently normally LOW from my RTD2660 (first picture)
I need to obtain HIGH output like that (signals RED and GREEN) captured for the source I need to reproduce (second picture).
I tried to tweak Address 29 bit0 but without success.
Any advise?
Thank you for your help
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