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main.a
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; ACME 0.96.4
;
; MAIN
; MAX Size: (16+12)*256 = 7168 bytes
; MAD EFFECT 2 - THE REVENGE OF THE SCROLLING
; FRENCH TOUCH - 10/2019
;
; v0.10 - Final version
;
;
!cpu 6502
!convtab "a2txt.bin" ;
!sl "lbl_main.txt"
; INCLUDE
*= $D000 ; ORG = $D000 (RAM Langage Card)
; =====================================
VERTBLANK = $C019
FLOAD = $FC00 ; routine Fast Load XTREME - MAIN
; =====================================
; PAGE ZERO => FIXED
bRefresh = $01 ; byte REFRESH RATE ($56/50Hz | $06/60Hz)
bSLOT = $02 ; numero SLOT * 0x10
IntL = $03 ; L value for INT delay
IntH = $04 ; H value for INT delay
; INTx
save_A = $05
save_X = $06
save_Y = $07
; FAST LOAD
PISDEP = $0A ; PISTE DE DEPART
SECDEP = $0B ; SECTEUR DE DEPART
BUFFER = $0C ; Buffer LOW+HIGH ; + $0D
TOTSEC = $0E ; TOTAL DES SECTEURS A CHARGER
CURTRK1 = $0F ; piste de d�part DRIVE 1 - A INITIALISER A ZERO pour le premier appel !
; Main -------
Dummy = $30
SCROLLP = $31
Row = $32
L0 = $33
L1 = $34
L2 = $35
L3 = $36
L4 = $37
L5 = $38
IndexL = $39
; decompLZ4
src1 = $40 ; +$41
src2 = $42 ; +$43
dest = $44 ; +$45
lenL = $46
lenH = $47
token = $48
; --------
Tmp1 = $40
Tmp2 = $41
; PLAYER YM/AY
; ------
nREG0 = $50
vREG0 = $51
dREG0 = $52 ; +$53
nREG1 = $54
vREG1 = $55
dREG1 = $56 ; +$57
nREG2 = $58
vREG2 = $59
dREG2 = $5A ; +$5B
nREG3 = $5C
vREG3 = $5D
dREG3 = $5E ; +$5F
nREG4 = $60
vREG4 = $61
dREG4 = $62 ; +$63
nREG6 = $64
vREG6 = $65
dREG6 = $66 ; +$67
nREG7 = $68
vREG7 = $69
dREG7 = $6A ; +$6B
nREG8 = $6C
vREG8 = $6D
dREG8 = $6E ; +$6F
nREG9 = $70
vREG9 = $71
dREG9 = $72 ; +$73
nREGA = $74
vREGA = $75
dREGA = $76 ; +$77
nREGB = $78
vREGB = $79
dREGB = $7A ; +$7B
nREGC = $7C
vREGC = $7D
dREGC = $7E ; +$7F
nREGD = $80
vREGD = $81
dREGD = $82 ; +$83
CounterL = $84
CounterH = $85
IndexTimeLine = $86
bTime = $87
tick1 = $88
tick2 = $89
; =============================================================================
MAIN
!zone
; Init Screen + some init
STA $C000 ; 80STOREOFF
STA $C008 ; zero Page = Main (+ $FXXX MAIN)
; Chargement MUSIC -> $4000(M) (COMP)
LDA #$05
STA PISDEP ; piste
LDA #$60 ; chargement
STA BUFFER+1
LDA #12
STA TOTSEC
JSR FLOAD ; chargement
; Chargement HIRES PART -> $1000(A) (COMP)
STA $C005 ; write AUX Memory
LDA #$06
STA PISDEP ; piste
LDA #$10 ; chargement
STA BUFFER+1
LDA #58
STA TOTSEC
JSR FLOAD ; chargement
; DECOMP MUSC -> $4000(M) - > $6000(A)
LDA #<($6000+16) ; shunte LZ4 header
STA src2
LDA #>($6000+16)
STA src2+1
LDA #<($6000)
STA dest
LDA #>($6000)
STA dest+1
JSR DECOMPLZ4
STA $C004 ; write MAIN Memory
; init TLINE (with SPACE data)
LDA #3
STA Row
LDA #00
STA L0
STA L1
STA L2
STA L3
STA L4
STA L5
; other inits
STA IndexL
STA SCROLLP
STA IndexTimeLine
STA bTime
; =============================================================================
Init_MB ; init Mockingboard
!zone
; PREMIER init MB (6522/AY1) / (6522/AY2)
LDA #$FF
STA $C403 ; DDRA1
STA $C483
LDA #$07
STA $C402 ; DDRB1
STA $C482
; clean REGISTER AY1 / AY2
LDA #$00
STA $C400
STA $C480
LDA #$04
STA $C400
STA $C480
; -------------------------------------
INIT_REGISTERS
!zone
LDA #<NBVBL
STA CounterL
LDA #((>NBVBL)+1)
STA CounterH
LDX #(13*4-1)
.b1 LDA TableREG,X
STA nREG0,X
DEX
BPL .b1
; -------------------------------------
Init_INT ; init interrupt
!zone
SEI ; inhib
; pour IIe
LDA #<INT_ROUT2
STA $FFFE
LDA #>INT_ROUT2
STA $FFFF
; préparation interruption - TIMER 1 6522
LDA #%01000000 ; Continuous Interrupt T1 / PB7 disabled (b76)
STA $C40B ; Auxiliary Control Register
LDA #%11000000 ;
STA $C40D ; interrupt flag register (Time Out of Timer 1 Int)
STA $C40E ; interrupt Enable register (Enable Timer 1)
; =================================================================================================
; PRECISE VBL detection - PAL/NTSC
!align 255,0
- LDA VERTBLANK
BMI - ; wait fin display courant
- LDA VERTBLANK
BPL - ; wait fin VBL courant
; Debut DISPLAY
LDA $EA ; 3
; 20279
- LDY #255
JSR WAIT65 ; 255*65 = 16575
LDY bRefresh ; 56 (PAL) / 06 (NTSC)
JSR WAIT65ZP ; 56*65 = 3640 (PAL)
; = 20215
LDY #00
JSR WAIT57 ; 57
LDA VERTBLANK ; 4 (lecture au 4ème cycle)
BMI - ; 3
; = 20215+57+4+3 = 20279
; ici synchro précise => DEBUT DISPLAY
; -----------------------------------------------------------------
; WARNING: DISPLAY detected (VERTBLANK <0) from cycle #52 of last line (#311) of VBL
; so BMI not taken (LDA VERTBLANK occurs at cycle #51 of line 311)
; 2 cycles already passed during DISPLAY (bmi not taken)
; line 311 / cycle 54
;
NOP : NOP : NOP : NOP : LDA $EA ; +11
; ; = 65
; line 0 (display) / cycle 0
; on doit attendre 191+70+50= 310 lignes pour revenir cycle 0 AVANT dernière ligne VBL (ou 260 si NTSC)
LDY #254
JSR WAIT65
LDY bRefresh ; 254+56=310 (PAL) / 254+06=260 (NTSC)
JSR WAIT65ZP
; =================================================================================================
; ici synchro précise => AVANT dernière ligne VBL cycle 0
; define DELAY for INT1
; PAL delay = 65*(192+70+50) = 20280
; -2 (6522 takes 2 cycles to generate INT)
; = 20278 = $4F36
LDX IntL ; 3
LDY IntH ; 3
STX $C404 ; T1C_1-Lower ; 4
STY $C405 ; T1C_1-High ; 4 (counter launched at the last cycle of STY)
; -> writing launch countdown ; = [14]
; -------------------------------------
; =============================================================================
STORYBOARD
!zone
; PART I * black screen [TEXT1] * beginning of Music * [INT_ROUT2] * TL = [0 - 320]
PART1
CLI ; music!
; patch LZ4 decomp
LDA #$02
STA PATCHDECOMP1+1 ; read MAIN
LDA #$03
STA PATCHDECOMP2+1 ; read AUX
wait1
LDA bTime
BNE +
JMP wait1
+
; PART II * Title [HIRES1] * Display title screen * [INT_ROUT2] * TL = [320 - 960]
PART2
BIT $C055
BIT $C050
DEC bTime ; remise à 0
INC IndexTimeLine ; next TL
; CLEAR PAGE1/2/GR
LDX #$04
LDA #$00
TAY
.mod1 STA $400,Y
.mod2 STA $800,Y
DEY
BNE .mod1
INC .mod1+2
INC .mod2+2
DEX
BNE .mod1
; DECOMP HIRES1
LDA #<($1000+16) ; shunte LZ4 header
STA src2
LDA #>($1000+16)
STA src2+1
LDA #<($2000)
STA dest
LDA #>($2000)
STA dest+1
STA $C003 ; read AUX
JSR DECOMPLZ4
STA $C002 ; back to "read MAIN"
wait2 LDA bTime
BNE +
JMP wait2
+
; PART III * SCROLL 1 - MIXED * [INT_ROUT1] * TL = [960 - END TEXT1]
PART3
LDA #<INT_ROUT1
STA $FFFE
LDA #>INT_ROUT1
STA $FFFF
DEC bTime ; remise à 0
INC IndexTimeLine ; next TL
wait3 LDA bTime
BNE +
JMP wait3
+
; PART IV * PREPARING PART V * [INT_ROUT2] * TL = [END TEXT1 - xxx]
PART4
LDA #<INT_ROUT2
STA $FFFE
LDA #>INT_ROUT2
STA $FFFF
DEC bTime
; DECOMP HIRES1
LDA #<($4600+16) ; shunte LZ4 header
STA src2
LDA #>($4600+16)
STA src2+1
LDA #<($2000)
STA dest
LDA #>($2000)
STA dest+1
STA $C003 ; read AUX
JSR DECOMPLZ4
; DECOMP HIRES2
LDA #<($4500+16) ; shunte LZ4 header
STA src2
LDA #>($4500+16)
STA src2+1
LDA #<($4000)
STA dest
LDA #>($4000)
STA dest+1
JSR DECOMPLZ4
STA $C002 ; back to "read MAIN"
wait4 LDA bTime
BNE +
JMP wait4
+
; PART V * SCROLL 2 - MIXED * [INT_ROUT1] * TL = [2400 - END TEXT2]
PART5
LDA #<INT_ROUT1
STA $FFFE
LDA #>INT_ROUT1
STA $FFFF
DEC bTime ; remise à 0
INC IndexTimeLine ; next TL
LDA #10
STA tick1
wait5 LDA bTime
BNE ++
LDA tick1
CMP #10
BEQ +
JMP wait5
+ LDX IndexL
LDA TableMODPL,X
STA dest
LDA TableMODPH,X
STA dest+1
LDY #0
LDA #$54
STA (dest),Y ; page1 restoration previous "line"
; next "line"
INX
CPX #06
BNE +
LDX #00
+ STX IndexL
LDA TableMODPL,X
STA dest
LDA TableMODPH,X
STA dest+1
LDA #$55
STA (dest),Y ; set page2 for the "line"
LDA #00
STA tick1
JMP wait5
++
; PART VI * PREPARING PART VII * [INT_ROUT2] * TL = [END TEXT2 - xxx]
PART6
LDA #<INT_ROUT2
STA $FFFE
LDA #>INT_ROUT2
STA $FFFF
DEC bTime ; remise à 0
; DECOMP HIRES1
LDA #<($2A00+16) ; shunte LZ4 header
STA src2
LDA #>($2A00+16)
STA src2+1
LDA #<($2000)
STA dest
LDA #>($2000)
STA dest+1
STA $C003 ; read AUX
JSR DECOMPLZ4
STA $C002 ; back to "read MAIN"
; copy hires 1->2
LDX #32
LDY #00
.mod3 LDA $2000,Y
.mod4 STA $4000,Y
DEY
BNE .mod3
INC .mod3+2
INC .mod4+2
DEX
BNE .mod3
LDA $C054 ; force Page1 (really needed?!)
LDX IndexL
LDA TableMODPL,X
STA dest
LDA TableMODPH,X
STA dest+1
;LDY #$00
LDA #$54
STA (dest),Y ; page1 restoration last previous "line"
LDX #$04
LDA #$DD
;LDY #00
.mod5 STA $800,Y
DEY
BNE .mod5
INC .mod5+2
DEX
BNE .mod5
wait6 LDA bTime
BNE +
JMP wait6
+
; PART VII * SCROLL 3 - MIXED * [INT_ROUT1] * TL = [3600 - END TEXT3]
PART7
LDA #<INT_ROUT1
STA $FFFE
LDA #>INT_ROUT1
STA $FFFF
DEC bTime ; remise à 0
LDA #00
STA tick1 ; init tick counter
wait7 LDA bTime
BNE ++
LDA tick2
CMP #2
BEQ .sflash
LDA tick1
CMP #20
BNE wait7
;
.flash LDA #01
STA MODPAGEG+1
LDA #00
STA tick1
STA tick2
JMP wait7
.sflash LDA #0
STA MODPAGEG+1
JMP wait7
++
; END PART * [INT_ROUT2] * [END TEXT3 - FOREVER]
ENDPART
LDA #<INT_ROUT2
STA $FFFE
LDA #>INT_ROUT2
STA $FFFF
END JMP END
; =============================================================================
INT_ROUT2 ; simple routine used while DECOMP/CHANGE GR/HIRES or MUSIC ONLY
!zone
STA save_A ; on sauve A
STX save_X ; on sauve X
STY save_Y ; on sauve Y
LDA $C013 ; RAM READ status
BPL +
LDA #03 ; read aux
BNE ++ ; always
+ LDA #02 ; read main
++ STA .mod1+1
JSR PLAYER_YM ; music! (one tick)
BIT $C404 ; Clears interrupt (T1_1CL) -> not needed, done earlier (twice!)
.mod1 STA $C002 ; restore READ type (AUX/MAIN) -> for LZ4DECOMP
LDY save_Y ; on récup Y
LDX save_X ; on récup X
LDA save_A ; on récup A
RTI ; sortie INT
; =============================================================================
!align 255,0
;!fill 8,0 ; obligatoire pour éviter les problemes de saut de pages (BNE+1cycle)!
!fill 11,0 ; A CHANGER AUSSI pour REAL A2 (missing 3 NOPS)
INT_ROUT1
!zone
; 2<->9 cycles (according to opcode when INT occured)
; + 7 cycles (6502 INT Sequence)
; = 9/16 cycles passed since INT occured!
; --------------------------------------------------------------------
; ====> BUGS APPLEWIN/AIPC missing 6 cycles
;NOP : NOP : NOP ; compensate missing cycles
; comment for REAL APPLE II
; -------------------------------------------
STA save_A ; on sauve A
STX save_X ; on sauve X
STY save_Y ; on sauve Y ; 9
SEC ; 2
LDA IntL ; 3
SBC $C404 ; get T1 lower value (counter never stop) ; 4
; -> read at cycle 18/24
; reset INT too
; SEC not needed - never (previous result is always >0)
SBC #26 ; = [32-7+1] => get final value from 0-7 ; 2
; value = IntL - T1 lower + 7 - 24
;SBC #25 ; "fixed" value for AIPC / APPLEWIN ; 2
LSR ; set carry ; 2
STA .mod+1 ; 4
; V = 0 always here
.mod BVC + ; 3
; = +29
; ----
+ NOP : NOP : NOP
BCC +
+ ; ---- ; min 2 / max 9 => +<9-16> => <+18>
MODPAGEG LDX #00 ; 2
; ici AVANT dernière ligne VBL -> cycles passed = [14] + 29 + <18> + 2 = 63
; on termine la 310/260 ligne (AVANT dernière ligne VBL -> last VBL)
NOP ; +2
; = 65
; =============================================================================
; synchronized CODE here - LAST VBL LINE - CYCLE #0
; [HBL-L = 0-11 / DISPLAY = 12-51 / HBL-R = 52-64]
; calcul décalage SCROLLP (minus[0/3] cycles -> 62/65
LDY #9
- DEY
BNE - ; 46
CLV ; 2
LDA SCROLLP ; [SCROLLP = 0-3] -> +5/+2 cycles ; 3
LSR ; 2
STA .mod2+1 ; 4
.mod2 BVC + ; 3
+ NOP
BCC + ; 2 / 5
+ ; = 62/65
; == 65 cycles ============
LDY #32 ; 2
BNE + ; 3
- INC Dummy ; (5)
+
MODPAGE0 LDA $C054,X ; 4
MODLINE0 LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056
; 44
INC Dummy ; 5
DEY ; 2
BEQ + ;
BNE - ; (5)
+ NOP ; +5
; ========================= ; = (5) + 4 + 44 + 5 + 2 + (5) = 65
LDY #32 ; 2
BNE + ; 3
- INC Dummy ; (5)
+
MODPAGE1 LDA $C054,X ; 4
MODLINE1 LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056
; 44
INC Dummy ; 5
DEY ; 2
BEQ + ;
BNE - ; (5)
+ NOP ; +5
; ========================= ; = (5) + 4 + 44 + 5 + 2 + (5) = 65
LDY #32 ; 2
BNE + ; 3
- INC Dummy ; (5)
+
MODPAGE2 LDA $C054,X ; 4
MODLINE2 LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056
; 44
INC Dummy ; 5
DEY ; 2
BEQ + ;
BNE - ; (5)
+ NOP ; +5
; ========================= ; = (5) + 4 + 44 + 5 + 2 + (5) = 65
LDY #32 ; 2
BNE + ; 3
- INC Dummy ; (5)
+
MODPAGE3 LDA $C054,X ; 4
MODLINE3 LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056
; 44
INC Dummy ; 5
DEY ; 2
BEQ + ;
BNE - ; (5)
+ NOP ; +5
; ========================= ; = (5) + 4 + 44 + 5 + 2 + (5) = 65
LDY #32 ; 2
BNE + ; 3
- INC Dummy ; (5)
+
MODPAGE4 LDA $C054,X ; 4
MODLINE4 LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056
; 44
INC Dummy ; 5
DEY ; 2
BEQ + ;
BNE - ; (5)
+ NOP ; +5
; ========================= ; = (5) + 4 + 44 + 5 + 2 + (5) = 65
LDY #32 ; 2
BNE + ; 3
- INC Dummy ; (5)
+
MODPAGE5 LDA $C054,X ; 4
MODLINE5 LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056 : LDA $C056
; 44
INC Dummy ; 5
DEY ; 2
BEQ + ;
BNE - ; (5)
+ NOP ; +5
; ========================= ; = (5) + 4 + 44 + 5 + 2 + (5) = 65
; ==== VBL =======================================================================
MOVEDATAFONT
INC SCROLLP
LDA SCROLLP
CMP #04
BEQ +
JMP NEXT
+ LDA #00
STA SCROLLP
LDA DATABIT0+1
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE0+1
;STA DATABIT0+0 (useless)
LDA DATABIT0+2
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE0+4
STA DATABIT0+1
LDA DATABIT0+3
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE0+7
STA DATABIT0+2
LDA DATABIT0+4
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE0+10
STA DATABIT0+3
LDA DATABIT0+5
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE0+13
STA DATABIT0+4
LDA DATABIT0+6
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE0+16
STA DATABIT0+5
LDA DATABIT0+7
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE0+19
STA DATABIT0+6
LDA DATABIT0+8
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE0+22
STA DATABIT0+7
LDA DATABIT0+9
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE0+25
STA DATABIT0+8
LDA DATABIT0+10
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE0+28
STA DATABIT0+9
LDA DATABIT1+1
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE1+1
;STA DATABIT1+0 (useless)
LDA DATABIT1+2
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE1+4
STA DATABIT1+1
LDA DATABIT1+3
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE1+7
STA DATABIT1+2
LDA DATABIT1+4
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE1+10
STA DATABIT1+3
LDA DATABIT1+5
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE1+13
STA DATABIT1+4
LDA DATABIT1+6
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE1+16
STA DATABIT1+5
LDA DATABIT1+7
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE1+19
STA DATABIT1+6
LDA DATABIT1+8
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE1+22
STA DATABIT1+7
LDA DATABIT1+9
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE1+25
STA DATABIT1+8
LDA DATABIT1+10
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE1+28
STA DATABIT1+9
LDA DATABIT2+1
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE2+1
;STA DATABIT2+0 (useless)
LDA DATABIT2+2
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE2+4
STA DATABIT2+1
LDA DATABIT2+3
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE2+7
STA DATABIT2+2
LDA DATABIT2+4
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE2+10
STA DATABIT2+3
LDA DATABIT2+5
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE2+13
STA DATABIT2+4
LDA DATABIT2+6
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE2+16
STA DATABIT2+5
LDA DATABIT2+7
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE2+19
STA DATABIT2+6
LDA DATABIT2+8
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE2+22
STA DATABIT2+7
LDA DATABIT2+9
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE2+25
STA DATABIT2+8
LDA DATABIT2+10
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE2+28
STA DATABIT2+9
LDA DATABIT3+1
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE3+1
;STA DATABIT3+0 (useless)
LDA DATABIT3+2
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE3+4
STA DATABIT3+1
LDA DATABIT3+3
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE3+7
STA DATABIT3+2
LDA DATABIT3+4
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE3+10
STA DATABIT3+3
LDA DATABIT3+5
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE3+13
STA DATABIT3+4
LDA DATABIT3+6
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE3+16
STA DATABIT3+5
LDA DATABIT3+7
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE3+19
STA DATABIT3+6
LDA DATABIT3+8
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE3+22
STA DATABIT3+7
LDA DATABIT3+9
BEQ +
LDX #$57
BNE ++
+ LDX #$56
++ STX MODLINE3+25
STA DATABIT3+8
LDA DATABIT3+10
BEQ +