From 79f1e9c67eb4de5ec9dc346b2426d2be7f863aff Mon Sep 17 00:00:00 2001
From: brendan <2bndy5@gmail.com>
Date: Tue, 27 Oct 2020 00:56:20 -0700
Subject: [PATCH] redo-ing nRF24#646

---
 RF24.cpp                          | 40 ----------------------
 utility/ATTiny/RF24_arch_config.h |  2 +-
 utility/ATTiny/spi.h              | 55 -------------------------------
 3 files changed, 1 insertion(+), 96 deletions(-)
 delete mode 100644 utility/ATTiny/spi.h

diff --git a/RF24.cpp b/RF24.cpp
index 74c120f98..fa7df3da3 100644
--- a/RF24.cpp
+++ b/RF24.cpp
@@ -1605,43 +1605,3 @@ void RF24::stopConstCarrier()
     write_register(RF_SETUP, (read_register(RF_SETUP)) & ~_BV(CONT_WAVE) & ~_BV(PLL_LOCK));
     ce(LOW);
 }
-
-//ATTiny support code pulled in from https://github.com/jscrane/RF24
-#if defined(RF24_TINY)
-
-void SPIClass::begin() {
-    // set USCK and DO for output
-    // set DI for input
-        #if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
-    DDRB |= (1 << PB2) | (1 << PB1);
-    DDRB &= ~(1 << PB0);
-        #elif defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__)
-    DDRA |= (1 << PA4) | (1 << PA5);
-    DDRA &= ~(1 << PA6);
-        #elif defined(__AVR_ATtiny2313__) || defined(__AVR_ATtiny4313__)
-    DDRB |= (1 << PB7) | (1 << PB6);
-    DDRB &= ~(1 << PB5);
-        #elif defined(__AVR_ATtiny861__)
-    DDRB |= (1 << PB2) | (1 << PB1);
-    DDRB &= ~(1 << PB0);
-        #endif // defined(__AVR_ATtiny861__)
-    USICR = _BV(USIWM0);
-}
-
-byte SPIClass::transfer(byte b)
-{
-    USIDR = b;
-    USISR = _BV(USIOIF);
-    do {
-        USICR = _BV(USIWM0) | _BV(USICS1) | _BV(USICLK) | _BV(USITC);
-    }
-    while ((USISR & _BV(USIOIF)) == 0);
-    return USIDR;
-}
-
-void SPIClass::end() {}
-void SPIClass::setDataMode(uint8_t mode){}
-void SPIClass::setBitOrder(uint8_t bitOrder){}
-void SPIClass::setClockDivider(uint8_t rate){}
-
-#endif
\ No newline at end of file
diff --git a/utility/ATTiny/RF24_arch_config.h b/utility/ATTiny/RF24_arch_config.h
index cfb871aff..0d17172e8 100644
--- a/utility/ATTiny/RF24_arch_config.h
+++ b/utility/ATTiny/RF24_arch_config.h
@@ -23,7 +23,7 @@
 
 #include <stddef.h>
 
-#include "SPI.h"
+#include <SPI.h>
 
 #define _SPI SPI
 
diff --git a/utility/ATTiny/spi.h b/utility/ATTiny/spi.h
deleted file mode 100644
index 91314e57c..000000000
--- a/utility/ATTiny/spi.h
+++ /dev/null
@@ -1,55 +0,0 @@
-// ATTiny support code is from https://github.com/jscrane/RF24
-
-/**
- * @file spi.h
- * \cond HIDDEN_SYMBOLS
- * Class declaration for SPI helper files
- */
-
-#include <stdio.h>
-#include <Arduino.h>
-#include <avr/pgmspace.h>
-
-#define SPI_CLOCK_DIV4 0x00
-#define SPI_CLOCK_DIV16 0x01
-#define SPI_CLOCK_DIV64 0x02
-#define SPI_CLOCK_DIV128 0x03
-#define SPI_CLOCK_DIV2 0x04
-#define SPI_CLOCK_DIV8 0x05
-#define SPI_CLOCK_DIV32 0x06
-//#define SPI_CLOCK_DIV64 0x07
-
-#define SPI_MODE0 0x00
-#define SPI_MODE1 0x04
-#define SPI_MODE2 0x08
-#define SPI_MODE3 0x0C
-
-#define SPI_MODE_MASK 0x0C  // CPOL = bit 3, CPHA = bit 2 on SPCR
-#define SPI_CLOCK_MASK 0x03  // SPR1 = bit 1, SPR0 = bit 0 on SPCR
-#define SPI_2XCLOCK_MASK 0x01  // SPI2X = bit 0 on SPSR
-
-class SPIClass {
-public:
-    static byte transfer(byte _data);
-
-    // SPI Configuration methods
-
-    inline static void attachInterrupt();
-
-    inline static void detachInterrupt(); // Default
-
-    static void begin(); // Default
-    static void end();
-
-    static void setBitOrder(uint8_t);
-
-    static void setDataMode(uint8_t);
-
-    static void setClockDivider(uint8_t);
-};
-
-extern SPIClass SPI;
-
-/**
- * \endcond
- */
\ No newline at end of file